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The SoC configuration may have more ports enabled than a given board
actually can utilize. Add a routinue that allows the board code to
disable a port that it knows isn't being used.
fm_disable_port() needs to be called before cpu_eth_init().
Signed-off-by: Kumar Gala <[email protected]>
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Pre u-boot Flow:
1. User loads the u-boot image in flash
2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000
(Please note that ISBC expects all these addresses, images to be
validated, entry point etc within 0 - 3.5G range)
3. ISBC validates the u-boot image, and passes control to u-boot
at 0xcffffffc.
Changes in u-boot:
1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M
CONFIG_SYS_PBI_FLASH_WINDOW in AS=1.
(The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash
created by PBL/configuration word within 0 - 3.5G memory range. The
u-boot image at this address has been validated by ISBC code)
2. Remove TLB entries for 0 - 3.5G created by ISBC code
3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by
PBL/configuration word after switch to AS = 1
Signed-off-by: Ruchika Gupta <[email protected]>
Signed-off-by: Kuldip Giroh <[email protected]>
Acked-by: Wood Scott-B07421 <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Ruchika Gupta <[email protected]>
Signed-off-by: Kuldip Giroh <[email protected]>
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P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8],
software need to read the SW1 status to decide what the sysclk needs.
SW1[8~6] : frequency
0 0 1 : 83.3MHz
0 1 0 : 100MHz
others: 66.667MHz
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Enable FDT and FIT support.
Signed-off-by: Michal Simek <[email protected]>
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U-Boot BSP handle 0x3 offset for big endian systems.
Little endian Microblaze systems don't use any offset.
Signed-off-by: Michal Simek <[email protected]>
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Undefined network functionality for systems without ethernet
and disable NFS support.
Signed-off-by: Michal Simek <[email protected]>
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Fix the following gcc4.6 problems:
cmd_date.c: In function ‘do_date’:
cmd_date.c:50:6: warning: variable ‘old_bus’ set but not used
[-Wunused-but-set-variable]
asix.c: In function ‘asix_init’:
asix.c:317:6: warning: variable ‘rx_ctl’ set but not used
[-Wunused-but-set-variable]
usb.c: In function ‘usb_parse_config’:
usb.c:331:17: warning: variable ‘ch’ set but not used
[-Wunused-but-set-variable]
usb.c: In function ‘usb_hub_port_connect_change’:
usb.c:1123:29: warning: variable ‘portchange’ set but not used
[-Wunused-but-set-variable]
usb.c: In function ‘usb_hub_configure’:
usb.c:1183:25: warning: variable ‘hubsts’ set but not used
[-Wunused-but-set-variable]
usb_storage.c: In function ‘usb_stor_CB_reset’:
usb_storage.c:466:6: warning: variable ‘result’ set but not used
[-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <[email protected]>
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The EST SBC8260 is over 10 years old, and the SBC8240 older than
that. With the tiny amount of RAM (by today's standards), there
really isn't anyone interested in running the latest U-boot on
these EOL products anymore.
Signed-off-by: Paul Gortmaker <[email protected]>
CC: [email protected]
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When include/linux/compiler.h is included, the associated gcc3
header is required for older build environments.
Signed-off-by: Scott McNutt <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory
mapped access will be used to read/write the uart registers.
This is especially useful for SoC devices that implement 16550
compatible uarts but that have peripheral access width constraints.
Signed-off-by: Dave Aldridge <[email protected]>
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Currently in do_fat_read() when reading FAT sectors, we have to divide down
LINEAR_PREFETCH_SIZE by the sector size, whereas it's defined as 2 sectors
worth of bytes. In order to avoid redundant multiplication/division, introduce
#define PREFETCH_BLOCKS instead of #define LINEAR_PREFETCH_SIZE.
Signed-off-by: Sergei Shtylyov <[email protected]>
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Apple iPod nanos have sector sizes of 2 or 4 KiB, which crashes U-Boot when it
tries to read the boot sector into 512-byte buffer situated on stack. Make the
FAT code indifferent to the sector size.
Signed-off-by: Sergei Shtylyov <[email protected]>
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* 'post' of git://git.denx.de/u-boot-blackfin:
Blackfin: uart: implement loop callback for post
Blackfin: bf537-stamp/bf548-ezkit: update POST flash block range
Blackfin: post: generalize led/button tests with GPIOs
Blackfin: bf537-stamp: drop uart/flash post tests
Blackfin: post: drop custom test list
Blackfin: bf537-stamp: convert to gpio post hotkey
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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Let common code set the machine ID.
Cc: Stefano Babic <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Let common code set the machine ID.
Cc: Matthias Weisser <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Acked-by: Jason Liu <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Jason Liu <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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Let common code set the machine ID.
Signed-off-by: Fabio Estevam <[email protected]>
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As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c
Signed-off-by: Fabio Estevam <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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This patch allows user to register multiple FEC controllers. To preserve
compatibility with older boards, the mxcfec_register() call is still in place.
To use multiple controllers, new macro is in place, the mxcfec_register_multi(),
which takes more arguments. The syntax is:
mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address);
To disable the fecmxc_register() compatibility stuff, define the macro
CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE
and CONFIG_FEC_MXC_PHYADDR.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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This magic constant with zero documentation, when it's last 8 bits are set to
0x45, configures correctly the PERCLK dividers. Therefore the I2C operates
correctly when divider computed from PERCLK.
Note: This constant is written to CBCDR register in
arch/arm/cpu/armv7/mx5/lowlevel_init.S, but it's written only once. The register
is accessed three more times in the file, with different values written to it
each time.
Signed-off-by: Marek Vasut <[email protected]>
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Add the initial support for MX25PDK booting from SD card via internal boot.
Signed-off-by: Fabio Estevam <[email protected]>
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Change the prompt as done in other i.MX boards.
Signed-off-by: Fabio Estevam <[email protected]>
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The omap serial names have changed from ttySx to ttyOx,
so the console should be also changed to support this.
Signed-off-by: Thomas Weber <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Change the default console from ttyS2 to ttyO0 to
match the Linux default for the EVM.
Signed-off-by: Sanjeev Premi <[email protected]>
Cc: Sandeep Paulraj <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Config VMMC voltage to 3V for MMC/SD card slot
and PBIAS settings needed for OMAP4
Fixes MMC/SD detection on boot from eMMC.
Signed-off-by: Balaji T K <[email protected]>
Signed-off-by: Aneesh V <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Adds NAND library to SPL.
Signed-off-by: Simon Schwarz <[email protected]>
Acked-by: Scott Wood <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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This patch adds support for 88E3015 PHY for Marvell GplugD board.
This patch depends on series of patch which adds support for Marvell
GuruPlug-Display.
Signed-off-by: Ajay Bhargav <[email protected]>
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This patch enables ethernet support for Marvell GplugD board. Network
related commands works.
Signed-off-by: Ajay Bhargav <[email protected]>
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This patch adds support for Fast Ethernet Controller driver for
Armada100 series.
Signed-off-by: Ajay Bhargav <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
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Update MPC8349EMDS to use unified DDR driver instead of spd_sdram.c.
The unified driver can initialize data using DDR controller. No need to
use DMA if just to initialze for ECC.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Unified DDR driver is maintained for better performance, robustness and bug
fixes. Upgrading to use unified DDR driver for MPC83xx takes advantage of
overall improvement. It requires changes for board files to customize
platform-dependent parameters.
To utilize the unified DDR driver, a board needs to define CONFIG_FSL_DDRx
in the header file. No more boards will be accepted without such definition.
Note: the workaround for erratum DDR6 for the very old MPC834x Rev 1.0/1.1
and MPC8360 Rev 1.1/1.2 parts is not migrated to unified driver.
Signed-off-by: Kim Phillips <[email protected]>
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Useful for various debug to know how various regsters might be set
in a human readable form.
Signed-off-by: Kumar Gala <[email protected]>
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USB protocol macros (CONFIG_USB_EHCI ...) to be included only when
CONFIG_HAS_FSL_DR_USB is defined for a board. Presence of USB DR controller
should be declared along with the underlying protocol used in the controller
Signed-off-by: Ramneek Mehresh <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Add support for RGMII, SGMII and XAUI Ethernet on P2041RDB board.
The five dTSEC can be routed to two on-board RGMII phy, three on-board
SGMII phy or four SGMII phy on SGMII riser card according to different
serdes protocol configuration and board lane configuration. Also updated
the device tree to direct the Fmac MAC to the correct PHY.
Removed CONFIG_SYS_FMAN_FW as its not used anywhere.
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The P1023 has two 1G ethernet controllers the first can run in
SGMII, RGMII, or RMII. The second can only do SGMII & RGMII.
We need to setup a for SoC & board registers based on our various
configuration for ethernet to function properly on the board.
Removed CONFIG_SYS_FMAN_FW as its not used anywhere.
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Lei Xu <[email protected]>
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P4080DS.
The board supports add-on cards for SGMII and XAUI functionality. Which
slots on the board these cards are in is a function of the SERDES option
selected and muxes on the board.
Additionally because of the high-configurablity which MDIO bus one is
connected to is "selected" via an FPGA register. We create dummy MDIO
bus for the phy layer and hide the mux manipulation in this dummy layer.
Add fman fdt helper function in board common code it'll be used by several
freescale boards that do various muxing of the MDIO signals based on which
controller/interface one is trying to talk to.
Removed CONFIG_SYS_FMAN_FW as its not used anywhere.
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block. Normally it is utilized
via Queue Manager (Qman) and Buffer Manager (Bman). However for boot
usage the FMan supports a mode similar to QE or CPM ethernet collers
called Independent mode.
Additionally the FMan block supports multiple 1g and 10g interfaces as a
single entity in the system rather than each controller being managed
uniquely. This means we have to initialize all of Fman regardless of
the number of interfaces we utilize.
Different SoCs support different combinations of the number of FMan as
well as the number of 1g & 10g interfaces support per Fman.
We add support for the following SoCs:
* P1023 - 1 Fman, 2x1g
* P4080 - 2 Fman, each Fman has 4x1g and 1x10g
* P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Dai Haruki <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Lei Xu <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Some SOCs have discontiguously-numbered cores, and so we can't determine the
valid core numbers via the FRR register any more. We define
CPU_TYPE_ENTRY_MASK to specify a discontiguous core mask, and helper functions
to process the mask and enumerate over the set of valid cores.
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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