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https://source.denx.de/u-boot/custodians/u-boot-marvell
CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=394&view=results
- cmd: tlv_eeprom: Minor improvements (Hugo)
- kirkwood: Enable bootstd and other modernization for ib62x0 board
(Tony)
- spi: mvebu: Correct dependencies on MVEBU_A3700_SPI (Tom)
- ddr: marvell: a38x: Fix unsigned issues detected by smatch (Andrew)
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https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2025.10 cycle:
This feature set includes the addition of new sama7d65 SoC and a new
board named sama7d65-curiosity.
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Enable bootstd.
Update defconfigs to the latest u-boot requirements.
Enable SYS_THUMB_BUILD and LTO and to reduce binary size.
Enable NET_RANDOM_ETHADDR.
Disable JFFS2 support.
Signed-off-by: Tony Dinh <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add the basic Kconfig options, addresses and other values for the
existing Kconfig settings for the new Allwinner A523/T527/H728 SoC.
Signed-off-by: Andre Przywara <[email protected]>
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The X-Powers AXP323 is very close sibling to the AXP313A, only that it
adds support for dual-phasing the first two DC/DC converters.
We do not really care about this particular feature, so just add the new
compatible string and tie it to the existing AXP313A support code.
Signed-off-by: Andre Przywara <[email protected]>
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The generic name 'EFI' would be more useful for common EFI features. At
present it just refers to the EFI app and stub, which is confusing.
Rename it to EFI_CLIENT
Signed-off-by: Simon Glass <[email protected]>
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- Enhanced e850-96 support
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Add board specific functions for sama7d65_curiosity.
Signed-off-by: Ryan Wanner <[email protected]>
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Make it possible to update E850-96 firmware binaries using EFI Capsule
Update mechanism. For example, to update the U-Boot binary, the capsule
file can be generated like this:
$ ./tools/mkeficapsule --index 4 \
--guid 629578c3-ffb3-4a89-ac0c-611840727779 \
u-boot.bin capsule4.bin
The resulting 'capsule4.bin' should be copied to ESP partition (in
/boot/efi/EFI/UpdateCapsule/ directory). Then after reboot U-Boot will
update the 'bootloader' area in eMMC Boot Partition A (boot0) and remove
the capsule file, by EFI boot manager executed as a part of Standard
Boot:
Applying capsule capsule4.bin succeeded.
Reboot after firmware update.
The kernel will also expose the ESRT table information via SysFS in
/sys/firmware/efi/esrt/entries.
Signed-off-by: Sam Protsenko <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27149
- Add support for the NXP imx93 frdm board.
- imx93_evk and phycore-imx93 cleanups.
- Convert imx6dl-sielaff to OF_UPSTREAM and fix serial download mode boot.
- Fix crash in imx power-domain.
- Migrate Phytec imx8mm boards to standard boot.
- Fix smatch warnings.
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Neha Malcom Francis <[email protected]> says:
This series implements a driver for the BIST (Built-In Self Test) module
for K3 devices. The BIST driver must ideally support triggering of BIST
tests, both PBIST (Memory BIST) and LBIST (Logic BIST) on a core. Both
tests are destructive in nature. Please see links [1] and [2] for
further information regarding the two.
At boot up, BIST is executed by hardware for the MCU domain
automatically as part of HW POST. So BIST has been checked only for the
MCU domain when U-Boot comes up in the usual U-Boot to Linux boot flow.
To facilitate the use-case where some safe firmware is intended to be
run on a safe core, it is best to have triggered the BIST tests on that
core. As an example, we take triggering the BIST tests on the MAIN R52_x
cores. The triggering patch is kept as DONOTMERGE.
The general procedure for triggering BIST on a core is:
1. Power on the core under test following a sequence
2. Trigger the BIST test
3. Reset the core under test following a sequence
BIST tests are triggered from A72 SPL where the DM (Device Manager
firmware that handles power management) is already up and can perform
these power sequences for us.
Boot logs (with LOG_DEBUG and CONFIG_K3_BIST enabled) and DT node kept (already
merged to ti-k3-dts-next [3]):
https://gist.github.com/nehamalcom/3fed504d038b54e3e05ba3874d73d603
[1] https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/sdl/sdl_docs/userguide/j721e/modules/pbist.html#introduction
[2] https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/sdl/sdl_docs/userguide/j721e/modules/lbist.html#introduction
[3] https://lore.kernel.org/all/[email protected]/
Link: https://lore.kernel.org/r/[email protected]
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Add a driver for the BIST module that support triggering of both PBIST
(Memory BIST) and LBIST (Logic BIST) tests. Also expose the relevant
operations and functions that would be required for an end user to
trigger the tests.
Signed-off-by: Neha Malcom Francis <[email protected]>
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uclass_find_next_device always returns 0, so instead make it a void and
update calling sites.
Signed-off-by: Andrew Goodbody <[email protected]>
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Add the initial board support for the NXP i.MX93 FRDM board:
https://www.nxp.com/design/design-center/development-boards-and-designs/frdm-i-mx-93-development-board:FRDM-IMX93
Based on the NXP U-Boot code.
There were attempts to upstream the board devicetree, but it has not been
accepted upstream yet:
https://lore.kernel.org/linux-arm-kernel/[email protected]/
Once it reaches upstream, we can switch to OF_UPSTREAM.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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There is nothing in this file that makes use of the definitions from
sizes.h and stringify.h.
Remove them.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Remove `fpga_no_sup` to get rid of Werror=unused-function when all
FPGA configurations are enabled.
Swap all printf calls to log_* as this is now preferred and includes
the calling __func__.
Signed-off-by: Pieter Van Trappen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Errors reported by GCC 14.2 when enabling FPGA commands and
drivers. Also many style fixes as reported by checkpatch.pl on the
diffs. Most changes in stratixII.c which has been reorganized as well
to avoid the top function prototypes.
No functional changes.
Signed-off-by: Pieter Van Trappen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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In [0], Andrew noted a code quality issue in the implementation of
blk_find_first and blk_find_next. This led to the observation that the
logic of these functions was also likely incorrect, and based on a quick
check it seemed the functions were unused outside of test code, which
did not exercise the potential failure case, so we felt they should be
removed. In [1], a test patch which illustrates the failure in sandbox
is provided for reference.
Because a more thorough check agrees that these functions are unused,
they are currently incorrect, and fixed/removable flags on block devices
prior to probe are unreliable, just remove these functions instead of
fixing them. All potential users should have used blk_first_device_err
instead anyway.
CI results at [2].
[0] https://patchwork.ozlabs.org/project/uboot/patch/[email protected]/
[1] https://gist.github.com/gmalysa/b05e73a5c14bc18c5741a0e0e06a2992
[2] https://gitlab.com/gmalysa/lnxdsp-u-boot/-/pipelines/1931210857
Signed-off-by: Greg Malysa <[email protected]>
Reviewed-by: Andrew Goodbody <[email protected]>
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Upcoming boards will have different ethernet interfaces. So we move this
variable out of the common code.
Signed-off-by: Holger Brunck <[email protected]>
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This variable is unused since we dropped the support for the Kirkwood
boards.
Signed-off-by: Holger Brunck <[email protected]>
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Fastboot currently supports MMC and NAND flash devices. Similarly,
extend the support to SPI flash memories.
Note that in this initial implementation, partitions on the device are
not supported yet, but raw partitions can be set in U-Boot environment.
To define a raw partition descriptor, add an environment variable
similar to the MMC case:
```
fastboot_raw_partition_<raw partition name>=<offset> <size>
```
for example:
```
fastboot_raw_partition_boot=0x0 0x1000000
```
Signed-off-by: Ariel D'Alessandro <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
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As the size of 64b ARM kernels, DTs, vendor firmware, and initial ram
disks continues to grow, the 256MB size limit set aside for image
processing by the bootm command has become too small for some K3
reference boards.
For ARMv7 removing this limit could introduce issues so move the
bootm_size variable to ti_armv7_keystone2.env and remove the limit for
any board using a TI K3 SoC.
Signed-off-by: Bryan Brattlof <[email protected]>
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To support PQC container format which is used for post quantum
authentication on new i.MX parts like i.MX94
The major changes compared to legacy container format is in
signature block, new container tag and version, and new alignment
of container header.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
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i.MX95 B0 uses image container format v2, and `one container header
occupies 0x4000, so that CMD_CNTR_VERSION needs to be added.
The purpose of CMD_DUMMY_DDR is to create a dummy image entry in boot
container prior the DDR OEI image entry. ROM reads the address of DUMMY
DDR image entry and passes it to DDR OEI in OEI entry function as
parameter value, in order to indicate the offset of training data with
the boot container.
Signed-off-by: Alice Guo <[email protected]>
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Rasmus Villemoes <[email protected]> says:
I was bitten by our limit macros not being usable in #if conditionals
when building a standalone app. It turns out that the work to fix that
had already been started by the inclusion of the mbedtls library, so
it's something that people do hit.
Let's finish the job by providing suitable limit macros for all three families:
- Standard C types, char, short, ...
- Kernel-style fixed-width types s8, u64, ...
- POSIX/C99 fixed-width types int16_t, uint32_t, ...
Please note that a naive approach like spelling out the full decimal
value for the constants doesn't really work, as there is no such thing
as a "negative integer constant". That is, doing
#define LLONG_MIN -9223372036854775808LL
would lead to the compiler complaining
warning: integer constant is so large that it is unsigned
and the type of that LLONG_MIN would actually be "unsigned long long", so e.g.
#if LLONG_MIN >= 0
#warning "LLONG_MIN is not negative?"
#endif
would fire.
Link: https://lore.kernel.org/r/[email protected]
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Currently, we only have UINT32_MAX and UINT64_MAX in limits.h, and
then stdint.h and kernel.h somewhat randomly define UINT8_MAX and
INT32_MAX, respectively.
Provide a full set of definitions in terms of the min/max macros for
the types that [u]intNN_t are defined in terms of, namely the {s,u}NN
ones.
Try to avoid breaking whatever depended on getting UINT8_MAX from our
compat stdint.h by replacing it with an include of limits.h.
Signed-off-by: Rasmus Villemoes <[email protected]>
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Since we define the {s,u}{8,16,32,64} types the same way on all
architectures, i.e. everybody uses asm-generic/int-ll64.h, we can just
define the associated limit macros in terms of those for the
corresponding types. This eliminates another set of limit macros that
are not usable in #if conditionals.
These type names and macros are not C or POSIX, so there's no language
violation, but certainly a violation of developers' reasonable
expectations.
Signed-off-by: Rasmus Villemoes <[email protected]>
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In a customer project that was building a stand-alone application, I
hit a problem related to the fact that our LONG_MAX and friends are
not standards-compliant, in that they are not "suitable for use in #if
preprocessing directives"
... /toolchain_none/arm-cortexa8-eabi/sys-include/machine/_default_types.h:25:31: error: missing binary operator before token "long"
25 | || ( defined(LLONG_MAX) && (LLONG_MAX > 0x7fffffff) )
| ^~~~~~~~~
So following up on commit 13de8483388 ("mbedtls: add mbedtls into the
build system"), move the rest of the macros associated to the standard
C types {signed,unsigned} {char, short, int, long, long long} (and of
course bare 'char') to limits.h.
Make use of the fact that both gcc and clang provide suitable
predefined __FOO_MAX__ macros for the signed types, and use a standard
scheme for defining the FOO_MIN and UFOO_MAX macros in terms of
FOO_MAX.
Note that suffixes like L and ULL are allowed for preprocessor
integers; it is (casts) which are not. And using appropriate suffixes,
we can arrange for the type of e.g. UINT_MAX to be "unsigned int" due
to integer promotion rules.
Signed-off-by: Rasmus Villemoes <[email protected]>
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Svyatoslav Ryhel <[email protected]> says:
Add uclass for HW AES cryptographic devices found on some devices, like
Tegra20/Tegra30 SoC AES engine.
Link: https://lore.kernel.org/r/[email protected]
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Create a basic framework for a group of devices that perform AES
cryptographic operations.
Signed-off-by: Ion Agorria <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Add r7s72100 Genmai board support. Serial console, NOR Flash and
Ethernet are known to work however on-board SDRAM is not yet enabled.
Signed-off-by: Magnus Damm <[email protected]>
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Remove various deprecated code comments, no functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Drop CFG_SH_ETHER_PHY_MODE from configuration files, this value
is never used. No functional change intended.
Signed-off-by: Marek Vasut <[email protected]>
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Drop CFG_SH_ETHER_PHY_ADDR from README and configuration files, this
value is never used, PHY address is extracted from control DT instead.
No functional change intended.
Signed-off-by: Marek Vasut <[email protected]>
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Drop CFG_SH_ETHER_CACHE_WRITEBACK and CFG_SH_ETHER_CACHE_INVALIDATE,
which are now always enabled in the sh_eth driver, because those cache
operations are always available. On architectures which do not implement
cache operations yet, cache operations have to be implemented first.
CFG_SH_ETHER_ALIGNE_SIZE now set as SH_ETHER_ALIGN_SIZE in sh_eth.h
based on architecture and no longer configured on board level.
Remove CFG_SH_ETHER_CACHE_WRITEBACK configuration option from README.
Signed-off-by: Marek Vasut <[email protected]>
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The CFG_SH_ETHER_USE_PORT configuration option is a remnant from
before U-Boot DM existed and SH Ethernet made full use of it, and
is no longer used, remove it.
Signed-off-by: Marek Vasut <[email protected]>
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We have had no platforms that make use of this since 2021, so drop it.
Signed-off-by: Tom Rini <[email protected]>
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This driver has no users after we removed the last supported platform in
2023.
Fixes: 7a3ee61f5551 ("arm: Remove omap5_uevm board")
Signed-off-by: Tom Rini <[email protected]>
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ft_board_setup_ex()"
João Paulo Gonçalves <[email protected]> says:
In some use cases, board-specific device tree changes must not be overwritten
by system fixups. Although U-Boot provides ft_board_setup_ex() for this
purpose, it is currently only used on TI Keystone. This series makes
ft_board_setup_ex() a generic option, allowing its use by other architectures
and boards.
Additionally, considering that Toradex Verdin-AM62P hardware lifetime
guarantees are based on a 105°C junction temperature (while TI AM62Px supports
up to 125°C), this series implements necessary changes within TI K3 AM62P and
Toradex board code. These changes include exporting common fixup device Tree
functions used in TI K3 for board-code access and also fixup for AM62P thermal
zones to correctly reflect the number of CPU nodes according to the SoC part
number.
Link: https://lore.kernel.org/r/20250623-am62p-fdt-fixup-trip-points-v1-0-12355eb6a72f@toradex.com
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In some use cases, board-specific device tree changes must not be
overwritten by system fixups. Although U-Boot provides
ft_board_setup_ex() for this purpose, it is currently only used on TI
Keystone. Make ft_board_setup_ex() to be a generic option, allowing its
use by other architectures/boards. To maintain backward compatibility,
enable it by default on TI Keystone.
Signed-off-by: João Paulo Gonçalves <[email protected]>
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This file does not need <config.h> nor <miiphy.h> so remove them.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <asm/gpio.h> so remove it. This file does
however need <linux/types.h> so add that in. This also shows that
arch/arm/mach-rockchip/rk3399/rk3399.c and board/lg/star/star.c were
indirectly getting <asm/gpio.h> from here, so add <asm/gpio.h> to them.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <part.h> so remove it. This file does however
need <stdbool.h> so add that in.
Signed-off-by: Tom Rini <[email protected]>
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This file does not need <linker_lists.h> so remove it.
Signed-off-by: Tom Rini <[email protected]>
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This file should not include itself, drop that.
Signed-off-by: Tom Rini <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.10-rc1
cmd:
- Introduce CMD_HELP Kconfig option
fpga:
- Fix in intel_smd_mb
mini:
- Remove simple-bus driver and description
- Disable CMD_HELP
firmware:
- Fix dependencies
- Switch to new SMC firmware format
cadence qspi:
- Fix read/write STIG mode
- Set tshsl_ns to at least one sclk_ns
sdhci:
- Call sdhci reset if wired
zynqmp-clk:
- Add support for DPLL clock source
zynqmp:
- Sync clock ID bindings with Linux
- defconfig updates
- Enable rng-seed generation
versal:
- Fix clock dependency
versal2:
- defconfig updates
- Enable sysreset
# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYIAB0WIQSXAixArPbWpRanWW+rB/7wTvUR9QUCaG0Z7AAKCRCrB/7wTvUR
# 9YyCAQCseYDzYZbdh4e2g6LirVovzPv2LUNRFInYSKleegOjiwEAgQ0p9wZ0hNNj
# TpWf6sOKa/0ad3bZBtvbuV0G9WpqWAA=
# =2pbC
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 08 Jul 2025 07:15:24 AM CST
# gpg: using EDDSA key 97022C40ACF6D6A516A7596FAB07FEF04EF511F5
# gpg: Can't check signature: No public key
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Separate code to own function to be able to add new enhancement format.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/cf99fe1af82bc004de3e313d4018464f4504f380.1750858165.git.michal.simek@amd.com
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As part of the recent cleanup of dt-bindigns header files we did not
remove our copy of dt-bindings/clock/xlnx-zynqmp-clk.h at the time. This
is because the difference between ours and current upstream is that
current upstream has a #warning to not use it and to instead use
xlnx-zynqmp-clk.h. So we change zynqmp-clk-ccf.dtsi to use the other
and upstream-only file and then delete our dt-bindings file.
Signed-off-by: Tom Rini <[email protected]>
Tested-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Implement the sntp command when NET_LWIP=y.
Signed-off-by: Jerome Forissier <[email protected]>
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Extract the code that sets the RTC clock from sntp_handler() in
net/sntp.c and make it a new function net_sntp_set_rtc() in
net/net-common.c. This will allow re-use with NET_LWIP.
According to [1] it is safe to assume that all devices have been
converted to DM_RTC so drop the useless code.
[1] https://lists.denx.de/pipermail/u-boot/2025-June/591376.html
Signed-off-by: Jerome Forissier <[email protected]>
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