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CONFIG_SYS_HZ was being calculated (incorrectly) in nios2 configuration
headers. Updated comments to accurately describe timebase macros.
Signed-off-by: Scott McNutt <[email protected]>
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The outx/writex macros were using writex(addr, val) rather than
the standard writex(val, addr), resulting in incompatibilty with
architecture independent components. This change set uses standard
parameter order.
Signed-off-by: Scott McNutt <[email protected]>
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This is needed for jffs2 support.
Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>
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These are needed to use ubi/ubifs.
Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>
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Copy from linux header. This is needed for generic bitops.
Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>
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Just pull in asm-generic.
Signed-off-by: Thomas Chou <[email protected]>
Signed-off-by: Scott McNutt <[email protected]>
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The standard Altera UART & JTAG UART as well as the OpenCores
YANU driver are now in individual files in drivers/serial
rather than a single file uner cpu/nios2.
Signed-off-by: Scott McNutt <[email protected]>
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After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly. This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.
On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way. If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation. The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).
Currently we are limited to power of two sized DDR since we only use a
single bat. If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Use the same code between primary and secondary cores to init the
L1 cache. We were not enabling cache parity on the secondary cores.
Also, reworked the L1 cache init code to match the e500mc L2 init code
that first invalidates the cache and locks. Than enables the cache and
makes sure its enabled before continuing.
Signed-off-by: Kumar Gala <[email protected]>
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and removed it from the .h file
Signed-off-by: Frans Meulenbroeks <[email protected]>
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The ml300 board has a number of issues, but nobody cares about this
long-orphaned board any more. Remove it.
Signed-off-by: Wolfgang Denk <[email protected]>
Acked-by: Michal Simek <[email protected]>
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The flash location is at 0xff800000, not 0
Signed-off-by: TsiChung Liew <[email protected]>
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The CF will call cache functions in lib_m68/cache.c and the
cache settings are defined in platform configuration file.
Signed-off-by: TsiChung Liew <[email protected]>
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The proper SDRAM size is 32MB not 64MB
Signed-off-by: Jingchang Lu <[email protected]>
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Reside Ethernet buffer descriptors in SRAM instead of DRAM. Add
CONFIG_SYS_TX_ETH_BUFFER in platform configuration file. Update
DRAM control and SRAM control register setting. Update cache
setting where size does not write to proper region.
Signed-off-by: TsiChung Liew <[email protected]>
Signed-off-by: Jason Jin <[email protected]>
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Provide extra environment Data. Remove default network
address and MAC address.
Signed-off-by: TsiChung Liew <[email protected]>
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Fix incorrect default environment for flash erase or protect
range. Change offset from 0 to 0xff80nnnn. Remove default
ethernet setup and MAC address.
Signed-off-by: TsiChung Liew <[email protected]>
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Provide parameter passing to uart_port_config(). Update port
configuration - un-mask it before enable the bits.
Signed-off-by: TsiChung Liew <[email protected]>
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Use correct definition for _MASK and _UNMASK. It was combined in
the previous used and causes confusion.
Signed-off-by: TsiChung Liew <[email protected]>
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Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
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This patch adds support for ASTRO board(s) based on MCF5373L.
Signed-off-by: Wolfgang Wegner <[email protected]>
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440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.
This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.
Signed-off-by: Rupjyoti Sarmah <[email protected]>
Acked-by : Victor Gallardo <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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The soft-i2c code for AT91 defines I2C_SOFT_DECLARATIONS
for direct access by dereferencing a pio pointer.
The OTC570 platform uses the AT91 gpio API so it does not
need the pio variable.
Signed-off-by: Matthias Fuchs <[email protected]>
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Modified to use IO accessor routines consistently. Eliminated volatile usage
to keep checkpatch.pl happy.
Signed-off-by: Cyril Chemparathy <[email protected]>
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Allow overwriting defined partitions in the device tree blob
using partition info defined in the 'mtdparts' environment
variable.
Signed-off-by: Anatolij Gustschin <[email protected]>
Cc: Gerald Van Baren <[email protected]>
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Add POST progress API implemented as weak calls before and after
each call to the POST test callback in the post_run_single routine
of the post.c file.
Signed-off-by: Michael Zaidman <[email protected]>
Acked-by: Detlev Zundel <[email protected]>
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Signed-off-by: Scott McNutt <[email protected]>
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Signed-off-by: Scott McNutt <[email protected]>
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We do not support a processor that never reached a real customer.
Signed-off-by: Detlev Zundel <[email protected]>
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Signed-off-by: Asen Dimov <[email protected]>
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I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'
Signed-off-by: Thomas Weber <[email protected]>
Add some more: neither Makefile nor config.mk need execute permissions.
Signed-off-by: Wolfgang Denk <[email protected]>
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Signed-off-by: Scott McNutt <[email protected]>
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Signed-off-by: Scott McNutt <[email protected]>
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The new zlib code wants asm/unaligned.h, so have the Blackfin version pull
in the asm-generic/unaligned.h.
Signed-off-by: Mike Frysinger <[email protected]>
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This is based on the asm-arm/unaligned.h, but made generic so all arches
that cannot do unaligned accesses can utilize it.
Signed-off-by: Mike Frysinger <[email protected]>
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Coding style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <[email protected]>
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This code has compile problems and the company does not even exist any
more. So we take the liberty to drop support for it.
Signed-off-by: Detlev Zundel <[email protected]>
CC: Wolfgang Denk <[email protected]>
CC: Ben Warren <[email protected]>
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The 36-bit build exceeds the 512k size we have. Removing FIT type image
support allows us to fit and we dont really use it.
Signed-off-by: Kumar Gala <[email protected]>
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Also enable support for CONFIG_HWCONFIG because we use this for
configuring if this hardware has a FEC or not.
syntax:
hwconfig=fec:on if hardware has an fec
hwconfig=fec:off if hardware has no fec
Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Wolfgang Denk <[email protected]>
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This patch uses gd->relocaddr variable to store uboot's relocated
address in RAM and shows it in bdinfo command.
This patch moves CONFIG_AMIGAONEG3SE style copying of the address
in board_init_f to just before relocation is actually done.
Signed-off-by: Richard Retanubun <[email protected]>
Tested-by: Detlev Zundel <[email protected]>
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* convert otc570 board to use c stucture SoC access
* change gpio access to at91_gpio syntax
Signed-off-by: Daniel Gorsulowski <[email protected]>
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* updates the conditional main_clock calculation (if AT91_MAIN_CLOCK defined) to c structure SoC access
* add need register flags
Signed-off-by: Jens Scharsig <[email protected]>
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The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: Stefano Babic <[email protected]>
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Add support for the ARM part of the mgcoge2, named suen3.
This board is based on the Marvell Kirkwood (88F6281) SoC.
As there come more board variants, common config options
are collected in include/configs/km_arm.h. Also, this board
use common code for all keymile boards, which is stored in
board/keymile/common/common.c
Signed-off-by: Holger Brunck <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
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This is an i.MX25 base board with only NAND
so it uses nand_spl to boot.
Signed-off-by: John Rigby <[email protected]>
Tune configuration, add support for (redundant) environment in NAND.
Signed-off-by: Wolfgang Denk <[email protected]>
Acked-by: Wolfgang Denk <[email protected]>
CC: Fred Fan <[email protected]>
CC: Tom <[email protected]>
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Use RMII for MX25
Add code to init gasket that enables RMII
Signed-off-by: John Rigby <[email protected]>
CC: Ben Warren <[email protected]>
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