| Age | Commit message (Collapse) | Author |
|
SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
Signed-off-by: Guennadi Liakhovetski <[email protected]>
|
|
Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.
Signed-off-by: Guennadi Liakhovetski <[email protected]>
|
|
This is needed since now with HUSH enabled (amcc-common.h) the image
read from NAND exceeds the previous limit.
Signed-off-by: Stefan Roese <[email protected]>
|
|
Signed-off-by: Ben Warren <[email protected]>
|
|
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.
The default is to assert CS together with ALE. The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
The default is wrong for the NOR flash and CPLD on the ADS5121.
This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.
Signed-off-by: Martha J Marx <[email protected]>
Signed-off-by: John Rigby <[email protected]>
|
|
Signed-off-by: TsiChung Liew <[email protected]>
|
|
Signed-off-by: TsiChung Liew <[email protected]>
|
|
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <[email protected]>
|
|
The user manuals recommend 7.
Signed-off-by: Kurt Mahan <[email protected]>
Acked-by: TsiChung Liew <[email protected]>
|
|
M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
uart baudrate increase from 19200 to 115200 bps
Signed-off-by: TsiChung Liew <[email protected]>
|
|
|
|
Signed-off-by: Heiko Schocher <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
Signed-off-by: Srikanth Srinivasan <[email protected]>
Signed-off-by: Dejan Minic <[email protected]>
Signed-off-by: Jason Jin <[email protected]>
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
also have SERDES init code for the 8536.
Signed-off-by: Kumar Gala <[email protected]>
Signed-off-by: Srikanth Srinivasan <[email protected]>
Signed-off-by: Dejan Minic <[email protected]>
Signed-off-by: Jason Jin <[email protected]>
Signed-off-by: Dave Liu <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Provide a helper function that board code can call to map TLBs when
setting up DDR.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers. (83xx, 85xx, 86xx).
The code is broken up into the following steps:
GET_SPD
COMPUTE_DIMM_PARMS
COMPUTE_COMMON_PARMS
GATHER_OPTS
ASSIGN_ADDRESSES
COMPUTE_REGS
PROGRAM_REGS
This allows us to share more code an easily allow for board specific code
overrides.
Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.
Signed-off-by: James Yang <[email protected]>
Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Becky Bruce <[email protected]>
Signed-off-by: Ed Swarthout <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
|
|
Provide a helper function that will setup the last available
LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Also adds helper functions for DDR1/2 to verify the checksum.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Signed-off-by: Heiko Schocher <[email protected]>
|
|
Created a new fdt_initrd() to deal with setting the initrd properties
in the device tree and fixing up the mem reserve. We can use this
both in the choosen node handling and lets us remove some duplicated
code when we fixup the initrd info in bootm on PPC.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Move the fdt resizing code out of ppc specific boot code and into
common fdt support code.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Created a bootm_start() that handles the parsing and detection of all
the images that will be used by the bootm command (OS, ramdisk, fdt).
As part of this we now tract all the relevant image offsets in the
bootm_headers_t struct. This will allow us to have all the needed
state for future sub-commands and lets us reduce a bit of arch
specific code on SPARC.
Created a bootm_load_os() that deals with decompression and loading
the OS image.
Signed-off-by: Kumar Gala <[email protected]>
|
|
To allow for persistent state between future bootm subcommands we
need the lmb to exist in a global state.
Moving it into the bootm_headers_t allows us to do that.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Set the fdt working address so "fdt FOO" commands can be used as part
of the bootm flow. Also set an the environment variable "fdtaddr"
with the value.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Move the code that handles finding a device tree blob and relocating
it (if needed) into common code so all arch's have access to it.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Move determing if we have a ramdisk and where its located into the
common code. Keep track of the ramdisk start and end in the
bootm_headers_t image struct.
Signed-off-by: Kumar Gala <[email protected]>
|
|
Move entry point code out of each arch and into common code.
Keep the entry point in the bootm_headers_t images struct.
Signed-off-by: Kumar Gala <[email protected]>
|
|
|
|
Use the same mapping in flash as used by Linux
Signed-off-by: Wolfgang Denk <[email protected]>
|