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The code provides framework for heterogeneous multicore chips based on StarCore
and Power Architecture which are chasis-2 compliant, like B4860 and B4420
It will make u-boot recognize all non-ppc cores and peripherals like
SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
Example boot logs of B4860QDS:
U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45)
CPU0: B4860E, Version: 2.2, (0x86880022)
Core: e6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
CCB:666.667 MHz,
DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz
CPRI:600 MHz
MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz
FMAN1: 666.667 MHz
QMAN: 333.333 MHz
Top level changes include:
(1) Top level CONFIG to identify HETEROGENUOUS clusters
(2) CONFIGS for SC3900/DSP components
(3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO"
updated for dsp cores and other components
(3) APIs to get DSP num cores and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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In order to work with our downstream U-Boot environment and update
scripts add support for the following miscellaneous commands:
CONFIG_CMD_SETEXPR
CONFIG_FAT_WRITE
Increase the console I/O and print as well as argument buffer sizes:
CONFIG_SYS_CBSIZE
CONFIG_SYS_PBSIZE
CONFIG_SYS_BARGSIZE
Increase the maximum number of arguments allowed:
CONFIG_SYS_MAXARGS
Signed-off-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Now with all the Tegra PCIe and Intel E1000 gigabit Ethernet driver
updates being merged actually make use of it.
While at it get rid of the USB networking support which now does not
make much sense any longer.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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All boards need CONFIG_BOARD_EARLY_INIT_F, and many actively need
CONFIG_BOARD_LATE_INIT. Move both of these into tegra-common.h so that
board config headers don't need to repeatedly define them.
Later commits will add new code in board_late_init() which applies to
all boards, so CONFIG_BOARD_LATE_INIT should be enabled for all Tegra
boards.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This commit removes the dram reservation from board file,
because it is done in a common code.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This commit enables the last DRAM bank and reserves
the last 22 MiB of it, for the secure firmware.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Akshay Saraswat <[email protected]>
Cc: Hyungwon Hwang <[email protected]>
Cc: Minkyu Kang <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add basic Xilinx ZynqMP arm64 support.
Serial and SD is supported.
It supports emulation platfrom ep108 and QEMU.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Signed-off-by: Andreas Bießmann <[email protected]>
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Add EXT2/EXT4 and BOUNCE_BUFFER support.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Otavio Salvador <[email protected]>
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With UMS support we are able to flash the eMMC from U-boot, which is very
convenient.
Add UMS support to make the eMMC flashing process easier.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Otavio Salvador <[email protected]>
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Integrate latest validated register settings from Toradex WinCE BSP
4.2 working accross all module versions from early V1.x, V1.2D, V2.2B
to V2.4A.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Usually not required for NOR flash.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Signed-off-by: Marcel Ziswiler <[email protected]>
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While 'mmc init' is no longer required the address to bootm the kernel
from NOR flash was wrong.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Specify a CONFIG_BOARD_SIZE_LIMIT of 256 KB in order to avoid
overwriting the factory configuration block located at offset 0x40000
in NOR flash.
Signed-off-by: Marcel Ziswiler <[email protected]>
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To save more than 20 KB of precious space in NOR flash get rid of the
following configuration options:
CONFIG_CMD_LOADB
CONFIG_CMD_LOADS
CONFIG_SYS_LONGHELP
Signed-off-by: Marcel Ziswiler <[email protected]>
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Migrate Toradex Colibri PXA270 to use CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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I couldn't quite figure out whether or not CONFIG_SYS_ENV_IS_NOWHERE
actually ever worked but nowadays this is called CONFIG_ENV_IS_NOWHERE.
Signed-off-by: Marcel Ziswiler <[email protected]>
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Signed-off-by: Marcel Ziswiler <[email protected]>
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Signed-off-by: Marcel Ziswiler <[email protected]>
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Basically finish what the following commit started a long time ago:
488f5d8790c451fc527fe5d2ef218f2a5e40ea17
Signed-off-by: Marcel Ziswiler <[email protected]>
For mx35pdk/woodburn:
Acked-by: Stefano Babic <[email protected]>
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Freescale's SEC block has built-in Data Encryption
Key(DEK) Blob Protocol which provides a method for
protecting a DEK for non-secure memory storage.
SEC block protects data in a data structure called
a Secret Key Blob, which provides both confidentiality
and integrity protection.
Every time the blob encapsulation is executed,
a AES-256 key is randomly generated to encrypt the DEK.
This key is encrypted with the OTP Secret key
from SoC. The resulting blob consists of the encrypted
AES-256 key, the encrypted DEK, and a 16-bit MAC.
During decapsulation, the reverse process is performed
to get back the original DEK. A caveat to the blob
decapsulation process, is that the DEK is decrypted
in secure-memory and can only be read by FSL SEC HW.
The DEK is used to decrypt data during encrypted boot.
Commands added
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dek_blob - encapsulating DEK as a cryptgraphic blob
Commands Syntax
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dek_blob src dst len
Encapsulate and create blob of a len-bits DEK at
address src and store the result at address dst.
Signed-off-by: Raul Cardenas <[email protected]>
Signed-off-by: Nitin Garg <[email protected]>
Signed-off-by: Ulises Cardenas <[email protected]>
Signed-off-by: Ulises Cardenas-B45798 <[email protected]>
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Add EXT4 support.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Otavio Salvador <[email protected]>
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User Mass Storage is very useful for flashing the on-board eMMC.
Add support for it.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Otavio Salvador <[email protected]>
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Add USB Mass Storage support. This is useful for flashing the on-board eMMC.
Signed-off-by: Soeren Moch <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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ONOFFA is the bit 3 of the GENERAL2 register.
Add its definition.
Signed-off-by: Fabio Estevam <[email protected]>
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PH1-Pro4 includes both EHCI and xHCI IP cores.
Unfortunately, U-Boot cannot enable EHCI and xHCI support
simultaneously. Some users may wish Super-Speed connection.
Disable CONFIG_USB_EHCI_HCD and enable CONFIG_USB_XHCI_HCD.
Signed-off-by: Masahiro Yamada <[email protected]>
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Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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This patch adds "iRAM, CPU state and low power" configs
which are the addresses acting as flag registers.
iROM code checks CONFIG_LOWPOWER_FLAG address. If it is equal
to CONFIG_LOWPOWER_EN then it jumps to the address (0x02020000+CPUID*4).
This is a part of iROM logic. Rest other flags are being used at
various places during kernel switching and reset.
They are nowhere documented because they are part programming.
These configs are serving as flags for us because they are
representing the addresses in iRAM which we are using for
storing and extracting CPU Status and GIC status.
Signed-off-by: Akshay Saraswat <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware.
Signed-off-by: Ruchika Gupta <[email protected]>
Signed-off-by: Gaurav Rana <[email protected]>
CC: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is performed based on erase group size,
to avoid erasing other partitions. The start address and the size
is aligned to the erase group size for this.
Currently only supports erasing from eMMC.
Signed-off-by: Dileep Katta <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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This common call can be used for setting proper entities based
on dfu command arguments.
The config: CONFIG_SET_DFU_ALT_INFO, was used only for few configs,
and now it is common.
The board file should implement:
- set_dfu_alt_info() function
Signed-off-by: Przemyslaw Marczak <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
[Test HW: Odroid U3 (Exynos 4412)]
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Nowadays generic CFI code properly detects the ED Mini V2's
Macronix MC29LV400CB flash chip, therefore we can drop the
CONFIG_FLASH_CFI_LEGACY option and associated settings and code.
Signed-off-by: Albert ARIBAUD <[email protected]>
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ED Mini V2 is based on Orion 5x which boots at fixed
address 0xFFFF0000 in NOR Flash. Place SPL there, and
switch U-Boot from .bin to .img format, stored in
NOR Flash at 0xFFF90000.
Note: this patch was tested on HW and works, i.e.
it boots U-Boot properly, but SPL console output
currently does not appear, due to GD being trashed
by arch/arm/lib/spl.c. This trashing is soon to be
removed, and then ED Mini V2 SPL console output will
become visible.
Signed-off-by: Albert ARIBAUD <[email protected]>
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Signed-off-by: Albert ARIBAUD <[email protected]>
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This adds GPIO configuration and initialization function of SDHI on Silk board
Signed-off-by: Vladimir Barinov <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Porter is an entry level development board based on R-Car M2 SoC (R8A7791)
This commit supports the following peripherals:
- SCIF, I2C, Ethernet, QSPI, SD, USB Host
Signed-off-by: Vladimir Barinov <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Lager board has two SDHI port as SDHI0 and SDHI2.
This adds GPIO configuration and initialization function of SDHI, and
enables MMC command.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Gose board has three SDHI port.
This adds GPIO configuration and initialization function of SDHI, and
enables MMC command.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Koelsch board has three SDHI port.
This adds GPIO configuration and initialization function of SDHI, and
enables MMC command.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Alt board has two SDHI port.
This adds GPIO configuration and initialization function of SDHI, and
enables MMC command.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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This adds drivers model support of serial port to Silk board,
and migrate serial port to drivers model.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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