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Repair the register configuration and add proper support for the
display attached to both LVDS channels.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Sean Cross <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tim Harvey <[email protected]>
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Sequence like the following is completely useless and results from
an errorneous ordering of the statements during development. Zap it.
#ifdef FOO
#define FOO
Signed-off-by: Marek Vasut <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Sean Cross <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tim Harvey <[email protected]>
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This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Sean Cross <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tim Harvey <[email protected]>
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This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Sean Cross <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tim Harvey <[email protected]>
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Since the Riot & Mars boards are dev boards it's likely people will want to
run standard distros on them. So replace the current boot scripts with the
standard one from config_distro_bootcmd.h
Signed-off-by: Iain Paton <[email protected]>
Tested-by: Nikolay Dimitrov <[email protected]>
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Update to use config_distro_defaults.h and remove explicit settings
Signed-off-by: Iain Paton <[email protected]>
Tested-by: Nikolay Dimitrov <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
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USB is a pretty common feature on exynos 5 board, so it seems sensible
to configure it directly from exynos5-common. As a side-effect this
makes USB available from u-boot on exynos 5420 based boards.
While there enable support for common USB ethernet cards to make it more
likely the default config allows booting for network and enable XHCI on
SMDK5420 which has it defined in the dts but not in its config.
Signed-off-by: Sjoerd Simons <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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The few Versatile Express ARMv8 platforms we have may just as
well be switched to generic board from the beginning.
Tested on the ARM foundation model and the in progress support
for the ARMv8 Juno board.
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: Steve Rae <[email protected]>
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Add samsung,vbus-gpio information for the XU3. This allows the usage of
the EHCI controller on the XU3, which is connected to the SMSC LAN9514
chip (usb hub + network).
Signed-off-by: Sjoerd Simons <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Not all exynos 5420 based devices with an LCD also have a parade LVDS
bridge. So make sure compilation doesn't break if CONFIG_LCD is enabled
and CONFIG_VIDEO_PARADE is not.
As a side-effect move the parade functions from the exynos system header
file to its own file.
Signed-off-by: Sjoerd Simons <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch adds support for Odroid-XU3.
Signed-off-by: Hyungwon Hwang <[email protected]>
Reviewed-by: Sjoerd Simons <[email protected]>
Tested-by: Sjoerd Simons <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Kevin Hilman <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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The media for boot and environment is a board-specific feature, not a
processor-specific. This is same to console port number and some
other addresses. This patch moves the that kinds of configs to each
board-specific files from the common config file for Exynos5420.
Signed-off-by: Hyungwon Hwang <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Kevin Hilman <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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The current current watchdog timeout of 12 seconds is a bit small for
booting into Linux, especially when using a NFS based rootfs. So lets
change this timeout to a more defensive value of 30 seconds.
Also we now call the hw_watchdog_init() function so that we override
the value already configured from the Preloader.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Vince Bridgers <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Pavel Machek <[email protected]>
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Signed-off-by: Christian Gmeiner <[email protected]>
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Signed-off-by: Christian Gmeiner <[email protected]>
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Add pinmux settings and implement board_ehci_hcd_init
Signed-off-by: Peng Fan <[email protected]>
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Add pinmux settings, implement board_ehci_hcd_init and board_ehci_power
Signed-off-by: Peng Fan <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Some boards, most notably those with a PCIe ethernet NIC, require this
to avoid cache coherency problems. Since the option adds very little
code and overhead enable it across all Tegra generations. Other drivers
may also start supporting this functionality at some point, so enabling
it now will automatically reap the benefits later on.
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes
the second root port to a miniPCIe slot. Enable the PCIe controller and
the network driver to allow the device to boot over the network.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The Beaver has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network device driver so that the device can
boot over the network.
In addition the board has a mini-PCIe expansion slot.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC
is available on the dock over the PCIe bus. Enable the PCIe controller
and the network device driver so that the device can boot over the
network.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add the device tree node for the PCIe controller found on Tegra30 SoCs.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network driver so that the device can boot over
the network.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add the device tree node for the PCIe controller found on Tegra20 SoCs.
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.
This is based on the Linux kernel driver, originally submitted upstream
by Mike Rapoport.
Signed-off-by: Mike Rapoport <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.
Tegra20 and Tegra30 also provide weak symbols for these functions so
that drivers can use the same API irrespective of which SoC they're
being built for.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The AS3722 provides a number of DC/DC converters and LDOs as well as 8
GPIOs.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Signed-off-by: Masahiro Yamada <[email protected]>
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The normal image is working on DRAM. It is better to use DRAM also
for init stack than L2 cache.
Signed-off-by: Masahiro Yamada <[email protected]>
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Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Additionally, prepare and write the Backup GUID Partition Table.
Signed-off-by: Steve Rae <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
[Test HW: Exynos4412 - Trats2]
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In order to add detach functions for fastboot, make the DFU detach related
functions common so they can be shared.
Signed-off-by: Rob Herring <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
[TestHW: Exynos4412-Trats2]
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A new interface is introduced to support generic board structure.
Converts it to use new interface.
Signed-off-by: Tang Yuantian <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Following boards has incorrect number of portals defined.
powerpc/T102xQDS
powerpc/T102xRDB
powerpc/T1040QDS
powerpc/T104xRDB
Signed-off-by: Jeffrey Ladouceur <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is required when supporting power management.
Signed-off-by: Jeffrey Ladouceur <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add following configs in header file:
CONFIG_SYS_GENERIC_BOARD
CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Shaohui Xie <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Chunhe Lan <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Harninder Rai <[email protected]>
Reviewed-by: York Sun <[email protected]>
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