| Age | Commit message (Collapse) | Author |
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Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.
Upcoming Tegra30 port will use common code/defines/names where possible.
Signed-off-by: Tom Warren <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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Add support for SD card and change the default
environment due to increased u-boot size.
Signed-off-by: Stefano Babic <[email protected]>
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unused macro CONFIG_DISCOVER_PHY
Signed-off-by: Ashok Kumar Reddy <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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When I set up Tegra's config files to put the environment into eMMC, I
assumed that CONFIG_ENV_OFFSET was a linearized address relative to the
start of the eMMC device, and spanning HW partitions boot0, boot1,
general* and the user area in order. However, it turns out that the
offset is actually relative to the beginning of the user area. Hence,
the environment block ended up in a different location to expected and
documented.
Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust
CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire
eMMC.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.
Note that the Linux kernel enables access to boot partitions solely based
on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only
influences access to "general" partitions.
eMMC devices affected by this issue exist on various NVIDIA Tegra
platforms (and presumably many others too), such as Harmony (plug-in eMMC),
Seaboard, Springbank, and Whistler (plug-in eMMC).
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This enables NAND support for the Seaboard.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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A device tree is used to configure the NAND, including memory
timings and block/pages sizes.
If this node is not present or is disabled, then NAND will not
be initialized.
Signed-off-by: Jim Lin <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
Acked-by: Scott Wood <[email protected]>
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Define default SoC input clock frequencies for i.MX31 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Helmut Raiger <[email protected]>
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Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Define default SoC input clock frequencies for i.MX25 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Matthias Weisser <[email protected]>
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Samsung SoC use the cmu control to set clock.
Signed-off-by: Jaehoon Chung <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Some boards have no Card Detect wired. In that case, set the CD test
bits in the standard interface.
Signed-off-by: Joe Hershberger <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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When I set up Tegra's config files to put the environment into eMMC, I
assumed that CONFIG_ENV_OFFSET was a linearized address relative to the
start of the eMMC device, and spanning HW partitions boot0, boot1,
general* and the user area in order. However, it turns out that the
offset is actually relative to the beginning of the user area. Hence,
the environment block ended up in a different location to expected and
documented.
Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust
CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire
eMMC.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.
Note that the Linux kernel enables access to boot partitions solely based
on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only
influences access to "general" partitions.
eMMC devices affected by this issue exist on various NVIDIA Tegra
platforms (and presumably many others too), such as Harmony (plug-in eMMC),
Seaboard, Springbank, and Whistler (plug-in eMMC).
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
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The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.
Signed-off-by: Stefano Babic <[email protected]>
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In order to use the serial interface on the PortuxG20 we need to enable the
level converter first by setting the PC9 pin to high. The level converter needs
some time to settle so we have to use the mdelay() function to wait for some
time. Unfortunately we have no timers available at board_early_init_f() so we
enable the serial output early within board_postclk_init().
Now the U-Boot output looks fine:
| U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32)
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| CPU: AT91SAM9G20
| Crystal frequency: 18.432 MHz
| CPU clock : 396.288 MHz
| Master clock : 132.096 MHz
| DRAM: 64 MiB
| WARNING: Caches not enabled
| NAND: 128 MiB
| In: serial
| Out: serial
| Err: serial
| Net: macb0
| Hit any key to stop autoboot: 0
Signed-off-by: Markus Hubig <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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* add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config)
Signed-off-by: Jens Scharsig <[email protected]>
Signed-off-by: Jens Scharsig (BuS Elektronik) <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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The configuration that is common for all Integrator boards may
just as well be stored in a common include file as per pattern
from other boards. This eases maintenance quite a bit.
Signed-off-by: Linus Walleij <[email protected]>
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Enable caches, make it faster!
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Add USB Ethernet support.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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The mtd name of the NAND in Linux is "gpmi-nand", not "gpmi-nand.0" as
it would be expected, since the controller doesn't support multiple NANDs
attached to it as of now. Rectify this flub by adjusting default mtdparts.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Otavio Salvador <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Signed-off-by: Otavio Salvador <[email protected]>
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For some reasons we had an own implementaion of dram_init and
dram_init_banksize. This is not needed anymore, use the standard
kirkwood functions instead.
Signed-off-by: Holger Brunck <[email protected]>
cc: Prafulla Wadaskar <[email protected]>
cc: Valentin Longchamp <[email protected]>
cc: Gerlando Falauto <[email protected]>
Acked-By: Prafulla Wadaskar <[email protected]>
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According to our last HW measures, this could be raised while still
compatible with the potential delays on the lines.
Signed-off-by: Valentin Longchamp <[email protected]>
cc: Holger Brunck <[email protected]>
Acked-By: Prafulla Wadaskar <[email protected]>
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These parameters are used by the the sf probe command that are used by
our update script and they therefore need to be set for all of our
boards.
The timing is the same as for the ENV SPI NOR Flash (since it's the
same physical device) and takes the boco2 delay on the bus into account.
Signed-off-by: Valentin Longchamp <[email protected]>
cc: Holger Brunck <[email protected]>
Acked-by: Prafulla Wadaskar <[email protected]>
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Orion5x did not actually write GPIO output values
or input polarities, and ED Mini V2 had bad or
missing values for GPIO settings.
Signed-off-by: Albert ARIBAUD <[email protected]>
Acked-By: Prafulla Wadaskar <[email protected]>
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Check for ctrlc() in operations that take time and loop over the flash
addresses.
In netconsole, tstc() is expensive. Only check once in a while to not
slow down the operation significantly.
Signed-off-by: Joe Hershberger <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Kaspter Ju <[email protected]>
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* 'master' of git://git.denx.de/u-boot-usb:
MUSB driver: Timeout is never detected as the while loop does not end
usb: fix ulpi_set_vbus prototype
pxa25x: Add UDC registers definitions
USB: Fix strict aliasing in ohci-hcd
usb: Optimize USB storage read/write
ehci: Optimize qTD allocations
usb_stor_BBB_transport: Do not delay when not required
usb_storage: Remove EHCI constraints
usb_storage: Restore non-EHCI support
ehci-hcd: Boost transfer speed
ehci: cosmetic: Define used constants
ehci: Fail for multi-transaction interrupt transfers
arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
arm:trats: Support for USB UDC driver at TRATS board.
dfu:cmd: Support for DFU u-boot command
dfu: MMC specific routines for DFU operation
dfu: DFU backend implementation
dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
dfu:usb: Support for g_dnl composite download gadget.
ehci: cosmetic: Define the number of qt_buffers
Signed-off-by: Wolfgang Denk <[email protected]>
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Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that
are somewhat relevant to u-boot.
Signed-off-by: Andrew Sharp <[email protected]>
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Signed-off-by: Josh Wu <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Josh Wu <[email protected]>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <[email protected]>
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Add at91sam9x5 series spi flash boot support
Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321
serial flash
SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on
atmel_spi patch, or else, it will occur receive overrun
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek
Signed-off-by: Bo Shen <[email protected]>
[rebase on TOT]
Signed-off-by: Andreas Bießmann <[email protected]>
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The old update script uses 'load_addr' which is never set. Use 'fileaddr'
instead which is automagically set by e.g. dhcp.
Signed-off-by: Andreas Bießmann <[email protected]>
cc: Stelian Pop <[email protected]>
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Remove CONFIG_ARCH_CPU_INIT, no need it anymore
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Match the name of the header prototype with the actual
implementation.
Signed-off-by: Lucas Stach <[email protected]>
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Enable the g_dnl composite USB gadget driver with embedded DFU function on it.
It now uses the composite gadget framework to support download specific
USB functions (like enabled DFU or USB Mass Storage).
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Minkyu Kang <[email protected]>
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New, separate driver at ./drivers/dfu has been added. It allows platform
and storage independent operation of DFU.
It has been extended to use new MMC level of command abstraction.
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Marek Vasut <[email protected]>
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Composite USB download gadget support (g_dnl) for download functions.
This code works on top of composite gadget.
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Marek Vasut <[email protected]>
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The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Andy Fleming <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Kim Phillips <[email protected]>
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for new boards
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory
* Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come
Signed-off-by: Matt Sealey <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Otavio Salvador <[email protected]>
Cc: Stefano Babic <[email protected]>
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