| Age | Commit message (Collapse) | Author |
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This boards used old type preprocessor.
This patch fix compile error.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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This boards used old type preprocessor.
This patch fix compile error.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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AP325RXA is SH7723's reference board.
This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
In this patch, support SCIF, NOR Flash, and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other.
This patch supports CPU register's header file and SCIF serial driver.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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This adds initial support for the RTE RSK+ SH7203 board.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Add support SH2/SH2A basic function.
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
Graphic, Ethernet, USB, SD, RTC, and I2C controller.
This patch supports the following functions:
- 128MB DDR2-SDRAM (29-bit address mode only)
- NOR Flash
- USB host
- Ethernet
Signed-off-by: Yoshihiro Shimoda <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Renesas SH7785 has DDR2-SDRAM controller, PCI, and other.
This patch supports CPU register's header file.
Signed-off-by: Yoshihiro Shimoda <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
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Double bootargs setting leads to a duplicated environmant entry.
Signed-off-by: Guennadi Liakhovetski <[email protected]>
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SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
Signed-off-by: Guennadi Liakhovetski <[email protected]>
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Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.
Signed-off-by: Guennadi Liakhovetski <[email protected]>
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This is needed since now with HUSH enabled (amcc-common.h) the image
read from NAND exceeds the previous limit.
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Ben Warren <[email protected]>
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MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.
The default is to assert CS together with ALE. The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
The default is wrong for the NOR flash and CPLD on the ADS5121.
This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.
Signed-off-by: Martha J Marx <[email protected]>
Signed-off-by: John Rigby <[email protected]>
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Signed-off-by: TsiChung Liew <[email protected]>
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Signed-off-by: TsiChung Liew <[email protected]>
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Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <[email protected]>
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The user manuals recommend 7.
Signed-off-by: Kurt Mahan <[email protected]>
Acked-by: TsiChung Liew <[email protected]>
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M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms
uart baudrate increase from 19200 to 115200 bps
Signed-off-by: TsiChung Liew <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
Signed-off-by: Srikanth Srinivasan <[email protected]>
Signed-off-by: Dejan Minic <[email protected]>
Signed-off-by: Jason Jin <[email protected]>
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We
also have SERDES init code for the 8536.
Signed-off-by: Kumar Gala <[email protected]>
Signed-off-by: Srikanth Srinivasan <[email protected]>
Signed-off-by: Dejan Minic <[email protected]>
Signed-off-by: Jason Jin <[email protected]>
Signed-off-by: Dave Liu <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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All 85xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Jon Loeliger <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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