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This patch configures and initializes the L2 switch on T1040QDS board.
The L2 switch ports must be initialized according to the SerDes
protocols.
Signed-off-by: Codrin Ciubotariu <[email protected]>
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Signed-off-by: Daniel Schwierzeck <[email protected]>
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Use phys_addr_t for physical address declaration.
It is also unsigned type instead of sign.
Signed-off-by: Michal Simek <[email protected]>
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Added support for zc7035
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added
Signed-off-by: Michal Simek <[email protected]>
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No functional changes.
Signed-off-by: Michal Simek <[email protected]>
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Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added
Signed-off-by: Michal Simek <[email protected]>
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Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added.
Signed-off-by: Michal Simek <[email protected]>
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Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added.
Signed-off-by: Michal Simek <[email protected]>
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SPL needs to detect FPGA device which will be used
for loading bitstream.
Signed-off-by: Michal Simek <[email protected]>
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This problem is reported by checkpatch.pl
Warnings:
CHECK: extern prototypes should be avoided in .h files
Signed-off-by: Michal Simek <[email protected]>
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Signed-off-by: Sinan Akman <[email protected]>
Cc: [email protected]
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This extends the mmcinfo hardware partition info output to show
partitions with write reliability enabled with the "WRREL" string.
If the partition does not have write reliability enabled the "WRREL"
string is omitted; this is analogous to the ehhanced attribute.
Example output:
Device: OMAP SD/MMC
Manufacturer ID: fe
OEM: 14e
Name: MMC16
Tran Speed: 52000000
Rd Block Len: 512
MMC version 4.41
High Capacity: Yes
Capacity: 13.8 GiB
Bus Width: 4-bit
Erase Group Size: 8 MiB
HC WP Group Size: 16 MiB
User Capacity: 13.8 GiB ENH WRREL
User Enhanced Start: 0 Bytes
User Enhanced Size: 512 MiB
Boot Capacity: 16 MiB ENH
RPMB Capacity: 128 KiB ENH
GP1 Capacity: 64 MiB ENH WRREL
GP2 Capacity: 64 MiB ENH WRREL
Signed-off-by: Diego Santa Cruz <[email protected]>
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The eMMC partition write reliability settings are to be set while
partitioning a device, as per the eMMC spec, so changes to these
attributes needs to be done in the hardware partitioning API.
This commit adds such support.
Signed-off-by: Diego Santa Cruz <[email protected]>
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This adds an API to do hardware partitioning on eMMC devices. The
new mmc_hwpart_config() function does the partitioning in one go.
As the different attributes and partitioning options on eMMC may
be interdependent validation has to be done based on the complete
partitioning configuration. The function accepts three modes:
- MMC_HWPART_CONF_CHECK: just validates that the configuration
is valid.
- MMC_HWPART_CONF_SET: validates and sets all the fields in
EXT_CSD but without setting the "partitioning completed" bit,
and thus is reversible.
- MMC_HWPART_CONF_COMPLETE: does everything and is thus not
reversible.
Signed-off-by: Diego Santa Cruz <[email protected]>
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Read the eMMC high capacity write protect group size at mmc device
initialization. This is useful to correctly partition an eMMC device,
as partitions need to be aligned to this size.
Signed-off-by: Diego Santa Cruz <[email protected]>
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The erase_grp_size in struct mmc is to be a size in 512-byte sectors
but the code used to compute it for eMMC when EXT_CSD_ERASE_GROUP_DEF is
enabled computed it as bytes, leading to erase sizes and alignment
much larger than what is actually required by the mmc device.
Signed-off-by: Diego Santa Cruz <[email protected]>
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This modification reads the size of the eMMC enhanced user data area
upon initialization of an mmc device, it will be used later by
mmcinfo.
Signed-off-by: Diego Santa Cruz <[email protected]>
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This extends the mmcinfo command's output to show which eMMC partitions
have the enhanced attribute set. Note that the eMMC spec says that
if the enhanced attribute is supported then the boot and RPMB
partitions are of the enhanced type.
The output of mmcinfo becomes:
Device: OMAP SD/MMC
Manufacturer ID: fe
OEM: 14e
Name: MMC16
Tran Speed: 52000000
Rd Block Len: 512
MMC version 4.41
High Capacity: Yes
Capacity: 13.8 GiB
Bus Width: 4-bit
User Capacity: 13.8 GiB ENH
Boot Capacity: 16 MiB ENH
RPMB Capacity: 128 KiB ENH
GP1 Capacity: 64 MiB ENH
GP2 Capacity: 64 MiB ENH
Signed-off-by: Diego Santa Cruz <[email protected]>
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Signed-off-by: Bo Shen <[email protected]>
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Signed-off-by: Bo Shen <[email protected]>
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This config is not valid, so drop it.
Signed-off-by: Simon Glass <[email protected]>
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As sama5d3 xplained support the PMECC. So add the PMECC header for spl
binary. That make ROM loader can use PMECC to avoid error flips in spl
code in nandflash.
Signed-off-by: Josh Wu <[email protected]>
Acked-by: Bo Shen <[email protected]>
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- corvus board fix problems with toshiba nand chips
on the corvus board problems with toshiba chips
Manufacturer ID: 0x98 Chip ID: 0xdc encounterd.
Solve this in the following way:
- set other nand timings
- enable CONFIG_SYS_NAND_READY_PIN
- correct the MACH_TYPE setting
Signed-off-by: Heiko Schocher <[email protected]>
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if in SPL mode recovery button is pressed, erase also spi flash
from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board.
Signed-off-by: Heiko Schocher <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
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This patch adds the new Barco platinum platform. It currently
includes those two boards:
platinum-titanium
-----------------
This is the same board as the titanium that is already supported in
mainline U-Boot. But its now moved to this new platform to support
multiple "flavors" of imx6 boards in one directory. Its also moved
to support SPL booting. And with this we use the run-time DDR
configuration of this SPL support. The board is equipped with the
Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR
related registers tuples from the imximage.cfg file. As all this
is done in the SPL at run-time.
platinum-picon
--------------
This board is new and based on the MX6DL with 1GiB DDR using the
Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND
chips (each 512MiB).
Signed-off-by: Stefan Roese <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Pieter Ronsijn <[email protected]>
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Since commit 1f98e31bc0b2c37a ("imx: mx6sxsabresd: Use the pfuze common init
function") board_late_init() became empty, so we can safely remove this unneeded
function.
Signed-off-by: Fabio Estevam <[email protected]>
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The Fusion LCD needs the 32bit color depth to properly work; the
default is different on the 3.10.17 kernels and it is better to ensure
it work out of box using proper default color setting.
Signed-off-by: Otavio Salvador <[email protected]>
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Add interrupt queue support, so that a usb keyboard can be used without
causing huge latencies.
Signed-off-by: Hans de Goede <[email protected]>
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This commit fixes a number of issues with the reset sequence of musb-new
in host mode:
1) Our usb device probe relies on a second device reset being done after the
first descriptors read. Factor the musb reset code into a usb_reset_root_port
function (and add this as an empty define for other controllers), and call
this when a device has no parent.
2) Just like with normal usb controllers there needs to be a delay after
reset, for normal usb controllers, this is handled in hub_port_reset, add a
delay to usb_reset_root_port.
3) Sync the musb reset sequence with the upstream kernel, clear all bits of
power except bits 4-7, and increase the time reset is asserted to 50 ms.
With these fixes an usb keyboard I have now always enumerates properly, where
as earlier it would only enumerare properly once every 5 tries.
Signed-off-by: Hans de Goede <[email protected]>
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This is based on Jussi Kivilinna's work for the linux-sunxi-3.4 kernel to use
the kernels musb driver instead of Allwinners own custom driver.
Signed-off-by: Hans de Goede <[email protected]>
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Currently create_int_queue is only implemented by the ehci code, and that
does not honor interrupt intervals, but other drivers which might also want
to implement create_int_queue may honor intervals, so add an interval param.
Signed-off-by: Hans de Goede <[email protected]>
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Now that "usb start" will only start usb if not already started, we can simply
call "usb start" whenever we (may) need access to usb devices, and it will only
actually scan the bus at the first call.
Signed-off-by: Hans de Goede <[email protected]>
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This does nothing now, so drop it. We have SPL anyway to do our low-level
init.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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This patch adds a driver for VSC9953 L2 Switch. This Vitesse IP
is integrated in Freescale T1040 and T1020 SoCs.
The L2 switch has 10 Ethernet ports: 2 internal fixed-links
(ports 8 and 9) at 2.5 Gbps and and 8 external ports at 1 Gbps.
The external ports may be connected to PHYs over QSGMII and SGMII.
Commands have also been added to enable/disable a port and to
check a port's link speed, duplexity and status. The commands are:
ethsw port <port_nr> enable|disable - enable/disable an l2 switch port
ethsw port <port_nr> show - show an l2 switch port's configuration
port_nr=0..9; use "all" for all ports
For more detailse please see doc/README.t1040-l2switch
Signed-off-by: Codrin Ciubotariu <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch supports AQ1202, AQ2104, AQR105 PHY.
Signed-off-by: Shaohui Xie <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: York Sun <[email protected]>
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A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Signed-off-by: Tang Yuantian <[email protected]>
Reviewed-by: York Sun <[email protected]>
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A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Signed-off-by: Tang Yuantian <[email protected]>
Reviewed-by: York Sun <[email protected]>
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T1024RDB-PB board adds 2.5G SGMII support with AQR105 PHY.
rcw_0x095 is used for 10G XFI + 3x PCIex1
rcw_0x135 is used for 2.5G SGMII + 2x PCIex1
Signed-off-by: Shengzhou Liu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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A new deep sleep interface is introduced to support generic
board structure. Converts it to use new interface.
Besides, added SPI/SD/NAND boot deep sleep support.
Signed-off-by: Tang Yuantian <[email protected]>
Reviewed-by: York Sun <[email protected]>
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CONFIG_BOOTDELAY is missing from board header file. Add this macro
to enable counting down of auto boot.
Signed-off-by: Harninder Rai <[email protected]>
[York Sun: Add commit message]
Reviewed-by: York Sun <[email protected]>
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Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <[email protected]>
Signed-off-by: Mingkai.Hu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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All the 74xx_7xx boards are still non-generic boards:
P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2
Acked-by: Marek Vasut <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Acked-by: York Sun <[email protected]>
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Nye Liu <[email protected]>
Cc: Roy Zang <[email protected]>
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Signed-off-by: Sonic Zhang <[email protected]>
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Signed-off-by: Sonic Zhang <[email protected]>
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