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2022-07-26log: force DEBUG when LOG_DEBUG is activatedPatrick Delaunay
When CONFIG_LOG is activated, if LOG_DEBUG is defined in a file and DEBUG is not defined the trace with debug() macro are not displayed, because the parameter cond : _DEBUG = 0 is checked in debug_cond(). With this patch the define DEBUG, used to force the trace generated by debug() macro, is linked with the define LOG_DEBUG, used to force the trace generated by other macros (log_debug, dev_dbg, pr_debug). We only need to define LOG_DEBUG in a file to activate all the traces generated by any U-Boot debug macro, as it is described in /doc/develop/logging.rst Signed-off-by: Patrick Delaunay <[email protected]>
2022-07-26fpga: zynqmp: support loading encrypted bitfilesAdrian Fiergolski
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to handle loading encrypted bitfiles. This feature requires encrypted FSBL, as according to UG1085: "The CSU automatically locks out the AES key, stored in either BBRAM or eFUSEs, as a key source to the AES engine if the FSBL is not encrypted. This prevents using the BBRAM or eFUSE as the key source to the AES engine during run-time applications." Signed-off-by: Adrian Fiergolski <[email protected]> Co-developed-by: Oleksandr Suvorov <[email protected]> Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: zynqmp: support loading authenticated imagesOleksandr Suvorov
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to handle loading authenticated images (DDR). Based on solution by Jorge Ramirez-Ortiz <[email protected]> Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: xilinx: pass compatible flags to load() callbackOleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: add fpga_compatible2flagOleksandr Suvorov
Add a "compatible" string to binary flag converter, which uses a callback str2flag() of given FPGA driver if available. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: pass compatible flags to fpga_load()Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: xilinx: pass compatible flags to xilinx_load()Oleksandr Suvorov
This flag is used to check whether a Xilinx FPGA driver is able to load a particular FPGA bitstream image. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: zynqmp: add str2flags callOleksandr Suvorov
Add a call to convert FPGA "compatible" string to a binary flag. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: xilinx: add bitstream flags to driver descOleksandr Suvorov
Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26fpga: xilinx: add missed identifier namesOleksandr Suvorov
Function definition arguments should also have identifier names. Add missed ones to struct xilinx_fpga_op callbacks, unifying code. Signed-off-by: Oleksandr Suvorov <[email protected]> Tested-by: Ricardo Salveti <[email protected]> Tested-by: Adrian Fiergolski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26configs: imx8mp_venice: remove unnecessary FEC_QUIRK_ENET_MACTim Harvey
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus does not need to be defined in the various board config includes. Signed-off-by: Tim Harvey <[email protected]>
2022-07-26fpga: Convert SYS_FPGA_PROG_FEEDBACK to KconfigAlexander Dahl
This converts the following to Kconfig: SYS_FPGA_PROG_FEEDBACK Signed-off-by: Alexander Dahl <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-07-26mailbox: zynqmp: Move struct zynqmp_ipi_msg from sys_proto.hAshok Reddy Soma
Mailbox driver might be need for Versal and other future platforms. To remove the dependency, move struct zynqmp_ipi_msg to zynqmp_firmware.h so that mailbox driver compiles for other platforms easily. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-26firmware: zynqmp: Change prototype of zynqmp_pmufw_load_config_object()Ashok Reddy Soma
zynqmp_pmufw_load_config_object() has some error cases and it is better to return those errors. Change prototype of this function to return errors. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-07-26dt-bindings: versal: Add versal reset IDsMichal Simek
The same file is already the part of Linux kernel that's why add it also to u-boot to be able to use it in source code and DT files. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
2022-07-26xilinx: Remove duplicate PMIO_NODE_ID_BASE macroMichal Simek
PMIO_NODE_ID_BASE is defined twice that's why remove one instance. Fixes: 248fe9f302df ("spi: cadence_qspi: Enable apb linear mode for apb read & write operations") Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/ce9a601bb99418aa20272d046c74678829d942cc.1657191974.git.michal.simek@amd.com
2022-07-26lmb: Fix lmb property's defination under struct lmbAshok Reddy Soma
Under struct lmb {} the lmb property's should be defined only if CONFIG_LMB_MEMORY_REGIONS is defined. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c24a2b1d6f5db4eb65393f6a77fae129b30b6233.1657183534.git.michal.simek@amd.com
2022-07-25board: qualcomm: Add support for QCS404 EVBSumit Garg
Add support for Qualcomm QCS404 SoC based evaluation board. Features: - Qualcomm Snapdragon QCS404 SoC - 1GiB RAM - 8GiB eMMC, uSD slot U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qcs404.rst. Signed-off-by: Sumit Garg <[email protected]>
2022-07-25clocks: qcom: Add clock driver for QCS404 SoCSumit Garg
Currently this clock driver initializes clocks for UART and eMMC. Along with this import "qcom,gcc-qcs404.h" header from Linux mainline to support DT bindings. Signed-off-by: Sumit Garg <[email protected]>
2022-07-25board: qualcomm: Add support for dragonboard845cSumit Garg
Add support for 96Boards Dragonboard 845C aka Robotics RB3 development platform. This board complies with 96Boards Open Platform Specifications. Features: - Qualcomm Snapdragon SDA845 SoC - 4GiB RAM - 64GiB UFS drive U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/sdm845.rst, board: dragonboard845c. Signed-off-by: Sumit Garg <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2022-07-25clocks: sdm845: Import qcom,gcc-sdm845.hSumit Garg
Rather than using magic numbers as clock ids for peripherals import qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids. So start using corresponding clk-id macro for debug UART. Signed-off-by: Sumit Garg <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2022-07-25imx8mm: synchronise device tree with linuxMarcel Ziswiler
Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <[email protected]>
2022-07-25imx8mq: synchronise device tree with linuxMarcel Ziswiler
Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <[email protected]>
2022-07-25imx8mn: synchronise device tree with linuxMarcel Ziswiler
Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <[email protected]>
2022-07-25colibri_vf: synchronise device tree with linuxMarcel Ziswiler
Synchronise device tree with linux v5.19-rc5. Please note that this also means that instead of the previous "generic" U-Boot specific carrier board agnostic device tree we are now using the regular one for the Colibri Evaluation (carrier) board V3 (e.g. vf610-colibri-eval-v3.dtb rather than the previous vf610-colibri.dtb). Signed-off-by: Marcel Ziswiler <[email protected]>
2022-07-25imx7s/d: synchronise device trees with linuxMarcel Ziswiler
Synchronise device tree with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <[email protected]>
2022-07-25imx6dl/imx6qdl: synchronise device trees with linuxMarcel Ziswiler
Synchronise device trees with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <[email protected]>
2022-07-25imx8mm: Sync device tree with linux-next 20220711Fabio Estevam
Sync imx8mm.dtsi device tree with linux-next 20220711. The main motivation for doing this sync is the sha256 regression reported by Andrey Zhizhikin [1]. The linux-next kernel has the following commit, which disables the job ring 0 and fixes the problem: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20220715&id=dc9c1ceb555ff661e6fc1081434600771f29657c [1] https://lore.kernel.org/u-boot/AM6PR06MB46912207D9460CD9924F35DAA68B9@AM6PR06MB4691.eurprd06.prod.outlook.com/T/#t Signed-off-by: Fabio Estevam <[email protected]>
2022-07-25configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8mMamta Shukla
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and `"XIP"` to determine the base address of u-boot. For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset of the flattened image tree blob. Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in multiple board header files for i.MX8MM, it is not specified. Specify offset of flattened image tree blob (needs to be set to same value as specified in 'binman' node), base address of QSPI0 and size of FlexSPI configuration block. Signed-off-by: Mamta Shukla <[email protected]> Signed-off-by: Thomas Haemmerle <[email protected]> Tested-by: Adam Ford <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Reviewed-by: Andrey Zhizhikin <[email protected]>
2022-07-25tools: mkimage: Add support to generate FlexSPI Header for i.MX8mMamta Shukla
Add struct with Flex SPI Configuration Block and enable generating fspi header using mkimage. Refer i.MX 8M Mini Application Processor Reference Manual for detailed information about parameters for FlexSPI Configuration block. Signed-off-by: Mamta Shukla <[email protected]> Signed-off-by: Thomas Haemmerle <[email protected]> Tested-by: Adam Ford <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Reviewed-by: Andrey Zhizhikin <[email protected]>
2022-07-22mtd: nand: Move Macronix specific initialization in nand_macronix.cMichael Trimarchi
Upstream linux commit 3b5206f4be9b65. Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.cMichael Trimarchi
Upstream linux commit 229204da53b31d. Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Move Micron specific init logic in nand_micron.cMichael Trimarchi
Upstream linux commit 10d4e75c36f6c1. Move Micron specific initialization logic into nand_micron.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.cMichael Trimarchi
Upstream linux commit 9b2d61f80b060c. Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Move Hynix specific init/detection logic in nand_hynix.cMichael Trimarchi
Upstream linux commit 01389b6bd2f4f7. Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Move Samsung specific init/detection logic in nand_samsung.cMichael Trimarchi
Upstream linux commit c51d0ac59f2420. Move Samsung specific initialization and detection logic into nand_samsung.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Export symbol nand_decode_ext_idMichael Trimarchi
In preparation of moving specific nand support that are not jedec or onfi Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Get rid of mtd variable in function callsMichael Trimarchi
chip points to mtd. Passing chip is enough to have a reference to mtd when is necessary Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Add manufacturer specific initialization/detection stepsMichael Trimarchi
Upstream linux commit abbe26d144ec22. A lot of NANDs are implementing generic features in a non-generic way, or are providing advanced auto-detection logic where the NAND ID bytes meaning changes with the NAND generation. Providing this vendor specific initialization step will allow us to get rid of full-id entries in the nand_ids table or all the vendor specific cases added over the time in the generic NAND ID decoding logic. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-22mtd: nand: Store nand ID in struct nand_chipMichael Trimarchi
Upstream linux commit 7f501f0a72036d. Store the NAND ID in struct nand_chip to avoid passing id_data and id_len as function parameters. Signed-off-by: Michael Trimarchi <[email protected]> Signed-off-by: Dario Binacchi <[email protected]>
2022-07-21treewide: Fix Marek's name and change my e-mail addressMarek Behún
Fix diacritics in some instances of my name and change my e-mail address to [email protected]. Add corresponding .mailmap entries. Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-07-21arm: mvebu: a3720: Add NVMe to BOOT_TARGET_DEVICES listPali Rohár
Enable NVMe booting on boards which have enabled NVMe drivers. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-07-21arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripheralsPali Rohár
This allows to compile U-Boot without some boot option for some A3720 board which does not have that peripheral. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-07-19Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
To quote Andre: One prominent feature is the restructering of the clock driver, which allows to end up with one actual driver for all variants, although we still only compile in support for one SoC. Also contained are some initial SPI fixes, which should fix some problems, and enable SPI flash support for the F1C100s SoC. Those patches revealed more problems, I will queue fixes later on, but for now it should at least still work. Apart from some smaller fixes (for instance for NAND operation), there is also preparation for the upcoming Allwinner D1 support, in form of the USB PHY driver. There are more driver support patches to come. The gitlab CI completed successfully, including the build test for all 160 sunxi boards. I also boot tested on a few boards, but didn't have time for more elaborate tests this time.
2022-07-18mtd: spi: Convert is_locked callback to is_unlockedJan Kiszka
There was no user of this callback after 5b66fdb29dc3 anymore, and its semantic as now inconsistent between stm and sst26. What we need for the upcoming new usecase is a "completely unlocked" semantic. So consolidate over this. Signed-off-by: Jan Kiszka <[email protected]> Acked-by: Jagan Teki <[email protected]>
2022-07-18mtd: spi-nor: Parse SFDP SCCR MapJaimeLiao
Parse SCCR 22nd dword and check DTR Octal Mode Enable Volatile bit for Octal DTR enable Signed-off-by: JaimeLiao <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2022-07-18mtd: spi-nor: add support for Macronix Octal flashJaimeLiao
Follow patch <f6adec1af4b2f5d3012480c6cdce7743b74a6156> (Allow using Micron mt35xu512aba in Octal DTR mode). Enable Octal DTR mode with 20 dummy cycles to allow running at the maximum supported frequency for adding Macronix flash in Octal DTR mode. -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf Signed-off-by: JaimeLiao <[email protected]> Reviewed-by: Jagan Teki <[email protected]>
2022-07-18sunxi: configs: streamline include/configs/sun*.h wrappersAndre Przywara
For mostly historic reasons we had configuration headers for each Allwinner CPU "family". These days they are mostly just including one common header, with the rest being somewhat empty. There were attempts to remove them, and to just use the one common header to begin with, but this has implications to the build system, which me might not be ready for, yet. To document this behaviour, and to avoid something sneaking in over time, make those files all the same (minus the CPU family name and the copyrights), and add a comment explaining that. This makes it easier to just remove those files later on, when needed and possible. Signed-off-by: Andre Przywara <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2022-07-18reset: sunxi: Reuse the platform data from the clock driverSamuel Holland
The clock and reset drivers use the exact same platform data. Simplify them by sharing the object. This is safe because the parent device (the clock device) always gets its driver model callbacks run first. Signed-off-by: Samuel Holland <[email protected]> Acked-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-07-18clk: sunxi: Convert driver private data to platform dataSamuel Holland
All of the driver private data should really be platform data since it is determined statically (selected by the compatible string or extracted from the devicetree). Move everything to platform data, so it can be provided when binding the driver. This is useful for SPL, or for instantiating the driver as part of an MFD. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
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