| Age | Commit message (Collapse) | Author |
|---|
|
U-Boot, in some occasions, injects a 'kaslr-seed' property on the /chosen
node. That would be problematic in case we want to measure the DTB we
install in the configuration table, since it would change across reboots.
The Linux kernel EFI-stub completely ignores it and only relies on
EFI_RNG_PROTOCOL for it's own randomness needs (i.e the randomization
of the physical placement of the kernel). In fact it (blindly) overwrites
the existing seed if the protocol is installed. However it still uses it
for randomizing it's virtual placement.
So let's get rid of it in the presence of the RNG protocol.
It's worth noting that TPMs also provide an RNG. So if we tweak our
EFI_RNG_PROTOCOL slightly and install the protocol when a TPM device
is present the 'kaslr-seed' property will always be removed, allowing
us to reliably measure our DTB.
Acked-by: Ard Biesheuvel <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
Reviewed-by: Mark Kettenis <[email protected]>
|
|
A GPT partition table typically has 128 entries. If a partition table
contains a partition 128 'part list' should be able to list it.
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/fdtaddr.h
and add the devfdt API to the HTML documentation;
these functions are NOT compatible with live tree.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/ofnode.h
and add the device tree node API to the HTML documentation;
the ofnode functions are compatible with Live tree or with flat
device tree.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/read.h
and add the device read from device tree API to the HTML
documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/devres.h
and add the driver model device resource API, devres_*(),
to the HTML documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/device.h
and add the driver model device API to the HTML documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/platdata.h
and add the associated API to the HTML documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/lists.h
and add the list API to the HTML documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/devres.h
and add the associated driver model API to the HTML documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
Correct Sphinx style comments in include/dm/uclass.h
and add the driver model UCLASS API to the HTML documentation.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
|
|
BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
command is enabled otherwise the build will fail.
Signed-off-by: Piotr Kubik <[email protected]>
|
|
The function was missing from exports, even though it loooks like the
intent of the implementation in sscanf.c was to have it exported.
Signed-off-by: Samuel Dionne-Riel <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Attempt to handle cases with a downstream port of a PCIe switch where
link training never completes and the link continues switching between
speeds indefinitely with the data link layer never reaching the active
state.
It has been observed with a downstream port of the ASMedia ASM2824 Gen 3
switch wired to the upstream port of the Pericom PI7C9X2G304 Gen 2
switch, using a Delock Riser Card PCI Express x1 > 2 x PCIe x1 device,
P/N 41433, wired to a SiFive HiFive Unmatched board. In this setup the
switches are supposed to negotiate the link speed of preferably 5.0GT/s,
falling back to 2.5GT/s.
However the link continues oscillating between the two speeds, at the
rate of 34-35 times per second, with link training reported repeatedly
active ~84% of the time, e.g.:
02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
Bus: primary=02, secondary=05, subordinate=05, sec-latency=0
[...]
Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
LnkSta: Speed 5GT/s (downgraded), Width x1 (ok)
TrErr- Train+ SlotClk+ DLActive- BWMgmt+ ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
Forcibly limiting the target link speed to 2.5GT/s with the upstream
ASM2824 device makes the two switches communicate correctly however:
02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
Bus: primary=02, secondary=05, subordinate=09, sec-latency=0
[...]
Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
and then:
05:00.0 PCI bridge [0604]: Pericom Semiconductor PI7C9X2G304 EL/SL PCIe2 3-Port/4-Lane Packet Switch [12d8:2304] (rev 05) (prog-if 00 [Normal decode])
[...]
Bus: primary=05, secondary=06, subordinate=09, sec-latency=0
[...]
Capabilities: [c0] Express (v2) Upstream Port, MSI 00
[...]
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (downgraded)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
Make use of this observation then and attempt to detect the inability to
negotiate the link speed automatically, and then handle it by hand. Use
the Data Link Layer Link Active status flag as the primary indicator of
successful link speed negotiation, but given that the flag is optional
by hardware to implement (the ASM2824 does have it though), resort to
checking for the mandatory Link Bandwidth Management Status flag showing
that the link speed or width has been changed in an attempt to correct
unreliable link operation (the ASM2824 does set it too).
If these checks indicate that link may not operate correctly, then poll
the Data Link Layer Link Active status flag along with the Link Training
flag for the duration of 200ms to see if the link has stabilised, that
is either that the Data Link Layer Link Active status flag has been set
or that Link Training has been inactive during at least the second half
of the interval.
If that has indicated failure, restrict the target speed to 2.5GT/s,
request a link retrain and check again if the link has stabilised. If
that does not work either, then restore the original speed setting and
claim defeat, otherwise we are done.
NB interestingly enough with the ASM2824 vs PI7C9X2G304 configuration
referred above asking the ASM2824 to retrain with a higher target link
speed once the 2.5GT/s speed has been negotiated makes the two devices
successfully negotiate 5.0GT/s. Lifting the 2.5GT/s speed restriction
would however prevent our workaround from working with an OS that issues
a reset and that is unaware of the problem. This is because the devices
would then try to negotiate a higher link speed from scratch and fail,
while the sticky property of the Target Link Speed setting will keep the
2.5GT/s speed restriction across a reset.
Keep the 2.5GT/s speed restriction then, conservatively, if functional
once applied.
Signed-off-by: Maciej W. Rozycki <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
These hardcoded values were calculated from CONFIG_SPL_TEXT_BASE macro. Now
this macro is configurable via Kconfig, so calculate values 0x0030/0x4030
at compile time via CONFIG_SPL_TEXT_BASE option. Values 0x0030/0x4030
represents offset of CONFIG_SPL_TEXT_BASE from address 0x40000000.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
Memory layout in the comment is from Armada XP platform which uses load
address 0x40004030. DB-88f6720 is Armada 375 platform which uses same load
address as Armada 38x which is 0x40000030.
Currently SPL support for Armada 375 is unfinished and does not work. There
is missing Serdes initialization and DDR3 training code. So nobody noticed
that CONFIG_SPL_* options are not correct.
Fix at least CONFIG_SPL_TEXT_BASE constant and remove incorrect comments
about memory layout. So it is not misleading.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
This implementation is intended to be copied to other projects and
modified, to as to foster a standard means of communcating runtime
information between firmware projects.
The GPL-2 license is too restrictive for some projects, e.g. those
intended as reference implementations rather than designed for
collaborative open-source development.
Update the license to make this easier to share.
Signed-off-by: Simon Glass <[email protected]>
|
|
FIx up various minor errors and add the API documentation to the bloblist
docs, since it is quite useful to see it in the same place.
Signed-off-by: Simon Glass <[email protected]>
|
|
Add a few convenience functions to obtain useful information about the
bloblist.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present we do support allocating the bloblist but the Kconfig is a bit
strange, since we still have to specify an address in that case. Partly
this is because it is a pain to have CONFIG options that disappears when
its dependency is enabled. It means that we must have #ifdefs in the code,
either in the C code or header file.
Make use of IF_ENABLED_INT() and its friend to solve that problem, so we
can separate out the location of bloblist into a choice. Put the address
and size into variables so we can log the result.
Add the options for SPL as well, so we can use CONFIG_IS_ENABLED().
Signed-off-by: Simon Glass <[email protected]>
|
|
At present if someone adds a tag in the middle of the list it works well
enough within a U-Boot build. But if these tags are used in another
project, or with an older version of SPL, the numbers make become
inconsistent.
Use explicit tag numbers that never change, to resolve this problem.
Allocate areas for existing U-Boot tags and set up an area for use by
projects and vendors, as well as for private use. Keep tags above
0x10000 unallocated for now.
Update bloblist_tag_name() and the tests to work with this new setup.
Signed-off-by: Simon Glass <[email protected]>
|
|
The EC event log tag is no-longer used. The vboot handoff is now handled
by the vboot context instead.
Drop these unused tags.
Signed-off-by: Simon Glass <[email protected]>
|
|
Add a U_BOOT prefix to this tag since it is specific to the U-Boot
project.
Signed-off-by: Simon Glass <[email protected]>
|
|
It seems best to put the magic number right at the start of the bloblist
header, so it is easier to check. This is how devicetree works.
Make this change now, before other projects make use of bloblist. Other
changes may be needed / discussed, but that is TBD.
Add a checker function as well.
Signed-off-by: Simon Glass <[email protected]>
|
|
This old macro is not needed anymore since we can use IS_ENABLED() now.
Drop it.
Signed-off-by: Simon Glass <[email protected]>
|
|
Some bright sparks have decided that a cast on a constant cannot be a
constant, so offsetof() produces this warning on clang-10:
include/intel_gnvs.h:113:1: error: static_assert expression is not an
integral constant expression
check_member(acpi_global_nvs, unused2, GNVS_CHROMEOS_ACPI_OFFSET);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/kernel.h:284:2: note: expanded from macro 'check_member'
offsetof(struct structure, member) == (offset), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/stddef.h:20:32: note: expanded from macro 'offsetof'
^
include/intel_gnvs.h:113:1: note: cast that performs the conversions of
a reinterpret_cast is ot allowed in a constant expression
include/linux/stddef.h:20:33: note: expanded from macro 'offsetof'
Fix it by using the compiler built-in version, if available. This syncs
the function to the same implementation as Linux v5.16 in this header
file.
Signed-off-by: Simon Glass <[email protected]>
|
|
U-Boot define loff_t as long long. But the header
/usr/include/linux/types.h may not define it.
This has lead to a build error on Alpine Linux.
So let's use long long instead of loff_t for
the size parameter of function os_get_filesize().
Reported-by: Milan P. Stanić <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
Tested-by: Milan P. Stanić <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Lot of PCI and PCIe controllers are using standard Config Address for PCI
Configuration Mechanism #1 or its extended version.
So add PCI_CONF1_ADDRESS() and PCI_CONF1_EXT_ADDRESS() macros into U-Boot's
pci.h header file which can be suitable for most PCI and PCIe controller
drivers. Drivers do not have to invent their own macros and can use these
new U-Boot macros.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
We want to replace '#ifdef' by 'if (IS_ENABLED(CONFIG_...))' in our code.
Therefore functions should be defined unconditionally even if they are not
implemented.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ]
Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Sean Anderson <[email protected]>
|
|
[ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ]
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.
Signed-off-by: Yangbo Lu <[email protected]>
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
Signed-off-by: Tom Rini <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next
- disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
- add changes to support VIM3/L android boot by using meson64_android.h config
|
|
After the conversion to DM the SD card shows up as 'mmc 2'
device.
Adjust the 'mmcdev' and the distro command 'func' accordingly.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
|
|
Enable support for USB and USB storage on the UDOO Neo.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
In AOSP, both VIM3 and VIM3L have 2 bootloader flavors,
depending on A/B enablement.
For example, for vim3l, the naming is:
- u-boot_kvim3l_noab.bin : legacy support
- u-boot_kvim3l_ab.bin : A/B support
Prepare a defconfig to support u-boot_kvim3_ab.bin and
u-boot_kvim3l_ab.bin.
This is identical to khadas-vim3{l}_ab_android but will be updated in
the next commit.
Also update partitioning tables for A/B support.
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
The Khadas VIM3 and VIM3L board are well supported in AOSP[1].
However, there is no mainline U-Boot support for it.
The U-Boot used in AOSP is based on a vendor tree [2]
Add all the necessary bits to flash and boot Android for both Khadas
VIM3 and VIM3L boards.
For Android instructions, refer to [1]
[1] https://source.android.com/setup/build/devices#vim3_and_vim3l_boards
[2] https://gitlab.com/baylibre/amlogic/atv/u-boot
Signed-off-by: Guillaume La Roque <[email protected]>
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
This allows us to define extra board variables, such as "board" and
"board_name".
Signed-off-by: Guillaume La Roque <[email protected]>
Signed-off-by: Mattijs Korpershoek <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
|
|
Add new macro for PMC I2C power domain.
Signed-off-by: Sandeep Gundlupet Raju <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/0bf164f937df551d689dda2a35f9489c2e46b4ab.1638277017.git.michal.simek@xilinx.com
|
|
Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to
XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of
microblaze-generic Kconfig options.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
|
|
Microblaze is one the last two users of the CONFIG_SYS_RESET_ADDRESS
macro (the other is arch/powerpc/cpu/mpc8xx/cpu.c, but the macro is not
defined anywhere in powerpc code, so it should be removed there too).
Replace CONFIG_SYS_RESET_ADDRESS usage in start.S with
CONFIG_SYS_TEXT_BASE. If the reset address should really be
user-configurable, a new Kconfig option could be added.
Signed-off-by: Ovidiu Panait <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
|
|
The memory layout is taken from the device tree passed to us by
m1n1, so there is no need to define this.
Signed-off-by: Mark Kettenis <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
|
|
The SMSC driver is using the old driver model.
Init the virtio system in vexpress64.c so that the network device is
discovered.
Signed-off-by: Peter Hoyes <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
|
|
Move env var address values to #defines so they can be reused elsewhere.
Rename env var names to those recommended in the README and modify
addresses to allow more space for the kernel.
Fix issue where fdt is called with invalid arguments when booting
without a ramdisk.
Signed-off-by: Peter Hoyes <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
|
|
Rename from vexpress_aemv8a.h -> vepxress_aemv8.h as new FVPs may not be
v8-A. No change in behavior.
This is towards future work to enable support for the FVP_BaseR.
Signed-off-by: Peter Hoyes <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
|
|
When using a recent kernel with a bunch of compiled-in
stuff the kernel image easily becomes bigger than 8 MB
yielding this error:
Loading Kernel Image
Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
Fix this by bumping to SZ_64MB.
Cc: Stephan Gerhold <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
|
|
into next
Pull request of efi-next
Documentation:
* Add Sunxi board description
UEFI:
* Improvements to U-Boot running on top of UEFI
|
