From 15b87feb2b7923ef679e9da3f956e7a836fbaa40 Mon Sep 17 00:00:00 2001 From: Ryan Chen Date: Mon, 31 Aug 2020 14:03:03 +0800 Subject: cosmetic: aspeed: ast2500: Rename clock header MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename the ast2500-scu.h to aspeed-clock.h. Signed-off-by: Ryan Chen Reviewed-by: Chia-Wei, Wang Reviewed-by: Cédric Le Goater --- arch/arm/dts/ast2500-u-boot.dtsi | 2 +- arch/arm/mach-aspeed/ast2500/sdram_ast2500.c | 2 +- drivers/clk/aspeed/clk_ast2500.c | 2 +- include/dt-bindings/clock/aspeed-clock.h | 30 ++++++++++++++++++++++++++++ include/dt-bindings/clock/ast2500-scu.h | 30 ---------------------------- 5 files changed, 33 insertions(+), 33 deletions(-) create mode 100644 include/dt-bindings/clock/aspeed-clock.h delete mode 100644 include/dt-bindings/clock/ast2500-scu.h diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi index 8ac42157455..3b119e4ace6 100644 --- a/arch/arm/dts/ast2500-u-boot.dtsi +++ b/arch/arm/dts/ast2500-u-boot.dtsi @@ -1,4 +1,4 @@ -#include +#include #include #include "ast2500.dtsi" diff --git a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c index a3adaa8a999..8536a70a19d 100644 --- a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c +++ b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include /* These configuration parameters are taken from Aspeed SDK */ #define DDR4_MR46_MODE 0x08000000 diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index d1940f18849..392fe76b27a 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h new file mode 100644 index 00000000000..4803abe9f62 --- /dev/null +++ b/include/dt-bindings/clock/aspeed-clock.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2016 Google Inc. + */ + +/* Core Clocks */ +#define PLL_HPLL 1 +#define PLL_DPLL 2 +#define PLL_D2PLL 3 +#define PLL_MPLL 4 +#define ARMCLK 5 + + +/* Bus Clocks, derived from core clocks */ +#define BCLK_PCLK 101 +#define BCLK_LHCLK 102 +#define BCLK_MACCLK 103 +#define BCLK_SDCLK 104 +#define BCLK_ARMCLK 105 + +#define MCLK_DDR 201 + +/* Special clocks */ +#define PCLK_UART1 501 +#define PCLK_UART2 502 +#define PCLK_UART3 503 +#define PCLK_UART4 504 +#define PCLK_UART5 505 +#define PCLK_MAC1 506 +#define PCLK_MAC2 507 diff --git a/include/dt-bindings/clock/ast2500-scu.h b/include/dt-bindings/clock/ast2500-scu.h deleted file mode 100644 index 4803abe9f62..00000000000 --- a/include/dt-bindings/clock/ast2500-scu.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2016 Google Inc. - */ - -/* Core Clocks */ -#define PLL_HPLL 1 -#define PLL_DPLL 2 -#define PLL_D2PLL 3 -#define PLL_MPLL 4 -#define ARMCLK 5 - - -/* Bus Clocks, derived from core clocks */ -#define BCLK_PCLK 101 -#define BCLK_LHCLK 102 -#define BCLK_MACCLK 103 -#define BCLK_SDCLK 104 -#define BCLK_ARMCLK 105 - -#define MCLK_DDR 201 - -/* Special clocks */ -#define PCLK_UART1 501 -#define PCLK_UART2 502 -#define PCLK_UART3 503 -#define PCLK_UART4 504 -#define PCLK_UART5 505 -#define PCLK_MAC1 506 -#define PCLK_MAC2 507 -- cgit v1.3.1