From 3d91bc90de44861b719e9f0d73fd80d0037f5d46 Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Tue, 17 Oct 2023 16:58:15 -0400 Subject: arm: dts: imx8mn-var-som: Fix broken EEPROM read On branch WIP/17Oct2023, the EEPROM can no longer be read: U-Boot 2023.10-latest (Oct 17 2023 - 15:53:43 -0400) CPU: Freescale i.MX8MNano Quad rev1.0 at 1200 MHz Reset cause: POR Model: Variscite VAR-SOM-MX8MN Symphony evaluation board var_read_som_eeprom: uclass_get_device_by_of_offset() failed: -19 initcall failed at call 000000004022207c (err=-19) Convert EEPROM-related properties to bootph-all so that the EEPROM can also be read outside of SPL. Fixes: 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Signed-off-by: Hugo Villeneuve Reviewed-by: Fabio Estevam --- arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi index e0caf3179ea..2bbc4a49418 100644 --- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi @@ -39,11 +39,11 @@ }; &i2c1 { - bootph-pre-ram; + bootph-all; }; &pinctrl_i2c1 { - bootph-pre-ram; + bootph-all; }; &pinctrl_pmic { @@ -83,5 +83,5 @@ }; &eeprom_som { - bootph-pre-ram; + bootph-all; }; -- cgit v1.3.1 From ad3a4f91e7ca7002d71920417ca529e7e8e7460a Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Wed, 18 Oct 2023 11:33:06 -0700 Subject: board: gateworks: venice: add fixup for GW73xx-F+ GW73xx-F board revision switched back to the original PCIe switch due to part availability. Signed-off-by: Tim Harvey Reviewed-by: Fabio Estevam --- board/gateworks/venice/venice.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c index a39ae58c8a0..0902a1da3e2 100644 --- a/board/gateworks/venice/venice.c +++ b/board/gateworks/venice/venice.c @@ -238,12 +238,12 @@ int ft_board_setup(void *fdt, struct bd_info *bd) if (!strncmp(base_model, "GW73", 4)) { pcbrev = get_pcb_rev(base_model); - if (pcbrev > 'B') { + if (pcbrev > 'B' && pcbrev < 'E') { printf("adjusting dt for %s\n", base_model); /* - * revC replaced PCIe 5-port switch with 4-port - * which changed ethernet1 PCIe GbE + * revC/D/E has PCIe 4-port switch which changes + * ethernet1 PCIe GbE: * from: pcie@0,0/pcie@1,0/pcie@2,4/pcie@6.0 * to: pcie@0,0/pcie@1,0/pcie@2,3/pcie@5.0 */ -- cgit v1.3.1 From 32c9dfcc56e61728f4254b9a5765db1c1466f423 Mon Sep 17 00:00:00 2001 From: Andrejs Cainikovs Date: Tue, 12 Dec 2023 09:27:25 -0300 Subject: apalis-imx8: add USBH_EN gpio hog USB host interface is not working on some Apalis Toradex carrier boards with Apalis iMX8 SoM. This is due to USBH_EN pin, which powers USB peripherals, having a strong pull-down on some boards, and a weak pull-down on the others. This USBH_EN pin is left unconfigured, which means it is in its default state at cold boot: input with a strong pull-up. As a result, carrier boards with a weak pull-down have this signal high enough to trigger power delivery to USB peripherals, and opposite - boards with strong pull-down on USBH_EN have this signal below the threshold needed to trigger USB power delivery. This change configures the USBH_EN pin as gpio hog, fixing this issue for all Apalis carrier boards regardless of pull-down resistor value. Also, update apalis-imx8_defconfig via savedefconfig. Signed-off-by: Andrejs Cainikovs Reviewed-by: Fabio Estevam --- arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi | 6 ++++++ configs/apalis-imx8_defconfig | 1 + 2 files changed, 7 insertions(+) diff --git a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi index f2d6b183ed9..c54a59e89c5 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi @@ -93,6 +93,12 @@ &gpio4 { bootph-some-ram; + + usbh_en { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + }; }; &gpio5 { diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 056c1fbacfc..d11a31ee641 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -65,6 +65,7 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_IMX8=y CONFIG_CPU=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y -- cgit v1.3.1 From e0dfb3417348d68a0f6032ce45d6e33015bd292c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 26 Oct 2023 09:16:36 -0300 Subject: imx8mp_evk: Select CONFIG_NET_RANDOM_ETHADDR On an early revision of the imx8mp-evk that I have access to, the MAC addresses fuses are not programmed, causing failure to bring the Ethernet interfaces. Fix this problema by selecting CONFIG_NET_RANDOM_ETHADDR so that random MAC addresses are assigned and the Ethernet ports become functional out of the box. Signed-off-by: Fabio Estevam --- configs/imx8mp_evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index d538b85c1f8..08998a63e75 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -74,6 +74,7 @@ CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eth1" +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y -- cgit v1.3.1 From 43bf6a692f7af8782fdc6f6c21cb4e8356b75435 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 26 Oct 2023 18:01:53 -0300 Subject: pico-pi-imx7d: Convert to watchdog driver model Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused the 'reset' command in U-Boot to not cause a board reset. Fix it by switching to the watchdog driver model via sysreset, which is the preferred method for implementing the watchdog reset Signed-off-by: Fabio Estevam --- arch/arm/dts/imx7d-pico-pi-u-boot.dtsi | 10 ++++++++++ configs/pico-pi-imx7d_defconfig | 3 +++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi index 843b4583e53..c6856823c64 100644 --- a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi +++ b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi @@ -6,6 +6,12 @@ usb0 = &usbotg1; display0 = &lcdif; }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + bootph-pre-ram; + }; }; &usbotg1 { @@ -45,6 +51,10 @@ }; }; +&wdog1 { + bootph-pre-ram; +}; + &iomuxc { pinctrl_backlight: backlight { fsl,pins = < diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 48364c7548e..5b615daf4a8 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -76,6 +76,8 @@ CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_SPL_USB_HOST=y @@ -95,3 +97,4 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_BMP_16BPP=y +CONFIG_IMX_WATCHDOG=y -- cgit v1.3.1 From 04b53f1249c43743010f61a6de8f1f9540805c65 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 4 Nov 2023 18:52:41 -0300 Subject: pico-pi-imx6ul: Connvert to DM_SERIAL The conversion to DM_SERIAL is mandatory, so select this option. Signed-off-by: Fabio Estevam --- configs/pico-pi-imx6ul_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 1eee1e6c2ff..3af968d5512 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -70,6 +70,7 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_USB=y CONFIG_SPL_USB_HOST=y -- cgit v1.3.1 From 5e13f5db4c8ec95414ab81ff495bc7d7df9b44ab Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 6 Nov 2023 13:33:22 -0300 Subject: imx7s-warp-u-boot: Fix aliases and chosen nodes indentation The aliases and chosen nodes are currently indented using spaces. Fix them to use the standard tab indentation. Signed-off-by: Fabio Estevam --- arch/arm/dts/imx7s-warp-u-boot.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-u-boot.dtsi index 49b992dccca..4f44598c9a2 100644 --- a/arch/arm/dts/imx7s-warp-u-boot.dtsi +++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi @@ -1,12 +1,12 @@ / { - aliases { - mmc0 = &usdhc3; - usb0 = &usbotg1; - }; + aliases { + mmc0 = &usdhc3; + usb0 = &usbotg1; + }; - chosen { - stdout-path = &uart1; - }; + chosen { + stdout-path = &uart1; + }; }; &aips3 { -- cgit v1.3.1 From 49a3e0b9e262fa28c664b701d4c1edb349da2de6 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Fri, 17 Nov 2023 16:00:44 +0100 Subject: tqma6: Fix DDR configuration Initially investigating a Linux network issue causing a lot of drop and poor network performances on a custom system based on a TQMA6A module (based on an iMX6Q), [1st link below]. I eventually correlated my observations with a contention at the NIC level when in concurrency with the graphics pipeline. Troubleshooting this in the kernel lead to disabling DMA bursts accesses made by the IPU in order to avoid triggering the QoS at the interconnect level, reducing from 50 to 10% the drop rate on eth0, [2nd link below]. The solution worked on my setup but not on others, which still suffered from abnormally high drop rates even with this "fix". After looking a while into TQ Systems BSP I figured out a number of differences in recent U-Boot out-of-tree patches they had in their repository [3rd link]. Parsing the differences one after the other lead me to this final solution. The reset pad of the DDR controller was apparently misconfigured, Bit 18-19 picturing the "DDR select field". The current value b11 is reserved. The only defined value as of version 6 of the iMX6Q manual was b00 "DDR3 and LPDDR2 mode". In practice no register difference has been spotted after changing this configuration but all issues tracked thus far just vanished. All previous fixes have been proven irrelevant. Just clearing this field solved all our network issues and the drop rate as measured by iperf3 felt back to 0%. Link: https://lore.kernel.org/netdev/20231012193410.3d1812cf@xps-13/ Link: https://lists.freedesktop.org/archives/dri-devel/2023-October/428251.html Link: https://github.com/tq-systems/u-boot-tqmaxx/commit/15eb6abbefbf6916c28467b85485911dad3da6bc Signed-off-by: Miquel Raynal Reviewed-by: Fabio Estevam --- board/tq/tqma6/tqma6q.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/tq/tqma6/tqma6q.cfg b/board/tq/tqma6/tqma6q.cfg index a49489aed3f..a345c4de93d 100644 --- a/board/tq/tqma6/tqma6q.cfg +++ b/board/tq/tqma6/tqma6q.cfg @@ -36,7 +36,7 @@ DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030 DATA 4, MX6_IOM_DRAM_CAS, 0x00008030 DATA 4, MX6_IOM_DRAM_RAS, 0x00008030 DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 -DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030 +DATA 4, MX6_IOM_DRAM_RESET, 0x00003030 DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000 DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 -- cgit v1.3.1 From 29e31c549d41e9cc9af5b7d675d3208e6436717b Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Tue, 12 Dec 2023 08:28:15 -0300 Subject: board: colibri_imx7: fix emmc detection Later versions of Colibri iMX7D V1.1B modules use a "new" SoC fusing. The difference lies in whether we enable the boot ROM to use the eMMC reset signal. Depending on the SoC fuse, the boot ROM configures this pin as a GPIO output to drive the reset signal. Our eMMC vs NAND detection currently only sets that signal to a GPIO without explicitly setting any direction. Previously, by default, it was set as an input. As the boot ROM now configures it as an output, we receive a value of zero instead of one, indicating the absence of the pull-up on eMMC modules. To fix this, set the SION bit, allowing the reading back of the value even if it is configured as an output by the boot ROM. It's important to note that with the new SoC fusing, we now read back what the boot ROM drives rather than the real value caused by the pull-up resistor. However, if it were ever driven low, the eMMC would permanently be reset. In addition, remove hard-coded variant in the eMMC build case as since the commit 0c39564d0281 ("toradex: colibri_imx7: Enable nand/emmc detection and set boot variant") will anyways always get overridden by the detection routing in board code. Fixes: 0c39564d ("toradex: colibri_imx7: Enable nand/emmc detection and set boot variant") Signed-off-by: Marcel Ziswiler Signed-off-by: Hiago De Franco --- board/toradex/colibri_imx7/colibri_imx7.c | 6 +++--- include/configs/colibri_imx7.h | 1 - 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index f0356af0082..3e7c5d64c30 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -66,7 +66,7 @@ int dram_init(void) } static iomux_v3_cfg_t const flash_detection_pads[] = { - MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL), + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL) | MUX_MODE_SION, }; static iomux_v3_cfg_t const uart1_pads[] = { @@ -193,9 +193,9 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; /* - * Enable GPIO on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST + * Enable GPIO SION on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST * is pulled high with 4.7k for eMMC devices. This allows to reliably - * detect eMMC/NAND flash + * detect eMMC vs NAND flash. */ imx_iomux_v3_setup_multiple_pads(flash_detection_pads, ARRAY_SIZE(flash_detection_pads)); gpio_request(FLASH_DET_GPIO, "flash-detection-gpio"); diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 03f8ed14787..7a9f4afe7d1 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -101,7 +101,6 @@ UBI_BOOTCMD #elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) #define MODULE_EXTRA_ENV_SETTINGS \ - "variant=-emmc\0" \ EMMC_ANDROID_BOOTCMD #endif -- cgit v1.3.1