From 5862199fac0f2c7417727cb1aeda7a1b5aa7eedd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Aug 2026 23:35:49 +0200 Subject: arm64: dts: renesas: ironhide: Describe all reserved memory Fully describe all available DRAM in the DT, and describe regions which are not accessible because they are used by firmware in reserved-memory nodes. Replace the first memory bank memory@60600000 with memory@40000000 and a 518 MiB long reserved-memory no-map subnode. This memory region is used by other cores in the system. Reserve 32 kiB of memory at 0x8c100000 for parameters shared by IPL, SCP, TFA BL31 and TEE. Reserve 512 kiB of memory at 0x8c200000 for TFA BL31. The upcoming upstream TFA 2.15 BL31 uses memory from 0x8c200000..0x8c242fff; rounding up to 512 kiB is slight future-proofing. Reserve 32 MiB of memory at 0x8c400000 for OPTEE-OS, which is the entire OPTEE-OS TZ protected DRAM area. Neither TFA BL31 nor OPTEE-OS modify the DT passed to Linux in any way with any new reserved-memory {} nodes to reserve memory areas used by the TFA BL31 or OPTEE-OS to prevent the next stage from using those areas, which lets Linux use all of the available DRAM as it is described in the DT that was passed in by U-Boot, including the areas that are newly utilized by TFA BL31 or OPTEE-OS. In case of high DRAM utilization, unless the memory used by TFA BL31 or OPTEE-OS is properly reserved, Linux may use and corrupt the memory used by TFA BL31 or OPTEE-OS, which would lead to the system becoming unresponsive. Ported from Linux 7.2-rc5 commit 5250b3b1ad99 ("arm64: dts: renesas: ironhide: Describe all reserved memory") Signed-off-by: Marek Vasut --- arch/arm/dts/r8a78000-ironhide-u-boot.dtsi | 37 ++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/dts/r8a78000-ironhide-u-boot.dtsi b/arch/arm/dts/r8a78000-ironhide-u-boot.dtsi index 299716f96a4..21b03df849a 100644 --- a/arch/arm/dts/r8a78000-ironhide-u-boot.dtsi +++ b/arch/arm/dts/r8a78000-ironhide-u-boot.dtsi @@ -15,6 +15,13 @@ mmc0 = &mmc0; }; + /delete-node/ memory@60600000; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x0 0x80000000>; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -32,6 +39,36 @@ regulator-boot-on; regulator-always-on; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* First 518 MiB is reserved for other purposes. */ + firmware@40000000 { + reg = <0x0 0x40000000 0x0 0x20600000>; + no-map; + }; + + /* Parameters set by IPL. */ + parameters@8c100000 { + reg = <0x0 0x8c100000 0x0 0x00008000>; + no-map; + }; + + /* TFA BL31. */ + tfa-bl31@8c200000 { + reg = <0x0 0x8c200000 0x0 0x00080000>; + no-map; + }; + + /* TEE TZ DRAM. */ + tee@8c400000 { + reg = <0x0 0x8c400000 0x0 0x02000000>; + no-map; + }; + }; }; &cpg { -- cgit v1.3.1