From 7ca9c1d864b7b3adffdd1e889f174feb51a1b5b1 Mon Sep 17 00:00:00 2001 From: Christian Taedcke Date: Tue, 25 Jul 2023 09:26:58 +0200 Subject: xilinx: zynqmp: Extract aes operation into new file This moves the aes operation that is performed by the pmu into a separate file. This way it can be called not just from the shell command, but also e.g. from board initialization code. Signed-off-by: Christian Taedcke Link: https://lore.kernel.org/r/20230725072658.16341-1-christian.taedcke-oss@weidmueller.com Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/Makefile | 3 +- arch/arm/mach-zynqmp/aes.c | 59 ++++++++++++++++++++++++++ arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h | 32 ++++++++++++++ board/xilinx/zynqmp/cmds.c | 43 ++----------------- 4 files changed, 95 insertions(+), 42 deletions(-) create mode 100644 arch/arm/mach-zynqmp/aes.c create mode 100644 arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile index 3f255549439..8f897a37d14 100644 --- a/arch/arm/mach-zynqmp/Makefile +++ b/arch/arm/mach-zynqmp/Makefile @@ -3,8 +3,7 @@ # (C) Copyright 2014 - 2015 Xilinx, Inc. # Michal Simek -obj-y += clk.o -obj-y += cpu.o +obj-y += aes.o clk.o cpu.o obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o psu_spl_init.o obj-$(CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT) += ecc_spl_init.o diff --git a/arch/arm/mach-zynqmp/aes.c b/arch/arm/mach-zynqmp/aes.c new file mode 100644 index 00000000000..8a2b7fdcbe9 --- /dev/null +++ b/arch/arm/mach-zynqmp/aes.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2018 Xilinx, Inc. + * Siva Durga Prasad Paladugu + * + * Copyright (C) 2023 Weidmueller Interface GmbH & Co. KG + * Christian Taedcke + */ + +#include +#include + +#include +#include +#include +#include + +int zynqmp_aes_operation(struct zynqmp_aes *aes) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (zynqmp_firmware_version() <= PMUFW_V1_0) + return -ENOENT; + + if (aes->srcaddr && aes->ivaddr && aes->dstaddr) { + flush_dcache_range(aes->srcaddr, + aes->srcaddr + + roundup(aes->len, ARCH_DMA_MINALIGN)); + flush_dcache_range(aes->ivaddr, + aes->ivaddr + + roundup(IV_SIZE, ARCH_DMA_MINALIGN)); + flush_dcache_range(aes->dstaddr, + aes->dstaddr + + roundup(aes->len, ARCH_DMA_MINALIGN)); + } + + if (aes->keysrc == 0) { + if (aes->keyaddr == 0) + return -EINVAL; + + flush_dcache_range(aes->keyaddr, + aes->keyaddr + + roundup(KEY_PTR_LEN, ARCH_DMA_MINALIGN)); + } + + flush_dcache_range((ulong)aes, (ulong)(aes) + + roundup(sizeof(struct zynqmp_aes), ARCH_DMA_MINALIGN)); + + ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes), + lower_32_bits((ulong)aes), 0, 0, ret_payload); + if (ret || ret_payload[1]) { + printf("Failed: AES op status:0x%x, errcode:0x%x\n", + ret, ret_payload[1]); + return -EIO; + } + + return 0; +} diff --git a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h new file mode 100644 index 00000000000..2a9cffbd0f8 --- /dev/null +++ b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Weidmueller Interface GmbH & Co. KG + * Christian Taedcke + * + * Declaration of AES operation functionality for ZynqMP. + */ + +#ifndef ZYNQMP_AES_H +#define ZYNQMP_AES_H + +struct zynqmp_aes { + u64 srcaddr; + u64 ivaddr; + u64 keyaddr; + u64 dstaddr; + u64 len; + u64 op; + u64 keysrc; +}; + +/** + * zynqmp_aes_operation() - Performs an aes operation using the pmu firmware + * + * @aes: The aes operation buffer that must have been allocated using + * ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1) + * + * Return: 0 in case of success, in case of an error any other value + */ +int zynqmp_aes_operation(struct zynqmp_aes *aes); + +#endif /* ZYNQMP_AES_H */ diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index ea404d547f6..fadb0edb24f 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -14,16 +14,7 @@ #include #include #include - -struct aes { - u64 srcaddr; - u64 ivaddr; - u64 keyaddr; - u64 dstaddr; - u64 len; - u64 op; - u64 keysrc; -}; +#include static int do_zynqmp_verify_secure(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) @@ -121,9 +112,7 @@ static int do_zynqmp_mmio_write(struct cmd_tbl *cmdtp, int flag, int argc, static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { - ALLOC_CACHE_ALIGN_BUFFER(struct aes, aes, 1); - int ret; - u32 ret_payload[PAYLOAD_ARG_CNT]; + ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1); if (zynqmp_firmware_version() <= PMUFW_V1_0) { puts("ERR: PMUFW v1.0 or less is detected\n"); @@ -142,40 +131,14 @@ static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc, aes->keysrc = hextoul(argv[6], NULL); aes->dstaddr = hextoul(argv[7], NULL); - if (aes->srcaddr && aes->ivaddr && aes->dstaddr) { - flush_dcache_range(aes->srcaddr, - (aes->srcaddr + - roundup(aes->len, ARCH_DMA_MINALIGN))); - flush_dcache_range(aes->ivaddr, - (aes->ivaddr + - roundup(IV_SIZE, ARCH_DMA_MINALIGN))); - flush_dcache_range(aes->dstaddr, - (aes->dstaddr + - roundup(aes->len, ARCH_DMA_MINALIGN))); - } - if (aes->keysrc == 0) { if (argc < cmdtp->maxargs) return CMD_RET_USAGE; aes->keyaddr = hextoul(argv[8], NULL); - if (aes->keyaddr) - flush_dcache_range(aes->keyaddr, - (aes->keyaddr + - roundup(KEY_PTR_LEN, - ARCH_DMA_MINALIGN))); } - flush_dcache_range((ulong)aes, (ulong)(aes) + - roundup(sizeof(struct aes), ARCH_DMA_MINALIGN)); - - ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes), - lower_32_bits((ulong)aes), 0, 0, ret_payload); - if (ret || ret_payload[1]) - printf("Failed: AES op status:0x%x, errcode:0x%x\n", - ret, ret_payload[1]); - - return ret; + return zynqmp_aes_operation(aes); } #ifdef CONFIG_DEFINE_TCM_OCM_MMAP -- cgit v1.3.1 From b58ced5277edaa5213e4745cab829219f9a8a9c6 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Wed, 2 Aug 2023 08:35:05 +0200 Subject: arm64: versal: Increase the number of DRAM banks to 36 HBM stands for high bandwidth memory and is a type of memory interface used in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka graphics cards), as well as the server, high-performance computing (HPC) and networking and client space. High Bandwidth Memory(HBM) has total 16 channels, one channel is divided into two pseudo channels which makes its 32 banks each with some amount of memory. And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high and pretty much there should be also place for PL DDR. So maximum number of memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36. Signed-off-by: Venkatesh Yadav Abbarapu Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ed9eaf5c20501ee691d7d28a173511cd9a87f161.1690958095.git.michal.simek@amd.com --- configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index a1feafc49b9..0339130e8b8 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_ARCH_VERSAL=y CONFIG_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 +CONFIG_NR_DRAM_BANKS=36 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_SYS_PROMPT="Versal> " CONFIG_OF_LIBFDT_OVERLAY=y -- cgit v1.3.1 From 2cf78f951bc9bc2b549f311327e61b86bd86d175 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 3 Aug 2023 14:51:53 +0200 Subject: xilinx: Remove scriptaddr from config files and move it to DT Define bootscript address in RAM via DT property and remove it from config file. Adding default value to common DTSI. Platform DT description can remove this property or rewrite it. In Zynq case scriptaddr property was defined twice for no reason. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/d36ffeb00ed8f0ca4bb67d4983d1852d01ade637.1691067102.git.michal.simek@amd.com --- arch/arm/dts/xilinx-versal-net-virt.dts | 6 ++++++ arch/arm/dts/xilinx-versal-virt.dts | 6 ++++++ arch/arm/dts/zynq-7000.dtsi | 7 +++++++ arch/arm/dts/zynqmp.dtsi | 7 +++++++ include/configs/xilinx_versal.h | 1 - include/configs/xilinx_versal_net.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 2 -- 8 files changed, 26 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/xilinx-versal-net-virt.dts b/arch/arm/dts/xilinx-versal-net-virt.dts index c99257cb083..f5eca843b64 100644 --- a/arch/arm/dts/xilinx-versal-net-virt.dts +++ b/arch/arm/dts/xilinx-versal-net-virt.dts @@ -8,4 +8,10 @@ /dts-v1/; / { + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x20000000>; + }; + }; }; diff --git a/arch/arm/dts/xilinx-versal-virt.dts b/arch/arm/dts/xilinx-versal-virt.dts index 733e532f987..3ea3cb1bdd3 100644 --- a/arch/arm/dts/xilinx-versal-virt.dts +++ b/arch/arm/dts/xilinx-versal-virt.dts @@ -8,4 +8,10 @@ /dts-v1/; / { + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x20000000>; + }; + }; }; diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 8c6eafec1d4..fb61fe98e3d 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -11,6 +11,13 @@ #size-cells = <1>; compatible = "xlnx,zynq-7000"; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x3000000>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 1632be843b1..355f360281b 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -22,6 +22,13 @@ #address-cells = <2>; #size-cells = <2>; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-address = /bits/ 64 <0x20000000>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index a403999977e..98792aba7cc 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -40,7 +40,6 @@ "kernel_size_r=0x10000000\0" \ "kernel_comp_addr_r=0x30000000\0" \ "kernel_comp_size=0x3C00000\0" \ - "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index 613cce46f90..e17b4409354 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -54,7 +54,6 @@ "kernel_size_r=0x10000000\0" \ "kernel_comp_addr_r=0x30000000\0" \ "kernel_comp_size=0x3C00000\0" \ - "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 74264b7bee8..51f0a425340 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -57,7 +57,6 @@ "kernel_size_r=0x10000000\0" \ "kernel_comp_addr_r=0x30000000\0" \ "kernel_comp_size=0x3C00000\0" \ - "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" \ "stdin=serial\0" \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e372e903170..553bb1b45b6 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -172,12 +172,10 @@ /* Default environment */ #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ - "scriptaddr=0x20000\0" \ "script_size_f=0x40000\0" \ "fdt_addr_r=0x1f00000\0" \ "pxefile_addr_r=0x2000000\0" \ "kernel_addr_r=0x2000000\0" \ - "scriptaddr=0x3000000\0" \ "ramdisk_addr_r=0x3100000\0" \ BOOTENV #endif -- cgit v1.3.1 From 4a5c8e897623ebdb0c2d52ef7f488a3921258974 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 24 Aug 2023 08:57:12 +0530 Subject: arm64: zynqmp: Enable the config CMD_KASLRSEED Kernel Address Space Layout Randomization (KASLR) is a hardening feature that aims to make it more difficult to take advantage of known exploits in the kernel, by placing kernel data structures at a random address at each boot.The bootloader supports randomizing the virtual address at which the kernel image is loaded. The bootloader must provide entropy by passing a random u64 value in the /chosen/kaslr-seed device tree node. When we run "kaslrseed" command from U-Boot, the bootloader will genarate the kaslr-seed and update the /chosen/kaslr-seed DT property. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230824032712.13399-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 26260841c59..26820f721e3 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -90,6 +90,7 @@ CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y CONFIG_CMD_GETTIME=y CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y CONFIG_CMD_TIMER=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_SMC=y -- cgit v1.3.1 From f0084f1dfdbc9d62b2496598bfb02dcc482b7424 Mon Sep 17 00:00:00 2001 From: Neal Frager Date: Mon, 21 Aug 2023 13:45:02 +0100 Subject: drivers/mtd/spi/spi-nor-ids.c: add mx25u25635f support This patch adds support for the MX25U25635F QSPI Flash Memory. Signed-off-by: Neal Frager Link: https://lore.kernel.org/r/20230821124502.3308208-1-neal.frager@amd.com Signed-off-by: Michal Simek --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 45872159842..b03dd1cd08e 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -249,6 +249,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx25u6435f", 0xc22537, 0, 64 * 1024, 128, SECT_4K) }, { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K) }, { INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) }, + { INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K) }, { INFO("mx25u51245g", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) }, -- cgit v1.3.1 From 630f29014d76d810785d3b4e252d42f5cfed386e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Aug 2023 09:11:29 +0200 Subject: arm64: zynqmp: Setup default si570 frequency to 156.25MHz All si570 mgt chips have factory default 156.25MHz but DT changed it to 148.5MHz. After tracking it is pretty much c&p fault taken from Zynq zc702/zc706 boards where 148.5MHz was setup as default because it was requirement for AD7511 chip available on these boards. ZynqMP board don't contain this chip that's why factory default frequency can be used. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/c052ddf39e392e97f87f1c57ea06f3508733c672.1692947486.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 79d67c495de..0f7230b9526 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -602,7 +602,7 @@ reg = <0x5d>; temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; - clock-frequency = <148500000>; + clock-frequency = <156250000>; clock-output-names = "si570_mgt"; }; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 7a8094a16b7..f8019c592a7 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -592,7 +592,7 @@ reg = <0x5d>; temperature-stability = <50>; /* copy from zc702 */ factory-fout = <156250000>; - clock-frequency = <148500000>; + clock-frequency = <156250000>; clock-output-names = "si570_mgt"; }; }; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 9b3ae67bff1..0c1f50943ac 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -489,7 +489,7 @@ reg = <0x5d>; temperature-stability = <50>; factory-fout = <156250000>; - clock-frequency = <148500000>; + clock-frequency = <156250000>; clock-output-names = "si570_mgt"; }; }; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 43eeaec5b15..8ca01f01a3a 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -499,7 +499,7 @@ reg = <0x5d>; temperature-stability = <50>; factory-fout = <156250000>; - clock-frequency = <148500000>; + clock-frequency = <156250000>; clock-output-names = "si570_mgt"; }; }; -- cgit v1.3.1 From 91ed45a24f5bad1d8538a8f54738e51924443b76 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Aug 2023 10:10:07 +0200 Subject: arm64: zynqmp: Add support for K26 rev2 boards Revision 2 is SW compatible with revision 1 but it is necessary to reflect it in model and compatible properties which are parsed by user space. Rev 2 has improved a power on boot reset and MIO34 shutdown glich improvement done via an additional filter in the GreenPak chip. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/6b9e68ebfb436da391daeb147f2a9985ac984c0c.1692951005.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 8 +++++--- arch/arm/dts/zynqmp-smk-k26-revA.dts | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index d718fec7606..80b9face748 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* - * dts file for Xilinx ZynqMP SM-K26 rev1/B/A + * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2023, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -17,8 +18,9 @@ #include / { - model = "ZynqMP SM-K26 Rev1/B/A"; - compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", + model = "ZynqMP SM-K26 Rev2/1/B/A"; + compatible = "xlnx,zynqmp-sm-k26-rev2", + "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26", "xlnx,zynqmp"; diff --git a/arch/arm/dts/zynqmp-smk-k26-revA.dts b/arch/arm/dts/zynqmp-smk-k26-revA.dts index 85b0d167724..719a4e49b57 100644 --- a/arch/arm/dts/zynqmp-smk-k26-revA.dts +++ b/arch/arm/dts/zynqmp-smk-k26-revA.dts @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* - * dts file for Xilinx ZynqMP SMK-K26 rev1/B/A + * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2023, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -10,8 +11,9 @@ #include "zynqmp-sm-k26-revA.dts" / { - model = "ZynqMP SMK-K26 Rev1/B/A"; - compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", + model = "ZynqMP SMK-K26 Rev2/1/B/A"; + compatible = "xlnx,zynqmp-smk-k26-rev2", + "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26", "xlnx,zynqmp"; }; -- cgit v1.3.1 From fa12dfa08a7bdc7d67e3758f10461468a663ce2e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Aug 2023 11:37:46 +0200 Subject: dm: core: support reading a single indexed u64 value Add helper function to allow reading a single indexed u64 value from a device-tree property containing multiple u64 values, that is an array of u64's. Co-developed-by: Ashok Reddy Soma Signed-off-by: Ashok Reddy Soma Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/08043c8d204d0068f04c27de86afe78c75c50b69.1692956263.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 1 + drivers/core/of_access.c | 16 ++++++++++++---- drivers/core/ofnode.c | 30 ++++++++++++++++++++++++++++++ include/dm/of_access.h | 19 +++++++++++++++++++ include/dm/ofnode.h | 12 ++++++++++++ test/dm/ofnode.c | 8 ++++++++ 6 files changed, 82 insertions(+), 4 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 63fda15da76..d4693e3c7a9 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -301,6 +301,7 @@ uint-value = <(-1234)>; int64-value = /bits/ 64 <0x1111222233334444>; int-array = <5678 9123 4567>; + int64-array = /bits/ 64 <0x1111222233334444 0x4444333322221111>; str-value = "test string"; interrupts-extended = <&irq 3 0>; acpi,name = "GHIJ"; diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c index 57f10445b12..1bb4d8eab70 100644 --- a/drivers/core/of_access.c +++ b/drivers/core/of_access.c @@ -570,26 +570,34 @@ int of_read_u32_index(const struct device_node *np, const char *propname, return 0; } -int of_read_u64(const struct device_node *np, const char *propname, u64 *outp) +int of_read_u64_index(const struct device_node *np, const char *propname, + int index, u64 *outp) { const __be64 *val; debug("%s: %s: ", __func__, propname); if (!np) return -EINVAL; - val = of_find_property_value_of_size(np, propname, sizeof(*outp)); + + val = of_find_property_value_of_size(np, propname, + sizeof(*outp) * (index + 1)); if (IS_ERR(val)) { debug("(not found)\n"); return PTR_ERR(val); } - *outp = be64_to_cpup(val); + *outp = be64_to_cpup(val + index); debug("%#llx (%lld)\n", (unsigned long long)*outp, - (unsigned long long)*outp); + (unsigned long long)*outp); return 0; } +int of_read_u64(const struct device_node *np, const char *propname, u64 *outp) +{ + return of_read_u64_index(np, propname, 0, outp); +} + int of_property_match_string(const struct device_node *np, const char *propname, const char *string) { diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index a4dc9bde085..8311282abf6 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -344,6 +344,36 @@ int ofnode_read_u32_index(ofnode node, const char *propname, int index, return 0; } +int ofnode_read_u64_index(ofnode node, const char *propname, int index, + u64 *outp) +{ + const fdt64_t *cell; + int len; + + assert(ofnode_valid(node)); + + if (ofnode_is_np(node)) + return of_read_u64_index(ofnode_to_np(node), propname, index, + outp); + + cell = fdt_getprop(ofnode_to_fdt(node), ofnode_to_offset(node), + propname, &len); + if (!cell) { + debug("(not found)\n"); + return -EINVAL; + } + + if (len < (sizeof(u64) * (index + 1))) { + debug("(not large enough)\n"); + return -EOVERFLOW; + } + + *outp = fdt64_to_cpu(cell[index]); + debug("%#llx (%lld)\n", *outp, *outp); + + return 0; +} + u32 ofnode_read_u32_index_default(ofnode node, const char *propname, int index, u32 def) { diff --git a/include/dm/of_access.h b/include/dm/of_access.h index c556a18f7d9..9361d0a87bf 100644 --- a/include/dm/of_access.h +++ b/include/dm/of_access.h @@ -333,6 +333,25 @@ int of_read_u32(const struct device_node *np, const char *propname, u32 *outp); int of_read_u32_index(const struct device_node *np, const char *propname, int index, u32 *outp); +/** + * of_read_u64_index() - Find and read a 64-bit value from a multi-value + * property + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @index: index of the u32 in the list of values + * @outp: pointer to return value, modified only if return value is 0. + * + * Search for a property in a device node and read a 64-bit value from + * it. + * + * Return: + * 0 on success, -EINVAL if the property does not exist, or -EOVERFLOW if the + * property data isn't large enough. + */ +int of_read_u64_index(const struct device_node *np, const char *propname, + int index, u64 *outp); + /** * of_read_u64() - Find and read a 64-bit integer from a property * diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0f38b3e736d..0a85db31f36 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -434,6 +434,18 @@ int ofnode_read_u32(ofnode node, const char *propname, u32 *outp); int ofnode_read_u32_index(ofnode node, const char *propname, int index, u32 *outp); +/** + * ofnode_read_u64_index() - Read a 64-bit integer from a multi-value property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @index: index of the integer to return + * @outp: place to put value (if found) + * Return: 0 if OK, -ve on error + */ +int ofnode_read_u64_index(ofnode node, const char *propname, int index, + u64 *outp); + /** * ofnode_read_s32() - Read a 32-bit integer from a property * diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 6fbebc7da08..b74f5c2ebcf 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -967,6 +967,14 @@ static int dm_test_ofnode_u64(struct unit_test_state *uts) ut_asserteq_64(0x1111222233334444, val); ut_asserteq(-EINVAL, ofnode_read_u64(node, "missing", &val)); + ut_assertok(ofnode_read_u64_index(node, "int64-array", 0, &val)); + ut_asserteq_64(0x1111222233334444, val); + ut_assertok(ofnode_read_u64_index(node, "int64-array", 1, &val)); + ut_asserteq_64(0x4444333322221111, val); + ut_asserteq(-EOVERFLOW, + ofnode_read_u64_index(node, "int64-array", 2, &val)); + ut_asserteq(-EINVAL, ofnode_read_u64_index(node, "missing", 0, &val)); + return 0; } DM_TEST(dm_test_ofnode_u64, UT_TESTF_SCAN_FDT); -- cgit v1.3.1 From f16347f41c64ec53f598c3444fb19b3442c12bb3 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Thu, 10 Aug 2023 23:48:27 -0600 Subject: firmware: zynqmp: Add support to check feature Add firmware API to check if given feature is supported. Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20230811054829.13162-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek --- drivers/firmware/firmware-zynqmp.c | 13 +++++++++++++ include/zynqmp_firmware.h | 3 +++ 2 files changed, 16 insertions(+) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index ab4c4f1a690..43fb7fa7787 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -195,6 +195,19 @@ int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) return ret; } +int zynqmp_pm_feature(const u32 api_id) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + /* Check feature check API version */ + ret = xilinx_pm_request(PM_FEATURE_CHECK, api_id, 0, 0, 0, + ret_payload); + + /* Return feature check version */ + return ret_payload[1] & FIRMWARE_VERSION_MASK; +} + int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id) { int ret; diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 18a87d27495..73198a6a6ea 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -456,6 +456,7 @@ int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id); int zynqmp_mmio_read(const u32 address, u32 *value); int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value); +int zynqmp_pm_feature(const u32 api_id); /* Type of Config Object */ #define PM_CONFIG_OBJECT_TYPE_BASE 0x1U @@ -492,6 +493,8 @@ enum zynqmp_pm_request_ack { /* PM API versions */ #define PM_API_VERSION_2 2 +#define PM_PINCTRL_PARAM_SET_VERSION 2 + struct zynqmp_ipi_msg { size_t len; u32 *buf; -- cgit v1.3.1 From 4af320b10c1e6bfe6272980c303fe119f6c27197 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Thu, 10 Aug 2023 23:48:28 -0600 Subject: pinctrl: zynqmp: Add version check for TRISTATE configuration Support for configuring TRISTATE parameter is added in ZYNQMP PMUFW(Xilinx ZynqMP Platform Management Firmware) Configuration Param Set version 2.0. If the requested configuration is TRISTATE then check the version before requesting Xilinx firmware to set the configuration. Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20230811054829.13162-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek --- drivers/pinctrl/pinctrl-zynqmp.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index 02626a7561e..e9857f5ed9d 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -158,6 +158,12 @@ static int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, u32 valu { int ret; + if (param == PM_PINCTRL_CONFIG_TRI_STATE) { + ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET); + if (ret < PM_PINCTRL_PARAM_SET_VERSION) + return -EOPNOTSUPP; + } + /* Request the pin first */ ret = xilinx_pm_request(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); if (ret) { -- cgit v1.3.1 From 12d2da980ec4c775c115f1e141167525364e854b Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Thu, 10 Aug 2023 23:48:29 -0600 Subject: pinctrl: zynqmp: Add support for output-enable and bias-high-impedance Add support to handle 'output-enable' and 'bias-high-impedance' configurations in pinctrl driver. Signed-off-by: Ashok Reddy Soma Link: https://lore.kernel.org/r/20230811054829.13162-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek --- drivers/pinctrl/pinctrl-zynqmp.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index e9857f5ed9d..517035961da 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -473,6 +473,10 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin, pin); break; case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: + param = PM_PINCTRL_CONFIG_TRI_STATE; + arg = PM_PINCTRL_TRI_STATE_ENABLE; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; case PIN_CONFIG_LOW_POWER_MODE: /* * This cases are mentioned in dts but configurable @@ -481,6 +485,11 @@ static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin, */ ret = 0; break; + case PIN_CONFIG_OUTPUT_ENABLE: + param = PM_PINCTRL_CONFIG_TRI_STATE; + arg = PM_PINCTRL_TRI_STATE_DISABLE; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; default: dev_warn(dev, "unsupported configuration parameter '%u'\n", param); -- cgit v1.3.1 From 55e281049c49ac779b1c533abde5c3c2ffa0cc8e Mon Sep 17 00:00:00 2001 From: Chanho Park Date: Thu, 31 Aug 2023 16:52:47 +0900 Subject: fpga: define dummy fpga_load function for debug build This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and CONFIG_FPGA or CONFIG_SPL_FPGA are not enabled. When CC_OPTIMIZE_FOR_DEBUG is enabled, unused code will not be optimized out. Hence, fpga_load function must have a dummy implementation to avoid the build error. ../common/spl/spl_fit.c:591: undefined reference to `fpga_load' collect2: error: ld returned 1 exit status Signed-off-by: Chanho Park Link: https://lore.kernel.org/r/20230831075247.137501-1-chanho61.park@samsung.com Signed-off-by: Michal Simek --- include/fpga.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/fpga.h b/include/fpga.h index ed688cc0fa3..44f2755a3f1 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -60,8 +60,16 @@ int fpga_add(fpga_type devtype, void *desc); int fpga_count(void); const fpga_desc *const fpga_get_desc(int devnum); int fpga_is_partial_data(int devnum, size_t img_len); +#if CONFIG_IS_ENABLED(FPGA) int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype, int flags); +#else +static inline int fpga_load(int devnum, const void *buf, size_t bsize, + bitstream_type bstype, int flags) +{ + return FPGA_FAIL; +} +#endif int fpga_fsload(int devnum, const void *buf, size_t size, fpga_fs_info *fpga_fsinfo); int fpga_loads(int devnum, const void *buf, size_t size, -- cgit v1.3.1 From 280fcda109eede9c987b1512a532973e61f06455 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 30 Aug 2023 18:36:23 +0200 Subject: test/py: tpm2: skip tpm2_startup when env__tpm_device_test_skip=True All tpm2 tests should be possible to skip when env__tpm_device_test_skip=True but test_tpm2_startup is missing it. Reviewed-by: Ilias Apalodimas Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/41f932e52bdd206b1b68d5ff313fc29b794a70e7.1693413381.git.michal.simek@amd.com --- test/py/tests/test_tpm2.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/test/py/tests/test_tpm2.py b/test/py/tests/test_tpm2.py index fce689cd992..c2579fa02c5 100644 --- a/test/py/tests/test_tpm2.py +++ b/test/py/tests/test_tpm2.py @@ -71,6 +71,9 @@ def test_tpm2_startup(u_boot_console): Initiate the TPM internal state machine. """ + skip_test = u_boot_console.config.env.get('env__tpm_device_test_skip', False) + if skip_test: + pytest.skip('skip TPM device test') u_boot_console.run_command('tpm2 startup TPM2_SU_CLEAR') output = u_boot_console.run_command('echo $?') assert output.endswith('0') -- cgit v1.3.1 From 7ad9eb785e393d89c67edbaae9cbf659ff41c85a Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 31 Aug 2023 08:56:10 +0530 Subject: arm64: versal: Enable TPM for xilinx platforms TPMs are becoming popular that's why enable drivers and command for it. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230831032612.2729-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_versal_virt_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 0339130e8b8..918068b3120 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y +CONFIG_CMD_TPM=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y @@ -115,7 +116,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y -CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -128,6 +128,7 @@ CONFIG_CQSPI_REF_CLK=200000000 CONFIG_CADENCE_OSPI_VERSAL=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_TPM2_TIS_SPI=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y @@ -145,3 +146,4 @@ CONFIG_USB_FUNCTION_THOR=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y +CONFIG_TPM=y -- cgit v1.3.1 From b57fed046e543b8fbc101c2c51786f4ce7dcac25 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 31 Aug 2023 08:56:11 +0530 Subject: arm64: versal: Enable sha1sum command Enable it for TPM usage. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230831032612.2729-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 918068b3120..5d5a23b1a3d 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_SHA1SUM=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y -- cgit v1.3.1 From c5d15db173ccbaa72b0b75d4a5afb784a99d4504 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 31 Aug 2023 08:56:12 +0530 Subject: arm64: versal: Enable the config CMD_KASLRSEED Kernel Address Space Layout Randomization (KASLR) is a hardening feature that aims to make it more difficult to take advantage of known exploits in the kernel, by placing kernel data structures at a random address at each boot.The bootloader supports randomizing the virtual address at which the kernel image is loaded. The bootloader must provide entropy by passing a random u64 value in the /chosen/kaslr-seed device tree node. When we run "kaslrseed" command from U-Boot, the bootloader will genarate the kaslr-seed and update the /chosen/kaslr-seed DT property. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230831032612.2729-4-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 5d5a23b1a3d..89566c7d52c 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -51,6 +51,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_TPM=y -- cgit v1.3.1 From 18a02b881c13c4cf49c800085d66e58e35691a48 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 31 Aug 2023 08:46:56 +0530 Subject: arm64: versal-net: Enable TPM for xilinx platforms TPMs are becoming popular that's why enable drivers and command for it. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230831031658.2203-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_versal_net_virt_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 54ba0b7c4f2..7f1cf718174 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -51,6 +51,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y +CONFIG_CMD_TPM=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y @@ -109,7 +110,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y -CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -121,6 +121,7 @@ CONFIG_CADENCE_QSPI=y CONFIG_CADENCE_OSPI_VERSAL=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_TPM2_TIS_SPI=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y @@ -138,3 +139,4 @@ CONFIG_USB_FUNCTION_THOR=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y +CONFIG_TPM=y -- cgit v1.3.1 From 8ae1fab6b14181f54a92ecf41caceaf5d8c31bdf Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 31 Aug 2023 08:46:57 +0530 Subject: arm64: versal-net: Enable sha1sum command Enable it for TPM usage. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230831031658.2203-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_versal_net_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 7f1cf718174..9208e289c7a 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_SHA1SUM=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y -- cgit v1.3.1 From e5e6b1ed6c11842fe51b59e9bd9f1cf55401ae4b Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 31 Aug 2023 08:46:58 +0530 Subject: arm64: versal-net: Enable the config CMD_KASLRSEED Kernel Address Space Layout Randomization (KASLR) is a hardening feature that aims to make it more difficult to take advantage of known exploits in the kernel, by placing kernel data structures at a random address at each boot.The bootloader supports randomizing the virtual address at which the kernel image is loaded. The bootloader must provide entropy by passing a random u64 value in the /chosen/kaslr-seed device tree node. When we run "kaslrseed" command from U-Boot, the bootloader will genarate the kaslr-seed and update the /chosen/kaslr-seed DT property. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230831031658.2203-4-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_versal_net_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 9208e289c7a..62322af458d 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -50,6 +50,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_TPM=y -- cgit v1.3.1 From 99b46477e3495f819f6826d11470d46f12a4f9f7 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Wed, 30 Aug 2023 10:31:42 +0200 Subject: clk: Dont return error when assigned-clocks is empty or missing There is a chance that assigned-clock-rates is given and assigned-clocks could be empty. Dont return error in that case, because the probe of the corresponding driver will not be called at all if this fails. Better to continue to look for it and return 0. Signed-off-by: Ashok Reddy Soma Reviewed-by: Tom Rini Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/a9a9d853e0ac396cd9b3577cce26279a75765711.1693384296.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 16 ++++++++++++++++ drivers/clk/clk-uclass.c | 8 +++++++- test/dm/clk.c | 9 +++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index d4693e3c7a9..e6a471e40d9 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -614,6 +614,22 @@ clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; }; + clk-test2 { + compatible = "sandbox,clk-test"; + assigned-clock-rates = <321>; + }; + + clk-test3 { + compatible = "sandbox,clk-test"; + assigned-clocks = <&clk_sandbox 1>; + }; + + clk-test4 { + compatible = "sandbox,clk-test"; + assigned-clock-rates = <654>, <321>; + assigned-clocks = <&clk_sandbox 1>; + }; + ccf: clk-ccf { compatible = "sandbox,clk-ccf"; }; diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index dc3e9d6a261..f186fcbcdb8 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -329,7 +329,13 @@ static int clk_set_default_rates(struct udevice *dev, dev_dbg(dev, "could not get assigned clock %d (err = %d)\n", index, ret); - continue; + /* Skip if it is empty */ + if (ret == -ENOENT) { + ret = 0; + continue; + } + + return ret; } /* This is clk provider device trying to program itself diff --git a/test/dm/clk.c b/test/dm/clk.c index f48de05436b..01417fbd825 100644 --- a/test/dm/clk.c +++ b/test/dm/clk.c @@ -36,6 +36,15 @@ static int dm_test_clk_base(struct unit_test_state *uts) ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true); ut_asserteq(clk_method1.id, clk_method2.id); + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + return 0; } -- cgit v1.3.1 From db5e349d3ddfc75953b2364e94b111ea1795f3c8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 31 Aug 2023 08:59:05 +0200 Subject: dm: core: ofnode: Add ofnode_read_bootscript_address() ofnode_read_bootscript_address() reads bootscript address from /options/u-boot DT node. bootscr-address or bootscr-ram-offset properties are read and values are filled. bootscr-address has higher priority than bootscr-ram-offset and the only one should be described in DT. Also add test to cover this new function. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/23be3838502efef61803c90ef6e8b32bbd6ede41.1693465140.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 7 +++++++ drivers/core/ofnode.c | 25 +++++++++++++++++++++++++ include/dm/ofnode.h | 26 ++++++++++++++++++++++++++ test/dm/ofnode.c | 14 ++++++++++++++ 4 files changed, 72 insertions(+) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index e6a471e40d9..d93c010bc5b 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -81,6 +81,13 @@ }; }; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-ram-offset = /bits/ 64 <0x12345678>; + }; + }; + bootstd { bootph-verify; compatible = "u-boot,boot-std"; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 8311282abf6..5076054acd6 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1593,6 +1593,31 @@ const char *ofnode_conf_read_str(const char *prop_name) return ofnode_read_string(node, prop_name); } +int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + int ret; + ofnode uboot; + + *bootscr_address = 0; + *bootscr_offset = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-address", bootscr_address); + if (ret) { + ret = ofnode_read_u64(uboot, "bootscr-ram-offset", + bootscr_offset); + if (ret) + return -EINVAL; + } + + return 0; +} + ofnode ofnode_get_phy_node(ofnode node) { /* DT node properties that reference a PHY node */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0a85db31f36..c38596acbd0 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -20,6 +20,7 @@ struct resource; #include +#include struct ofnode_phandle_args { ofnode node; @@ -1512,6 +1513,26 @@ int ofnode_conf_read_int(const char *prop_name, int default_val); */ const char *ofnode_conf_read_str(const char *prop_name); +/** + * ofnode_read_bootscript_address() - Read bootscr-address or bootscr-ram-offset + * + * @bootscr_address: pointer to 64bit address where bootscr-address property value + * is stored + * @bootscr_offset: pointer to 64bit offset address where bootscr-ram-offset + * property value is stored + * + * This reads a bootscr-address or bootscr-ram-offset property from + * the /options/u-boot/ node of the devicetree. bootscr-address holds the full + * address of the boot script file. bootscr-ram-offset holds the boot script + * file offset from the start of the ram base address. When bootscr-address is + * defined, bootscr-ram-offset property is ignored. + * + * This only works with the control FDT. + * + * Return: 0 if OK, -EINVAL if property is not found. + */ +int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset); + #else /* CONFIG_DM */ static inline bool ofnode_conf_read_bool(const char *prop_name) { @@ -1528,6 +1549,11 @@ static inline const char *ofnode_conf_read_str(const char *prop_name) return NULL; } +static inline int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + return -EINVAL; +} + #endif /* CONFIG_DM */ /** diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index b74f5c2ebcf..621a4b4fa3c 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -583,6 +583,20 @@ static int dm_test_ofnode_conf(struct unit_test_state *uts) } DM_TEST(dm_test_ofnode_conf, 0); +static int dm_test_ofnode_options(struct unit_test_state *uts) +{ + u64 bootscr_address; + u64 bootscr_offset; + + ut_assertok(ofnode_read_bootscript_address(&bootscr_address, + &bootscr_offset)); + ut_asserteq_64(0, bootscr_address); + ut_asserteq_64(0x12345678, bootscr_offset); + + return 0; +} +DM_TEST(dm_test_ofnode_options, 0); + static int dm_test_ofnode_for_each_compatible_node(struct unit_test_state *uts) { const char compatible[] = "denx,u-boot-fdt-test"; -- cgit v1.3.1 From 5528f79778473b19917fbaea41e8f6ad0f943ca5 Mon Sep 17 00:00:00 2001 From: Algapally Santosh Sagar Date: Thu, 31 Aug 2023 08:59:06 +0200 Subject: xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com --- board/xilinx/common/board.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 2caeb32470f..720dcd040f0 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -414,9 +414,25 @@ int board_late_init_xilinx(void) if (!IS_ENABLED(CONFIG_MICROBLAZE)) { ulong scriptaddr; - - scriptaddr = env_get_hex("scriptaddr", 0); - ret |= env_set_hex("scriptaddr", gd->ram_base + scriptaddr); + u64 bootscr_address; + u64 bootscr_offset; + + /* Fetch bootscr_address/bootscr_offset from DT and update */ + if (!ofnode_read_bootscript_address(&bootscr_address, + &bootscr_offset)) { + if (bootscr_offset) + ret |= env_set_hex("scriptaddr", + gd->ram_base + + bootscr_offset); + else + ret |= env_set_hex("scriptaddr", + bootscr_address); + } else { + /* Update scriptaddr(bootscr offset) from env */ + scriptaddr = env_get_hex("scriptaddr", 0); + ret |= env_set_hex("scriptaddr", + gd->ram_base + scriptaddr); + } } if (IS_ENABLED(CONFIG_ARCH_ZYNQ) || IS_ENABLED(CONFIG_MICROBLAZE)) -- cgit v1.3.1 From 771635f6b0f5bc71d85beb7d994b1c66bf36f6ff Mon Sep 17 00:00:00 2001 From: Neal Frager Date: Thu, 31 Aug 2023 16:27:53 +0200 Subject: arm64: zynqmp: Add output-enable pins to SOMs Now that the zynqmp pinctrl driver supports the tri-state registers, make sure that the pins requiring output-enable are configured appropriately for SOMs. Without it, all tristate setting for MIOs, which are not related to SOM itself, are using default configuration which is not correct setting. It means SDs, USBs, ethernet, etc. are not working properly. In past it was fixed through calling tristate configuration via bootcmd: usb_init=mw 0xFF180208 2020 kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \ gpio toggle gpio@ff0a000038 Signed-off-by: Neal Frager Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/7ecd98b2a302c5c6628e0234482f23c38e721fd6.1693492064.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 6 ++++++ arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 6 ++++++ arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 +++++ arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 +++++ 4 files changed, 22 insertions(+) diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index d318773bd9d..30a0230d476 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -250,6 +250,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -301,6 +302,7 @@ conf-bootstrap { pins = "MIO45", "MIO47", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -308,6 +310,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -316,6 +319,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; mux-mdio { @@ -346,6 +350,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; @@ -373,6 +378,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index 69dba0761b3..8f4c52d6d64 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -250,6 +250,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -301,6 +302,7 @@ conf-bootstrap { pins = "MIO45", "MIO47", "MIO49"; bias-disable; + output-enable; low-power-disable; }; @@ -308,6 +310,7 @@ pins = "MIO38", "MIO39", "MIO40", "MIO41", "MIO42", "MIO43"; bias-disable; + output-enable; low-power-enable; }; @@ -316,6 +319,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; mux-mdio { @@ -346,6 +350,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; @@ -373,6 +378,7 @@ pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index a81b3f6f51a..55bef1df75d 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -205,6 +205,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -256,6 +257,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -263,6 +265,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -271,6 +274,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; mux-mdio { @@ -301,6 +305,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index f935f25c887..1b1d9e772f5 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -193,6 +193,7 @@ conf-tx { pins = "MIO36"; bias-disable; + output-enable; }; mux { @@ -244,6 +245,7 @@ conf-bootstrap { pins = "MIO71", "MIO73", "MIO75"; bias-disable; + output-enable; low-power-disable; }; @@ -251,6 +253,7 @@ pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69"; bias-disable; + output-enable; low-power-enable; }; @@ -259,6 +262,7 @@ slew-rate = ; power-source = ; bias-disable; + output-enable; }; mux-mdio { @@ -289,6 +293,7 @@ pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + output-enable; drive-strength = <4>; slew-rate = ; }; -- cgit v1.3.1 From 44f35e1aca706e7625aa2989911b4bc938681158 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 31 Aug 2023 09:04:27 +0200 Subject: dm: core: ofnode: Add ofnode_read_bootscript_flash() ofnode_read_bootscript_flash() reads bootscript address from /options/u-boot DT node. bootscr-flash-offset and bootscr-flash-size properties are read and values are filled. When bootscr-flash-size is not defined, bootscr-flash-offset property is unusable that's why cleaned. Both of these properties should be defined to function properly. Also add test to cover this new function. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/08a3e6c09cce13287c69ad370e409e7f1766b406.1693465465.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 2 ++ drivers/core/ofnode.c | 34 ++++++++++++++++++++++++++++++++++ include/dm/ofnode.h | 27 +++++++++++++++++++++++++++ test/dm/ofnode.c | 9 +++++++-- 4 files changed, 70 insertions(+), 2 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index d93c010bc5b..9a863ea732f 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -85,6 +85,8 @@ u-boot { compatible = "u-boot,config"; bootscr-ram-offset = /bits/ 64 <0x12345678>; + bootscr-flash-offset = /bits/ 64 <0>; + bootscr-flash-size = /bits/ 64 <0x2000>; }; }; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 5076054acd6..fb4447c84b7 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1618,6 +1618,40 @@ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) return 0; } +int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size) +{ + int ret; + ofnode uboot; + + *bootscr_flash_offset = 0; + *bootscr_flash_size = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-flash-offset", + bootscr_flash_offset); + if (ret) + return -EINVAL; + + ret = ofnode_read_u64(uboot, "bootscr-flash-size", + bootscr_flash_size); + if (ret) + return -EINVAL; + + if (!bootscr_flash_size) { + debug("bootscr-flash-size is zero. Ignoring properties!\n"); + *bootscr_flash_offset = 0; + return -EINVAL; + } + + return 0; +} + ofnode ofnode_get_phy_node(ofnode node) { /* DT node properties that reference a PHY node */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index c38596acbd0..06ea68e81c5 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -1533,6 +1533,27 @@ const char *ofnode_conf_read_str(const char *prop_name); */ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset); +/** + * ofnode_read_bootscript_flash() - Read bootscr-flash-offset/size + * + * @bootscr_flash_offset: pointer to 64bit offset where bootscr-flash-offset + * property value is stored + * @bootscr_flash_size: pointer to 64bit size where bootscr-flash-size property + * value is stored + * + * This reads a bootscr-flash-offset and bootscr-flash-size properties from + * the /options/u-boot/ node of the devicetree. bootscr-flash-offset holds + * the offset of the boot script file from start of flash. bootscr-flash-size + * holds the boot script size in flash. When bootscr-flash-size is not defined, + * bootscr-flash-offset property is cleaned. + * + * This only works with the control FDT. + * + * Return: 0 if OK, -EINVAL if property is not found or incorrect. + */ +int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size); + #else /* CONFIG_DM */ static inline bool ofnode_conf_read_bool(const char *prop_name) { @@ -1554,6 +1575,12 @@ static inline int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *boot return -EINVAL; } +static inline int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size) +{ + return -EINVAL; +} + #endif /* CONFIG_DM */ /** diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 621a4b4fa3c..d71faac0ee4 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -585,14 +585,19 @@ DM_TEST(dm_test_ofnode_conf, 0); static int dm_test_ofnode_options(struct unit_test_state *uts) { - u64 bootscr_address; - u64 bootscr_offset; + u64 bootscr_address, bootscr_offset; + u64 bootscr_flash_offset, bootscr_flash_size; ut_assertok(ofnode_read_bootscript_address(&bootscr_address, &bootscr_offset)); ut_asserteq_64(0, bootscr_address); ut_asserteq_64(0x12345678, bootscr_offset); + ut_assertok(ofnode_read_bootscript_flash(&bootscr_flash_offset, + &bootscr_flash_size)); + ut_asserteq_64(0, bootscr_flash_offset); + ut_asserteq_64(0x2000, bootscr_flash_size); + return 0; } DM_TEST(dm_test_ofnode_options, 0); -- cgit v1.3.1 From 0bbc962efda40d6b9b479c6be7fb4c7fb6129707 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 31 Aug 2023 09:04:28 +0200 Subject: xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com --- board/xilinx/common/board.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 720dcd040f0..9309b071269 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -411,6 +411,7 @@ int board_late_init_xilinx(void) int i, id, macid = 0; struct xilinx_board_description *desc; phys_size_t bootm_size = gd->ram_top - gd->ram_base; + u64 bootscr_flash_offset, bootscr_flash_size; if (!IS_ENABLED(CONFIG_MICROBLAZE)) { ulong scriptaddr; @@ -435,11 +436,19 @@ int board_late_init_xilinx(void) } } + if (!ofnode_read_bootscript_flash(&bootscr_flash_offset, + &bootscr_flash_size)) { + ret |= env_set_hex("script_offset_f", bootscr_flash_offset); + ret |= env_set_hex("script_size_f", bootscr_flash_size); + } else { + debug("!!! Please define bootscr-flash-offset via DT !!!\n"); + ret |= env_set_hex("script_offset_f", + CONFIG_BOOT_SCRIPT_OFFSET); + } + if (IS_ENABLED(CONFIG_ARCH_ZYNQ) || IS_ENABLED(CONFIG_MICROBLAZE)) bootm_size = min(bootm_size, (phys_size_t)(SZ_512M + SZ_256M)); - ret |= env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); - ret |= env_set_addr("bootm_low", (void *)gd->ram_base); ret |= env_set_addr("bootm_size", (void *)bootm_size); -- cgit v1.3.1 From c55eb1d542363951347f73c8f03ebcfc63833e11 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 4 Sep 2023 08:50:33 +0530 Subject: xilinx: versal-net: Do not setup boot_targets if driver is not enabled SOC can boot in the device which is not accessible from APU and running this is detected as error which ends up in stopping boot process. Boot mode detection and logic around is present to setup priority on boot devices that SOC boot device is likely also used for booting OS. Change logic to detect this case with showing message about it but don't fail in boot process and don't prioritize boot device in this case. Signed-off-by: Venkatesh Yadav Abbarapu Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20230904032035.11926-2-venkatesh.abbarapu@amd.com --- board/xilinx/versal-net/board.c | 76 ++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index f0d2224b332..7ad299f3a23 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -201,7 +201,7 @@ int board_late_init(void) int bootseq = -1; int bootseq_len = 0; int env_targets_len = 0; - const char *mode; + const char *mode = NULL; char *new_targets; char *env_targets; @@ -229,8 +229,8 @@ int board_late_init(void) puts("QSPI_MODE_24\n"); if (uclass_get_device_by_name(UCLASS_SPI, "spi@f1030000", &dev)) { - puts("Boot from QSPI but without QSPI enabled!\n"); - return -1; + debug("QSPI driver for QSPI device is not present\n"); + break; } mode = "xspi"; bootseq = dev_seq(dev); @@ -239,8 +239,8 @@ int board_late_init(void) puts("QSPI_MODE_32\n"); if (uclass_get_device_by_name(UCLASS_SPI, "spi@f1030000", &dev)) { - puts("Boot from QSPI but without QSPI enabled!\n"); - return -1; + debug("QSPI driver for QSPI device is not present\n"); + break; } mode = "xspi"; bootseq = dev_seq(dev); @@ -249,8 +249,8 @@ int board_late_init(void) puts("OSPI_MODE\n"); if (uclass_get_device_by_name(UCLASS_SPI, "spi@f1010000", &dev)) { - puts("Boot from OSPI but without OSPI enabled!\n"); - return -1; + debug("OSPI driver for OSPI device is not present\n"); + break; } mode = "xspi"; bootseq = dev_seq(dev); @@ -264,8 +264,8 @@ int board_late_init(void) puts("SD_MODE\n"); if (uclass_get_device_by_name(UCLASS_MMC, "mmc@f1040000", &dev)) { - puts("Boot from SD0 but without SD0 enabled!\n"); - return -1; + debug("SD0 driver for SD0 device is not present\n"); + break; } debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -279,8 +279,8 @@ int board_late_init(void) puts("SD_MODE1\n"); if (uclass_get_device_by_name(UCLASS_MMC, "mmc@f1050000", &dev)) { - puts("Boot from SD1 but without SD1 enabled!\n"); - return -1; + debug("SD1 driver for SD1 device is not present\n"); + break; } debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -288,38 +288,38 @@ int board_late_init(void) bootseq = dev_seq(dev); break; default: - mode = ""; printf("Invalid Boot Mode:0x%x\n", bootmode); break; } - if (bootseq >= 0) { - bootseq_len = snprintf(NULL, 0, "%i", bootseq); - debug("Bootseq len: %x\n", bootseq_len); - } - - /* - * One terminating char + one byte for space between mode - * and default boot_targets - */ - env_targets = env_get("boot_targets"); - if (env_targets) - env_targets_len = strlen(env_targets); - - new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + - bootseq_len); - if (!new_targets) - return -ENOMEM; - - if (bootseq >= 0) - sprintf(new_targets, "%s%x %s", mode, bootseq, - env_targets ? env_targets : ""); - else - sprintf(new_targets, "%s %s", mode, - env_targets ? env_targets : ""); - - env_set("boot_targets", new_targets); + if (mode) { + if (bootseq >= 0) { + bootseq_len = snprintf(NULL, 0, "%i", bootseq); + debug("Bootseq len: %x\n", bootseq_len); + } + /* + * One terminating char + one byte for space between mode + * and default boot_targets + */ + env_targets = env_get("boot_targets"); + if (env_targets) + env_targets_len = strlen(env_targets); + + new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + + bootseq_len); + if (!new_targets) + return -ENOMEM; + + if (bootseq >= 0) + sprintf(new_targets, "%s%x %s", mode, bootseq, + env_targets ? env_targets : ""); + else + sprintf(new_targets, "%s %s", mode, + env_targets ? env_targets : ""); + + env_set("boot_targets", new_targets); + } return board_late_init_xilinx(); } -- cgit v1.3.1 From b687f5d22124ab98693bb44ae4f772934031bba2 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 4 Sep 2023 08:50:34 +0530 Subject: xilinx: versal: Do not setup boot_targets if driver is not enabled SOC can boot in the device which is not accessible from APU and running this is detected as error which ends up in stopping boot process. Boot mode detection and logic around is present to setup priority on boot devices that SOC boot device is likely also used for booting OS. Change logic to detect this case with showing message about it but don't fail in boot process and don't prioritize boot device in this case. Signed-off-by: Venkatesh Yadav Abbarapu Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20230904032035.11926-3-venkatesh.abbarapu@amd.com --- board/xilinx/versal/board.c | 67 +++++++++++++++++++++++---------------------- 1 file changed, 34 insertions(+), 33 deletions(-) diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 60bf37d3c90..982a8b3779f 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -133,7 +133,7 @@ int board_late_init(void) int bootseq = -1; int bootseq_len = 0; int env_targets_len = 0; - const char *mode; + const char *mode = NULL; char *new_targets; char *env_targets; @@ -175,8 +175,8 @@ int board_late_init(void) "mmc@f1050000", &dev) && uclass_get_device_by_name(UCLASS_MMC, "sdhci@f1050000", &dev)) { - puts("Boot from EMMC but without SD1 enabled!\n"); - return -1; + debug("SD1 driver for SD1 device is not present\n"); + break; } debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); mode = "mmc"; @@ -188,8 +188,8 @@ int board_late_init(void) "mmc@f1040000", &dev) && uclass_get_device_by_name(UCLASS_MMC, "sdhci@f1040000", &dev)) { - puts("Boot from SD0 but without SD0 enabled!\n"); - return -1; + debug("SD0 driver for SD0 device is not present\n"); + break; } debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -205,8 +205,8 @@ int board_late_init(void) "mmc@f1050000", &dev) && uclass_get_device_by_name(UCLASS_MMC, "sdhci@f1050000", &dev)) { - puts("Boot from SD1 but without SD1 enabled!\n"); - return -1; + debug("SD1 driver for SD1 device is not present\n"); + break; } debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -214,37 +214,38 @@ int board_late_init(void) bootseq = dev_seq(dev); break; default: - mode = ""; printf("Invalid Boot Mode:0x%x\n", bootmode); break; } - if (bootseq >= 0) { - bootseq_len = snprintf(NULL, 0, "%i", bootseq); - debug("Bootseq len: %x\n", bootseq_len); - } + if (mode) { + if (bootseq >= 0) { + bootseq_len = snprintf(NULL, 0, "%i", bootseq); + debug("Bootseq len: %x\n", bootseq_len); + } - /* - * One terminating char + one byte for space between mode - * and default boot_targets - */ - env_targets = env_get("boot_targets"); - if (env_targets) - env_targets_len = strlen(env_targets); - - new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + - bootseq_len); - if (!new_targets) - return -ENOMEM; - - if (bootseq >= 0) - sprintf(new_targets, "%s%x %s", mode, bootseq, - env_targets ? env_targets : ""); - else - sprintf(new_targets, "%s %s", mode, - env_targets ? env_targets : ""); - - env_set("boot_targets", new_targets); + /* + * One terminating char + one byte for space between mode + * and default boot_targets + */ + env_targets = env_get("boot_targets"); + if (env_targets) + env_targets_len = strlen(env_targets); + + new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + + bootseq_len); + if (!new_targets) + return -ENOMEM; + + if (bootseq >= 0) + sprintf(new_targets, "%s%x %s", mode, bootseq, + env_targets ? env_targets : ""); + else + sprintf(new_targets, "%s %s", mode, + env_targets ? env_targets : ""); + + env_set("boot_targets", new_targets); + } return board_late_init_xilinx(); } -- cgit v1.3.1 From d75c65a5259e60b9534b48ddabfc1cbb9c098aac Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 4 Sep 2023 08:50:35 +0530 Subject: xilinx: zynqmp: Do not setup boot_targets if driver is not enabled SOC can boot in the device which is not accessible from APU and running this is detected as error which ends up in stopping boot process. Boot mode detection and logic around is present to setup priority on boot devices that SOC boot device is likely also used for booting OS. Change logic to detect this case with showing message about it but don't fail in boot process and don't prioritize boot device in this case. Signed-off-by: Venkatesh Yadav Abbarapu Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20230904032035.11926-4-venkatesh.abbarapu@amd.com --- board/xilinx/zynqmp/zynqmp.c | 71 ++++++++++++++++++++++---------------------- 1 file changed, 36 insertions(+), 35 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 309f24a5f43..0b6d4e57078 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -391,7 +391,7 @@ int board_late_init(void) int bootseq = -1; int bootseq_len = 0; int env_targets_len = 0; - const char *mode; + const char *mode = NULL; char *new_targets; char *env_targets; int ret, multiboot; @@ -442,8 +442,8 @@ int board_late_init(void) "mmc@ff160000", &dev) && uclass_get_device_by_name(UCLASS_MMC, "sdhci@ff160000", &dev)) { - puts("Boot from EMMC but without SD0 enabled!\n"); - return -1; + debug("SD0 driver for SD0 device is not present\n"); + break; } debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -457,8 +457,8 @@ int board_late_init(void) "mmc@ff160000", &dev) && uclass_get_device_by_name(UCLASS_MMC, "sdhci@ff160000", &dev)) { - puts("Boot from SD0 but without SD0 enabled!\n"); - return -1; + debug("SD0 driver for SD0 device is not present\n"); + break; } debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -475,8 +475,8 @@ int board_late_init(void) "mmc@ff170000", &dev) && uclass_get_device_by_name(UCLASS_MMC, "sdhci@ff170000", &dev)) { - puts("Boot from SD1 but without SD1 enabled!\n"); - return -1; + debug("SD1 driver for SD1 device is not present\n"); + break; } debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); @@ -490,39 +490,40 @@ int board_late_init(void) env_set("modeboot", "nandboot"); break; default: - mode = ""; printf("Invalid Boot Mode:0x%x\n", bootmode); break; } - if (bootseq >= 0) { - bootseq_len = snprintf(NULL, 0, "%i", bootseq); - debug("Bootseq len: %x\n", bootseq_len); - env_set_hex("bootseq", bootseq); - } + if (mode) { + if (bootseq >= 0) { + bootseq_len = snprintf(NULL, 0, "%i", bootseq); + debug("Bootseq len: %x\n", bootseq_len); + env_set_hex("bootseq", bootseq); + } - /* - * One terminating char + one byte for space between mode - * and default boot_targets - */ - env_targets = env_get("boot_targets"); - if (env_targets) - env_targets_len = strlen(env_targets); - - new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + - bootseq_len); - if (!new_targets) - return -ENOMEM; - - if (bootseq >= 0) - sprintf(new_targets, "%s%x %s", mode, bootseq, - env_targets ? env_targets : ""); - else - sprintf(new_targets, "%s %s", mode, - env_targets ? env_targets : ""); - - env_set("boot_targets", new_targets); - free(new_targets); + /* + * One terminating char + one byte for space between mode + * and default boot_targets + */ + env_targets = env_get("boot_targets"); + if (env_targets) + env_targets_len = strlen(env_targets); + + new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + + bootseq_len); + if (!new_targets) + return -ENOMEM; + + if (bootseq >= 0) + sprintf(new_targets, "%s%x %s", mode, bootseq, + env_targets ? env_targets : ""); + else + sprintf(new_targets, "%s %s", mode, + env_targets ? env_targets : ""); + + env_set("boot_targets", new_targets); + free(new_targets); + } reset_reason(); -- cgit v1.3.1 From 9080abfc0b6d3ce7ce6e637ec974a3d4b6fba5af Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 5 Sep 2023 10:23:36 +0200 Subject: arm64: versal: Do not define boot command for mini configurations Mini configuration is not design to boot anything that's why there is no reason to setup boot command. CONFIG_DISTRO_DEFAULTS is disabled anyway. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/41ac52d946ac53d162c407094dc215e6a932af92.1693902205.git.michal.simek@amd.com --- configs/xilinx_versal_mini_defconfig | 2 -- configs/xilinx_versal_mini_emmc0_defconfig | 2 -- configs/xilinx_versal_mini_emmc1_defconfig | 2 -- 3 files changed, 6 deletions(-) diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 53376db9df3..78be2002fb8 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -21,8 +21,6 @@ CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 31b3c02f738..129ddce3ef0 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -17,8 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 5480cf1d9cc..116ec450bda 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -17,8 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y -- cgit v1.3.1 From 6ec17a2c0f8bca6c92ed4c57b6180f2f80bdfa45 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 5 Sep 2023 13:30:07 +0200 Subject: arm64: xilinx: Guard distro boot variable generation When distro boot is disabled there is no reason to generate variables for it. Also do not update boot_targets variable because it would be unused. It is useful for example when standard boot is enabled and distro boot is disabled. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/570c51435da59831ec245cddceda078afa58a550.1693913398.git.michal.simek@amd.com --- board/xilinx/versal-net/board.c | 32 +++++++++++++++------ board/xilinx/versal/board.c | 31 ++++++++++++++------ board/xilinx/zynqmp/zynqmp.c | 56 ++++++++++++++++++++++--------------- include/configs/xilinx_versal.h | 6 ++++ include/configs/xilinx_versal_net.h | 6 ++++ include/configs/xilinx_zynqmp.h | 6 ++++ 6 files changed, 97 insertions(+), 40 deletions(-) diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index 7ad299f3a23..c18be0c26c9 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -194,7 +194,7 @@ static u8 versal_net_get_bootmode(void) return bootmode; } -int board_late_init(void) +static int boot_targets_setup(void) { u8 bootmode; struct udevice *dev; @@ -205,14 +205,6 @@ int board_late_init(void) char *new_targets; char *env_targets; - if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { - debug("Saved variables - Skipping\n"); - return 0; - } - - if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) - return 0; - bootmode = versal_net_get_bootmode(); puts("Bootmode: "); @@ -320,6 +312,28 @@ int board_late_init(void) env_set("boot_targets", new_targets); } + + return 0; +} + +int board_late_init(void) +{ + int ret; + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { + debug("Saved variables - Skipping\n"); + return 0; + } + + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) + return 0; + + if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) { + ret = boot_targets_setup(); + if (ret) + return ret; + } + return board_late_init_xilinx(); } diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 982a8b3779f..e4bdd5d7a38 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -126,7 +126,7 @@ static u8 versal_get_bootmode(void) return bootmode; } -int board_late_init(void) +static int boot_targets_setup(void) { u8 bootmode; struct udevice *dev; @@ -137,14 +137,6 @@ int board_late_init(void) char *new_targets; char *env_targets; - if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { - debug("Saved variables - Skipping\n"); - return 0; - } - - if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) - return 0; - bootmode = versal_get_bootmode(); puts("Bootmode: "); @@ -247,6 +239,27 @@ int board_late_init(void) env_set("boot_targets", new_targets); } + return 0; +} + +int board_late_init(void) +{ + int ret; + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { + debug("Saved variables - Skipping\n"); + return 0; + } + + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) + return 0; + + if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) { + ret = boot_targets_setup(); + if (ret) + return ret; + } + return board_late_init_xilinx(); } diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 0b6d4e57078..f1628030848 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -384,7 +384,7 @@ static int set_fdtfile(void) return 0; } -int board_late_init(void) +static int boot_targets_setup(void) { u8 bootmode; struct udevice *dev; @@ -394,27 +394,6 @@ int board_late_init(void) const char *mode = NULL; char *new_targets; char *env_targets; - int ret, multiboot; - -#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD) - usb_ether_init(); -#endif - - if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { - debug("Saved variables - Skipping\n"); - return 0; - } - - if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) - return 0; - - ret = set_fdtfile(); - if (ret) - return ret; - - multiboot = multi_boot(); - if (multiboot >= 0) - env_set_hex("multiboot", multiboot); bootmode = zynqmp_get_bootmode(); @@ -525,6 +504,39 @@ int board_late_init(void) free(new_targets); } + return 0; +} + +int board_late_init(void) +{ + int ret, multiboot; + +#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD) + usb_ether_init(); +#endif + + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { + debug("Saved variables - Skipping\n"); + return 0; + } + + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) + return 0; + + ret = set_fdtfile(); + if (ret) + return ret; + + multiboot = multi_boot(); + if (multiboot >= 0) + env_set_hex("multiboot", multiboot); + + if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) { + ret = boot_targets_setup(); + if (ret) + return ret; + } + reset_reason(); return board_late_init_xilinx(); diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 98792aba7cc..b634bb1ab70 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -43,6 +43,8 @@ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" +#if defined(CONFIG_DISTRO_DEFAULTS) + #if defined(CONFIG_MMC_SDHCI_ZYNQ) # define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) #else @@ -124,6 +126,10 @@ #include +#else /* CONFIG_DISTRO_DEFAULTS */ +# define BOOTENV +#endif /* CONFIG_DISTRO_DEFAULTS */ + /* Initial environment variables */ #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index e17b4409354..2b441da91a1 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -57,6 +57,8 @@ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" +#if defined(CONFIG_DISTRO_DEFAULTS) + #if defined(CONFIG_MMC_SDHCI_ZYNQ) # define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) #else @@ -125,6 +127,10 @@ #include +#else /* CONFIG_DISTRO_DEFAULTS */ +# define BOOTENV +#endif /* CONFIG_DISTRO_DEFAULTS */ + /* Initial environment variables */ #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 51f0a425340..c57ab14d1b9 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -63,6 +63,8 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" \ +#if defined(CONFIG_DISTRO_DEFAULTS) + #if defined(CONFIG_MMC_SDHCI_ZYNQ) # define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) #else @@ -174,6 +176,10 @@ #include +#else /* CONFIG_DISTRO_DEFAULTS */ +# define BOOTENV +#endif /* CONFIG_DISTRO_DEFAULTS */ + /* Initial environment variables */ #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From a77c2bd90254df10d196e105593d1ed46bb5bceb Mon Sep 17 00:00:00 2001 From: Maxim Kochetkov Date: Fri, 11 Aug 2023 10:43:51 +0300 Subject: net: axi_emac: Convert to ofnode functions FDT functions is not working when OF_LIVE is enabled. Convert fdt parsing functions to ofnode parsing functions. Signed-off-by: Maxim Kochetkov Link: https://lore.kernel.org/r/20230811074351.26916-1-fido_max@inbox.ru --- drivers/net/xilinx_axi_emac.c | 50 +++++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 26 deletions(-) diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 39cb3cc260b..54f22327684 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -112,7 +112,7 @@ struct axidma_plat { int pcsaddr; int phyaddr; u8 eth_hasnobuf; - int phy_of_handle; + ofnode phynode; enum emac_variant mactype; }; @@ -127,7 +127,7 @@ struct axidma_priv { struct phy_device *phydev; struct mii_dev *bus; u8 eth_hasnobuf; - int phy_of_handle; + ofnode phynode; enum emac_variant mactype; }; @@ -335,8 +335,8 @@ static int axiemac_phy_init(struct udevice *dev) phydev->supported &= supported; phydev->advertising = phydev->supported; priv->phydev = phydev; - if (priv->phy_of_handle) - priv->phydev->node = offset_to_ofnode(priv->phy_of_handle); + if (ofnode_valid(priv->phynode)) + priv->phydev->node = priv->phynode; phy_config(phydev); return 0; @@ -839,7 +839,7 @@ static int axi_emac_probe(struct udevice *dev) priv->eth_hasnobuf = plat->eth_hasnobuf; priv->pcsaddr = plat->pcsaddr; priv->phyaddr = plat->phyaddr; - priv->phy_of_handle = plat->phy_of_handle; + priv->phynode = plat->phynode; priv->interface = pdata->phy_interface; if (IS_ENABLED(CONFIG_DM_ETH_PHY)) @@ -894,20 +894,21 @@ static int axi_emac_of_to_plat(struct udevice *dev) { struct axidma_plat *plat = dev_get_plat(dev); struct eth_pdata *pdata = &plat->eth_pdata; - int node = dev_of_offset(dev); - int offset = 0; + struct ofnode_phandle_args pcs_node, axistream_node; + ofnode phynode; + int ret; pdata->iobase = dev_read_addr(dev); plat->mactype = dev_get_driver_data(dev); - offset = fdtdec_lookup_phandle(gd->fdt_blob, node, - "axistream-connected"); - if (offset <= 0) { + ret = dev_read_phandle_with_args(dev, "axistream-connected", NULL, 0, 0, + &axistream_node); + if (ret) { printf("%s: axistream is not found\n", __func__); return -EINVAL; } - plat->dmatx = (struct axidma_reg *)fdtdec_get_addr_size_auto_parent - (gd->fdt_blob, 0, offset, "reg", 0, NULL, false); + + plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node); if (!plat->dmatx) { printf("%s: axi_dma register space not found\n", __func__); return -EINVAL; @@ -918,30 +919,27 @@ static int axi_emac_of_to_plat(struct udevice *dev) /* PHYAD 0 always redirects to the PCS/PMA PHY */ plat->pcsaddr = 0; - offset = fdtdec_lookup_phandle(gd->fdt_blob, node, - "phy-handle"); - if (offset > 0) { + phynode = dev_get_phy_node(dev); + if (ofnode_valid(phynode)) { if (!(IS_ENABLED(CONFIG_DM_ETH_PHY))) - plat->phyaddr = fdtdec_get_int(gd->fdt_blob, - offset, - "reg", -1); - plat->phy_of_handle = offset; + plat->phyaddr = ofnode_read_u32_default(phynode, + "reg", -1); + plat->phynode = phynode; } pdata->phy_interface = dev_read_phy_mode(dev); if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) return -EINVAL; - plat->eth_hasnobuf = fdtdec_get_bool(gd->fdt_blob, node, - "xlnx,eth-hasnobuf"); + plat->eth_hasnobuf = dev_read_bool(dev, "xlnx,eth-hasnobuf"); if (pdata->phy_interface == PHY_INTERFACE_MODE_SGMII || pdata->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { - offset = fdtdec_lookup_phandle(gd->fdt_blob, node, - "pcs-handle"); - if (offset > 0) { - plat->pcsaddr = fdtdec_get_int(gd->fdt_blob, - offset, "reg", -1); + ret = dev_read_phandle_with_args(dev, "pcs-handle", NULL, 0, 0, + &pcs_node); + if (!ret) { + plat->pcsaddr = ofnode_read_u32_default(pcs_node.node, + "reg", -1); } } } -- cgit v1.3.1 From e6ff998cb02aad0326a8280498725a8e7bbbb37b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 8 Sep 2023 09:11:31 +0200 Subject: global: Use proper project name U-Boot (next2) Use proper project name in README, rst and comment. Done in connection to commit bb922ca3eb4b ("global: Use proper project name U-Boot (next)"). Reviewed-by: Simon Glass Reviewed-by: Alexander Graf (ppce500) Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/536af05e7061982f15b668e87f941cdabfa25392.1694157084.git.michal.simek@amd.com --- board/cobra5272/README | 18 +++++++++--------- board/emulation/qemu-ppce500/qemu-ppce500.c | 2 +- doc/board/xilinx/zynq.rst | 2 +- doc/board/xilinx/zynqmp-r5.rst | 4 ++-- doc/imx/mkimage/imximage.txt | 2 +- doc/usage/environment.rst | 2 +- doc/usage/semihosting.rst | 2 +- 7 files changed, 16 insertions(+), 16 deletions(-) diff --git a/board/cobra5272/README b/board/cobra5272/README index 11abcfacdb6..0b07148b73a 100644 --- a/board/cobra5272/README +++ b/board/cobra5272/README @@ -1,6 +1,6 @@ File: README.COBRA5272 Author: Florian Schlote for Sentec elektronik (linux@sentec-elektronik.de) -Contents: This is the README of u-boot (Universal bootloader) for our +Contents: This is the README of U-Boot (Universal bootloader) for our COBRA5272 board. Version: v01.00 Date: Tue Mar 30 00:28:33 CEST 2004 @@ -31,7 +31,7 @@ Please refer to u-boot README (general info, u-boot-x-x-x/README), to u-boot-x-x-x/board/cobra5272/README and to the comments in u-boot-x-x-x/include/configs/cobra5272.h -Configuring u-boot is done by commenting/uncommenting preprocessor defines. +Configuring U-Boot is done by commenting/uncommenting preprocessor defines. Default configuration is @@ -48,10 +48,10 @@ Default configuration is #----------------------------------- -# u-boot FLASH version & RAM version +# U-Boot FLASH version & RAM version #----------------------------------- -The u-boot bootloader for Coldfire processors can be configured +The U-Boot bootloader for Coldfire processors can be configured 1. as a standalone bootloader residing in flash & relocating itself to RAM on startup automatically => "FLASH version" @@ -60,7 +60,7 @@ The u-boot bootloader for Coldfire processors can be configured prestage bootloader ("chainloading") & is running only from the RAM address it is linked to => "RAM version" - This version may be very helpful when installing u-boot for the first time + This version may be very helpful when installing U-Boot for the first time since it can be used to make available s. th. like a "bootstrap mechanism". @@ -71,7 +71,7 @@ How to build the different images: Flash version ------------------------------ -Compile u-boot +Compile U-Boot in dir ./u-boot-x-x-x/ @@ -81,14 +81,14 @@ please first check: CONFIG_MONITOR_IS_IN_RAM has to be not present in the file - => u-boot as single bootloader starting from flash + => U-Boot as single bootloader starting from flash in configs/cobra5272_defconfig CONFIG_TEXT_BASE should be CONFIG_TEXT_BASE=0xffe00000 - => linking address for u-boot as single bootloader stored in flash + => linking address for U-Boot as single bootloader stored in flash then: @@ -116,7 +116,7 @@ please modify the settings: CONFIG_MONITOR_IS_IN_RAM=y - => u-boot as RAM version, chainloaded by another bootloader or using bdm cable + => U-Boot as RAM version, chainloaded by another bootloader or using bdm cable in configs/cobra5272_defconfig CONFIG_TEXT_BASE should be diff --git a/board/emulation/qemu-ppce500/qemu-ppce500.c b/board/emulation/qemu-ppce500/qemu-ppce500.c index 7ca8773b17e..221361691c1 100644 --- a/board/emulation/qemu-ppce500/qemu-ppce500.c +++ b/board/emulation/qemu-ppce500/qemu-ppce500.c @@ -320,7 +320,7 @@ ulong get_bus_freq(ulong dummy) int cpu_numcores(void) { /* - * The QEMU u-boot target only needs to drive the first core, + * The QEMU U-Boot target only needs to drive the first core, * spinning and device tree nodes get driven by QEMU itself */ return 1; diff --git a/doc/board/xilinx/zynq.rst b/doc/board/xilinx/zynq.rst index 438912fe42c..76d67bd62ee 100644 --- a/doc/board/xilinx/zynq.rst +++ b/doc/board/xilinx/zynq.rst @@ -83,7 +83,7 @@ Mainline status --------------- - Added basic board configurations support. -- Added zynq u-boot bsp code - arch/arm/mach-zynq +- Added zynq U-Boot bsp code - arch/arm/mach-zynq - Added zynq boards named - zc70x, zed, microzed, zc770_xm010/xm011/xm012/xm013 - Added zynq drivers: diff --git a/doc/board/xilinx/zynqmp-r5.rst b/doc/board/xilinx/zynqmp-r5.rst index 2cd368b0308..266d07d1193 100644 --- a/doc/board/xilinx/zynqmp-r5.rst +++ b/doc/board/xilinx/zynqmp-r5.rst @@ -26,7 +26,7 @@ configure and build armv7 toolchain:: Notes ^^^^^ -Output fragment is u-boot. +Output fragment is U-Boot. Loading ------- @@ -38,7 +38,7 @@ Bootgen ^^^^^^^ The first way is to use Xilinx FSBL (First stage -bootloader) to load u-boot and start it. The following bif can be used for boot +bootloader) to load U-Boot and start it. The following bif can be used for boot image generation via Xilinx bootgen utility:: diff --git a/doc/imx/mkimage/imximage.txt b/doc/imx/mkimage/imximage.txt index f2cf23c5dab..fa4e486661c 100644 --- a/doc/imx/mkimage/imximage.txt +++ b/doc/imx/mkimage/imximage.txt @@ -213,7 +213,7 @@ Disk identifier: 0xb712a870 Device Boot Start End Blocks Id System /dev/mmcblk0p1 3 16 112455 83 Linux -I have set 100MB, leaving the first 2 sectors free. I will copy u-boot +I have set 100MB, leaving the first 2 sectors free. I will copy U-Boot there. 8. Write the partition table and exit. diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst index c6439dde668..c57b717caaf 100644 --- a/doc/usage/environment.rst +++ b/doc/usage/environment.rst @@ -216,7 +216,7 @@ fdt_high 0xffffffffffffffff (64-bit machines) then the fdt will not be copied at all on boot. For this to work it must reside in writable memory, have - sufficient padding on the end of it for u-boot to + sufficient padding on the end of it for U-Boot to add the information it needs into it, and the memory must be accessible by the kernel. This usage is strongly discouraged however as it also stops U-Boot from ensuring the device tree starting diff --git a/doc/usage/semihosting.rst b/doc/usage/semihosting.rst index 6a280b455e0..9303a6364d5 100644 --- a/doc/usage/semihosting.rst +++ b/doc/usage/semihosting.rst @@ -23,7 +23,7 @@ eMMC or other NV media are available. There are two main ARM virtual Fixed Virtual Platform (FVP) models, `Versatile Express (VE) FVP and BASE FVP `_. -The initial vexpress64 u-boot board created here runs on the VE virtual +The initial vexpress64 U-Boot board created here runs on the VE virtual platform using the license-free Foundation_v8 simulator. Fortunately, the Foundation_v8 simulator also supports the BASE_FVP model which companies can purchase licenses for and contain much more functionality. -- cgit v1.3.1 From 1ae4a07c2bac18663b2cff003b360256bbb758dc Mon Sep 17 00:00:00 2001 From: Lukas Funke Date: Fri, 15 Sep 2023 11:39:01 +0200 Subject: arm64: zynqmp: Corrected pcap_prog register address Currently the pcap_prog struct variable is pointing to 0x3004 which is incorrect according to [1]. The variable should point to 0x3000. [1] https://www.xilinx.com/htmldocs/registers/ug1087/ug1087-zynq-ultrascale-registers.html#csu___pcap_prog.html Signed-off-by: Lukas Funke Link: https://lore.kernel.org/r/20230915093901.1062825-1-lukas.funke-oss@weidmueller.com Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/include/mach/hardware.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index 634bf169c63..8cb6494e52c 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -166,7 +166,7 @@ struct csu_regs { u32 jtag_dap_cfg; u32 idcode; u32 version; - u32 reserved2[3055]; + u32 reserved2[3054]; u32 pcap_prog; }; -- cgit v1.3.1 From e31d707d8b591973560cb656d152a154993b1d74 Mon Sep 17 00:00:00 2001 From: Tejas Bhumkar Date: Fri, 15 Sep 2023 10:20:43 +0530 Subject: net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge Current code expects bridge phy address at 0 which is not correct expectation because bridge phy address is configurable. That's why update the code to read reg property to figure it out where bridge is and use it in phy creation code. Signed-off-by: Tejas Bhumkar Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20230915045043.4167628-1-tejas.arvind.bhumkar@amd.com --- drivers/net/phy/phy.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index d50fd505e51..63b3e46f101 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -807,7 +807,10 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus, ofnode_for_each_subnode(node, dev_ofnode(dev)) { node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0"); if (ofnode_valid(node)) { - phydev = phy_device_create(bus, 0, + int gmiirgmii_phyaddr; + + gmiirgmii_phyaddr = ofnode_read_u32_default(node, "reg", 0); + phydev = phy_device_create(bus, gmiirgmii_phyaddr, PHY_GMII2RGMII_ID, false); if (phydev) phydev->node = node; -- cgit v1.3.1 From a5d2721bb2697306c7534e6c9f7c84c6bdc6a4d1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 11 Sep 2023 15:30:01 +0200 Subject: dm: core: ofnode: Fix error message in ofnode_read_bootscript_address/flash() Missing u-boot node shouldn't be visible in bootlog without debug enabled that's why change message from printf to debug. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ff62e980237ab271cf05facfbc306e85914a8c6e.1694438999.git.michal.simek@amd.com --- drivers/core/ofnode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index fb4447c84b7..ff0a5b5164f 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1603,7 +1603,7 @@ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) uboot = ofnode_path("/options/u-boot"); if (!ofnode_valid(uboot)) { - printf("%s: Missing /u-boot node\n", __func__); + debug("%s: Missing /u-boot node\n", __func__); return -EINVAL; } @@ -1629,7 +1629,7 @@ int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, uboot = ofnode_path("/options/u-boot"); if (!ofnode_valid(uboot)) { - printf("%s: Missing /u-boot node\n", __func__); + debug("%s: Missing /u-boot node\n", __func__); return -EINVAL; } -- cgit v1.3.1 From cfc294c082000199bbea014715c9b2f07a8a9831 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 11 Sep 2023 16:10:46 +0200 Subject: arm64: zynqmp: Rename xlnx, mio_bank to xlnx, mio-bank for DLC21 xlnx,mio_bank was used in past but it was renamed to xlnx,mio-bank because '_' in property shoudln't be used. There is no impact on the platform because if the properly is not defined bank 0 is default. Bank 0 and 1 have the same configuration that's why there shouldn't be any issue. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ace68d4b7701d1606a85cb18242409fce941b363.1694441445.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-dlc21-revA.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts index 1b247bfa894..016081ef7b9 100644 --- a/arch/arm/dts/zynqmp-dlc21-revA.dts +++ b/arch/arm/dts/zynqmp-dlc21-revA.dts @@ -61,14 +61,14 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &sdhci1 { /* sd1 MIO45-51 cd in place */ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &psgtr { -- cgit v1.3.1 From d282c1d9e744dea4c7b3a8de63c1c77c16bf3a7c Mon Sep 17 00:00:00 2001 From: Amit Kumar Mahapatra Date: Mon, 11 Sep 2023 16:10:47 +0200 Subject: arm64: versal: Add no-wp DT property in OSPI flash node Added no-wp DT property in OSPI flash node for all board dts & dtsi files on which the WP# signal of the OSPI flash device is not connected. If this property is set, then the software will avoid setting the status register write disable (SRWD) bit in status register during status register write operation. Signed-off-by: Amit Kumar Mahapatra Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/7e88dd7b9306bdf0738b2248bf9017e1997d25dc.1694441445.git.michal.simek@amd.com --- arch/arm/dts/versal-mini-ospi.dtsi | 1 + arch/arm/dts/versal-net-mini-ospi.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi index 19caea7368a..5683a2306bd 100644 --- a/arch/arm/dts/versal-mini-ospi.dtsi +++ b/arch/arm/dts/versal-mini-ospi.dtsi @@ -57,6 +57,7 @@ spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <20000000>; + no-wp; }; }; }; diff --git a/arch/arm/dts/versal-net-mini-ospi.dtsi b/arch/arm/dts/versal-net-mini-ospi.dtsi index ce8e2158f6e..5d188db62d9 100644 --- a/arch/arm/dts/versal-net-mini-ospi.dtsi +++ b/arch/arm/dts/versal-net-mini-ospi.dtsi @@ -72,6 +72,7 @@ spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <20000000>; + no-wp; }; }; }; -- cgit v1.3.1 From 0ec0c1e957aab80aa9c7e5119e5092d19315baab Mon Sep 17 00:00:00 2001 From: Saeed Nowshadi Date: Mon, 11 Sep 2023 16:10:48 +0200 Subject: arm64: zynqmp: Fix i2c address for si570_user1 clock Correct the i2c address for si570 oscillator that generates the si570_user1 clock. i2c address was changed by commit b6a8c603d680 ("arm64: zynqmp: Fix i2c addresses for vck190 SC") because address in node name wasn't aligned with reg property. But actual 0x5f address is correct which is quite rare because all other si570s are at 0x5d. Signed-off-by: Saeed Nowshadi Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/6f31881b0e2dd657f0d4ff0869c009c2e1224f22.1694441445.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index bf6ffb778b6..bf7569c6dda 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -2,7 +2,8 @@ /* * dts file for Xilinx Versal a2197 RevA System Controller * - * (C) Copyright 2019 - 2021, Xilinx, Inc. + * (C) Copyright 2019 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -460,10 +461,10 @@ #address-cells = <1>; #size-cells = <0>; reg = <6>; - si570_user1: clock-generator@5d { /* u205 */ + si570_user1: clock-generator@5f { /* u205 */ #clock-cells = <0>; compatible = "silabs,si570"; - reg = <0x5d>; + reg = <0x5f>; temperature-stability = <50>; factory-fout = <100000000>; clock-frequency = <100000000>; -- cgit v1.3.1 From 9e568e4110cacc30828bda0fe72dbac1edfbcdf6 Mon Sep 17 00:00:00 2001 From: Srinivas Neeli Date: Mon, 11 Sep 2023 16:10:49 +0200 Subject: arm64: zynqmp: Add resets property for CAN nodes Added resets property for CAN nodes. Signed-off-by: Srinivas Neeli Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/c4efb7ac361eec591a2f775e161ec446c4dc04c1.1694441445.git.michal.simek@amd.com --- arch/arm/dts/zynqmp.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 355f360281b..a71875755bc 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -262,6 +262,7 @@ interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + resets = <&zynqmp_reset ZYNQMP_RESET_CAN0>; power-domains = <&zynqmp_firmware PD_CAN_0>; }; @@ -274,6 +275,7 @@ interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + resets = <&zynqmp_reset ZYNQMP_RESET_CAN1>; power-domains = <&zynqmp_firmware PD_CAN_1>; }; -- cgit v1.3.1 From df2ed08b2df708a9f343aa4f47954c90433e11c2 Mon Sep 17 00:00:00 2001 From: Thippeswamy Havalige Date: Mon, 11 Sep 2023 16:10:50 +0200 Subject: arm64: zynqmp: Update ECAM size to discover up to 256 buses Update ECAM size to discover up to 256 buses Signed-off-by: Thippeswamy Havalige Acked-by: Venkatesh Yadav Abbarapu Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/087391c3e1f60b0a765fca081d47ce632fda8f06.1694441445.git.michal.simek@amd.com --- arch/arm/dts/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index a71875755bc..79c5af24110 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -678,7 +678,7 @@ msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */ <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ -- cgit v1.3.1 From c7cce2606d252a83e72655bb595d7ff4a267615c Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Tue, 12 Sep 2023 09:00:55 +0530 Subject: clk: versal: Fix the function versal_clock_ref For reference clocks, PM_CLK_GET_PARENT call is not allowed. PM_CLK_GET_PARENT only allowed for MUX clocks. Rename the versal_clock_ref() with versal_clock_get_ref_rate() for better readability. Fix the versal_clock_get_ref_rate function by passing the parent_id, and check whether the parent_id belongs to ref_clk or pl_alt_ref_clk. Also adding the function versal_clock_get_fixed_factor_rate() if the clk_id belongs to the fixed factor clock. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230912033055.2549-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- drivers/clk/clk_versal.c | 98 ++++++++++++++++++++++++++++++++---------------- 1 file changed, 65 insertions(+), 33 deletions(-) diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index b3b33331235..2e004beca2f 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -68,6 +68,13 @@ #define CLOCK_NODE_TYPE_DIV 4 #define CLOCK_NODE_TYPE_GATE 6 +#define PM_CLK_REF_CLK (0x830c06aU) +#define PM_CLK_PL_ALT_REF_CLK (0x830c06bU) +#define PM_CLK_MUXED_IRO (0x830c06cU) +#define PM_CLK_EMIO (0x830c071U) + +#define TOPOLOGY_TYPE_FIXEDFACTOR 0x3 + enum clk_type { CLK_TYPE_OUTPUT, CLK_TYPE_EXTERNAL, @@ -365,48 +372,37 @@ static u32 versal_clock_set_div(u32 clk_id, u32 div) return div; } -static u64 versal_clock_ref(u32 clk_id) +static u64 versal_clock_get_ref_rate(u32 clk_id) { - u32 ret_payload[PAYLOAD_ARG_CNT]; - int ref; - - xilinx_pm_request(PM_CLOCK_GETPARENT, clk_id, 0, 0, 0, ret_payload); - ref = ret_payload[0]; - if (!(ref & 1)) + if (clk_id == PM_CLK_REF_CLK || clk_id == PM_CLK_MUXED_IRO || clk_id == PM_CLK_EMIO) return ref_clk; - if (ref & 2) + else if (clk_id == PM_CLK_PL_ALT_REF_CLK) return pl_alt_ref_clk; - return 0; + else + return 0; } -static u64 versal_clock_get_pll_rate(u32 clk_id) +static int versal_clock_get_fixed_factor_rate(u32 clock_id, u32 parent_id) { + struct versal_pm_query_data qdata = {0}; u32 ret_payload[PAYLOAD_ARG_CNT]; - u32 fbdiv; - u32 res; - u32 frac; - u64 freq; - u32 parent_rate, parent_id; - u32 id = clk_id & 0xFFF; + u32 mult, div; + u32 parent_rate; + int ret; - xilinx_pm_request(PM_CLOCK_GETSTATE, clk_id, 0, 0, 0, ret_payload); - res = ret_payload[1]; - if (!res) { - printf("0%x PLL not enabled\n", clk_id); - return 0; - } + qdata.qid = PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS; + qdata.arg1 = clock_id; - parent_id = clock[clock[id].parent[0].id].clk_id; - parent_rate = versal_clock_ref(parent_id); + ret = versal_pm_query(qdata, ret_payload); + if (ret) + return ret; - xilinx_pm_request(PM_CLOCK_GETDIVIDER, clk_id, 0, 0, 0, ret_payload); - fbdiv = ret_payload[1]; - xilinx_pm_request(PM_CLOCK_PLL_GETPARAM, clk_id, 2, 0, 0, ret_payload); - frac = ret_payload[1]; + mult = ret_payload[1]; + div = ret_payload[2]; - freq = (fbdiv * parent_rate) >> (1 << frac); + parent_rate = versal_clock_get_ref_rate(parent_id); + return parent_rate * mult / div; - return freq; } static u32 versal_clock_mux(u32 clk_id) @@ -437,6 +433,37 @@ static u32 versal_clock_get_parentid(u32 clk_id) return clock[clock[id].parent[parent_id].id].clk_id; } +static u64 versal_clock_get_pll_rate(u32 clk_id) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + u32 fbdiv; + u32 res; + u32 frac; + u64 freq; + u32 parent_rate, parent_id, parent_ref_clk_id; + u32 id = clk_id & 0xFFF; + + xilinx_pm_request(PM_CLOCK_GETSTATE, clk_id, 0, 0, 0, ret_payload); + res = ret_payload[1]; + if (!res) { + printf("0%x PLL not enabled\n", clk_id); + return 0; + } + + parent_id = clock[clock[id].parent[0].id].clk_id; + parent_ref_clk_id = versal_clock_get_parentid(parent_id); + parent_rate = versal_clock_get_ref_rate(parent_ref_clk_id); + + xilinx_pm_request(PM_CLOCK_GETDIVIDER, clk_id, 0, 0, 0, ret_payload); + fbdiv = ret_payload[1]; + xilinx_pm_request(PM_CLOCK_PLL_GETPARAM, clk_id, 2, 0, 0, ret_payload); + frac = ret_payload[1]; + + freq = (fbdiv * parent_rate) >> (1 << frac); + + return freq; +} + static u32 versal_clock_gate(u32 clk_id) { u32 id = clk_id & 0xFFF; @@ -479,14 +506,19 @@ static u64 versal_clock_calc(u32 clk_id) u32 parent_id; u64 clk_rate; u32 div; + struct clock_topology topology; if (versal_clock_pll(clk_id, &clk_rate)) return clk_rate; parent_id = versal_clock_get_parentid(clk_id); if (((parent_id >> NODE_SUBCLASS_SHIFT) & - NODE_CLASS_MASK) == NODE_SUBCLASS_CLOCK_REF) - return versal_clock_ref(clk_id); + NODE_CLASS_MASK) == NODE_SUBCLASS_CLOCK_REF) { + topology = clock[clk_id & 0x3FF].node[0]; + if (topology.type == TOPOLOGY_TYPE_FIXEDFACTOR) + return versal_clock_get_fixed_factor_rate(clk_id, parent_id); + return versal_clock_get_ref_rate(parent_id); + } if (!parent_id) return 0; @@ -505,7 +537,7 @@ static int versal_clock_get_rate(u32 clk_id, u64 *clk_rate) { if (((clk_id >> NODE_SUBCLASS_SHIFT) & NODE_CLASS_MASK) == NODE_SUBCLASS_CLOCK_REF) - *clk_rate = versal_clock_ref(clk_id); + *clk_rate = versal_clock_get_ref_rate(clk_id); if (versal_clock_pll(clk_id, clk_rate)) return 0; -- cgit v1.3.1 From 16794d3008fe61245c4938f4dab6843af71d388b Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 4 Sep 2023 08:45:27 +0530 Subject: cmd: thordown: Add proper dependency for CMD_THOR_DOWNLOAD When CONFIG_CMD_USB and CONFIG_USB are disabled some compilation errors are seen as below. cmd/thordown.o: in function `usb_gadget_initialize': include/linux/usb/gadget.h:981: undefined reference to `board_usb_init' cmd/thordown.o: in function `do_thor_down': cmd/thordown.c:68: undefined reference to `g_dnl_unregister' cmd/thordown.o: in function `usb_gadget_release': include/linux/usb/gadget.h:986: undefined reference to `board_usb_cleanup' cmd/thordown.o: in function `do_thor_down': cmd/thordown.c:41: undefined reference to `g_dnl_register' cmd/thordown.c:48: undefined reference to `thor_init' cmd/thordown.c:56: undefined reference to `thor_handle' gnu/aarch64/lin/aarch64-linux/bin/aarch64-linux-gnu-ld.bfd: line 4: 8485 Segmentation fault (core dumped) $CC --sysroot=$LIBC --no-warn-rwx-segment "$@" Makefile:1779: recipe for target 'u-boot' failed make: *** [u-boot] Error 139 make: *** Deleting file 'u-boot' Add dependency of USB_GADGET_DOWNLOAD for CONFIG_CMD_THOR_DOWNLOAD to fix the errors. Signed-off-by: Ashok Reddy Soma Signed-off-by: Venkatesh Yadav Abbarapu Reviewed-by: Tom Rini Link: https://lore.kernel.org/r/20230904031528.11817-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- cmd/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index 3f14923b5ef..64d723bd483 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -544,6 +544,8 @@ config CMD_SPL_WRITE_SIZE config CMD_THOR_DOWNLOAD bool "thor - TIZEN 'thor' download" select DFU + select USB_FUNCTION_THOR + depends on USB_GADGET_DOWNLOAD help Implements the 'thor' download protocol. This is a way of downloading a software update over USB from an attached host. -- cgit v1.3.1 From b764e84f9fb57954f601bc33514167d9ddad626f Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 4 Sep 2023 08:45:28 +0530 Subject: zynqmp: config: Add proper dependencies for USB When CONFIG_CMD_USB and CONFIG_USB are disabled, still some compilation errors are seen as below. In file included from include/configs/xilinx_zynqmp.h:173, from include/config.h:3, from include/common.h:16, from env/common.c:10: include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB' 302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/config_distro_bootcmd.h:302:9: note: in definition of macro 'BOOTENV_DEV_NAME_USB' 302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/configs/xilinx_zynqmp.h:77:41: note: in expansion of macro 'BOOTENV_DEV_NAME' 77 | # define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1) | ^~~~ include/configs/xilinx_zynqmp.h:168:9: note: in expansion of macro 'BOOT_TARGET_DEVICES_USB' 168 | BOOT_TARGET_DEVICES_USB(func) \ | ^~~~~~~~~~~~~~~~~~~~~~~ include/config_distro_bootcmd.h:454:25: note: in expansion of macro 'BOOT_TARGET_DEVICES' 454 | "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0" | ^~~~~~~~~~~~~~~~~~~ include/config_distro_bootcmd.h:474:9: note: in expansion of macro 'BOOTENV_BOOT_TARGETS' 474 | BOOTENV_BOOT_TARGETS \ | ^~~~~~~~~~~~~~~~~~~~ include/configs/xilinx_zynqmp.h:179:9: note: in expansion of macro 'BOOTENV' 179 | BOOTENV | ^~~~~~~ include/env_default.h:120:9: note: in expansion of macro 'CFG_EXTRA_ENV_SETTINGS' 120 | CFG_EXTRA_ENV_SETTINGS | ^~~~~~~~~~~~~~~~~~~~~~ In file included from env/common.c:32: include/env_default.h:27:36: note: to match this '{' 27 | const char default_environment[] = { | ^ scripts/Makefile.build:256: recipe for target 'env/common.o' failed make[1]: *** [env/common.o] Error 1 Makefile:1853: recipe for target 'env' failed make: *** [env] Error 2 make: *** Waiting for unfinished jobs.... Add CONFIG_USB_STORAGE as dependency for USB related macro's such as BOOT_TARGET_DEVICES_USB() and DFU_DEFAULT_POLL_TIMEOUT and CONFIG_THOR_RESET_OFF. Remove CONFIG_ZYNQMP_USB from Kconfig and also from defconfig since it is not used anywhere else. Signed-off-by: Ashok Reddy Soma Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230904031528.11817-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/Kconfig | 3 --- configs/xilinx_zynqmp_virt_defconfig | 1 - include/configs/xilinx_zynqmp.h | 4 ++-- 3 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index fd6f07715a8..26b80b7882c 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -84,9 +84,6 @@ config ZYNQMP_SPL_PM_CFG_OBJ_FILE Leave this option empty if your PMU firmware has a hard-coded configuration object or you are loading it by any other means. -config ZYNQMP_USB - bool "Configure ZynqMP USB" - config ZYNQMP_NO_DDR bool "Disable DDR MMU mapping" help diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 26820f721e3..30e420951da 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -16,7 +16,6 @@ CONFIG_ENV_OFFSET_REDUND=0x1E80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_CMD_FRU=y -CONFIG_ZYNQMP_USB=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x00000000 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index c57ab14d1b9..5bc117e1900 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -29,7 +29,7 @@ /* Miscellaneous configurable options */ -#if defined(CONFIG_ZYNQMP_USB) +#if defined(CONFIG_USB_STORAGE) #define DFU_DEFAULT_POLL_TIMEOUT 300 # define PARTS_DEFAULT \ @@ -77,7 +77,7 @@ # define BOOT_TARGET_DEVICES_SCSI(func) #endif -#if defined(CONFIG_ZYNQMP_USB) +#if defined(CONFIG_USB_STORAGE) # define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1) #else # define BOOT_TARGET_DEVICES_USB(func) -- cgit v1.3.1 From 1290262292473bd89b6beacf2e4e43b27c3c3617 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Wed, 20 Sep 2023 08:24:50 +0530 Subject: cmd: sf: Fix the flash_is_unlocked api size parameter When flash erase is called with size parameter, code is checking if sectors are locked or not. But for checking, the whole device length minus offset is used instead of actual size which should be erased. That's why when only some sectors are locked it is not possible to erase unlocked sectors. The length is calculated as "length = max_chipsize - offset", flash_is_unlocked() api is getting updated with length which is incorrect. Fix this flash_is_unlocked() api by passing the size parameter. ZynqMP> sf erase 0 100000 len=0x8000000 which is flash size size=0x100000 We need to update the size in the flash_is_unlocked() api and not the length. Signed-off-by: Venkatesh Yadav Abbarapu Reviewed-by: Simon Glass Link: https://lore.kernel.org/r/20230920025450.6281-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- cmd/sf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/sf.c b/cmd/sf.c index 55bef2f7699..977ffcb63c1 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -366,7 +366,7 @@ static int do_spi_flash_erase(int argc, char *const argv[]) } if (flash->flash_is_unlocked && - !flash->flash_is_unlocked(flash, offset, len)) { + !flash->flash_is_unlocked(flash, offset, size)) { printf("ERROR: flash area is locked\n"); return CMD_RET_FAILURE; } -- cgit v1.3.1 From dee8739a1ba5fe8cdf1c51b168dbc56f7bd921c4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 15 Sep 2023 14:12:03 +0200 Subject: trace: Use 64bit variable for start and len tputq() requires variables to have 64bit width that's why make them 64bit to clean alignment requirement. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/6edb34ef1f10010d2380f964fb6b4fb3dc257799.1694779918.git.michal.simek@amd.com --- tools/proftool.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/proftool.c b/tools/proftool.c index 101bcb63334..869a2a32c51 100644 --- a/tools/proftool.c +++ b/tools/proftool.c @@ -1493,7 +1493,8 @@ static int write_pages(struct twriter *tw, enum out_format_t out_format, static int write_flyrecord(struct twriter *tw, enum out_format_t out_format, int *missing_countp, int *skip_countp) { - int start, ret, len; + unsigned long long start, len; + int ret; FILE *fout = tw->fout; char str[200]; -- cgit v1.3.1 From ad0f3cdc219c9482c728cdbcf43cfcc2dfba04e2 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 15 Sep 2023 14:12:04 +0200 Subject: trace: Move trace_clocks description above record offset calculation Flyrecord tracing data are page aligned that's why it is necessary to calculate alignment properly. Because trace_clocks description is the part of record length it is necessary to have information about length earlier. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/d3853d91b6fa7e3a1e5c24dd3c17335cf0041b5b.1694779918.git.michal.simek@amd.com --- tools/proftool.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/tools/proftool.c b/tools/proftool.c index 869a2a32c51..7c95a94482f 100644 --- a/tools/proftool.c +++ b/tools/proftool.c @@ -1500,6 +1500,10 @@ static int write_flyrecord(struct twriter *tw, enum out_format_t out_format, tw->ptr += fprintf(fout, "flyrecord%c", 0); + snprintf(str, sizeof(str), + "[local] global counter uptime perf mono mono_raw boot x86-tsc\n"); + len = strlen(str); + /* trace data */ start = ALIGN(tw->ptr + 16, TRACE_PAGE_SIZE); tw->ptr += tputq(fout, start); @@ -1510,9 +1514,6 @@ static int write_flyrecord(struct twriter *tw, enum out_format_t out_format, return -1; tw->ptr += ret; - snprintf(str, sizeof(str), - "[local] global counter uptime perf mono mono_raw boot x86-tsc\n"); - len = strlen(str); tw->ptr += tputq(fout, len); tw->ptr += tputs(fout, str); -- cgit v1.3.1 From 8750d35ee295b0713d621a7d667515ef63fca246 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 15 Sep 2023 14:12:05 +0200 Subject: trace: Fix alignment logic in flyrecord header Current alignment which is using 16 bytes is not correct in connection to trace_clocks description and it's length. That's why use start_addr variable and record proper size based on used entries. Fixes: be16fc81b2ed ("trace: Update proftool to use new binary format"). Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/691dad64df80993ca4cfb6d0e33964ed26f50bee.1694779918.git.michal.simek@amd.com --- tools/proftool.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/tools/proftool.c b/tools/proftool.c index 7c95a94482f..fca45e4a5af 100644 --- a/tools/proftool.c +++ b/tools/proftool.c @@ -1493,19 +1493,43 @@ static int write_pages(struct twriter *tw, enum out_format_t out_format, static int write_flyrecord(struct twriter *tw, enum out_format_t out_format, int *missing_countp, int *skip_countp) { - unsigned long long start, len; + unsigned long long start, start_ofs, len; int ret; FILE *fout = tw->fout; char str[200]; + /* Record start pointer */ + start_ofs = tw->ptr; + debug("Start of flyrecord header at: 0x%llx\n", start_ofs); + tw->ptr += fprintf(fout, "flyrecord%c", 0); + /* flyrecord\0 - allocated 10 bytes */ + start_ofs += 10; + + /* + * 8 bytes that are a 64-bit word containing the offset into the file + * that holds the data for the CPU. + * + * 8 bytes that are a 64-bit word containing the size of the CPU + * data at that offset. + */ + start_ofs += 16; + snprintf(str, sizeof(str), "[local] global counter uptime perf mono mono_raw boot x86-tsc\n"); len = strlen(str); + /* trace clock length - 8 bytes */ + start_ofs += 8; + /* trace clock data */ + start_ofs += len; + + debug("Calculated flyrecord header end at: 0x%llx, trace clock len: 0x%llx\n", + start_ofs, len); + /* trace data */ - start = ALIGN(tw->ptr + 16, TRACE_PAGE_SIZE); + start = ALIGN(start_ofs, TRACE_PAGE_SIZE); tw->ptr += tputq(fout, start); /* use a placeholder for the size */ @@ -1517,6 +1541,9 @@ static int write_flyrecord(struct twriter *tw, enum out_format_t out_format, tw->ptr += tputq(fout, len); tw->ptr += tputs(fout, str); + debug("End of flyrecord header at: 0x%x, offset: 0x%llx\n", + tw->ptr, start); + debug("trace text base %lx, map file %lx\n", text_base, text_offset); ret = write_pages(tw, out_format, missing_countp, skip_countp); -- cgit v1.3.1 From 638189ddeaa5dccee9466bc772fa5655218f530b Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Fri, 15 Sep 2023 08:47:58 +0530 Subject: spi: zynqmp_qspi: Change flush cache to invalidate cache Before DMA read, ideally cache should be invalidated, so that data from memory will be updated to cache after DMA is completed. But flush_dcache_range is being used which is incorrect. Change flush_dcache_range to invalidate_dcache_range. Signed-off-by: Ashok Reddy Soma Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230915031759.28889-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- drivers/spi/zynqmp_gqspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index c4aee279aa4..a506d152275 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -690,7 +690,7 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, writel(GQSPI_DMA_DST_I_STS_MASK, &dma_regs->dmaier); addr = (unsigned long)buf; size = roundup(priv->len, GQSPI_DMA_ALIGN); - flush_dcache_range(addr, addr + size); + invalidate_dcache_range(addr, addr + size); while (priv->len) { zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); -- cgit v1.3.1 From a3ade3dae4d93f9b5282ddb4885d69161729ec6d Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Fri, 15 Sep 2023 08:47:59 +0530 Subject: spi: zynqmp_qspi: Workaround for small data cache issue Cache related issues are seen with small sized data reads. Due to this, proper data is not read. Also some times sf probe fails randomly. To workaround this issue, invalidate dcache after read DMA is triggered. Signed-off-by: Ashok Reddy Soma Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230915031759.28889-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- drivers/spi/zynqmp_gqspi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index a506d152275..ec59ef58044 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -707,6 +707,8 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, return -ETIMEDOUT; } + invalidate_dcache_range(addr, addr + size); + writel(GQSPI_DMA_DST_I_STS_DONE, &dma_regs->dmaisr); debug("buf:0x%lx, rxbuf:0x%lx, *buf:0x%x len: 0x%x\n", -- cgit v1.3.1