From 84875f881e6c992cafa81c0fa4b13da1b1ba857e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 30 Jun 2015 17:10:22 +0900 Subject: ARM: UniPhier: drop special CONFIG_AUTOBOOT_ settings There is no good reason to use a particular key to stop autobooting. The default allows us to stop the autoboot with any key input. Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 4 ---- configs/ph1_pro4_defconfig | 4 ---- configs/ph1_sld8_defconfig | 4 ---- 3 files changed, 12 deletions(-) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 650201a17d7..a71511c4107 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -7,10 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_XIMG is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_NAND=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 7d8d9cc61a0..d02712eb573 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -6,10 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_XIMG is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_NAND=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 90c44ac857c..ee4cebcef38 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -7,10 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" -CONFIG_AUTOBOOT_DELAY_STR="d" -CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_XIMG is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_NAND=y -- cgit v1.3.1 From edcfaeb8fd4829f8ed248556f9f0d996beabc3ba Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 30 Jun 2015 18:27:00 +0900 Subject: ARM: dts: UniPhier: sync device trees with the Linux kernel This makes code diff much easier. Device trees describe hardware attributes, which are independent of software architecture. It generally makes sense to synchronize them beyond software projects. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ph1-ld4.dtsi | 47 +++++++++++++++++++++++++++++++++--- arch/arm/dts/uniphier-ph1-pro4.dtsi | 48 ++++++++++++++++++++++++++++++++++--- arch/arm/dts/uniphier-ph1-sld3.dtsi | 48 ++++++++++++++++++++++++++++++++++--- arch/arm/dts/uniphier-ph1-sld8.dtsi | 47 +++++++++++++++++++++++++++++++++--- 4 files changed, 178 insertions(+), 12 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index c2008383c1b..c3553953492 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -1,9 +1,7 @@ /* * Device Tree Source for UniPhier PH1-LD4 SoC * - * Copyright (C) 2014-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -24,11 +22,26 @@ }; }; + clocks { + arm_timer_clk: arm_timer_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + interrupt-parent = <&intc>; + + extbus: extbus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + }; uart0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -94,6 +107,12 @@ status = "disabled"; }; + system-bus-controller-misc@59800000 { + compatible = "socionext,uniphier-system-bus-controller-misc", + "syscon"; + reg = <0x59800000 0x2000>; + }; + usb0: usb@5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled"; @@ -112,6 +131,28 @@ reg = <0x5a820100 0x100>; }; + timer@60000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x60000200 0x20>; + interrupts = <1 11 0x104>; + clocks = <&arm_timer_clk>; + }; + + timer@60000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x60000600 0x20>; + interrupts = <1 13 0x104>; + clocks = <&arm_timer_clk>; + }; + + intc: interrupt-controller@60001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x60001000 0x1000>, + <0x60000100 0x100>; + }; + nand: nand@68000000 { compatible = "denali,denali-nand-dt"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index 8195266db3c..5c82df7ccda 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -1,9 +1,7 @@ /* * Device Tree Source for UniPhier PH1-Pro4 SoC * - * Copyright (C) 2014-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -16,6 +14,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "socionext,uniphier-smp"; cpu@0 { device_type = "cpu"; @@ -30,11 +29,26 @@ }; }; + clocks { + arm_timer_clk: arm_timer_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + interrupt-parent = <&intc>; + + extbus: extbus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + }; uart0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -120,6 +134,12 @@ status = "ok"; }; + system-bus-controller-misc@59800000 { + compatible = "socionext,uniphier-system-bus-controller-misc", + "syscon"; + reg = <0x59800000 0x2000>; + }; + usb2: usb@5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled"; @@ -144,6 +164,28 @@ reg = <0x65c00000 0x100>; }; + timer@60000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x60000200 0x20>; + interrupts = <1 11 0x304>; + clocks = <&arm_timer_clk>; + }; + + timer@60000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x60000600 0x20>; + interrupts = <1 13 0x304>; + clocks = <&arm_timer_clk>; + }; + + intc: interrupt-controller@60001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x60001000 0x1000>, + <0x60000100 0x100>; + }; + nand: nand@68000000 { compatible = "denali,denali-nand-dt"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi index 44b19897b3b..1f93bb95aaf 100644 --- a/arch/arm/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -1,9 +1,7 @@ /* * Device Tree Source for UniPhier PH1-sLD3 SoC * - * Copyright (C) 2014-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -16,6 +14,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "socionext,uniphier-smp"; cpu@0 { device_type = "cpu"; @@ -30,11 +29,48 @@ }; }; + clocks { + arm_timer_clk: arm_timer_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + interrupt-parent = <&intc>; + + extbus: extbus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + }; + + timer@20000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x20000200 0x20>; + interrupts = <1 11 0x304>; + clocks = <&arm_timer_clk>; + }; + + timer@20000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x20000600 0x20>; + interrupts = <1 13 0x304>; + clocks = <&arm_timer_clk>; + }; + + intc: interrupt-controller@20001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x20001000 0x1000>, + <0x20000100 0x100>; + }; uart0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -93,6 +129,12 @@ status = "disabled"; }; + system-bus-controller-misc@59800000 { + compatible = "socionext,uniphier-system-bus-controller-misc", + "syscon"; + reg = <0x59800000 0x2000>; + }; + usb0: usb@5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled"; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index d9f61c22319..4f291f7987d 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -1,9 +1,7 @@ /* * Device Tree Source for UniPhier PH1-sLD8 SoC * - * Copyright (C) 2014-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -24,11 +22,26 @@ }; }; + clocks { + arm_timer_clk: arm_timer_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + interrupt-parent = <&intc>; + + extbus: extbus { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + }; uart0: serial@54006800 { compatible = "socionext,uniphier-uart"; @@ -94,6 +107,12 @@ status = "disabled"; }; + system-bus-controller-misc@59800000 { + compatible = "socionext,uniphier-system-bus-controller-misc", + "syscon"; + reg = <0x59800000 0x2000>; + }; + usb0: usb@5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled"; @@ -112,6 +131,28 @@ reg = <0x5a820100 0x100>; }; + timer@60000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x60000200 0x20>; + interrupts = <1 11 0x104>; + clocks = <&arm_timer_clk>; + }; + + timer@60000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x60000600 0x20>; + interrupts = <1 13 0x104>; + clocks = <&arm_timer_clk>; + }; + + intc: interrupt-controller@60001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x60001000 0x1000>, + <0x60000100 0x100>; + }; + nand: nand@68000000 { compatible = "denali,denali-nand-dt"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; -- cgit v1.3.1 From 13b2ba1a112c94355837d77198f5159f68acab27 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 30 Jun 2015 18:27:01 +0900 Subject: ARM: dts: UniPhier: re-license device tree files under GPLv2+/X11 The current GPL only licensing on the device trees makes it very impractical for other software components licensed under another license. To make it easier to reuse them, the device trees for UniPhier SoCs and boards have already been dual-licensed in Linux. Follow this trend in U-boot too. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ph1-ld4-ref.dts | 2 +- arch/arm/dts/uniphier-ph1-ld4.dtsi | 2 +- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 2 +- arch/arm/dts/uniphier-ph1-pro4.dtsi | 2 +- arch/arm/dts/uniphier-ph1-sld3-ref.dts | 2 +- arch/arm/dts/uniphier-ph1-sld3.dtsi | 2 +- arch/arm/dts/uniphier-ph1-sld8-ref.dts | 2 +- arch/arm/dts/uniphier-ph1-sld8.dtsi | 2 +- arch/arm/dts/uniphier-ref-daughter.dtsi | 6 ++---- 9 files changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index d972c0230ec..25e487ae511 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -5,7 +5,7 @@ * Copyright (C) 2015 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /dts-v1/; diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index c3553953492..39d7b240190 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -3,7 +3,7 @@ * * Copyright (C) 2014-2015 Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /include/ "skeleton.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index f6d03e3e26c..b4b7f61e5c9 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -5,7 +5,7 @@ * Copyright (C) 2015 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /dts-v1/; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index 5c82df7ccda..f06906c7fa8 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -3,7 +3,7 @@ * * Copyright (C) 2014-2015 Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /include/ "skeleton.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts index d9616f68a08..9dc929671ea 100644 --- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts @@ -5,7 +5,7 @@ * Copyright (C) 2015 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /dts-v1/; diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi index 1f93bb95aaf..2fa42a600f1 100644 --- a/arch/arm/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -3,7 +3,7 @@ * * Copyright (C) 2014-2015 Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /include/ "skeleton.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index 69e9bfa9ba0..2d1359c30e5 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -5,7 +5,7 @@ * Copyright (C) 2015 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /dts-v1/; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index 4f291f7987d..15df50f2eaa 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -3,7 +3,7 @@ * * Copyright (C) 2014-2015 Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ /include/ "skeleton.dtsi" diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi index aca9f58b250..84b2206ad4a 100644 --- a/arch/arm/dts/uniphier-ref-daughter.dtsi +++ b/arch/arm/dts/uniphier-ref-daughter.dtsi @@ -1,11 +1,9 @@ /* * Device Tree Source for UniPhier Reference Daughter Board * - * Copyright (C) 2014-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ X11 */ &i2c0 { -- cgit v1.3.1 From 8101b98298c4232175d0d7b4c73d94b66b97ef83 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 30 Jun 2015 18:43:45 +0900 Subject: ARM: UniPhier: add IDs for PH1-Pro5, ProXstream2, PH1-LD6b This prepares for new SoCs support. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/cpu_info.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/mach-uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c index c4ba6d249eb..5d9ed84be4e 100644 --- a/arch/arm/mach-uniphier/cpu_info.c +++ b/arch/arm/mach-uniphier/cpu_info.c @@ -34,6 +34,15 @@ int print_cpuinfo(void) case 0x29: puts("PH1-sLD8 (MN2WS0270)"); break; + case 0x2A: + puts("PH1-Pro5 (MN2WS0300)"); + break; + case 0x2E: + puts("ProXstream2 (MN2WS0310)"); + break; + case 0x2F: + puts("PH1-LD6b (MN2WS0320)"); + break; default: printf("Unknown Processor ID (0x%x)\n", revision); return -1; -- cgit v1.3.1