From b2fb22396f97492fb5a2749dbd1bd9b6fdc30c71 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 10 Jul 2023 10:44:09 +0200 Subject: ARM: dts: stm32mp15: remove shmem for scmi-optee Since OP-TEE commit 89ba3422ee80 ("plat-stm32mp1: scmi_server: default use OP-TEE shared memory"), integrated in OP-TEE 3.22.0-rc1 the default configuration for STM32MP15x SoCs changes, CFG_STM32MP1_SCMI_SHM_SYSRAM is disabled by default and the OP-TEE SMCI server uses ithe OP-TEE native shared memory registered by clients. To be compatible by default with this configuration and the next OP-TEE version, this patch removes the SHMEM in the SCMI configuration and the associated reserved memory in the last 4KByte page of SRAM, in the STM32MP15 device tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp15-scmi.dtsi | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/arm/dts/stm32mp15-scmi.dtsi b/arch/arm/dts/stm32mp15-scmi.dtsi index 543f24c2f4f..ad2584213d9 100644 --- a/arch/arm/dts/stm32mp15-scmi.dtsi +++ b/arch/arm/dts/stm32mp15-scmi.dtsi @@ -16,7 +16,6 @@ #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; - shmem = <&scmi_shm>; scmi_clk: protocol@14 { reg = <0x14>; @@ -60,21 +59,6 @@ }; }; }; - - soc { - scmi_sram: sram@2ffff000 { - compatible = "mmio-sram"; - reg = <0x2ffff000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2ffff000 0x1000>; - - scmi_shm: scmi-sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0 0x80>; - }; - }; - }; }; ®11 { -- cgit v1.3.1 From 3fce6bf213095121411fd8d8eb116a8cb1784141 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 10 Jul 2023 10:44:10 +0200 Subject: ARM: dts: stm32mp13: remove shmem for scmi-optee CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE native shared memory registered by clients. To be compatible by default with this configuration this patch removes the shared memory in the SCMI configuration and the associated reserved memory in SRAM. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp13-u-boot.dtsi | 8 -------- arch/arm/dts/stm32mp131.dtsi | 14 -------------- 2 files changed, 22 deletions(-) diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi index 726cd1a7e47..aa5cfc6e41d 100644 --- a/arch/arm/dts/stm32mp13-u-boot.dtsi +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi @@ -108,14 +108,6 @@ bootph-all; }; -&scmi_shm { - bootph-all; -}; - -&scmi_sram { - bootph-all; -}; - &syscfg { bootph-all; }; diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index d163c267e34..d23bbc3639d 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -40,7 +40,6 @@ #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; - shmem = <&scmi_shm>; scmi_clk: protocol@14 { reg = <0x14>; @@ -106,19 +105,6 @@ interrupt-parent = <&intc>; ranges; - scmi_sram: sram@2ffff000 { - compatible = "mmio-sram"; - reg = <0x2ffff000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2ffff000 0x1000>; - - scmi_shm: scmi-sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0 0x80>; - }; - }; - timers2: timer@40000000 { #address-cells = <1>; #size-cells = <0>; -- cgit v1.3.1