From 157938a220cf14a43dd380b6108b231cfd2e8d47 Mon Sep 17 00:00:00 2001 From: Jimmy Ho Date: Mon, 13 Oct 2025 10:24:25 +0800 Subject: timer: sifive_clint: Add GHRTv2 compaible string The current sifive_clint driver can fully support GHRTv2 clint. Add the compatible of GHRTv2 clint, sifive,clint2, to sifive_clint_ids list. Signed-off-by: Vincent Chen Signed-off-by: Wayling Chen Signed-off-by: Max Hsu Signed-off-by: Jimmy Ho --- drivers/timer/riscv_aclint_timer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/timer/riscv_aclint_timer.c b/drivers/timer/riscv_aclint_timer.c index 35da1ea2fd2..175956bcfd3 100644 --- a/drivers/timer/riscv_aclint_timer.c +++ b/drivers/timer/riscv_aclint_timer.c @@ -83,6 +83,7 @@ static int riscv_aclint_timer_probe(struct udevice *dev) static const struct udevice_id riscv_aclint_timer_ids[] = { { .compatible = "riscv,clint0", .data = CLINT_MTIME_OFFSET }, { .compatible = "sifive,clint0", .data = CLINT_MTIME_OFFSET }, + { .compatible = "sifive,clint2", .data = CLINT_MTIME_OFFSET }, { .compatible = "riscv,aclint-mtimer", .data = ACLINT_MTIME_OFFSET }, { } }; -- cgit v1.3.1 From 417ad9b0c71bd242923050173daf2e7b95e28229 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:44 -0700 Subject: riscv: dts: starfive: jh7110-common: drop no-sdio property from mmc1 Relax no-sdio restriction on mmc1 for jh7110 boards. Property was introduced for StarFive VisionFive2 dts to configure mmc1 for SD Card but this is not necessary, the restriction is only needed to block use of commands that would cause a device to malfunction. Signed-off-by: E Shattow Signed-off-by: Conor Dooley [ upstream commit: 481ee0fcbb9a0f0706d6d29de9570d1048aff631 ] (cherry picked from commit b4e73596622f791e3c2a2449022671e4e579fbd0) --- dts/upstream/src/riscv/starfive/jh7110-common.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi index 2eaf01775ef..a315113840e 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi @@ -299,7 +299,6 @@ assigned-clock-rates = <50000000>; bus-width = <4>; bootph-pre-ram; - no-sdio; no-mmc; cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; disable-wp; -- cgit v1.3.1 From 2b26cda14f8567680613e079e4b63c86edf4fedb Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:45 -0700 Subject: riscv: dts: starfive: jh7110: add DMC memory controller Add JH7110 SoC DDR external memory controller. Signed-off-by: E Shattow Reviewed-by: Hal Feng Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley [ upstream commit: 7114969021ec5c4c0f3df1da3a8790f75dda92e2 ] (cherry picked from commit 8d5c520b73b7c29b714f75e99ed48baa55fc5fa1) --- dts/upstream/src/riscv/starfive/jh7110.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/dts/upstream/src/riscv/starfive/jh7110.dtsi b/dts/upstream/src/riscv/starfive/jh7110.dtsi index 0ba74ef0467..f3876660c07 100644 --- a/dts/upstream/src/riscv/starfive/jh7110.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110.dtsi @@ -931,6 +931,18 @@ <&syscrg JH7110_SYSRST_WDT_CORE>; }; + memory-controller@15700000 { + compatible = "starfive,jh7110-dmc"; + reg = <0x0 0x15700000 0x0 0x10000>, + <0x0 0x13000000 0x0 0x10000>; + clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>; + clock-names = "pll"; + resets = <&syscrg JH7110_SYSRST_DDR_AXI>, + <&syscrg JH7110_SYSRST_DDR_OSC>, + <&syscrg JH7110_SYSRST_DDR_APB>; + reset-names = "axi", "osc", "apb"; + }; + crypto: crypto@16000000 { compatible = "starfive,jh7110-crypto"; reg = <0x0 0x16000000 0x0 0x4000>; -- cgit v1.3.1 From e085b7b731644a7062eee83bcc786aa6a2bb3366 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:46 -0700 Subject: riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader Add bootph-pre-ram hinting to jh7110.dtsi: - CPU interrupt controller(s) - gmac1_rgmii_rxin fixed-clock (dependency of syscrg) - gmac1_rmii_refin fixed-clock (dependency of syscrg) - oscillator - core local interrupt timer - syscrg clock-controller - pllclk clock-controller (dependency of syscrg) - DDR memory controller Signed-off-by: E Shattow Reviewed-by: Hal Feng Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley [ upstream commit: 8181cc2f3f21657392da912eb20ee17514c87828 ] (cherry picked from commit a31c1c85876bf9f15f3df14959354ab9a200ffa0) --- dts/upstream/src/riscv/starfive/jh7110.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/dts/upstream/src/riscv/starfive/jh7110.dtsi b/dts/upstream/src/riscv/starfive/jh7110.dtsi index f3876660c07..6e56e9d20bb 100644 --- a/dts/upstream/src/riscv/starfive/jh7110.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110.dtsi @@ -35,6 +35,7 @@ cpu0_intc: interrupt-controller { compatible = "riscv,cpu-intc"; + bootph-pre-ram; interrupt-controller; #interrupt-cells = <1>; }; @@ -68,6 +69,7 @@ cpu1_intc: interrupt-controller { compatible = "riscv,cpu-intc"; + bootph-pre-ram; interrupt-controller; #interrupt-cells = <1>; }; @@ -101,6 +103,7 @@ cpu2_intc: interrupt-controller { compatible = "riscv,cpu-intc"; + bootph-pre-ram; interrupt-controller; #interrupt-cells = <1>; }; @@ -134,6 +137,7 @@ cpu3_intc: interrupt-controller { compatible = "riscv,cpu-intc"; + bootph-pre-ram; interrupt-controller; #interrupt-cells = <1>; }; @@ -167,6 +171,7 @@ cpu4_intc: interrupt-controller { compatible = "riscv,cpu-intc"; + bootph-pre-ram; interrupt-controller; #interrupt-cells = <1>; }; @@ -273,12 +278,14 @@ gmac1_rgmii_rxin: gmac1-rgmii-rxin-clock { compatible = "fixed-clock"; + bootph-pre-ram; clock-output-names = "gmac1_rgmii_rxin"; #clock-cells = <0>; }; gmac1_rmii_refin: gmac1-rmii-refin-clock { compatible = "fixed-clock"; + bootph-pre-ram; clock-output-names = "gmac1_rmii_refin"; #clock-cells = <0>; }; @@ -321,6 +328,7 @@ osc: oscillator { compatible = "fixed-clock"; + bootph-pre-ram; clock-output-names = "osc"; #clock-cells = <0>; }; @@ -354,6 +362,7 @@ clint: timer@2000000 { compatible = "starfive,jh7110-clint", "sifive,clint0"; reg = <0x0 0x2000000 0x0 0x10000>; + bootph-pre-ram; interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, <&cpu1_intc 3>, <&cpu1_intc 7>, <&cpu2_intc 3>, <&cpu2_intc 7>, @@ -880,6 +889,7 @@ syscrg: clock-controller@13020000 { compatible = "starfive,jh7110-syscrg"; reg = <0x0 0x13020000 0x0 0x10000>; + bootph-pre-ram; clocks = <&osc>, <&gmac1_rmii_refin>, <&gmac1_rgmii_rxin>, <&i2stx_bclk_ext>, <&i2stx_lrck_ext>, @@ -904,6 +914,7 @@ pllclk: clock-controller { compatible = "starfive,jh7110-pll"; + bootph-pre-ram; clocks = <&osc>; #clock-cells = <1>; }; @@ -935,6 +946,7 @@ compatible = "starfive,jh7110-dmc"; reg = <0x0 0x15700000 0x0 0x10000>, <0x0 0x13000000 0x0 0x10000>; + bootph-pre-ram; clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>; clock-names = "pll"; resets = <&syscrg JH7110_SYSRST_DDR_AXI>, -- cgit v1.3.1 From b1b5079c7e03f2b3483e901fb0e8bb029e0699e7 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:47 -0700 Subject: riscv: dts: starfive: jh7110-common: drop no-mmc property from mmc1 Relax no-mmc restriction on mmc1 for jh7110 boards. The restriction is only needed to block use of commands that would cause a device to malfunction, which by testing and observation [1] is not any problem. 1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/ Signed-off-by: E Shattow Tested-by: Hal Feng Signed-off-by: Conor Dooley [ upstream commit: 08128670a931a4117f7b93c703d0186c67c9e1e2 ] (cherry picked from commit cd5d4277d9515be5c10752fd8140f03c3dfec541) --- dts/upstream/src/riscv/starfive/jh7110-common.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi index a315113840e..4fa77ffd54e 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi @@ -299,7 +299,6 @@ assigned-clock-rates = <50000000>; bus-width = <4>; bootph-pre-ram; - no-mmc; cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; disable-wp; cap-sd-highspeed; -- cgit v1.3.1 From 926319bd337bff2c5aafc372769e197ca88f6b44 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:48 -0700 Subject: riscv: dts: starfive: jh7110-common: drop mmc post-power-on-delay-ms Drop post-power-on-delay-ms from mmc0 mmc1 interfaces. There is no known reason for these properties to continue, testing appears to be fine without them [1]. 1: https://lore.kernel.org/lkml/NT0PR01MB1312E0D9EE9F158A57B77700E63D2@NT0PR01MB1312.CHNPR01.prod.partner.outlook.cn/ Signed-off-by: E Shattow Tested-by: Hal Feng Signed-off-by: Conor Dooley [ upstream commit: b5a861a438d1a456952665cf6167969f01209479 ] (cherry picked from commit 9c18e97b9be437c97789c9687148f3dd3f25b809) --- dts/upstream/src/riscv/starfive/jh7110-common.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi index 4fa77ffd54e..5dc15e48b74 100644 --- a/dts/upstream/src/riscv/starfive/jh7110-common.dtsi +++ b/dts/upstream/src/riscv/starfive/jh7110-common.dtsi @@ -285,7 +285,6 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; cap-mmc-hw-reset; - post-power-on-delay-ms = <200>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; vmmc-supply = <&vcc_3v3>; @@ -302,7 +301,6 @@ cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; disable-wp; cap-sd-highspeed; - post-power-on-delay-ms = <200>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; status = "okay"; -- cgit v1.3.1 From d1c3f46f8ba272f3a3a3a46a293e019baea96e55 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:49 -0700 Subject: riscv: dts: starfive: add common board dtsi for Milk-V Mars CM variants Add a common board dtsi for use by Milk-V Mars CM and Milk-V Mars CM Lite. Signed-off-by: E Shattow Signed-off-by: Conor Dooley [ upstream commit: 651b30c58775e334c79aa3ecd44a3d98ac201db2 ] (cherry picked from commit 034af14dcd1e6dbfa4f41a340b6d92b054604858) --- .../src/riscv/starfive/jh7110-milkv-marscm.dtsi | 159 +++++++++++++++++++++ 1 file changed, 159 insertions(+) create mode 100644 dts/upstream/src/riscv/starfive/jh7110-milkv-marscm.dtsi diff --git a/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm.dtsi b/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm.dtsi new file mode 100644 index 00000000000..25b70af564e --- /dev/null +++ b/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm.dtsi @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 E Shattow + */ + +/dts-v1/; +#include +#include "jh7110-common.dtsi" + +/ { + aliases { + i2c1 = &i2c1; + i2c3 = &i2c3; + i2c4 = &i2c4; + serial3 = &uart3; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&sysgpio 33 GPIO_ACTIVE_LOW>; + }; +}; + +&gmac0 { + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; + starfive,tx-use-rgmii-clk; + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c2 { + status = "disabled"; +}; + +&i2c6 { + status = "disabled"; +}; + +&mmc1 { + #address-cells = <1>; + #size-cells = <0>; + + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + status = "okay"; + + ap6256: wifi@1 { + compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&sysgpio>; + interrupts = <34 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + pinctrl-0 = <&wifi_host_wake_irq>; + pinctrl-names = "default"; + }; +}; + +&pcie0 { + status = "okay"; +}; + +&phy0 { + rx-internal-delay-ps = <1500>; + tx-internal-delay-ps = <1500>; + motorcomm,rx-clk-drv-microamp = <3970>; + motorcomm,rx-data-drv-microamp = <2910>; + motorcomm,tx-clk-10-inverted; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; + motorcomm,tx-clk-adj-enabled; +}; + +&pwm { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; + +&sysgpio { + uart1_pins: uart1-0 { + tx-pins { + pinmux = ; + bias-disable; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + }; + + rx-pins { + pinmux = ; + bias-pull-up; + input-enable; + input-schmitt-enable; + }; + + cts-pins { + pinmux = ; + bias-disable; + input-enable; + input-schmitt-enable; + }; + + rts-pins { + pinmux = ; + bias-disable; + input-disable; + input-schmitt-disable; + }; + }; + + usb0_pins: usb0-0 { + vbus-pins { + pinmux = ; + bias-disable; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; + + wifi_host_wake_irq: wifi-host-wake-irq-0 { + wake-pins { + pinmux = ; + input-enable; + }; + }; +}; + +&uart1 { + uart-has-rtscts; + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb0 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&usb0_pins>; + status = "okay"; +}; -- cgit v1.3.1 From 625e6125afd7f38430a4ffd3ab9a540b1210dc2e Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:50 -0700 Subject: dt-bindings: riscv: starfive: add milkv,marscm-emmc Add "milkv,marscm-emmc" as a StarFive JH7110 SoC-based system-on-module. Signed-off-by: E Shattow Acked-by: Rob Herring (Arm) Signed-off-by: Conor Dooley [ upstream commit: d1829e0b2f0619c39b0ce0b84fcbf67569108376 ] (cherry picked from commit 4df5d2ff67fa10ad1ba5760dedf1b3cbc2037739) --- dts/upstream/Bindings/riscv/starfive.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/dts/upstream/Bindings/riscv/starfive.yaml b/dts/upstream/Bindings/riscv/starfive.yaml index 7ef85174353..0713edb687f 100644 --- a/dts/upstream/Bindings/riscv/starfive.yaml +++ b/dts/upstream/Bindings/riscv/starfive.yaml @@ -28,6 +28,7 @@ properties: - enum: - deepcomputing,fml13v01 - milkv,mars + - milkv,marscm-emmc - pine64,star64 - starfive,visionfive-2-v1.2a - starfive,visionfive-2-v1.3b -- cgit v1.3.1 From 1c08c042f0c448ce89aee6b180c9e21689c2f6b0 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:51 -0700 Subject: riscv: dts: starfive: add Milk-V Mars CM system-on-module Milk-V Mars CM is a System-on-Module based on the StarFive VisionFive 2 board and Radxa CM3 System-on-Module compatible with the Raspberry Pi CM4IO Classic IO Board. Mars CM SoM features: - StarFive JH7110 System on Chip with RV64GC up to 1.5GHz - AXP15060 Power Management Unit - LPDDR4 2GB / 4GB / 8GB DRAM memory - BL24C04F 4K bits (512 x 8) EEPROM - GigaDevice 25LQ128EWIG QSPI NOR Flash 16M or SoC ROM UART loader for boot (selectable by GPIO) - eMMC5.0 8GB / 16GB / 32GB flash storage onboard - AP6256 via SDIO 2.0 onboard wireless connectivity WiFi 5 + Bluetooth 5.2 (optional, present in models with WiFi feature) - 1x Motorcomm YT8531C Gigabit Ethernet PHY - IMG BXE-4-32 Integrated GPU with 3D Acceleration: - H.264 & H.265 4K@60fps Decoding - H.265 1080p@30fps Encoding - JPEG encoder / decoder Additional features available via 2x 100-pin connectors for CM4IO Board: - 1x HDMI 2.0 - 1x MIPI DSI (4-lanes) - 1x 2CH Audio out (via GPIO) - 1x MIPI CSI (2x2-lanes or 1x4-lanes) - 1x USB 2.0 - 1x PCIe 1-lane Host, Gen 2 (5Gbps) - Up to 28x GPIO, supporting 3.3V - UART x6 - PWM x8 - I2C x7 - SPI - I2S Link to Milk-V Mars CM schematics: https://github.com/milkv-mars/mars-files/tree/main/Mars-CM_Hardware_Schematices Link to StarFive JH7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/index.html Link to Raspberry Pi CM4IO datasheet: https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf Add the devicetree file to make use of StarFive JH7110 common supported features PMIC, EEPROM, UART, I2C, GPIO, eMMC, PCIe, QSPI Flash, PWM, and Ethernet. Also configure the common SD Card interface mmc1 for onboard SDIO BT+WiFi. Signed-off-by: E Shattow Signed-off-by: Conor Dooley [ upstream commit: 8d193bc0aa2e802be30de331317639482735d738 ] (cherry picked from commit 8e935d097e975e6322b63fdc8ef9894c8582bef0) --- dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-emmc.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-emmc.dts diff --git a/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-emmc.dts b/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-emmc.dts new file mode 100644 index 00000000000..e568537af2c --- /dev/null +++ b/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-emmc.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 E Shattow + */ + +/dts-v1/; +#include "jh7110-milkv-marscm.dtsi" + +/ { + model = "Milk-V Mars CM"; + compatible = "milkv,marscm-emmc", "starfive,jh7110"; +}; -- cgit v1.3.1 From 6ba84ad72fc44881ebbfb8012ed79eb352f93fd1 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:52 -0700 Subject: dt-bindings: riscv: starfive: add milkv,marscm-lite Add "milkv,marscm-lite" as a StarFive JH7110 SoC-based system-on-module. Signed-off-by: E Shattow Acked-by: Rob Herring (Arm) Signed-off-by: Conor Dooley [ upstream commit: 12a29108384cfe073a4de778d5207d53b492f85e ] (cherry picked from commit ae7213970a0c80e90fac9ff0d2aa2966655983f5) --- dts/upstream/Bindings/riscv/starfive.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/dts/upstream/Bindings/riscv/starfive.yaml b/dts/upstream/Bindings/riscv/starfive.yaml index 0713edb687f..04510341a71 100644 --- a/dts/upstream/Bindings/riscv/starfive.yaml +++ b/dts/upstream/Bindings/riscv/starfive.yaml @@ -29,6 +29,7 @@ properties: - deepcomputing,fml13v01 - milkv,mars - milkv,marscm-emmc + - milkv,marscm-lite - pine64,star64 - starfive,visionfive-2-v1.2a - starfive,visionfive-2-v1.3b -- cgit v1.3.1 From f9e83e759296c5ec024e00bd1ab30f0a982bfac1 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Wed, 15 Oct 2025 03:22:53 -0700 Subject: riscv: dts: starfive: add Milk-V Mars CM Lite system-on-module Milk-V Mars CM Lite is a System-on-Module based on the Milk-V Mars CM without the onboard eMMC storage component populated and configured instead for SD3.0 Card Slot on that interface via 100-pin connector. Link to Milk-V Mars CM Lite schematics: https://github.com/milkv-mars/mars-files/tree/main/Mars-CM_Hardware_Schematices Link to StarFive JH7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/index.html Link to Raspberry Pi CM4IO datasheet: https://datasheets.raspberrypi.com/cm4io/cm4io-datasheet.pdf Add the devicetree file to make use of StarFive JH7110 common supported features PMIC, EEPROM, UART, I2C, GPIO, PCIe, QSPI Flash, PWM, and Ethernet. Also configure the eMMC interface mmc0 for SD Card use and configure the common SD Card interface mmc1 for onboard SDIO BT+WiFi. Signed-off-by: E Shattow Signed-off-by: Conor Dooley [ upstream commit: 4cce8b2503ab50f75a2dbc3eef2e55722836588e ] (cherry picked from commit c7821d537e5a61e5d543588674b71fb43ec0665b) --- .../riscv/starfive/jh7110-milkv-marscm-lite.dts | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-lite.dts diff --git a/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-lite.dts b/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-lite.dts new file mode 100644 index 00000000000..6c40d0ec401 --- /dev/null +++ b/dts/upstream/src/riscv/starfive/jh7110-milkv-marscm-lite.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 E Shattow + */ + +/dts-v1/; +#include "jh7110-milkv-marscm.dtsi" + +/ { + model = "Milk-V Mars CM Lite"; + compatible = "milkv,marscm-lite", "starfive,jh7110"; +}; + +&mmc0 { + bus-width = <4>; + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; +}; + +&mmc0_pins { + pwren-pins { + pinmux = ; + }; +}; -- cgit v1.3.1 From e599023f3107250a052ea3a8df8b1da191c86bf5 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Tue, 21 Oct 2025 13:54:00 -0700 Subject: riscv: dts: starfive: prune redundant jh7110 overrides Prune overrides of upstream jh7110.dtsi now that the required nodes are available through the devicetree-rebasing subtree. Signed-off-by: E Shattow --- arch/riscv/dts/starfive-visionfive2-u-boot.dtsi | 68 ------------------------- 1 file changed, 68 deletions(-) diff --git a/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi b/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi index 0e5dc3685b2..4c86d285e66 100644 --- a/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi +++ b/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi @@ -3,74 +3,6 @@ * Copyright (C) 2022 StarFive Technology Co., Ltd. */ -// BEGIN "riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader" -// From upstream Linux conor/riscv-dt-for-next commit 8181cc2f3f21 - -#include - -&clint { - bootph-pre-ram; -}; - -&cpu0_intc { - bootph-pre-ram; -}; - -&cpu1_intc { - bootph-pre-ram; -}; - -&cpu2_intc { - bootph-pre-ram; -}; - -&cpu3_intc { - bootph-pre-ram; -}; - -&cpu4_intc { - bootph-pre-ram; -}; - -&osc { - bootph-pre-ram; -}; - -&gmac1_rgmii_rxin { - bootph-pre-ram; -}; - -&gmac1_rmii_refin { - bootph-pre-ram; -}; - -/ { - soc { - memory-controller@15700000 { - compatible = "starfive,jh7110-dmc"; - reg = <0x0 0x15700000 0x0 0x10000>, - <0x0 0x13000000 0x0 0x10000>; - bootph-pre-ram; - clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>; - clock-names = "pll"; - resets = <&syscrg JH7110_SYSRST_DDR_AXI>, - <&syscrg JH7110_SYSRST_DDR_OSC>, - <&syscrg JH7110_SYSRST_DDR_APB>; - reset-names = "axi", "osc", "apb"; - }; - }; -}; - -&syscrg { - bootph-pre-ram; -}; - -&pllclk { - bootph-pre-ram; -}; - -// END "riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader" - / { soc { memory-controller@15700000 { -- cgit v1.3.1 From 6674ffb51bbbe1b6b9c78241c977b83e457f30de Mon Sep 17 00:00:00 2001 From: E Shattow Date: Tue, 21 Oct 2025 16:09:58 -0700 Subject: board: starfive: visionfive2: Add Milk-V Mars CM and Mars CM Lite selection by product_id Add identifier for Milk-V Mars CM to dts selection callback in SPL, and to fdtfile environment variable default value selection in payload. Signed-off-by: E Shattow Reviewed-by: Hal Feng --- board/starfive/visionfive2/spl.c | 8 ++++++++ board/starfive/visionfive2/starfive_visionfive2.c | 6 ++++++ 2 files changed, 14 insertions(+) diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index 48b034af305..2d9431d2976 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -123,6 +123,14 @@ int board_fit_config_name_match(const char *name) } else if (!strcmp(name, "starfive/jh7110-milkv-mars") && !strncmp(get_product_id_from_eeprom(), "MARS", 4)) { return 0; + } else if (!strcmp(name, "starfive/jh7110-milkv-marscm-emmc") && + !strncmp(get_product_id_from_eeprom(), "MARC", 4) && + get_mmc_size_from_eeprom()) { + return 0; + } else if (!strcmp(name, "starfive/jh7110-milkv-marscm-lite") && + !strncmp(get_product_id_from_eeprom(), "MARC", 4) && + !get_mmc_size_from_eeprom()) { + return 0; } else if (!strcmp(name, "starfive/jh7110-pine64-star64") && !strncmp(get_product_id_from_eeprom(), "STAR64", 6)) { return 0; diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c index 6271974b9c7..6c39fd4af35 100644 --- a/board/starfive/visionfive2/starfive_visionfive2.c +++ b/board/starfive/visionfive2/starfive_visionfive2.c @@ -57,6 +57,12 @@ static void set_fdtfile(void) fdtfile = "starfive/jh7110-deepcomputing-fml13v01.dtb"; } else if (!strncmp(get_product_id_from_eeprom(), "MARS", 4)) { fdtfile = "starfive/jh7110-milkv-mars.dtb"; + } else if (!strncmp(get_product_id_from_eeprom(), "MARC", 4)) { + if (get_mmc_size_from_eeprom()) { + fdtfile = "starfive/jh7110-milkv-marscm-emmc.dtb"; + } else { + fdtfile = "starfive/jh7110-milkv-marscm-lite.dtb"; + } } else if (!strncmp(get_product_id_from_eeprom(), "STAR64", 6)) { fdtfile = "starfive/jh7110-pine64-star64.dtb"; } else if (!strncmp(get_product_id_from_eeprom(), "VF7110A", 7)) { -- cgit v1.3.1 From b827e673916986ed052498d97166da9472ba35fc Mon Sep 17 00:00:00 2001 From: E Shattow Date: Tue, 21 Oct 2025 16:09:59 -0700 Subject: configs: starfive: Add Milk-V Mars CM and Mars CM Lite to visionfive2 Add Milk-V Mars CM and Mars CM Lite to visionfive2. These boards were previously supported and then removed in the transition to OF_UPSTREAM. The dts have landed in the for-next queue so let's add the boards again. Signed-off-by: E Shattow Reviewed-by: Hal Feng --- configs/starfive_visionfive2_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig index 34ebf3b605b..fa83ecfa10f 100644 --- a/configs/starfive_visionfive2_defconfig +++ b/configs/starfive_visionfive2_defconfig @@ -79,7 +79,7 @@ CONFIG_CMD_WGET=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_BOARD=y CONFIG_DEVICE_TREE_INCLUDES="starfive-visionfive2-u-boot.dtsi" -CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b" +CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-milkv-marscm-emmc starfive/jh7110-milkv-marscm-lite starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b" CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -- cgit v1.3.1 From e1c05c00696a12c02674c1cd977d7c64900c5c58 Mon Sep 17 00:00:00 2001 From: E Shattow Date: Tue, 21 Oct 2025 16:10:00 -0700 Subject: board: starfive: Add initial Milk-V Mars CM and Mars CM Lite user documentation Add initial board docs for Milk-V Mars CM (eMMC) and Milk-V Mars CM Lite (SD Card) to the visionfive2 board target. Signed-off-by: E Shattow --- doc/board/starfive/index.rst | 2 ++ doc/board/starfive/milkv_marscm_emmc.rst | 24 ++++++++++++++++++++++++ doc/board/starfive/milkv_marscm_lite.rst | 24 ++++++++++++++++++++++++ 3 files changed, 50 insertions(+) create mode 100644 doc/board/starfive/milkv_marscm_emmc.rst create mode 100644 doc/board/starfive/milkv_marscm_lite.rst diff --git a/doc/board/starfive/index.rst b/doc/board/starfive/index.rst index 66abc6f9d98..f85d7376b44 100644 --- a/doc/board/starfive/index.rst +++ b/doc/board/starfive/index.rst @@ -8,5 +8,7 @@ StarFive deepcomputing_fml13v01 milk-v_mars + milkv_marscm_emmc + milkv_marscm_lite pine64_star64 visionfive2 diff --git a/doc/board/starfive/milkv_marscm_emmc.rst b/doc/board/starfive/milkv_marscm_emmc.rst new file mode 100644 index 00000000000..6956d3701bd --- /dev/null +++ b/doc/board/starfive/milkv_marscm_emmc.rst @@ -0,0 +1,24 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Milk-V Mars CM (eMMC) +===================== + +U-Boot for the Mars CM uses the same U-Boot binaries as the VisionFive 2 board. +Devicetree selection is made in U-Boot SPL at runtime, dependent on the content +of EEPROM. + +Device-tree selection +--------------------- + +U-Boot will set variable $fdtfile to starfive/jh7110-milkv-marscm-emmc.dtb +dependent on the content of EEPROM. + +To overrule this selection the variable can be set manually and saved in the +environment + +:: + + env set fdtfile my_device-tree.dtb + env save + +.. include:: jh7110_common.rst diff --git a/doc/board/starfive/milkv_marscm_lite.rst b/doc/board/starfive/milkv_marscm_lite.rst new file mode 100644 index 00000000000..bea96dac399 --- /dev/null +++ b/doc/board/starfive/milkv_marscm_lite.rst @@ -0,0 +1,24 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Mars CM Lite (SD Card) +====================== + +U-Boot for the Mars CM Lite uses the same U-Boot binaries as the VisionFive 2 +board. Devicetree selection is made in U-Boot SPL at runtime, dependent on the +content of EEPROM. + +Device-tree selection +--------------------- + +U-Boot will set variable $fdtfile to starfive/jh7110-milkv-marscm-lite.dtb +dependent on the content of EEPROM. + +To overrule this selection the variable can be set manually and saved in the +environment + +:: + + env set fdtfile my_device-tree.dtb + env save + +.. include:: jh7110_common.rst -- cgit v1.3.1