From b65ea8534fc9d59e9742e76820d03f6783db3cf5 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Wed, 23 Jul 2025 17:32:45 +0100 Subject: clk: imx: Free pll on error path For an unknown pll type the error path neglects to free the memory just allocated. Add the free. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/clk/imx/clk-pll14xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 7ec78dc3a80..f9fcec18f9f 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -409,6 +409,7 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name, default: pr_err("%s: Unknown pll type for pll clk %s\n", __func__, name); + kfree(pll); return ERR_PTR(-EINVAL); }; -- cgit v1.3.1 From fa2c4149431db36b39e8ca2429d40b43111b4498 Mon Sep 17 00:00:00 2001 From: David Zang Date: Wed, 23 Jul 2025 19:25:17 -0500 Subject: imx8ulp_evk: Enable temperature command User can display temperature in the console runtime on i.MX8ULP board. Signed-off-by: David Zang --- configs/imx8ulp_evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index e750b3d9ae0..f52434923c2 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -57,6 +57,7 @@ CONFIG_CMD_READ=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_TEMPERATURE=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y -- cgit v1.3.1 From 66324e0cecaa99bf99dd39b5bca7f292b4225e0d Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Thu, 24 Jul 2025 15:46:49 +0100 Subject: cpu: imx8_cpu: Provide default temperatures Add setting default temperatures to the weak version of get_cpu_temp_grade so these values will not be used uninitialised. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/cpu/imx8_cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 4836bddd93b..950630453f9 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -201,6 +201,10 @@ static int cpu_imx_get_temp(struct cpu_imx_plat *plat) __weak u32 get_cpu_temp_grade(int *minc, int *maxc) { + if (minc && maxc) { + *minc = 0; + *maxc = 95; + } return 0; } -- cgit v1.3.1 From b1a89c5232f783400669235f148cc0f39accd333 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 28 Jul 2025 18:25:29 +0800 Subject: imx8m: clock: Correct imx8mm_fracpll_tbl The minimum frequency of Fref (Fin / p) is 6MHz for the PLL AC Electrical Characteristics. Setting p with 9 or 8 voilates the Spec. Update the settings to match Spec. Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index d5745f67262..77c8efc7899 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -55,16 +55,16 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), PLL_1443X_RATE(933000000U, 311, 4, 1, 0), - PLL_1443X_RATE(900000000U, 300, 8, 0, 0), - PLL_1443X_RATE(800000000U, 300, 9, 0, 0), - PLL_1443X_RATE(750000000U, 250, 8, 0, 0), + PLL_1443X_RATE(900000000U, 300, 2, 2, 0), + PLL_1443X_RATE(800000000U, 200, 3, 1, 0), + PLL_1443X_RATE(750000000U, 250, 2, 2, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0), PLL_1443X_RATE(600000000U, 300, 3, 2, 0), PLL_1443X_RATE(594000000U, 99, 1, 2, 0), - PLL_1443X_RATE(400000000U, 300, 9, 1, 0), - PLL_1443X_RATE(266000000U, 400, 9, 2, 0), + PLL_1443X_RATE(400000000U, 400, 3, 3, 0), + PLL_1443X_RATE(266000000U, 266, 3, 3, 0), PLL_1443X_RATE(167000000U, 334, 3, 4, 0), - PLL_1443X_RATE(100000000U, 300, 9, 3, 0), + PLL_1443X_RATE(100000000U, 200, 3, 4, 0), }; static int fracpll_configure(enum pll_clocks pll, u32 freq) -- cgit v1.3.1 From 5275b5612b55a0fac7df32b5eaf4c997c39419c4 Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Mon, 28 Jul 2025 17:42:21 +0100 Subject: imx: scu_api: Remove unnecessary NULL check In sc_seco_secvio_dgo_config there is a check for data being NULL but this occurs after data has already been dereferenced. All callers of the function provide a valid pointer for data so no need for the NULL check. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/misc/imx8/scu_api.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c index a40c8badf9a..8985ab6584d 100644 --- a/drivers/misc/imx8/scu_api.c +++ b/drivers/misc/imx8/scu_api.c @@ -1282,8 +1282,7 @@ int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data) printf("%s, id:0x%x, access:%x, res:%d\n", __func__, id, access, RPC_R8(&msg)); - if (data) - *data = RPC_U32(&msg, 0U); + *data = RPC_U32(&msg, 0U); return ret; } -- cgit v1.3.1 From d011462eea859dde74431f1eb8b8d9cea8ebf005 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 29 Jul 2025 00:38:34 +0200 Subject: ARM: imx6: dh-imx6: Enable USB OTG ID pin pull up in SPL Enable SoC pull up for USB OTG ID pin in SPL. There is no dedicated pull up resistor on the SoM itself, and the pull up is mandatory for correct USB OTG ID pin detection. U-Boot proper already configures the USB OTG ID pin pull up via DT pinctrl node entry. Signed-off-by: Marek Vasut Tested-by: Christoph Niedermaier --- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index a50763e1926..eb9bc93d973 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -49,6 +49,10 @@ (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) +#define OTG_PAD_CTRL \ + (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_SLOW | PAD_CTL_HYS) + static const struct mx6dq_iomux_ddr_regs dhcom6dq_ddr_ioregs = { .dram_sdclk_0 = 0x00020030, .dram_sdclk_1 = 0x00020030, @@ -509,7 +513,7 @@ int board_mmc_init(struct bd_info *bis) /* USB */ static iomux_v3_cfg_t const usb_pads[] = { - IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(OTG_PAD_CTRL)), IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; -- cgit v1.3.1 From 53158c8cf269f05c2d25769024cb0c363aac5e7a Mon Sep 17 00:00:00 2001 From: Andrew Goodbody Date: Tue, 5 Aug 2025 12:23:06 +0100 Subject: net: fec_mxc: Set error code on error exit In fecmxc_probe if a timeout is detected when resetting the chip no error code is set before taking the error exit. This could lead to a silent failure. Instead set an error code. This issue was found by Smatch. Signed-off-by: Andrew Goodbody --- drivers/net/fec_mxc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 54b08482b91..9ac72d25ef6 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1344,6 +1344,7 @@ static int fecmxc_probe(struct udevice *dev) while (readl(&priv->eth->ecntrl) & FEC_ECNTRL_RESET) { if (get_timer(start) > (CONFIG_SYS_HZ * 5)) { printf("FEC MXC: Timeout resetting chip\n"); + ret = -ETIMEDOUT; goto err_timeout; } udelay(10); -- cgit v1.3.1 From b57ed147939c9367a9c9fd93f37f34487a2fa090 Mon Sep 17 00:00:00 2001 From: Yannic Moog Date: Wed, 6 Aug 2025 14:45:19 +0200 Subject: dts: imx8m{m,n,p,q}: Make optee packaging optional binman can omit packaging an optional blob when it is missing. This allows us to not bother with config options. The core challenge is the interaction between tf-a and OP-TEE where U-Boot/binman does not know whether tf-a was built with SPD=opteed or without. This is important because tf-a might jump into the void when no optee_os is present, leading to boot failure. Thus by marking it optional, user is prompted to recheck (due to the warning message) whether they really have the right combination of tf-a and optee. Due to a bug in binman, we had to guard binman tee.bin with OPTEE config as builds would error when tee.bin was not present in path; Even though optee_os was marked as optional in the binman tree. Since the bug has been resolved in commit d4f61eae2ab7 ("Merge patch series "Fix handling of optional blobs in binman"") we can mark it optional again without getting build errors. Note that after this commit a warning will be printed when optee is not present for a binman build. Image 'image' is missing optional external blobs but is still functional: tee-os /binman/section/fit/images/tee/tee-os (tee.bin): See the documentation for your board. You may need to build Open Portable Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin Signed-off-by: Yannic Moog --- arch/arm/dts/imx8mm-u-boot.dtsi | 7 +------ arch/arm/dts/imx8mn-u-boot.dtsi | 7 +------ arch/arm/dts/imx8mp-u-boot.dtsi | 7 +------ arch/arm/dts/imx8mq-u-boot.dtsi | 7 +------ 4 files changed, 4 insertions(+), 24 deletions(-) diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi index 59453dc36d3..eb5b95a1fda 100644 --- a/arch/arm/dts/imx8mm-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-u-boot.dtsi @@ -164,7 +164,6 @@ }; #endif -#ifdef CONFIG_OPTEE tee: tee { description = "OP-TEE"; type = "tee"; @@ -176,9 +175,9 @@ tee-os { filename = "tee.bin"; + optional; }; }; -#endif binman_fip: fip { arch = "arm64"; @@ -208,11 +207,7 @@ fdt = "fdt-SEQ"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI -#ifdef CONFIG_OPTEE loadables = "atf", "tee"; -#else - loadables = "atf"; -#endif #endif }; }; diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi index 96a6df94c6c..4a4498b36b0 100644 --- a/arch/arm/dts/imx8mn-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -240,7 +240,6 @@ }; #endif -#ifdef CONFIG_OPTEE tee: tee { description = "OP-TEE"; type = "tee"; @@ -252,9 +251,9 @@ tee-os { filename = "tee.bin"; + optional; }; }; -#endif binman_fip: fip { arch = "arm64"; @@ -284,11 +283,7 @@ fdt = "fdt-SEQ"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI -#ifdef CONFIG_OPTEE loadables = "atf", "tee"; -#else - loadables = "atf"; -#endif #endif }; }; diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index 6de9ab5d37c..9ede98a11e4 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -185,7 +185,6 @@ }; #endif -#ifdef CONFIG_OPTEE tee: tee { description = "OP-TEE"; type = "tee"; @@ -197,9 +196,9 @@ tee-os { filename = "tee.bin"; + optional; }; }; -#endif @fdt-SEQ { description = "NAME"; @@ -220,11 +219,7 @@ fdt = "fdt-SEQ"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI -#ifdef CONFIG_OPTEE loadables = "atf", "tee"; -#else - loadables = "atf"; -#endif #endif }; }; diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi index 8a536b16e8f..93e2ef27f7c 100644 --- a/arch/arm/dts/imx8mq-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-u-boot.dtsi @@ -144,7 +144,6 @@ }; #endif -#ifdef CONFIG_OPTEE tee: tee { description = "OP-TEE"; type = "tee"; @@ -156,9 +155,9 @@ tee-os { filename = "tee.bin"; + optional; }; }; -#endif fdt { compression = "none"; @@ -180,11 +179,7 @@ fdt = "fdt"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI -#ifdef CONFIG_OPTEE loadables = "atf", "tee"; -#else - loadables = "atf"; -#endif #endif }; }; -- cgit v1.3.1 From 442e752854bfbcfa9b7ac49eeecce33fb134ed95 Mon Sep 17 00:00:00 2001 From: Primoz Fiser Date: Thu, 7 Aug 2025 15:13:53 +0200 Subject: imx9: soc: Reuse and export low_drive_freq_update() Reuse and export low_drive_freq_update() function. This way global imx9 board_fix_fdt() doesn't duplicate code. While low_drive_freq_update() can be reused on boards such as phyCORE-i.MX93 (TARGET_PHYCORE_IMX93) which is not using the global imx9 board_fix_fdt() implementation. While at it, make printout logic less verbose by only outputting on the error condition and not on each successful clock fixup. Also drop now invalid comment (low_drive_freq_update() now does fixup for internal and kernel device-tree). Signed-off-by: Primoz Fiser --- arch/arm/include/asm/arch-imx9/sys_proto.h | 1 + arch/arm/mach-imx/imx9/soc.c | 29 ++++++----------------------- 2 files changed, 7 insertions(+), 23 deletions(-) diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h b/arch/arm/include/asm/arch-imx9/sys_proto.h index df2148a53c7..455aa95339e 100644 --- a/arch/arm/include/asm/arch-imx9/sys_proto.h +++ b/arch/arm/include/asm/arch-imx9/sys_proto.h @@ -18,6 +18,7 @@ enum imx9_soc_voltage_mode { void soc_power_init(void); bool m33_is_rom_kicked(void); int m33_prepare(void); +int low_drive_freq_update(void *blob); enum imx9_soc_voltage_mode soc_target_voltage_mode(void); diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index 02db7cc97ba..9fb82644f12 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -641,12 +641,10 @@ static int low_drive_fdt_fix_clock(void *fdt, int node_off, u32 clk_index, u32 n return -ENOENT; } -static int low_drive_freq_update(void *blob) +int low_drive_freq_update(void *blob) { - int nodeoff, ret; - int i; + int nodeoff, ret, i; - /* Update kernel dtb clocks for low drive mode */ struct low_drive_freq_entry table[] = { {"/soc@0/bus@42800000/mmc@42850000", 0, 266666667}, {"/soc@0/bus@42800000/mmc@42860000", 0, 266666667}, @@ -658,8 +656,8 @@ static int low_drive_freq_update(void *blob) if (nodeoff >= 0) { ret = low_drive_fdt_fix_clock(blob, nodeoff, table[i].clk, table[i].new_rate); - if (!ret) - printf("%s freq updated\n", table[i].node_path); + if (ret) + printf("freq update failed for %s\n", table[i].node_path); } } @@ -671,23 +669,8 @@ static int low_drive_freq_update(void *blob) int board_fix_fdt(void *fdt) { /* Update dtb clocks for low drive mode */ - if (is_voltage_mode(VOLT_LOW_DRIVE)) { - int nodeoff; - int i; - - struct low_drive_freq_entry table[] = { - {"/soc@0/bus@42800000/mmc@42850000", 0, 266666667}, - {"/soc@0/bus@42800000/mmc@42860000", 0, 266666667}, - {"/soc@0/bus@42800000/mmc@428b0000", 0, 266666667}, - }; - - for (i = 0; i < ARRAY_SIZE(table); i++) { - nodeoff = fdt_path_offset(fdt, table[i].node_path); - if (nodeoff >= 0) - low_drive_fdt_fix_clock(fdt, nodeoff, table[i].clk, - table[i].new_rate); - } - } + if (is_voltage_mode(VOLT_LOW_DRIVE)) + low_drive_freq_update(fdt); return 0; } -- cgit v1.3.1 From b6e2cfca1a6fd10c8f12016a40d690d2ec61796c Mon Sep 17 00:00:00 2001 From: Primoz Fiser Date: Thu, 7 Aug 2025 15:13:54 +0200 Subject: board: phytec: phycore-imx93: Add VOLT_LOW_DRIVE frequency fixup For phyCORE-i.MX93 SoMs with i.MX93 parts running in VOLT_LOW_DRIVE mode (SoCs with speed grade fuse set to 900 MHz) reduce usdhc clocks from 400 MHz to 266 MHz. Do this in board code since global imx9 board_fix_fdt() is not used in case of phycore-imx93 board since commit d3b9b7996889 ("board: phytec: imx93: Add eeprom-based hardware introspection"). While at it, add a note to ft_board_setup() function to inform that fixup for Linux device-tree is taken care by ft_system_setup() in imx9 global arch/arm/mach-imx/imx9/soc.c implementation. Signed-off-by: Primoz Fiser --- board/phytec/phycore_imx93/phycore-imx93.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/board/phytec/phycore_imx93/phycore-imx93.c b/board/phytec/phycore_imx93/phycore-imx93.c index 8d2caf8bbef..fab66caf2a1 100644 --- a/board/phytec/phycore_imx93/phycore-imx93.c +++ b/board/phytec/phycore_imx93/phycore-imx93.c @@ -79,6 +79,10 @@ int board_fix_fdt(void *blob) emmc_fixup(blob, &data); + /* Update dtb clocks for low drive mode */ + if (is_voltage_mode(VOLT_LOW_DRIVE)) + low_drive_freq_update(blob); + return 0; } @@ -86,5 +90,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) { emmc_fixup(blob, NULL); + /** + * NOTE: VOLT_LOW_DRIVE fixup is done by the ft_system_setup() + * in arch/arm/mach-imx/imx9/soc.c for Linux device-tree. + */ + return 0; } -- cgit v1.3.1