From fcddf2fc7ef6a68fc97d1dce9e137692dc129d2e Mon Sep 17 00:00:00 2001 From: Martin Schwan Date: Thu, 2 Oct 2025 13:20:37 +0200 Subject: board: phytec: phycore_imx8mp: Add rauc to bootmeths Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled. This is setting a proper default for RAUC enabled systems. Signed-off-by: Martin Schwan --- board/phytec/phycore_imx8mp/phycore_imx8mp.env | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env b/board/phytec/phycore_imx8mp/phycore_imx8mp.env index 9a129a0a4bf..70044997adb 100644 --- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env @@ -3,7 +3,11 @@ bootcmd= fastboot 0; fi; bootflow scan -lb; +#ifdef CONFIG_BOOTMETH_RAUC +bootmeths=rauc script efi +#else bootmeths=script efi +#endif boot_targets=mmc2 mmc1 usb ethernet bootenv_addr_r=0x49100000 boot_script_dhcp=boot.scr.uimg -- cgit v1.2.3 From 4d5a28e4f9befe437f5962fbc3100057d88fc4f0 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:15:58 +0200 Subject: imx: kontron-sl-mx8mm: Increase CONFIG_SPL_MAX_SIZE The limit of 0x27000 (156 KiB) was valid at times the DDR firmware required a fixed amount of 96 KiB of space. Now that we use binman to include the DDR firmware it only needs around 57 KiB of space and there is more room for the SPL. Increase the max SPL size to 196 KiB so there is still 60 KiB for DDR firmware. This allows us to enable USB and SDP support in SPL. Signed-off-by: Frieder Schrempf --- configs/kontron-sl-mx8mm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 4f08f2c572c..92583317a07 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_PBSIZE=276 CONFIG_BOARD_TYPES=y # CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x31000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_HAVE_INIT_STACK=y -- cgit v1.2.3 From c1cd4f3806b8873ce96c46572e7aaacd419307f4 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:15:59 +0200 Subject: imx: kontron-sl-mx8mm: Enable SDP support for loading via USB Enable everything that is required to load via USB. The SPL needs SDP support so it can load the U-Boot proper image via USB after it has been loaded via serial loader mode of the i.MX. This way we can use the uuu tool for loading SPL and U-Boot proper like this: uuu -brun flash.bin Signed-off-by: Frieder Schrempf --- arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi | 16 ++++++++++++++++ configs/kontron-sl-mx8mm_defconfig | 10 ++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi index ae542fdcffa..acb26cd5af6 100644 --- a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi @@ -18,6 +18,10 @@ }; }; +&aips4 { + bootph-pre-ram; +}; + &i2c1 { bootph-pre-ram; bootph-all; @@ -108,6 +112,18 @@ bootph-all; }; +&usbmisc1 { + bootph-pre-ram; +}; + +&usbphynop1 { + bootph-pre-ram; +}; + +&usbotg1 { + bootph-pre-ram; +}; + &usdhc1 { bootph-pre-ram; }; diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 92583317a07..7b6ab1e217f 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -69,6 +69,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y @@ -117,6 +119,8 @@ CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_SPL_PHY=y +CONFIG_SPL_NOP_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y @@ -141,13 +145,19 @@ CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_USB=y +CONFIG_SPL_USB_HOST=y CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_STORAGE is not set CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_SPL_USB_SDP_SUPPORT=y # CONFIG_WATCHDOG_AUTOSTART is not set CONFIG_IMX_WATCHDOG=y # CONFIG_HEXDUMP is not set -- cgit v1.2.3 From a9b865dd468944e01d88137ebbba7c855645eb18 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:00 +0200 Subject: imx: kontron-sl-mx8mm: Remove deprecation warning for old modules The module version this warning is referring to never really existed except for in-house development and there is a conflict with the I2C address used for detecting it and the I2C EEPROM of the latest OSM-S module. Remove the check. Signed-off-by: Frieder Schrempf --- board/kontron/sl-mx8mm/spl.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index 54ee1e66a7a..e3b029752b8 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -129,17 +129,6 @@ int do_board_detect(void) (unsigned int)gd->ram_size); } - /* - * Check the I2C PMIC to detect the deprecated SoM with DA9063. - */ - imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads)); - - if (i2c_get_chip_for_busnum(0, 0x58, 0, &udev) == 0) { - printf("### ATTENTION: DEPRECATED SOM REVISION (N8010 Rev0) DETECTED! ###\n"); - printf("### THIS HW IS NOT SUPPORTED AND BOOTING WILL PROBABLY FAIL ###\n"); - printf("### PLEASE UPGRADE TO LATEST MODULE ###\n"); - } - return 0; } -- cgit v1.2.3 From 0d0c00ace4046024d727341232d012e780fa8da5 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:01 +0200 Subject: imx: kontron-sl-mx8mm: Enable fixed regulators Enable support for using fixed regulators from the devicetree and auto enable them if requested. This way U-Boot will enable the CARRIER_PWR_EN signal of the OSM module automatically while initializing the board. Signed-off-by: Frieder Schrempf --- configs/kontron-sl-mx8mm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 7b6ab1e217f..71dde10ee4f 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -131,6 +131,7 @@ CONFIG_DM_PMIC_PCA9450=y CONFIG_SPL_DM_PMIC_PCA9450=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PCA9450=y +CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_RTC=y CONFIG_RTC_RV3028=y CONFIG_RTC_RV8803=y -- cgit v1.2.3 From 6679a9404084f03afa790c310174969ac50d6306 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:02 +0200 Subject: imx: kontron-sl-mx8mm: Add support for EEPROM on OSM-S module Enable config options to access the EEPROM on the OSM-S i.MX8MM SoM module. Signed-off-by: Frieder Schrempf --- configs/kontron-sl-mx8mm_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 71dde10ee4f..f11e58a8433 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -60,6 +60,11 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x58000 CONFIG_SPL_WATCHDOG=y CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_SYS_EEPROM_SIZE=8192 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=6 # CONFIG_CMD_LZMADEC is not set CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y @@ -100,6 +105,9 @@ CONFIG_CLK_IMX8MM=y CONFIG_DFU_SF=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y +CONFIG_I2C_EEPROM=y +CONFIG_SPL_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y -- cgit v1.2.3 From 83a18f82417137a8cd40dd3718ad21ecfdc03aa3 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:03 +0200 Subject: imx: kontron-sl-mx8mm: Use eMMC boot part for environment if booting from eMMC Depending on the MMC boot device, select the proper location for the environment. * SD card and eMMC main partition: use offsets from CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND. * eMMC boot partition: use offset -2*ENV_SIZE and -ENV_SIZE from the end of the partition. Signed-off-by: Frieder Schrempf --- board/kontron/sl-mx8mm/sl-mx8mm.c | 45 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index 2e387038395..405ac0fb03f 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -142,7 +142,8 @@ enum env_location env_get_location(enum env_operation op, int prio) * the MMC if we are running from SD card or eMMC. */ if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC) && - (boot_dev == SD1_BOOT || boot_dev == SD2_BOOT)) + (boot_dev == SD1_BOOT || boot_dev == SD2_BOOT || + boot_dev == MMC1_BOOT || boot_dev == MMC2_BOOT)) return ENVL_MMC; if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) @@ -156,4 +157,46 @@ int board_mmc_get_env_dev(int devno) { return devno; } + +uint mmc_get_env_part(struct mmc *mmc) +{ + if (IS_SD(mmc)) + return EMMC_HWPART_DEFAULT; + + switch (EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) { + case EMMC_BOOT_PART_BOOT1: + return EMMC_HWPART_BOOT1; + case EMMC_BOOT_PART_BOOT2: + return EMMC_HWPART_BOOT2; + default: + return EMMC_HWPART_DEFAULT; + } +} + +int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr) +{ + /* use normal offset for SD card */ + if (IS_SD(mmc)) { + *env_addr = CONFIG_ENV_OFFSET; + if (copy) + *env_addr = CONFIG_ENV_OFFSET_REDUND; + + return 0; + } + + switch (EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) { + case EMMC_BOOT_PART_BOOT1: + case EMMC_BOOT_PART_BOOT2: + *env_addr = mmc->capacity - CONFIG_ENV_SIZE - CONFIG_ENV_SIZE; + if (copy) + *env_addr = mmc->capacity - CONFIG_ENV_SIZE; + break; + default: + *env_addr = CONFIG_ENV_OFFSET; + if (copy) + *env_addr = CONFIG_ENV_OFFSET_REDUND; + } + + return 0; +} #endif -- cgit v1.2.3 From d31ca9e2598f0bafb7b8e83e7de1e19d51768bf3 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:04 +0200 Subject: imx: kontron-sl-mx8mm: Export current env config to devicetree This allows userspace tools like libubootenv to determine the location of the currently used environment and select a matching config. Signed-off-by: Frieder Schrempf --- board/kontron/sl-mx8mm/sl-mx8mm.c | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index 405ac0fb03f..cb0b3acdd62 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -108,12 +109,43 @@ int fdt_set_usb_eth_addr(void *blob) int ft_board_setup(void *blob, struct bd_info *bd) { - int ret = fdt_set_usb_eth_addr(blob); + enum env_location env_loc; + enum boot_device boot_dev; + char env_str_sd[] = "sd-card"; + char env_str_nor[] = "spi-nor"; + char env_str_emmc[] = "emmc"; + char *env_config_str; + int ret; + + ret = fdt_set_usb_eth_addr(blob); + if (ret) + return ret; + ret = fdt_fixup_memory(blob, PHYS_SDRAM, gd->ram_size); if (ret) return ret; - return fdt_fixup_memory(blob, PHYS_SDRAM, gd->ram_size); + env_loc = env_get_location(0, 0); + if (env_loc == ENVL_MMC) { + boot_dev = get_boot_device(); + if (boot_dev == SD2_BOOT) + env_config_str = env_str_sd; + else if (boot_dev == MMC1_BOOT) + env_config_str = env_str_emmc; + else + return 0; + } else if (env_loc == ENVL_SPI_FLASH) { + env_config_str = env_str_nor; + } else { + return 0; + } + + /* + * Export a string to the devicetree that tells userspace tools like + * libubootenv where the environment is currently coming from. + */ + return fdt_find_and_setprop(blob, "/chosen", "u-boot,env-config", + env_config_str, strlen(env_config_str) + 1, 1); } int board_late_init(void) -- cgit v1.2.3 From 194c747442ac2d80176e2c488446ec70d79c3e83 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:05 +0200 Subject: imx: kontron-sl-mx8mm: Enable multiple useful commands, drivers and features Enable a bunch of useful features such as: * Linux devicetree fixups * devicetree overlay support * secure boot dependencies * commands (filesystems, disks, etc.) * fastboot support * USB storage/ethernet Signed-off-by: Frieder Schrempf --- configs/kontron-sl-mx8mm_defconfig | 47 ++++++++++++++++++++++++++++++++++---- 1 file changed, 43 insertions(+), 4 deletions(-) diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index f11e58a8433..1d0a6a83052 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="imx8mm-kontron-bl" CONFIG_TARGET_KONTRON_MX8MM=y +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -38,8 +39,9 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_CBSIZE=2048 -CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_TYPES=y # CONFIG_BOARD_INIT is not set CONFIG_BOARD_LATE_INIT=y @@ -60,30 +62,52 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x58000 CONFIG_SPL_WATCHDOG=y CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_SIZE=8192 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=6 +CONFIG_CMD_MD5SUM=y +CONFIG_MD5SUM_VERIFY=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_SHA1SUM=y +CONFIG_SHA1SUM_VERIFY=y # CONFIG_CMD_LZMADEC is not set CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_I2C=y +CONFIG_CMD_LSBLK=y +CONFIG_CMD_MBR=y CONFIG_CMD_MMC=y +CONFIG_CMD_BKOPS_ENABLE=y +CONFIG_MMC_SPEED_MODE_SET=y CONFIG_CMD_MTD=y +CONFIG_CMD_READ=y +CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_WDT=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y +CONFIG_CMD_GETTIME=y +CONFIG_CMD_UUID=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_SMC=y +CONFIG_HASH_VERIFY=y +CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FS_UUID=y +CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="imx8mm-kontron-bl imx8mm-kontron-bl-osm-s" @@ -93,9 +117,13 @@ CONFIG_ENV_REDUNDANT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_USE_HOSTNAME=y CONFIG_HOSTNAME="kontron-mx8mm" +CONFIG_VERSION_VARIABLE=y +CONFIG_TFTP_TSIZE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_SPL_CLK_COMPOSITE_CCF=y @@ -103,6 +131,14 @@ CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y CONFIG_DFU_SF=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y +CONFIG_FASTBOOT_MMC_USER_SUPPORT=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_EEPROM=y @@ -122,6 +158,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MSCC=y +CONFIG_PHY_ETHERNET_ID=y CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y @@ -157,7 +194,9 @@ CONFIG_USB=y CONFIG_SPL_USB_HOST=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y -# CONFIG_USB_STORAGE is not set +CONFIG_USB_ONBOARD_HUB=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y CONFIG_SPL_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" @@ -165,8 +204,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x40400000 -CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_SPL_USB_SDP_SUPPORT=y # CONFIG_WATCHDOG_AUTOSTART is not set CONFIG_IMX_WATCHDOG=y -# CONFIG_HEXDUMP is not set -- cgit v1.2.3 From 16ead099eb38697a3f9d65ebbec7ce0a8a280e34 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:06 +0200 Subject: imx: kontron-sl-mx8mm: Enable standard boot and disable legacy distro boot The bootstd framework is the new way to support various bootflows and media. Use it instead of legacy distro boot. Signed-off-by: Frieder Schrempf --- configs/kontron-sl-mx8mm_defconfig | 3 ++- include/configs/kontron-sl-mx8mm.h | 12 ------------ 2 files changed, 2 insertions(+), 13 deletions(-) diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 1d0a6a83052..11ce881bc19 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -37,7 +37,7 @@ CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTSTD_FULL=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_CBSIZE=2048 @@ -99,6 +99,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y CONFIG_CMD_GETTIME=y +CONFIG_CMD_SYSBOOT=y CONFIG_CMD_UUID=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 72a28a6a413..318c39d673a 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -29,21 +29,9 @@ EFI_GUID(0xd488e45a, 0x4929, 0x4b55, 0x8c, 0x14, \ 0x86, 0xce, 0xa2, 0xcd, 0x66, 0x29) -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(PXE, pxe, na) -#include -/* Do not try to probe USB net adapters for net boot */ -#undef BOOTENV_RUN_NET_USB_START -#define BOOTENV_RUN_NET_USB_START - #ifdef CONFIG_XPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x930000 #endif -#define CFG_EXTRA_ENV_SETTINGS BOOTENV - #endif /* __KONTRON_MX8MM_CONFIG_H */ -- cgit v1.2.3 From de704144fff9fad946e7aa62d526ee601b371c3b Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:07 +0200 Subject: imx: kontron-sl-mx8mm: Enable USB hub on BL i.MX8MM OSM-S board Probe the USB hub on the BL i.MX8MM OSM-S board. Signed-off-by: Frieder Schrempf --- arch/arm/dts/imx8mm-kontron-bl-osm-s.dts | 1 + board/kontron/sl-mx8mm/sl-mx8mm.c | 8 ++++++++ configs/kontron-sl-mx8mm_defconfig | 1 + 3 files changed, 10 insertions(+) diff --git a/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts b/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts index 8b16bd68576..fae00fd9632 100644 --- a/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts +++ b/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts @@ -198,6 +198,7 @@ usb1@1 { compatible = "usb424,9514"; reg = <1>; + vdd-supply = <®_vdd_3v3>; #address-cells = <1>; #size-cells = <0>; diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index cb0b3acdd62..cf71a4cf367 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -150,10 +151,17 @@ int ft_board_setup(void *blob, struct bd_info *bd) int board_late_init(void) { + struct udevice *dev; + int ret; + if (!fdt_node_check_compatible(gd->fdt_blob, 0, "kontron,imx8mm-n802x-som") || !fdt_node_check_compatible(gd->fdt_blob, 0, "kontron,imx8mm-osm-s")) { env_set("som_type", "osm-s"); env_set("touch_rst_gpio", "111"); + + ret = uclass_get_device_by_name(UCLASS_MISC, "usb-hub@2c", &dev); + if (ret) + printf("Error bringing up USB hub (%d)\n", ret); } else { env_set("som_type", "sl"); env_set("touch_rst_gpio", "87"); diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 11ce881bc19..a2cc4d03963 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -142,6 +142,7 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y +CONFIG_USB_HUB_USB251XB=y CONFIG_I2C_EEPROM=y CONFIG_SPL_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 -- cgit v1.2.3 From c5ab46695cd7d1c9687b86e3b3eeccaba03b7af5 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:08 +0200 Subject: imx: kontron-sl-mx8mm: Autostart fastboot if booted from USB This is useful for development and manufacturing setups as fastboot can be used without requiring any user input on the device. Signed-off-by: Frieder Schrempf --- board/kontron/sl-mx8mm/sl-mx8mm.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index cf71a4cf367..220c9701ca5 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -167,6 +167,11 @@ int board_late_init(void) env_set("touch_rst_gpio", "87"); } + if (is_usb_boot()) { + env_set("bootcmd", "fastboot 0"); + env_set("bootdelay", "0"); + } + return 0; } -- cgit v1.2.3 From 228f7f2e26be36b7314217bac683e06538b0c087 Mon Sep 17 00:00:00 2001 From: Eberhard Stoll Date: Tue, 7 Oct 2025 10:16:09 +0200 Subject: imx: kontron-sl-mx8mm: Force default environment for serial loader boot Enable CONFIG_ENV_IS_NOWHERE and force default environment when SoC boots from serial loader. In this case the U-Boot environment cannot be stored to flash with the 'saveenv' command. This makes serial loader boot completely independent from any environment stored in flash. Signed-off-by: Eberhard Stoll Signed-off-by: Frieder Schrempf --- board/kontron/sl-mx8mm/sl-mx8mm.c | 8 +++++++- configs/kontron-sl-mx8mm_defconfig | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index 220c9701ca5..df92765cb2d 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -182,6 +182,9 @@ enum env_location env_get_location(enum env_operation op, int prio) if (prio) return ENVL_UNKNOWN; + if (CONFIG_IS_ENABLED(ENV_IS_NOWHERE) && is_usb_boot()) + return ENVL_NOWHERE; + /* * Make sure that the environment is loaded from * the MMC if we are running from SD card or eMMC. @@ -194,7 +197,10 @@ enum env_location env_get_location(enum env_operation op, int prio) if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) return ENVL_SPI_FLASH; - return ENVL_NOWHERE; + if (CONFIG_IS_ENABLED(ENV_IS_NOWHERE)) + return ENVL_NOWHERE; + + return ENVL_UNKNOWN; } #if defined(CONFIG_ENV_IS_IN_MMC) diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index a2cc4d03963..f9484b908d9 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -112,6 +112,7 @@ CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="imx8mm-kontron-bl imx8mm-kontron-bl-osm-s" +CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_REDUNDANT=y -- cgit v1.2.3 From 7f9362ef7fb80071d6c7f6f1926bce221ca34f32 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 7 Oct 2025 10:16:10 +0200 Subject: imx: kontron-sl-mx8mm: Convert to OF_UPSTREAM Switch to OF_UPSTREAM to make use of the upstream devicetree. Signed-off-by: Frieder Schrempf --- arch/arm/dts/Makefile | 2 - arch/arm/dts/imx8mm-kontron-bl-osm-s.dts | 377 ------------------------------- arch/arm/dts/imx8mm-kontron-bl.dts | 355 ----------------------------- arch/arm/dts/imx8mm-kontron-osm-s.dtsi | 335 --------------------------- arch/arm/dts/imx8mm-kontron-sl.dtsi | 314 ------------------------- configs/kontron-sl-mx8mm_defconfig | 5 +- 6 files changed, 3 insertions(+), 1385 deletions(-) delete mode 100644 arch/arm/dts/imx8mm-kontron-bl-osm-s.dts delete mode 100644 arch/arm/dts/imx8mm-kontron-bl.dts delete mode 100644 arch/arm/dts/imx8mm-kontron-osm-s.dtsi delete mode 100644 arch/arm/dts/imx8mm-kontron-sl.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b69eb7cbb94..f63af7c84c1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -891,8 +891,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ imx8mm-data-modul-edm-sbc.dtb \ imx8mm-icore-mx8mm-ctouch2.dtb \ imx8mm-icore-mx8mm-edimm2.2.dtb \ - imx8mm-kontron-bl.dtb \ - imx8mm-kontron-bl-osm-s.dtb \ imx8mm-mx8menlo.dtb \ imx8mm-phg.dtb \ imx8mq-cm.dtb \ diff --git a/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts b/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts deleted file mode 100644 index fae00fd9632..00000000000 --- a/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts +++ /dev/null @@ -1,377 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright (C) 2022 Kontron Electronics GmbH - */ - -/dts-v1/; - -#include "imx8mm-kontron-osm-s.dtsi" - -/ { - model = "Kontron BL i.MX8MM OSM-S (N802X S)"; - compatible = "kontron,imx8mm-bl-osm-s", "kontron,imx8mm-osm-s", "fsl,imx8mm"; - - aliases { - ethernet1 = &usbnet; - }; - - /* fixed crystal dedicated to mcp2542fd */ - osc_can: clock-osc-can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <40000000>; - clock-output-names = "osc-can"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_led>; - - led1 { - label = "led1"; - gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - - led2 { - label = "led2"; - gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; - }; - - led3 { - label = "led3"; - gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; - }; - }; - - pwm-beeper { - compatible = "pwm-beeper"; - pwms = <&pwm2 0 5000 0>; - }; - - reg_rst_eth2: regulator-rst-eth2 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb_eth2>; - gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - regulator-name = "rst-usb-eth2"; - }; - - reg_usb1_vbus: regulator-usb1-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usb1_vbus>; - gpio = <&gpio3 25 GPIO_ACTIVE_LOW>; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "usb1-vbus"; - }; - - reg_vdd_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vdd-5v"; - }; -}; - -&ecspi2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi2>; - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; - status = "okay"; - - can@0 { - compatible = "microchip,mcp251xfd"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can>; - clocks = <&osc_can>; - interrupts-extended = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>; - /* - * Limit the SPI clock to 15 MHz to prevent issues - * with corrupted data due to chip errata. - */ - spi-max-frequency = <15000000>; - vdd-supply = <®_vdd_3v3>; - xceiver-supply = <®_vdd_5v>; - }; -}; - -&ecspi3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi3>; - cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; - status = "okay"; - - eeram@0 { - compatible = "microchip,48l640"; - reg = <0>; - spi-max-frequency = <20000000>; - }; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-connection-type = "rgmii-rxid"; - phy-handle = <ðphy>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy: ethernet-phy@0 { - reg = <0>; - reset-assert-us = <1>; - reset-deassert-us = <15000>; - reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gpio1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio1>; - gpio-line-names = "", "", "", "dio1-out", "", "", "dio1-in", "dio2-out", - "dio2-in", "dio3-out", "dio3-in", "dio4-out", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", ""; -}; - -&gpio5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio5>; - gpio-line-names = "", "", "dio4-in", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", ""; -}; - -&i2c4 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - status = "okay"; -}; - -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm2>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - uart-has-rtscts; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - linux,rs485-enabled-at-boot-time; - uart-has-rtscts; - status = "okay"; -}; - -&usbotg1 { - dr_mode = "otg"; - disable-over-current; - vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "host"; - disable-over-current; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - usb1@1 { - compatible = "usb424,9514"; - reg = <1>; - vdd-supply = <®_vdd_3v3>; - #address-cells = <1>; - #size-cells = <0>; - - usbnet: ethernet@1 { - compatible = "usb424,ec00"; - reg = <1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - }; -}; - -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>; - vmmc-supply = <®_vdd_3v3>; - vqmmc-supply = <®_nvcc_sd>; - cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&iomuxc { - pinctrl_can: cangrp { - fsl,pins = < - MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 - >; - }; - - pinctrl_ecspi2: ecspi2grp { - fsl,pins = < - MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 - MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 - MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 - MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19 - >; - }; - - pinctrl_ecspi3: ecspi3grp { - fsl,pins = < - MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82 - MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82 - MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82 - MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19 - >; - }; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 - MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 - MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f - MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f - MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f - MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f - MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 - MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 - MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 - MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 - MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f - MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 - MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 - MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f - MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x19 /* PHY RST */ - MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* ETH IRQ */ - >; - }; - - pinctrl_gpio_led: gpioledgrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 - MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19 - MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x19 - >; - }; - - pinctrl_gpio1: gpio1grp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19 - MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 - MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 - MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 - MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 - MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 - MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 - >; - }; - - pinctrl_gpio5: gpio5grp { - fsl,pins = < - MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 - >; - }; - - pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 - MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 - >; - }; - - pinctrl_pwm2: pwm2grp { - fsl,pins = < - MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19 - >; - }; - - pinctrl_reg_usb1_vbus: regusb1vbusgrp { - fsl,pins = < - MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 - MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 - >; - }; - - pinctrl_usb_eth2: usbeth2grp { - fsl,pins = < - MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 - >; - }; - - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 - >; - }; -}; diff --git a/arch/arm/dts/imx8mm-kontron-bl.dts b/arch/arm/dts/imx8mm-kontron-bl.dts deleted file mode 100644 index dcec57c2039..00000000000 --- a/arch/arm/dts/imx8mm-kontron-bl.dts +++ /dev/null @@ -1,355 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright (C) 2019 Kontron Electronics GmbH - */ - -/dts-v1/; - -#include "imx8mm-kontron-sl.dtsi" - -/ { - model = "Kontron BL i.MX8MM (N801X S)"; - compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm"; - - aliases { - ethernet1 = &usbnet; - rtc0 = &rx8900; - rtc1 = &snvs_rtc; - }; - - /* fixed crystal dedicated to mcp2515 */ - osc_can: clock-osc-can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <16000000>; - clock-output-names = "osc-can"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_led>; - - led1 { - label = "led1"; - gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - - led2 { - label = "led2"; - gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; - }; - - led3 { - label = "led3"; - gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; - }; - - led4 { - label = "led4"; - gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; - }; - - led5 { - label = "led5"; - gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; - }; - - led6 { - label = "led6"; - gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; - }; - }; - - pwm-beeper { - compatible = "pwm-beeper"; - pwms = <&pwm2 0 5000 0>; - }; - - reg_rst_eth2: regulator-rst-eth2 { - compatible = "regulator-fixed"; - regulator-name = "rst-usb-eth2"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb_eth2>; - gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - }; - - reg_vdd_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd-5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -}; - -&ecspi2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi2>; - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; - status = "okay"; - - can0: can@0 { - compatible = "microchip,mcp2515"; - reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_can>; - clocks = <&osc_can>; - interrupt-parent = <&gpio4>; - interrupts = <28 IRQ_TYPE_EDGE_FALLING>; - spi-max-frequency = <10000000>; - vdd-supply = <®_vdd_3v3>; - xceiver-supply = <®_vdd_5v>; - }; -}; - -&ecspi3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi3>; - cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-connection-type = "rgmii-rxid"; - phy-handle = <ðphy>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy: ethernet-phy@0 { - reg = <0>; - reset-assert-us = <1>; - reset-deassert-us = <15000>; - reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&i2c4 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - status = "okay"; - - rx8900: rtc@32 { - compatible = "epson,rx8900"; - reg = <0x32>; - }; -}; - -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm2>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - uart-has-rtscts; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - linux,rs485-enabled-at-boot-time; - uart-has-rtscts; - status = "okay"; -}; - -&usbotg1 { - dr_mode = "otg"; - over-current-active-low; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "host"; - disable-over-current; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - usb1@1 { - compatible = "usb424,9514"; - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - usbnet: ethernet@1 { - compatible = "usb424,ec00"; - reg = <1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - }; -}; - -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>; - vmmc-supply = <®_vdd_3v3>; - vqmmc-supply = <®_nvcc_sd>; - cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio>; - - pinctrl_can: cangrp { - fsl,pins = < - MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 - >; - }; - - pinctrl_ecspi2: ecspi2grp { - fsl,pins = < - MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 - MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 - MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 - MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19 - >; - }; - - pinctrl_ecspi3: ecspi3grp { - fsl,pins = < - MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82 - MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82 - MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82 - MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19 - >; - }; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 - MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 - MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f - MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f - MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f - MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f - MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 - MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 - MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 - MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 - MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f - MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 - MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 - MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f - MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 /* PHY RST */ - MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* ETH IRQ */ - >; - }; - - pinctrl_gpio_led: gpioledgrp { - fsl,pins = < - MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 - MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 - MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19 - MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19 - MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19 - MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19 - MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19 - >; - }; - - pinctrl_gpio: gpiogrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19 - MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 - MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 - MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 - MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 - MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 - MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 - MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 - >; - }; - - pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 - MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 - >; - }; - - pinctrl_pwm2: pwm2grp { - fsl,pins = < - MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 - MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 - >; - }; - - pinctrl_usb_eth2: usbeth2grp { - fsl,pins = < - MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 - >; - }; - - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 - >; - }; -}; diff --git a/arch/arm/dts/imx8mm-kontron-osm-s.dtsi b/arch/arm/dts/imx8mm-kontron-osm-s.dtsi deleted file mode 100644 index 695da2fa7c4..00000000000 --- a/arch/arm/dts/imx8mm-kontron-osm-s.dtsi +++ /dev/null @@ -1,335 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright (C) 2022 Kontron Electronics GmbH - */ - -#include -#include "imx8mm.dtsi" - -/ { - model = "Kontron OSM-S i.MX8MM (N802X SOM)"; - compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm"; - - aliases { - rtc0 = &rv3028; - rtc1 = &snvs_rtc; - }; - - memory@40000000 { - device_type = "memory"; - /* - * There are multiple SoM flavors with different DDR sizes. - * The smallest is 1GB. For larger sizes the bootloader will - * update the reg property. - */ - reg = <0x0 0x40000000 0 0x80000000>; - }; - - chosen { - stdout-path = &uart3; - }; -}; - -&A53_0 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_1 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_2 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_3 { - cpu-supply = <®_vdd_arm>; -}; - -&ddrc { - operating-points-v2 = <&ddrc_opp_table>; - - ddrc_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-100M { - opp-hz = /bits/ 64 <100000000>; - }; - - opp-750M { - opp-hz = /bits/ 64 <750000000>; - }; - }; -}; - -&ecspi1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; - status = "okay"; - - flash@0 { - compatible = "mxicy,mx25r1635f", "jedec,spi-nor"; - spi-max-frequency = <80000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x1e0000>; - }; - - partition@1e0000 { - label = "env"; - reg = <0x1e0000 0x10000>; - }; - - partition@1f0000 { - label = "env_redundant"; - reg = <0x1f0000 0x10000>; - }; - }; - }; -}; - -&i2c1 { - clock-frequency = <400000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - pca9450: pmic@25 { - compatible = "nxp,pca9450a"; - reg = <0x25>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio1>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - regulators { - reg_vdd_soc: BUCK1 { - regulator-name = "+0V8_VDD_SOC (BUCK1)"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <850000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - nxp,dvs-run-voltage = <850000>; - nxp,dvs-standby-voltage = <800000>; - }; - - reg_vdd_arm: BUCK2 { - regulator-name = "+0V9_VDD_ARM (BUCK2)"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <950000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - nxp,dvs-run-voltage = <950000>; - nxp,dvs-standby-voltage = <850000>; - }; - - reg_vdd_dram: BUCK3 { - regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <950000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_3v3: BUCK4 { - regulator-name = "+3V3 (BUCK4)"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_1v8: BUCK5 { - regulator-name = "+1V8 (BUCK5)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_nvcc_dram: BUCK6 { - regulator-name = "+1V1_NVCC_DRAM (BUCK6)"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_nvcc_snvs: LDO1 { - regulator-name = "+1V8_NVCC_SNVS (LDO1)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_snvs: LDO2 { - regulator-name = "+0V8_VDD_SNVS (LDO2)"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdda: LDO3 { - regulator-name = "+1V8_VDDA (LDO3)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_phy: LDO4 { - regulator-name = "+0V9_VDD_PHY (LDO4)"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_nvcc_sd: LDO5 { - regulator-name = "NVCC_SD (LDO5)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - }; - }; - - rv3028: rtc@52 { - compatible = "microcrystal,rv3028"; - reg = <0x52>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rtc>; - interrupts-extended = <&gpio4 1 IRQ_TYPE_LEVEL_HIGH>; - trickle-diode-disable; - }; -}; - -&uart3 { /* console */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - vmmc-supply = <®_vdd_3v3>; - vqmmc-supply = <®_vdd_1v8>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; - status = "okay"; -}; - -&iomuxc { - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 - MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 - MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 - MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 - >; - }; - - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141 - >; - }; - - pinctrl_rtc: rtcgrp { - fsl,pins = < - MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x19 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 - MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 - MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0 - MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0 - MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0 - MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0 - MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019 - MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 - MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4 - MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4 - MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4 - MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4 - MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019 - MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 - MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6 - MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6 - MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6 - MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6 - MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019 - MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196 - >; - }; - - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 - >; - }; -}; diff --git a/arch/arm/dts/imx8mm-kontron-sl.dtsi b/arch/arm/dts/imx8mm-kontron-sl.dtsi deleted file mode 100644 index 0679728d248..00000000000 --- a/arch/arm/dts/imx8mm-kontron-sl.dtsi +++ /dev/null @@ -1,314 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright (C) 2019 Kontron Electronics GmbH - */ - -#include "imx8mm.dtsi" - -/ { - model = "Kontron SL i.MX8MM (N801X SOM)"; - compatible = "kontron,imx8mm-sl", "fsl,imx8mm"; - - memory@40000000 { - device_type = "memory"; - /* - * There are multiple SoM flavors with different DDR sizes. - * The smallest is 1GB. For larger sizes the bootloader will - * update the reg property. - */ - reg = <0x0 0x40000000 0 0x80000000>; - }; - - chosen { - stdout-path = &uart3; - }; -}; - -&A53_0 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_1 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_2 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_3 { - cpu-supply = <®_vdd_arm>; -}; - -&ddrc { - operating-points-v2 = <&ddrc_opp_table>; - - ddrc_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-100M { - opp-hz = /bits/ 64 <100000000>; - }; - - opp-750M { - opp-hz = /bits/ 64 <750000000>; - }; - }; -}; - -&ecspi1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; - status = "okay"; - - flash@0 { - compatible = "mxicy,mx25r1635f", "jedec,spi-nor"; - spi-max-frequency = <80000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x1e0000>; - }; - - partition@1e0000 { - label = "env"; - reg = <0x1e0000 0x10000>; - }; - - partition@1f0000 { - label = "env_redundant"; - reg = <0x1f0000 0x10000>; - }; - }; - }; -}; - -&i2c1 { - clock-frequency = <400000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - pca9450: pmic@25 { - compatible = "nxp,pca9450a"; - reg = <0x25>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio1>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - regulators { - reg_vdd_soc: BUCK1 { - regulator-name = "+0V8_VDD_SOC (BUCK1)"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <850000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - nxp,dvs-run-voltage = <850000>; - nxp,dvs-standby-voltage = <800000>; - }; - - reg_vdd_arm: BUCK2 { - regulator-name = "+0V9_VDD_ARM (BUCK2)"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <950000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - nxp,dvs-run-voltage = <950000>; - nxp,dvs-standby-voltage = <850000>; - }; - - reg_vdd_dram: BUCK3 { - regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <950000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_3v3: BUCK4 { - regulator-name = "+3V3 (BUCK4)"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_1v8: BUCK5 { - regulator-name = "+1V8 (BUCK5)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_nvcc_dram: BUCK6 { - regulator-name = "+1V1_NVCC_DRAM (BUCK6)"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_nvcc_snvs: LDO1 { - regulator-name = "+1V8_NVCC_SNVS (LDO1)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_snvs: LDO2 { - regulator-name = "+0V8_VDD_SNVS (LDO2)"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdda: LDO3 { - regulator-name = "+1V8_VDDA (LDO3)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vdd_phy: LDO4 { - regulator-name = "+0V9_VDD_PHY (LDO4)"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_nvcc_sd: LDO5 { - regulator-name = "NVCC_SD (LDO5)"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - }; - }; -}; - -&uart3 { /* console */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - vmmc-supply = <®_vdd_3v3>; - vqmmc-supply = <®_vdd_1v8>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; - status = "okay"; -}; - -&iomuxc { - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 - MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 - MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 - MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 - >; - }; - - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 - MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 - MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0 - MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0 - MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0 - MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0 - MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019 - MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 - MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4 - MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4 - MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4 - MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4 - MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019 - MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { - fsl,pins = < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 - MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6 - MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6 - MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6 - MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6 - MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x019 - MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196 - >; - }; - - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 - >; - }; -}; diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index f9484b908d9..42346a305f9 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -12,7 +12,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_IMX_CONFIG="board/kontron/sl-mx8mm/imximage.cfg" CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-kontron-bl" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-kontron-bl" CONFIG_TARGET_KONTRON_MX8MM=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_MMC=y @@ -111,7 +111,8 @@ CONFIG_CMD_FS_UUID=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="imx8mm-kontron-bl imx8mm-kontron-bl-osm-s" +CONFIG_OF_UPSTREAM=y +CONFIG_OF_LIST="freescale/imx8mm-kontron-bl freescale/imx8mm-kontron-bl-osm-s" CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -- cgit v1.2.3 From 5d5d4c6bc7739165dffdad7357cf319e81de07ac Mon Sep 17 00:00:00 2001 From: Mathieu Dubois-Briand Date: Wed, 8 Oct 2025 11:08:16 +0200 Subject: imx93_frdm: Fix USB vendor ID NXP manufacturing tools expect the device to have the NXP 0x1fc9 vendor ID instead of 0x0525. This is the value already used by other i.MX8 and i.MX9 boards. Signed-off-by: Mathieu Dubois-Briand --- configs/imx93_frdm_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/imx93_frdm_defconfig b/configs/imx93_frdm_defconfig index eddd36c618d..ae95c57218c 100644 --- a/configs/imx93_frdm_defconfig +++ b/configs/imx93_frdm_defconfig @@ -127,7 +127,7 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="FSL" -CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9 CONFIG_USB_GADGET_PRODUCT_NUM=0x0152 CONFIG_CI_UDC=y CONFIG_ULP_WATCHDOG=y -- cgit v1.2.3 From 15bed125d769e16c688907b504c6d9b60c20b089 Mon Sep 17 00:00:00 2001 From: Ernest Van Hoecke Date: Thu, 9 Oct 2025 18:29:18 +0200 Subject: arm: dts: imx8mp-toradex-smarc: migrate to OF_UPSTREAM Enable CONFIG_OF_UPSTREAM to receive automatic device tree updates for the Toradex SMARC iMX8MP. Remove the now obsolete device tree files: - imx8mp-toradex-smarc-dev.dts - imx8mp-toradex-smarc.dtsi Signed-off-by: Ernest Van Hoecke Reviewed-by: Fabio Estevam --- arch/arm/dts/imx8mp-toradex-smarc-dev.dts | 297 ------- arch/arm/dts/imx8mp-toradex-smarc.dtsi | 1284 ----------------------------- arch/arm/mach-imx/imx8m/Kconfig | 1 + configs/toradex-smarc-imx8mp_defconfig | 2 +- 4 files changed, 2 insertions(+), 1582 deletions(-) delete mode 100644 arch/arm/dts/imx8mp-toradex-smarc-dev.dts delete mode 100644 arch/arm/dts/imx8mp-toradex-smarc.dtsi diff --git a/arch/arm/dts/imx8mp-toradex-smarc-dev.dts b/arch/arm/dts/imx8mp-toradex-smarc-dev.dts deleted file mode 100644 index 581f221323b..00000000000 --- a/arch/arm/dts/imx8mp-toradex-smarc-dev.dts +++ /dev/null @@ -1,297 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* Copyright (C) 2025 Toradex */ - -/dts-v1/; - -#include "imx8mp-toradex-smarc.dtsi" - -/ { - model = "Toradex SMARC iMX8M Plus on Toradex SMARC Development Board"; - compatible = "toradex,smarc-imx8mp-dev", - "toradex,smarc-imx8mp", - "fsl,imx8mp"; - - hdmi-connector { - compatible = "hdmi-connector"; - label = "J64"; - type = "a"; - - port { - native_hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_tx_out>; - }; - }; - }; - - reg_carrier_1p8v: regulator-carrier-1p8v { - compatible = "regulator-fixed"; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "On-carrier 1V8"; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,bitclock-master = <&codec_dai>; - simple-audio-card,format = "i2s"; - simple-audio-card,frame-master = <&codec_dai>; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,name = "tdx-smarc-wm8904"; - simple-audio-card,routing = - "Headphone Jack", "HPOUTL", - "Headphone Jack", "HPOUTR", - "IN2L", "Line In Jack", - "IN2R", "Line In Jack", - "Microphone Jack", "MICBIAS", - "IN1L", "Microphone Jack"; - simple-audio-card,widgets = - "Microphone", "Microphone Jack", - "Headphone", "Headphone Jack", - "Line", "Line In Jack"; - - codec_dai: simple-audio-card,codec { - clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>; - sound-dai = <&wm8904_1a>; - }; - - simple-audio-card,cpu { - sound-dai = <&sai1>; - }; - }; -}; - -&aud2htx { - status = "okay"; -}; - -/* SMARC SPI0 */ -&ecspi1 { - status = "okay"; -}; - -/* SMARC GBE0 */ -&eqos { - status = "okay"; -}; - -/* SMARC GBE1 */ -&fec { - status = "okay"; -}; - -/* SMARC CAN1 */ -&flexcan1 { - status = "okay"; -}; - -/* SMARC CAN0 */ -&flexcan2 { - status = "okay"; -}; - -&gpio1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio7>, - <&pinctrl_gpio8>, - <&pinctrl_gpio9>, - <&pinctrl_gpio10>, - <&pinctrl_gpio11>, - <&pinctrl_gpio12>, - <&pinctrl_gpio13>; -}; - -&gpio3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lvds_dsi_sel>; -}; - -&gpio4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio4>, <&pinctrl_gpio6>; -}; - -&hdmi_pvi { - status = "okay"; -}; - -/* SMARC HDMI */ -&hdmi_tx { - status = "okay"; - - ports { - port@1 { - hdmi_tx_out: endpoint { - remote-endpoint = <&native_hdmi_connector_in>; - }; - }; - }; -}; - -&hdmi_tx_phy { - status = "okay"; -}; - -/* SMARC I2C_LCD */ -&i2c2 { - status = "okay"; - - i2c-mux@70 { - compatible = "nxp,pca9543"; - reg = <0x70>; - #address-cells = <1>; - #size-cells = <0>; - - /* I2C on DSI Connector Pins 4/6 */ - i2c_dsi_0: i2c@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - /* I2C on DSI Connector Pins 52/54 */ - i2c_dsi_1: i2c@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; -}; - -/* SMARC I2C_CAM0 */ -&i2c3 { - status = "okay"; -}; - -/* SMARC I2C_GP */ -&i2c4 { - /* Audio Codec */ - wm8904_1a: audio-codec@1a { - compatible = "wlf,wm8904"; - reg = <0x1a>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai1>, <&pinctrl_sai1_mclk>; - #sound-dai-cells = <0>; - clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>; - clock-names = "mclk"; - AVDD-supply = <®_carrier_1p8v>; - CPVDD-supply = <®_carrier_1p8v>; - DBVDD-supply = <®_carrier_1p8v>; - DCVDD-supply = <®_carrier_1p8v>; - MICVDD-supply = <®_carrier_1p8v>; - }; - - /* On-Carrier Temperature Sensor */ - temperature-sensor@4f { - compatible = "ti,tmp1075"; - reg = <0x4f>; - }; - - /* On-Carrier EEPROM */ - eeprom@57 { - compatible = "st,24c02", "atmel,24c02"; - reg = <0x57>; - pagesize = <16>; - }; -}; - -/* SMARC I2C_CAM1 */ -&i2c5 { - status = "okay"; -}; - -/* SMARC I2C_PM */ -&i2c6 { - clock-frequency = <100000>; - status = "okay"; - - /* Fan controller */ - fan@18 { - compatible = "ti,amc6821"; - reg = <0x18>; - }; - - /* Current measurement into module VDD */ - hwmon@40 { - compatible = "ti,ina226"; - reg = <0x40>; - shunt-resistor = <5000>; - }; -}; - -&lcdif3 { - status = "okay"; -}; - -/* SMARC PCIE_A, M2 Key B */ -&pcie { - status = "okay"; -}; - -&pcie_phy { - status = "okay"; -}; - -/* SMARC LCD1_BKLT_PWM */ -&pwm1 { - status = "okay"; -}; - -/* SMARC LCD0_BKLT_PWM */ -&pwm2 { - status = "okay"; -}; - -/* SMARC I2S0 */ -&sai1 { - assigned-clocks = <&clk IMX8MP_CLK_SAI1>; - assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; - assigned-clock-rates = <24576000>; - fsl,sai-mclk-direction-output; - status = "okay"; -}; - -/* SMARC HDMI Audio */ -&sound_hdmi { - status = "okay"; -}; - -/* SMARC SER0, RS485. Optional M.2 KEY E */ -&uart1 { - linux,rs485-enabled-at-boot-time; - rs485-rts-active-low; - rs485-rx-during-tx; - status = "okay"; -}; - -/* SMARC SER2 */ -&uart2 { - status = "okay"; -}; - -/* SMARC SER1, used as the Linux Console */ -&uart4 { - status = "okay"; -}; - -/* SMARC USB0 */ -&usb3_0 { - status = "okay"; -}; - -/* SMARC USB1..4 */ -&usb3_1 { - status = "okay"; -}; - -&usb3_phy0 { - status = "okay"; -}; - -&usb3_phy1 { - status = "okay"; -}; - -/* SMARC SDIO */ -&usdhc2 { - status = "okay"; -}; diff --git a/arch/arm/dts/imx8mp-toradex-smarc.dtsi b/arch/arm/dts/imx8mp-toradex-smarc.dtsi deleted file mode 100644 index 0a8b9eee5ed..00000000000 --- a/arch/arm/dts/imx8mp-toradex-smarc.dtsi +++ /dev/null @@ -1,1284 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* Copyright (C) 2025 Toradex */ - -#include -#include -#include "imx8mp.dtsi" - -/ { - aliases { - can0 = &flexcan2; - can1 = &flexcan1; - ethernet0 = &eqos; - ethernet1 = &fec; - mmc0 = &usdhc3; - mmc1 = &usdhc2; - mmc2 = &usdhc1; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; - serial0 = &uart1; - serial1 = &uart4; - serial2 = &uart2; - serial3 = &uart3; - }; - - chosen { - stdout-path = &uart4; - }; - - connector { - compatible = "gpio-usb-b-connector", "usb-b-connector"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0_id>; - id-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; - label = "USB0"; - self-powered; - type = "micro"; - vbus-supply = <®_usb0_vbus>; - - port { - usb_dr_connector: endpoint { - remote-endpoint = <&usb3_0_dwc>; - }; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sleep>; - - smarc_key_sleep: key-sleep { - gpios = <&gpio3 1 GPIO_ACTIVE_LOW>; - label = "SMARC_SLEEP#"; - wakeup-source; - linux,code = ; - }; - }; - - reg_usb0_vbus: regulator-usb0-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb0_en_oc>; - gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "USB0_EN_OC#"; - }; - - reg_usb1_vbus: regulator-usb1-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1_en_oc>; - gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "USB2_EN_OC#"; - }; - - reg_usdhc2_vmmc: regulator-usdhc2-vmmc { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2_pwr_en>; - gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - off-on-delay-us = <100000>; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "3V3_SD"; - startup-delay-us = <20000>; - }; - - reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc { - compatible = "regulator-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2_vsel>; - gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <1800000>; - states = <1800000 0x1>, - <3300000 0x0>; - regulator-name = "PMIC_USDHC_VSELECT"; - vin-supply = <®_sd_3v3_1v8>; - }; - - reg_wifi_en: regulator-wifi-en { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wifi_pwr_en>; - gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "CTRL_EN_WIFI"; - startup-delay-us = <2000>; - }; - - reserved-memory { - linux,cma { - size = <0 0x20000000>; - alloc-ranges = <0 0x40000000 0 0x80000000>; - }; - }; - - sound_hdmi: sound-hdmi { - compatible = "fsl,imx-audio-hdmi"; - model = "audio-hdmi"; - audio-cpu = <&aud2htx>; - hdmi-out; - status = "disabled"; - }; -}; - -&A53_0 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_1 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_2 { - cpu-supply = <®_vdd_arm>; -}; - -&A53_3 { - cpu-supply = <®_vdd_arm>; -}; - -/* SMARC SPI0 */ -&ecspi1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio4 28 GPIO_ACTIVE_LOW>; -}; - -/* SMARC SPI1 */ -&ecspi2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi2>, <&pinctrl_tpm_cs>; - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, - <&gpio4 3 GPIO_ACTIVE_LOW>, - <&gpio3 6 GPIO_ACTIVE_LOW>; - status = "okay"; - - tpm@2 { - compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; - reg = <2>; - spi-max-frequency = <18500000>; - }; -}; - -/* SMARC GBE0 */ -&eqos { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eqos>, - <&pinctrl_eth_mdio>, - <&pinctrl_eqos_1588_event>; - phy-handle = <&eqos_phy>; - phy-mode = "rgmii-id"; - snps,force_thresh_dma_mode; - snps,mtl-rx-config = <&mtl_rx_setup>; - snps,mtl-tx-config = <&mtl_tx_setup>; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <5>; - - queue0 { - snps,dcb-algorithm; - snps,priority = <0x1>; - snps,map-to-dma-channel = <0>; - }; - - queue1 { - snps,dcb-algorithm; - snps,priority = <0x2>; - snps,map-to-dma-channel = <1>; - }; - - queue2 { - snps,dcb-algorithm; - snps,priority = <0x4>; - snps,map-to-dma-channel = <2>; - }; - - queue3 { - snps,dcb-algorithm; - snps,priority = <0x8>; - snps,map-to-dma-channel = <3>; - }; - - queue4 { - snps,dcb-algorithm; - snps,priority = <0xf0>; - snps,map-to-dma-channel = <4>; - }; - }; - - mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <5>; - - queue0 { - snps,dcb-algorithm; - snps,priority = <0x1>; - }; - - queue1 { - snps,dcb-algorithm; - snps,priority = <0x2>; - }; - - queue2 { - snps,dcb-algorithm; - snps,priority = <0x4>; - }; - - queue3 { - snps,dcb-algorithm; - snps,priority = <0x8>; - }; - - queue4 { - snps,dcb-algorithm; - snps,priority = <0xf0>; - }; - }; -}; - -/* SMARC GBE1 */ -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec>, <&pinctrl_fec_1588_event>; - phy-handle = <&fec_phy>; - phy-mode = "rgmii-id"; - fsl,magic-packet; -}; - -/* SMARC CAN1 */ -&flexcan1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1>; -}; - -/* SMARC CAN0 */ -&flexcan2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan2>; -}; - -&gpio1 { - gpio-line-names = "SMARC_GPIO7", /* 0 */ - "SMARC_GPIO8", - "", - "PMIC_INT#", - "PMIC_USDHC_VSELECT", - "SMARC_GPIO9", - "SMARC_GPIO10", - "SMARC_GPIO11", - "SMARC_GPIO12", - "", - "SMARC_GPIO5", /* 10 */ - "", - "SMARC_USB0_EN_OC#", - "SMARC_GPIO13", - "SMARC_USB2_EN_OC#"; -}; - -&gpio2 { - gpio-line-names = "", /* 0 */ - "", - "", - "", - "", - "", - "", - "", - "", - "", - "", /* 10 */ - "", - "SMARC_SDIO_CD#", - "", - "", - "", - "", - "", - "", - "SMARC_SDIO_PWR_EN", - "SMARC_SDIO_WP"; /* 20 */ -}; - -&gpio3 { - gpio-line-names = "ETH_0_INT#", /* 0 */ - "SLEEP#", - "", - "", - "", - "", - "TPM_CS#", - "LVDS_DSI_SEL", - "MCU_INT#", - "GPIO_EX_INT#", - "", /* 10 */ - "", - "", - "", - "", - "", - "SMARC_SMB_ALERT#", - "", - "", - "", - "SMARC_I2C_PM_DAT", /* 20 */ - "", - "", - "", - "", - "", - "", - "", - "SMARC_I2C_PM_CK"; - - lvds_dsi_mux_hog: lvds-dsi-mux-hog { - gpio-hog; - gpios = <7 GPIO_ACTIVE_HIGH>; - line-name = "LVDS_DSI_SEL"; - /* LVDS_DSI_SEL as DSI */ - output-low; - }; -}; - -&gpio4 { - gpio-line-names = "SMARC_PCIE_WAKE#", /* 0 */ - "", - "", - "SMARC_SPI1_CS1#", - "", - "", - "", - "", - "", - "", - "", /* 10 */ - "", - "", - "", - "", - "", - "", - "", - "SMARC_GPIO4", - "SMARC_PCIE_A_RST#", - "", /* 20 */ - "", - "", - "", - "", - "", - "", - "", - "SMARC_SPI0_CS1#", - "SMARC_GPIO6"; -}; - -&gpio5 { - gpio-line-names = "", /* 0 */ - "", - "SMARC_USB0_OTG_ID", - "SMARC_I2C_CAM1_CK", - "SMARC_I2C_CAM1_DAT", - "", - "", - "", - "", - "SMARC_SPI0_CS0#", - "", /* 10 */ - "", - "", - "SMARC_SPI1_CS0#", - "CTRL_I2C_SCL", - "CTRL_I2C_SDA", - "SMARC_I2C_LCD_CK", - "SMARC_I2C_LCD_DAT", - "SMARC_I2C_CAM0_CK", - "SMARC_I2C_CAM0_DAT", - "SMARC_I2C_GP_CK", /* 20 */ - "SMARC_I2C_GP_DAT"; -}; - -/* SMARC HDMI */ -&hdmi_tx { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hdmi>; -}; - -/* On-module I2C */ -&i2c1 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - clock-frequency = <400000>; - scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - single-master; - status = "okay"; - - som_gpio_expander: gpio-expander@21 { - compatible = "nxp,pcal6408"; - reg = <0x21>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcal6408>; - #interrupt-cells = <2>; - interrupt-controller; - interrupt-parent = <&gpio3>; - interrupts = <9 IRQ_TYPE_LEVEL_LOW>; - #gpio-cells = <2>; - gpio-controller; - gpio-line-names = - "SMARC_GPIO0", - "SMARC_GPIO1", - "SMARC_GPIO2", - "SMARC_GPIO3", - "SMARC_LCD0_VDD_EN", - "SMARC_LCD0_BKLT_EN", - "SMARC_LCD1_VDD_EN", - "SMARC_LCD1_BKLT_EN"; - }; - - pca9450: pmic@25 { - compatible = "nxp,pca9450c"; - reg = <0x25>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio1>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - - regulators { - BUCK1 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1000000>; - regulator-min-microvolt = <805000>; - regulator-name = "+VDD_SOC (PMIC BUCK1)"; - regulator-ramp-delay = <3125>; - }; - - reg_vdd_arm: BUCK2 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1000000>; - regulator-min-microvolt = <805000>; - regulator-name = "+VDD_ARM (PMIC BUCK2)"; - regulator-ramp-delay = <3125>; - nxp,dvs-run-voltage = <950000>; - nxp,dvs-standby-voltage = <850000>; - }; - - reg_3v3: BUCK4 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "+V3.3 (PMIC BUCK4)"; - }; - - reg_1v8: BUCK5 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "+V1.8 (PMIC BUCK5)"; - }; - - BUCK6 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1155000>; - regulator-min-microvolt = <1045000>; - regulator-name = "+VDD_DDR (PMIC BUCK6)"; - }; - - LDO1 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1950000>; - regulator-min-microvolt = <1710000>; - regulator-name = "+V1.8_SNVS (PMIC LDO1)"; - }; - - LDO3 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1800000>; - regulator-min-microvolt = <1800000>; - regulator-name = "+V1.8A (PMIC LDO3)"; - }; - - LDO4 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "+V3.3_ADC (PMIC LDO4)"; - }; - - reg_sd_3v3_1v8: LDO5 { - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <1800000>; - regulator-name = "+V3.3_1.8_SD (PMIC LDO5)"; - }; - }; - }; - - rtc_i2c: rtc@32 { - compatible = "epson,rx8130"; - reg = <0x32>; - }; - - temperature-sensor@48 { - compatible = "ti,tmp1075"; - reg = <0x48>; - }; - - eeprom@50 { - compatible = "st,24c02", "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; -}; - -/* SMARC I2C_LCD */ -&i2c2 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c2>; - pinctrl-1 = <&pinctrl_i2c2_gpio>; - clock-frequency = <100000>; - scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - single-master; -}; - -/* SMARC I2C_CAM0 */ -&i2c3 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c3>; - pinctrl-1 = <&pinctrl_i2c3_gpio>; - clock-frequency = <400000>; - scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - single-master; -}; - -/* SMARC I2C_GP */ -&i2c4 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c4>; - pinctrl-1 = <&pinctrl_i2c4_gpio>; - clock-frequency = <400000>; - scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - single-master; - status = "okay"; - - eeprom@50 { - compatible = "st,24c32", "atmel,24c32"; - reg = <0x50>; - pagesize = <32>; - }; -}; - -/* SMARC I2C_CAM1 */ -&i2c5 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c5>; - pinctrl-1 = <&pinctrl_i2c5_gpio>; - clock-frequency = <400000>; - scl-gpios = <&gpio5 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - single-master; -}; - -/* SMARC I2C_PM */ -&i2c6 { - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c6>; - pinctrl-1 = <&pinctrl_i2c6_gpio>; - clock-frequency = <400000>; - scl-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio3 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - single-master; -}; - -&mdio { - eqos_phy: ethernet-phy@1 { - reg = <1>; - interrupt-parent = <&gpio3>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - ti,rx-internal-delay = ; - ti,tx-internal-delay = ; - }; - - fec_phy: ethernet-phy@2 { - reg = <2>; - interrupt-parent = <&gpio3>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - ti,rx-internal-delay = ; - ti,tx-internal-delay = ; - }; -}; - -/* SMARC PCIE_A */ -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; -}; - -&pcie_phy { - clocks = <&hsio_blk_ctrl>; - clock-names = "ref"; - fsl,clkreq-unsupported; - fsl,refclk-pad-mode = ; -}; - -/* SMARC LCD1_BKLT_PWM */ -&pwm1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd1_bklt_pwm1>; -}; - -/* SMARC LCD0_BKLT_PWM */ -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd0_bklt_pwm2>; -}; - -/* SMARC GPIO5 as PWM */ -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio5_pwm>; -}; - -&snvs_pwrkey { - status = "okay"; -}; - -/* SMARC SER0 */ -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - uart-has-rtscts; -}; - -/* SMARC SER2 */ -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - uart-has-rtscts; -}; - -/* On-module Bluetooth, optional SMARC SER3 */ -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_bt_uart>; - uart-has-rtscts; - status = "okay"; - - som_bt: bluetooth { - compatible = "mrvl,88w8997"; - max-speed = <921600>; - }; -}; - -/* SMARC SER1, used as the Linux Console */ -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4>; -}; - -/* SMARC USB0 */ -&usb3_0 { - fsl,disable-port-power-control; -}; - -/* SMARC USB1..4 */ -&usb3_1 { - fsl,disable-port-power-control; -}; - -&usb3_phy1 { - vbus-supply = <®_usb1_vbus>; -}; - -&usb_dwc3_0 { - adp-disable; - dr_mode = "otg"; - hnp-disable; - maximum-speed = "high-speed"; - srp-disable; - usb-role-switch; - - port { - usb3_0_dwc: endpoint { - remote-endpoint = <&usb_dr_connector>; - }; - }; -}; - -&usb_dwc3_1 { - dr_mode = "host"; -}; - -/* On-module Wi-Fi */ -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - keep-power-in-suspend; - non-removable; - vmmc-supply = <®_wifi_en>; - status = "okay"; -}; - -/* SMARC SDIO */ -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc2>, - <&pinctrl_usdhc2_cd>, - <&pinctrl_usdhc2_wp>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, - <&pinctrl_usdhc2_cd>, - <&pinctrl_usdhc2_wp>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, - <&pinctrl_usdhc2_cd>, - <&pinctrl_usdhc2_wp>; - pinctrl-3 = <&pinctrl_usdhc2_sleep>, - <&pinctrl_usdhc2_cd_sleep>, - <&pinctrl_usdhc2_wp>; - assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; - assigned-clock-rates = <400000000>; - cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_usdhc2_vmmc>; - vqmmc-supply = <®_usdhc2_vqmmc>; - wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; -}; - -/* On-module eMMC */ -&usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; - assigned-clocks = <&clk IMX8MP_CLK_USDHC3_ROOT>; - assigned-clock-rates = <400000000>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; - status = "okay"; -}; - -&iomuxc { - /* On-module Bluetooth */ - pinctrl_bt_uart: btuartgrp { - fsl,pins = , /* WiFi_UART_TXD */ - , /* WiFi_UART_RXD */ - , /* WiFi_UART_RTS */ - ; /* WiFi_UART_CTS */ - }; - - /* SMARC CAM_MCK */ - pinctrl_csi_mclk: csimclkgrp { - fsl,pins = ; /* SMARC S6 - CAM_MCK */ - }; - - /* SMARC SPI0 */ - pinctrl_ecspi1: ecspi1grp { - fsl,pins = , /* SMARC P45 - SPI0_DIN */ - , /* SMARC P46 - SPI0_DO */ - , /* SMARC P44 - SPI0_CK */ - , /* SMARC P43 - SPI0_CS0# */ - ; /* SMARC P31 - SPI0_CS1# */ - }; - - /* SMARC SPI1 */ - pinctrl_ecspi2: ecspi2grp { - fsl,pins = , /* SMARC P56 - SPI1_DIN */ - , /* SMARC P57 - SPI1_DO */ - , /* SMARC P58 - SPI1_CK */ - , /* SMARC P54 - SPI1_CS0# */ - ; /* SMARC P55 - SPI1_CS1# */ - }; - - /* ETH_0 RGMII (On-module PHY) */ - pinctrl_eqos: eqosgrp { - fsl,pins = , /* ETH0_RGMII_RXD0 */ - , /* ETH0_RGMII_RXD1 */ - , /* ETH0_RGMII_RXD2 */ - , /* ETH0_RGMII_RXD3 */ - , /* ETH0_RGMII_RXC */ - , /* ETH0_RGMII_RX_CTL */ - , /* ETH0_RGMII_TXD0 */ - , /* ETH0_RGMII_TXD1 */ - , /* ETH0_RGMII_TXD2 */ - , /* ETH0_RGMII_TXD3 */ - , /* ETH0_RGMII_TX_CTL */ - ; /* ETH0_RGMII_TXC */ - }; - - /* SMARC GBE0_SDP */ - pinctrl_eqos_1588_event: eqos1588eventgrp { - fsl,pins = ; /* SMARC P6 - GBE0_SDP */ - }; - - /* ETH_0_MDIO and ETH_0_INT# shared between ETH_PHY0 and ETH_PHY1 */ - pinctrl_eth_mdio: ethmdiogrp { - fsl,pins = , /* ETH_0_MDC */ - , /* ETH_0_MDIO */ - ; /* ETH_0_INT# */ - }; - - /* ETH_1 RGMII (On-module PHY) */ - pinctrl_fec: fecgrp { - fsl,pins = , /* ETH1_RGMII_RXD0 */ - , /* ETH1_RGMII_RXD1 */ - , /* ETH1_RGMII_RXD2 */ - , /* ETH1_RGMII_RXD3 */ - , /* ETH1_RGMII_RXC */ - , /* ETH1_RGMII_RX_CTL */ - , /* ETH1_RGMII_TXD0 */ - , /* ETH1_RGMII_TXD1 */ - , /* ETH1_RGMII_TXD2 */ - , /* ETH1_RGMII_TXD3 */ - , /* ETH1_RGMII_TX_CTL */ - ; /* ETH1_RGMII_TXC */ - }; - - /* SMARC GBE1_SDP */ - pinctrl_fec_1588_event: fec1588eventgrp { - fsl,pins = ; /* SMARC P5 - GBE1_SDP */ - }; - - /* SMARC CAN1 */ - pinctrl_flexcan1: flexcan1grp { - fsl,pins = , /* SMARC P146 - CAN1_RX */ - ; /* SMARC P145 - CAN1_TX */ - }; - - /* SMARC CAN0 */ - pinctrl_flexcan2: flexcan2grp { - fsl,pins = , /* SMARC P144 - CAN0_RX */ - ; /* SMARC P143 - CAN0_TX */ - }; - - /* SMARC GPIO4 */ - pinctrl_gpio4: gpio4grp { - fsl,pins = ; /* SMARC P112 - GPIO4 */ - }; - - /* SMARC GPIO5 */ - pinctrl_gpio5: gpio5grp { - fsl,pins = ; /* SMARC P113 - GPIO5 */ - }; - - /* SMARC GPIO5 as PWM */ - pinctrl_gpio5_pwm: gpio5pwmgrp { - fsl,pins = ; /* SMARC P113 - PWM_OUT */ - }; - - /* SMARC GPIO6 */ - pinctrl_gpio6: gpio6grp { - fsl,pins = ; /* SMARC P114 - GPIO6 */ - }; - - /* SMARC GPIO7 */ - pinctrl_gpio7: gpio7grp { - fsl,pins = ; /* SMARC P115 - GPIO7 */ - }; - - /* SMARC GPIO8 */ - pinctrl_gpio8: gpio8grp { - fsl,pins = ; /* SMARC P116 - GPIO8 */ - }; - - /* SMARC GPIO9 */ - pinctrl_gpio9: gpio9grp { - fsl,pins = ; /* SMARC P117 - GPIO9 */ - }; - - /* SMARC GPIO10 */ - pinctrl_gpio10: gpio10grp { - fsl,pins = ; /* SMARC P118 - GPIO10 */ - }; - - /* SMARC GPIO11 */ - pinctrl_gpio11: gpio11grp { - fsl,pins = ; /* SMARC P119 - GPIO11 */ - }; - - /* SMARC GPIO12 */ - pinctrl_gpio12: gpio12grp { - fsl,pins = ; /* SMARC S142 - GPIO12 */ - }; - - /* SMARC GPIO13 */ - pinctrl_gpio13: gpio13grp { - fsl,pins = ; /* SMARC S123 - GPIO13 */ - }; - - /* SMARC HDMI */ - pinctrl_hdmi: hdmigrp { - fsl,pins = , /* SMARC P105 - HDMI_CTRL_CK */ - , /* SMARC P106 - HDMI_CTRL_DAT */ - ; /* SMARC P104 - HDMI_HPD */ - }; - - /* On-module I2C */ - pinctrl_i2c1: i2c1grp { - fsl,pins = , /* CTRL_I2C_SCL */ - ; /* CTRL_I2C_SDA */ - }; - - /* On-module I2C as GPIOs */ - pinctrl_i2c1_gpio: i2c1gpiogrp { - fsl,pins = , /* CTRL_I2C_SCL */ - ; /* CTRL_I2C_SDA */ - }; - - /* SMARC I2C_LCD */ - pinctrl_i2c2: i2c2grp { - fsl,pins = , /* SMARC S139 - I2C_LCD_CK */ - ; /* SMARC S140 - I2C_LCD_DAT */ - }; - - /* SMARC I2C_LCD as GPIOs */ - pinctrl_i2c2_gpio: i2c2gpiogrp { - fsl,pins = , /* SMARC S139 - I2C_LCD_CK */ - ; /* SMARC S140 - I2C_LCD_DAT */ - }; - - /* SMARC I2C_CAM0 */ - pinctrl_i2c3: i2c3grp { - fsl,pins = , /* SMARC S5 - I2C_CAM0_CK */ - ; /* SMARC S7 - I2C_CAM0_DAT */ - }; - - /* SMARC I2C_CAM0 as GPIOs */ - pinctrl_i2c3_gpio: i2c3gpiogrp { - fsl,pins = , /* SMARC S5 - I2C_CAM0_CK */ - ; /* SMARC S7 - I2C_CAM0_DAT */ - }; - - /* SMARC I2C_GP */ - pinctrl_i2c4: i2c4grp { - fsl,pins = , /* SMARC S48 - I2C_GP_CK */ - ; /* SMARC S49 - I2C_GP_DAT */ - }; - - /* SMARC I2C_GP as GPIOs */ - pinctrl_i2c4_gpio: i2c4gpiogrp { - fsl,pins = , /* SMARC S48 - I2C_GP_CK */ - ; /* SMARC S49 - I2C_GP_DAT */ - }; - - /* SMARC I2C_CAM1 */ - pinctrl_i2c5: i2c5grp { - fsl,pins = , /* SMARC S2 - I2C_CAM1_DAT */ - ; /* SMARC S1 - I2C_CAM1_CK */ - }; - - /* SMARC I2C_CAM1 as GPIOs */ - pinctrl_i2c5_gpio: i2c5gpiogrp { - fsl,pins = , /* SMARC S2 - I2C_CAM1_DAT */ - ; /* SMARC S1 - I2C_CAM1_CK */ - }; - - /* SMARC I2C_PM */ - pinctrl_i2c6: i2c6grp { - fsl,pins = , /* SMARC P121 - I2C_PM_CK */ - ; /* SMARC P122 - I2C_PM_DAT */ - }; - - /* SMARC I2C_PM as GPIOs */ - pinctrl_i2c6_gpio: i2c6gpiogrp { - fsl,pins = , /* SMARC P121 - I2C_PM_CK */ - ; /* SMARC P122 - I2C_PM_DAT */ - }; - - pinctrl_lvds_dsi_sel: lvdsdsiselgrp { - fsl,pins = ; /* LVDS_DSI_SEL */ - }; - - pinctrl_mcu_int: mcuintgrp { - fsl,pins = ; /* MCU_INT# */ - }; - - /* SMARC LCD1_BKLT_PWM */ - pinctrl_lcd1_bklt_pwm1: pwm1grp { - fsl,pins = ; /* SMARC S122 - LCD1_BKLT_PWM */ - }; - - /* SMARC LCD0_BKLT_PWM */ - pinctrl_lcd0_bklt_pwm2: pwm2grp { - fsl,pins = ; /* SMARC S141 - LCD0_BKLT_PWM */ - }; - - /* PCAL6408 Interrupt */ - pinctrl_pcal6408: pcal6408intgrp { - fsl,pins = ; /* GPIO_EX_INT# */ - }; - - /* SMARC PCIE_A */ - pinctrl_pcie: pciegrp { - fsl,pins = , /* SMARC S146 - PCIE_WAKE# */ - ; /* SMARC P75 - PCIE_A_RST# */ - }; - - /* PMIC Interrupt */ - pinctrl_pmic: pmicintgrp { - fsl,pins = ; /* PMIC_INT# */ - }; - - /* SMARC I2S0 */ - pinctrl_sai1: sai1grp { - fsl,pins = , /* SMARC S42 - I2S0_CK */ - , /* SMARC S39 - I2S0_LRCLK */ - , /* SMARC S41 - I2S0_SDIN */ - ; /* SMARC S40 - I2S0_SDOUT */ - }; - - /* SMARC AUDIO_MCK */ - pinctrl_sai1_mclk: sai1mclkgrp { - fsl,pins = ; /* SMARC S38 - AUDIO_MCK */ - }; - - /* SMARC I2S2 */ - pinctrl_sai3: sai3grp { - fsl,pins = , /* SMARC S52 - I2S2_SDIN */ - , /* SMARC S53 - I2S2_CK */ - , /* SMARC S51 - I2S2_SDOUT */ - ; /* SMARC S50 - I2S2_LRCLK */ - }; - - /* SMARC SLEEP# */ - pinctrl_sleep: sleepgrp { - fsl,pins = ; /* SMARC S149 - SLEEP# */ - }; - - /* SMARC SMB_ALERT# */ - pinctrl_smb_alert: smbalertgrp { - fsl,pins = ; /* SMARC P1 - SMB_ALERT# */ - }; - - /* TPM_CS# */ - pinctrl_tpm_cs: tpmcsgrp { - fsl,pins = ; /* TPM_CS# */ - }; - - /* WIFI_BT_WKUP_HOST/TPM_INT# */ - pinctrl_tpm_irq_wifi_bt_wkup: tpmirq-wifibtwkupgrp { - fsl,pins = ; /* WIFI_BT_WKUP_HOST/TPM_INT# */ - }; - - /* SMARC SER0 */ - pinctrl_uart1: uart1grp { - fsl,pins = , /* SMARC P132 - SER2_CTS */ - , /* SMARC P131 - SER2_RTS */ - , /* SMARC P130 - SER2_RX */ - ; /* SMARC P139 - SER2_TX */ - }; - - /* SMARC SER2 */ - pinctrl_uart2: uart2grp { - fsl,pins = , /* SMARC P139 - SER2_CTS */ - , /* SMARC P138 - SER2_RTS */ - , /* SMARC P137 - SER2_RX */ - ; /* SMARC P136 - SER2_TX */ - }; - - /* SMARC SER3 */ - pinctrl_uart3: uart3grp { - fsl,pins = , /* SMARC P141 - SER3_RX */ - ; /* SMARC P140 - SER3_TX */ - }; - - /* SMARC SER1 */ - pinctrl_uart4: uart4grp { - fsl,pins = , /* SMARC P135 - SER1_RX */ - ; /* SMARC P134 - SER1_TX */ - }; - - /* SMARC USB0_OTG_ID */ - pinctrl_usb0_id: usb0idgrp { - fsl,pins = ; /* SMARC P64 - USB0_OTG_ID */ - }; - - /* SMARC USB0_EN_OC# */ - pinctrl_usb0_en_oc: usb0enocgrp { - fsl,pins = ; /* SMARC P62 - USB0_EN_OC# */ - }; - - /* On module USB Hub VBUS, or SMARC USB2_EN_OC# depending on assembling */ - pinctrl_usb1_en_oc: usb1enocgrp { - fsl,pins = ; /* SMARC P71 - USB2_EN_OC# */ - }; - - /* On-module Wi-Fi */ - pinctrl_usdhc1: usdhc1grp { - fsl,pins = , /* WiFi_SDIO_CLK */ - , /* WiFi_SDIO_CMD */ - , /* WiFi_SDIO_DATA0 */ - , /* WiFi_SDIO_DATA1 */ - , /* WiFi_SDIO_DATA2 */ - ; /* WiFi_SDIO_DATA3 */ - }; - - /* On-module Wi-Fi */ - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { - fsl,pins = , /* WiFi_SDIO_CLK */ - , /* WiFi_SDIO_CMD */ - , /* WiFi_SDIO_DATA0 */ - , /* WiFi_SDIO_DATA1 */ - , /* WiFi_SDIO_DATA2 */ - ; /* WiFi_SDIO_DATA3 */ - }; - - /* On-module Wi-Fi */ - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { - fsl,pins = , /* WiFi_SDIO_CLK */ - , /* WiFi_SDIO_CMD */ - , /* WiFi_SDIO_DATA0 */ - , /* WiFi_SDIO_DATA1 */ - , /* WiFi_SDIO_DATA2 */ - ; /* WiFi_SDIO_DATA3 */ - }; - - /* SMARC SDIO */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins = , /* SMARC P36 - SDIO_CK */ - , /* SMARC P34 - SDIO_CMD */ - , /* SMARC P39 - SDIO_DO */ - , /* SMARC P40 - SDIO_D1 */ - , /* SMARC P41 - SDIO_D2 */ - ; /* SMARC P42 - SDIO_D3 */ - }; - - /* SMARC SDIO 100MHz */ - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { - fsl,pins = , /* SMARC P36 - SDIO_CK */ - , /* SMARC P34 - SDIO_CMD */ - , /* SMARC P39 - SDIO_DO */ - , /* SMARC P40 - SDIO_D1 */ - , /* SMARC P41 - SDIO_D2 */ - ; /* SMARC P42 - SDIO_D3 */ - }; - - /* SMARC SDIO 200MHz */ - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - fsl,pins = , /* SMARC P36 - SDIO_CK */ - , /* SMARC P34 - SDIO_CMD */ - , /* SMARC P39 - SDIO_DO */ - , /* SMARC P40 - SDIO_D1 */ - , /* SMARC P41 - SDIO_D2 */ - ; /* SMARC P42 - SDIO_D3 */ - }; - - /* SMARC SDIO_CD# */ - pinctrl_usdhc2_cd: usdhc2cdgrp { - fsl,pins = ; /* SMARC P35 - SDIO_CD# */ - }; - - /* SMARC SDIO_CD# */ - pinctrl_usdhc2_cd_sleep: usdhc2cdslpgrp { - fsl,pins = ; /* SMARC P35 - SDIO_CD# */ - }; - - /* SMARC SDIO_PWR_EN */ - pinctrl_usdhc2_pwr_en: usdhc2pwrengrp { - fsl,pins = ; /* SMARC P37 - SDIO_PWR_EN */ - }; - - /* SMARC SDIO Sleep - Avoid backfeeding with removed card power */ - pinctrl_usdhc2_sleep: usdhc2slpgrp { - fsl,pins = , /* SMARC P36 - SDIO_CK */ - , /* SMARC P34 - SDIO_CMD */ - , /* SMARC P39 - SDIO_DO */ - , /* SMARC P39 - SDIO_D1 */ - , /* SMARC P39 - SDIO_D2 */ - ; /* SMARC P39 - SDIO_D3 */ - }; - - pinctrl_usdhc2_vsel: usdhc2vselgrp { - fsl,pins = ; /* PMIC_USDHC_VSELECT */ - }; - - /* SMARC SDIO_WP */ - pinctrl_usdhc2_wp: usdhc2wpgrp { - fsl,pins = ; /* SMARC P33 - SDIO_WP */ - }; - - /* On-module eMMC */ - pinctrl_usdhc3: usdhc3grp { - fsl,pins = , /* eMMC_STROBE */ - , /* eMMC_DATA5 */ - , /* eMMC_DATA6 */ - , /* eMMC_DATA7 */ - , /* eMMC_DATA0 */ - , /* eMMC_DATA1 */ - , /* eMMC_DATA2 */ - , /* eMMC_DATA3 */ - , /* eMMC_DATA4 */ - , /* eMMC_CLK */ - ; /* eMMC_CMD */ - }; - - /* On-module eMMC */ - pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { - fsl,pins = , /* eMMC_STROBE */ - , /* eMMC_DATA5 */ - , /* eMMC_DATA6 */ - , /* eMMC_DATA7 */ - , /* eMMC_DATA0 */ - , /* eMMC_DATA1 */ - , /* eMMC_DATA2 */ - , /* eMMC_DATA3 */ - , /* eMMC_DATA4 */ - , /* eMMC_CLK */ - ; /* eMMC_CMD */ - }; - - /* On-module eMMC */ - pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { - fsl,pins = , /* eMMC_STROBE */ - , /* eMMC_DATA5 */ - , /* eMMC_DATA6 */ - , /* eMMC_DATA7 */ - , /* eMMC_DATA0 */ - , /* eMMC_DATA1 */ - , /* eMMC_DATA2 */ - , /* eMMC_DATA3 */ - , /* eMMC_DATA4 */ - , /* eMMC_CLK */ - ; /* eMMC_CMD */ - }; - - /* SoC Watchdog */ - pinctrl_wdog: wdoggrp { - fsl,pins = ; /* CTRL_SOC_WDOG */ - }; - - /* On-module Wi-Fi power enable */ - pinctrl_wifi_pwr_en: wifipwrengrp { - fsl,pins = ; /* CTRL_EN_WIFI */ - }; -}; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index e7bc154b805..f7b80f3178a 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -296,6 +296,7 @@ config TARGET_TORADEX_SMARC_IMX8MP select IMX8MP select SUPPORT_SPL select IMX8M_LPDDR4 + imply OF_UPSTREAM config TARGET_VERDIN_IMX8MM bool "Support Toradex Verdin iMX8M Mini module" diff --git a/configs/toradex-smarc-imx8mp_defconfig b/configs/toradex-smarc-imx8mp_defconfig index f8a984f1e6b..c0d2661749c 100644 --- a/configs/toradex-smarc-imx8mp_defconfig +++ b/configs/toradex-smarc-imx8mp_defconfig @@ -8,7 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-toradex-smarc-dev" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-toradex-smarc-dev" CONFIG_TARGET_TORADEX_SMARC_IMX8MP=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y -- cgit v1.2.3