From 66b5ee9c558ea5a4360a9bfe0bf894098ff69f7e Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 7 Jun 2024 10:41:17 +0200 Subject: riscv: add RISC-V fields to bdinfo command The firmware invoking main U-Boot uses * a0 to pass the boot hart * a1 to pass a device-tree Let the bdinfo command print this information, e.g. boot hart = 0x000000000000001b firmware fdt= 0x0000000087e00000 The firmware fdt field will only be printed if it is non-zero. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/lib/Makefile | 1 + arch/riscv/lib/bdinfo.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 arch/riscv/lib/bdinfo.c diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 9a05b662fd6..65dc49f6fa5 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -26,6 +26,7 @@ obj-y += setjmp.o obj-$(CONFIG_$(SPL_)SMP) += smp.o obj-$(CONFIG_SPL_BUILD) += spl.o obj-y += fdt_fixup.o +obj-$(CONFIG_$(SPL)CMD_BDI) += bdinfo.o # For building EFI apps CFLAGS_NON_EFI := -fstack-protector-strong diff --git a/arch/riscv/lib/bdinfo.c b/arch/riscv/lib/bdinfo.c new file mode 100644 index 00000000000..7734e51d670 --- /dev/null +++ b/arch/riscv/lib/bdinfo.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * RISC-V-specific information for the 'bdinfo' command + */ + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void arch_print_bdinfo(void) +{ + bdinfo_print_num_l("boot hart", gd->arch.boot_hart); + + if (gd->arch.firmware_fdt_addr) + bdinfo_print_num_ll("firmware fdt", + (long long)gd->arch.firmware_fdt_addr); +} -- cgit v1.3.1 From 36756308a215225e1a6421fc15e31780871059e4 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Wed, 19 Jun 2024 17:22:52 +0200 Subject: riscv: semihosting: correct alignment Commit 7400d34ba992 ("riscv: semihosting: replace inline assembly with assembly file") reduced the alignment of function smh_trap(). As described in the "RISC-V Semihosting" specification [1] the ssli, ebreak, and srai statements must all reside in the same memory page. [1] RISC-V Semihosting, Version 0.4, 12th June 2024 https://github.com/riscv-non-isa/riscv-semihosting Fixes: 7400d34ba992 ("riscv: semihosting: replace inline assembly with assembly file") Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/lib/semihosting.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/lib/semihosting.S b/arch/riscv/lib/semihosting.S index c0c571bce9b..49bb419a962 100644 --- a/arch/riscv/lib/semihosting.S +++ b/arch/riscv/lib/semihosting.S @@ -8,7 +8,7 @@ .pushsection .text.smh_trap, "ax" ENTRY(smh_trap) - .align 2 + .align 4 /* keep slli, ebreak, srai in same page */ .option push .option norvc /* semihosting sequence must be 32-bit wide */ -- cgit v1.3.1 From 763a5d03c4eaae3a842adc76141bcba639664e33 Mon Sep 17 00:00:00 2001 From: Andreas Schwab Date: Mon, 24 Jun 2024 11:46:58 +0200 Subject: board: sifive: unmatched: remove extra space in fdtfile value Fixes: 44a792c994 ("riscv: sifive: unmatched: migrate to text environment") Signed-off-by: Andreas Schwab Reviewed-by: Leo Yu-Chi Liang --- board/sifive/unmatched/unmatched.env | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/sifive/unmatched/unmatched.env b/board/sifive/unmatched/unmatched.env index 0f1e5a71747..34425dc9efa 100644 --- a/board/sifive/unmatched/unmatched.env +++ b/board/sifive/unmatched/unmatched.env @@ -16,4 +16,4 @@ partitions= name=loader1,start=17K,size=1M,type=${type_guid_gpt_loader1}; name=loader2,size=4MB,type=${type_guid_gpt_loader2}; name=system,size=-,bootable,type=${type_guid_gpt_system}; -fdtfile= CONFIG_DEFAULT_FDT_FILE +fdtfile=CONFIG_DEFAULT_FDT_FILE -- cgit v1.3.1 From dd3cd9eecc9846e7c37a97c9755d2a83fb995cbb Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Mon, 22 Jul 2024 11:15:58 +0800 Subject: Revert "riscv: dts: jh7110: Enable PLL node in SPL" This patch breaks speed SD function on Milk-V Mars CM Lite (DFRobot mini router carrier). Revert this commit for now. Link: https://lore.kernel.org/u-boot/ZpZSmdrst4z_Q4JQ@swlinux02/T/#mbcd32d430fe58a1dd8161c9f3cc073052501b701 This reverts commit e6b7aeef3df206b9f2a47e715d643b735d18ae73. Reported-by: E Shattow Signed-off-by: Leo Yu-Chi Liang --- arch/riscv/dts/jh7110-u-boot.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi index c09d5c91708..2f560e7296f 100644 --- a/arch/riscv/dts/jh7110-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-u-boot.dtsi @@ -93,10 +93,6 @@ bootph-pre-ram; }; -&pllclk { - bootph-pre-ram; -}; - &S7_0 { status = "okay"; }; -- cgit v1.3.1