From 6e212f32aaf312002a1ab1f3c18925e7c053f694 Mon Sep 17 00:00:00 2001 From: Stanley Chu Date: Thu, 7 Aug 2025 13:32:18 +0800 Subject: arm: dts: npcm8xx: add pinmux for VCD input Add pinmux to select the HSYNC signal as the VCD input. Signed-off-by: Stanley Chu Signed-off-by: Jim Liu --- arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi index bc047d4b443..6f933355d9e 100644 --- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi +++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi @@ -1056,5 +1056,9 @@ groups = "jtag2"; function = "jtag2"; }; + vcdhs_pins: vcdhs-pins { + groups = "vcdhs"; + function = "vcdhs"; + }; }; }; -- cgit v1.2.3 From ad3a33e57742bab08a8ca1a9e34c262b6fbf0268 Mon Sep 17 00:00:00 2001 From: Stanley Chu Date: Thu, 7 Aug 2025 13:32:19 +0800 Subject: pinctrl: npcm8xx: add support for setting VCD input source Add pinmux for the VCD input to use the HSYNC signal. Signed-off-by: Stanley Chu Signed-off-by: Jim Liu --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 67e564f85c3..c960ca3393d 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -23,6 +23,7 @@ #define TIPRSTC 0x50 #define CORSTC 0x5c #define FLOCKR1 0x74 +#define INTCR 0x3c #define INTCR4 0xc0 #define I2CSEGSEL 0xe0 #define MFSEL1 0x260 @@ -280,6 +281,7 @@ struct npcm8xx_pinctrl_priv { FUNC(lkgpo2, FLOCKR1, 8, 9) \ FUNC(nprd_smi, FLOCKR1, 20, 190) \ FUNC(mmcwp, FLOCKR1, 24, 153) \ + FUNC(vcdhs, INTCR, 27) \ FUNC(rg2refck, INTCR4, 6) \ FUNC(r1en, INTCR4, 12) \ FUNC(r2en, INTCR4, 13) \ -- cgit v1.2.3 From 3c632fc090dab1838cedb525e09d049a903c37a6 Mon Sep 17 00:00:00 2001 From: Stanley Chu Date: Thu, 7 Aug 2025 13:32:20 +0800 Subject: i2c: npcm: fix consecutive dm_i2c_read/write error When doing a dm_i2c_read followed by a dm_i2c_write, the subsequent transaction may get npcm_i2c_check_sda error because the module is still busy in STOP condition in previous dm_i2c_read. Always check and wait for module to be out of busy before starting an i2c transaction. Signed-off-by: Stanley Chu Signed-off-by: Jim Liu --- drivers/i2c/npcm_i2c.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/i2c/npcm_i2c.c b/drivers/i2c/npcm_i2c.c index c64752e1467..bff0d04f1a5 100644 --- a/drivers/i2c/npcm_i2c.c +++ b/drivers/i2c/npcm_i2c.c @@ -34,6 +34,7 @@ #define SMBCTL3_SDA_LVL BIT(6) /* SMBCST */ +#define SMBCST_BUSY BIT(0) #define SMBCST_BB BIT(1) #define SMBCST_TGSCL BIT(5) @@ -479,11 +480,17 @@ static int npcm_i2c_xfer(struct udevice *dev, struct npcm_i2c_bus *bus = dev_get_priv(dev); struct npcm_i2c_regs *reg = bus->reg; int ret = 0, err = 0; + u8 val; if (nmsgs < 1 || nmsgs > 2) { printf("%s: commands not support\n", __func__); return -EREMOTEIO; } + + /* Wait for module out of busy */ + if (readb_poll_timeout(®->cst, val, !(val & SMBCST_BUSY), 1000)) + return -EBUSY; + /* clear ST register */ writeb(0xFF, ®->st); -- cgit v1.2.3 From 59a1c2875597c234eb2cde3ba2e48880523ab92e Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Thu, 7 Aug 2025 13:32:21 +0800 Subject: arm: dts: nuvoton: Change timer node npcm_timer driver is changed to use SECCNT counter. Signed-off-by: Jim Liu --- arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index db7517cc9ba..be06b2a0cae 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -62,6 +62,11 @@ reg = <0x0 0xf0801000 0x0 0x1000>; }; + timer0: timer@f0801068 { + compatible = "nuvoton,npcm845-timer"; + reg = <0x0 0xf0801068 0x0 0x8>; + }; + sdhci0: sdhci@f0842000 { compatible = "nuvoton,npcm845-sdhci"; reg = <0x0 0xf0842000 0x0 0x100>; @@ -157,14 +162,6 @@ status = "disabled"; }; - timer0: timer@8000 { - compatible = "nuvoton,npcm845-timer"; - interrupts = ; - reg = <0x8000 0x1C>; - clocks = <&clk NPCM8XX_CLK_REFCLK>; - clock-names = "refclk"; - }; - serial0: serial@0 { compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; reg = <0x0 0x1000>; -- cgit v1.2.3 From 121927e37be0725139d5b07d08361ac266685808 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Thu, 7 Aug 2025 13:32:22 +0800 Subject: misc: npcm_host_intf: Add Arbel eSPI workaround Enabling an eSPI channel(e.g. Peripheral Channel) during an eSPI transaction might cause the BMC eSPI module to transition to a wrong state and therefore respond with FATAL_ERROR on incoming transaction. Add workaround to avoid the module getting into the wrong state. Signed-off-by: Stanley Chu Signed-off-by: Jim Liu --- drivers/misc/npcm_host_intf.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/misc/npcm_host_intf.c b/drivers/misc/npcm_host_intf.c index 58bab888c3c..2c89bd7a167 100644 --- a/drivers/misc/npcm_host_intf.c +++ b/drivers/misc/npcm_host_intf.c @@ -22,6 +22,8 @@ /* ESPI Register offsets */ #define ESPICFG 0x4 #define ESPIHINDP 0x80 +#define ESPI_TEN 0xF0 +#define ESPI_ENG 0xF1 /* MFSEL bit fileds */ #define MFSEL1_LPCSEL BIT(26) @@ -40,6 +42,9 @@ #define AUTO_HS2 BIT(12) #define AUTO_HS3 BIT(16) +#define ESPI_TEN_ENABLE 0x55 +#define ESPI_TEN_DISABLE 0 + static int npcm_host_intf_bind(struct udevice *dev) { struct regmap *syscon; @@ -83,6 +88,13 @@ static int npcm_host_intf_bind(struct udevice *dev) val &= ~(CHSUPP_MASK | IOMODE_MASK | MAXFREQ_MASK); val |= IOMODE_SDQ | MAXFREQ_33MHZ | FIELD_PREP(CHSUPP_MASK, ch_supp); writel(val, base + ESPICFG); + + if (device_is_compatible(dev, "nuvoton,npcm845-host-intf")) { + /* Workaround: avoid eSPI module getting into wrong state */ + writeb(ESPI_TEN_ENABLE, base + ESPI_TEN); + writeb(BIT(6), base + ESPI_ENG); + writeb(ESPI_TEN_DISABLE, base + ESPI_TEN); + } } else if (!strcmp(type, "lpc")) { /* Select LPC pin function */ regmap_update_bits(syscon, MFSEL4, MFSEL4_ESPISEL, 0); -- cgit v1.2.3 From 987880581646d5836d2485e5f7a5af6ce8600da1 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Thu, 7 Aug 2025 13:32:23 +0800 Subject: misc: npcm_host_intf: Disable pending KCS/BPC interrupts If there is an unhandled KCS/BPC pending interrupt after reboot, the KCS/BPC Linux driver may trigger interrupts immediately upon registering the irq. However, since the driver is not yet initialized to handle them, this can lead to unexpected behavior. To prevent this, disable KCS/BPC interrupts in u-boot to avoid pending interrupts from being raised before the Linux driver is fully initialized. Signed-off-by: Stanley Chu Signed-off-by: Jim Liu --- arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 2 +- drivers/misc/npcm_host_intf.c | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi index be06b2a0cae..6866005336f 100644 --- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi @@ -141,7 +141,7 @@ host_intf: host_intf@9f000 { compatible = "nuvoton,npcm845-host-intf"; - reg = <0x9f000 0x1000>; + reg = <0x9f000 0x1000>, <0x7000 0x40>; type = "espi"; ioaddr = <0x4e>; channel-support = <0xf>; diff --git a/drivers/misc/npcm_host_intf.c b/drivers/misc/npcm_host_intf.c index 2c89bd7a167..e3b0663625b 100644 --- a/drivers/misc/npcm_host_intf.c +++ b/drivers/misc/npcm_host_intf.c @@ -45,10 +45,20 @@ #define ESPI_TEN_ENABLE 0x55 #define ESPI_TEN_DISABLE 0 +/* KCS/BPC interrupt control */ +#define BPCFEN 0x46 +#define FRIE BIT(3) +#define HRIE BIT(4) +#define KCS1CTL 0x18 +#define KCS2CTL 0x2a +#define KCS3CTL 0x3c +#define IBFIE BIT(0) +#define OBEIE BIT(1) + static int npcm_host_intf_bind(struct udevice *dev) { struct regmap *syscon; - void __iomem *base; + void __iomem *base, *kcs_base; u32 ch_supp, val; u32 ioaddr; const char *type; @@ -104,6 +114,15 @@ static int npcm_host_intf_bind(struct udevice *dev) /* Release host wait */ setbits_8(SMC_CTL_REG_ADDR, SMC_CTL_HOSTWAIT); + kcs_base = dev_read_addr_index_ptr(dev, 1); + if (kcs_base) { + /* Disable KCS/BPC interrupts */ + clrbits_8(kcs_base + BPCFEN, FRIE | HRIE); + clrbits_8(kcs_base + KCS1CTL, IBFIE | OBEIE); + clrbits_8(kcs_base + KCS2CTL, IBFIE | OBEIE); + clrbits_8(kcs_base + KCS3CTL, IBFIE | OBEIE); + } + return 0; } -- cgit v1.2.3 From 58fa3b5159cf4090ed926507d7778ebd1dc0686f Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Thu, 7 Aug 2025 13:32:24 +0800 Subject: configs: npcm: remove CONFIG_SYS_SKIP_UART_INIT Set the uart clock frequency according to dts by default. If CONFIG_SYS_SKIP_UART_INIT is not enabled, no need to do board_set_console to change the console bootarg. Signed-off-by: Jim Liu --- board/nuvoton/arbel_evb/arbel_evb.c | 9 ++++++++- board/nuvoton/poleg_evb/poleg_evb.c | 2 ++ configs/arbel_evb_defconfig | 1 - configs/poleg_evb_defconfig | 1 - 4 files changed, 10 insertions(+), 3 deletions(-) diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index 16dbaa96e8c..05c4dd187fe 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -94,5 +94,12 @@ int dram_init_banksize(void) return 0; } -EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, board_set_console); +static int last_stage_init(void) +{ +#ifdef CONFIG_SYS_SKIP_UART_INIT + return board_set_console(); +#endif + return 0; +} +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c index 0a3c052a019..9dfe9744363 100644 --- a/board/nuvoton/poleg_evb/poleg_evb.c +++ b/board/nuvoton/poleg_evb/poleg_evb.c @@ -64,7 +64,9 @@ static int last_stage_init(void) } sprintf(value, "ttyS%d,115200n8", dev->seq_); env_set("console", value); +#ifdef CONFIG_SYS_SKIP_UART_INIT return board_set_console(); +#endif } return 0; diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 8572ad204d8..11ad19f56db 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -17,7 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x06208000 CONFIG_WATCHDOG_TIMEOUT_MSECS=120000 # CONFIG_PSCI_RESET is not set CONFIG_ARCH_NPCM8XX=y -CONFIG_SYS_SKIP_UART_INIT=y CONFIG_TARGET_ARBEL_EVB=y CONFIG_ENV_ADDR=0x807C0000 # CONFIG_EFI_LOADER is not set diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index a87e918117c..0803fb1a857 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm750-evb" CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_TARGET_POLEG=y -CONFIG_SYS_SKIP_UART_INIT=y CONFIG_ENV_ADDR=0x80100000 CONFIG_FIT=y CONFIG_USE_BOOTCOMMAND=y -- cgit v1.2.3