From cb3e29805c52c50be04b0792eeb2d5f47f245e15 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Sat, 25 Nov 2023 17:43:16 +0000 Subject: sunxi: H616: OrangePi Zero 2: enable USB power supply The OrangePi Zero 2 has a USB VBUS regulator, controlled by pin PC16. This is correctly described in the DT, but the patches for supporting this are still pending. Meanwhile add our good old CONFIG_USB1_VBUS_PIN to the defconfig file, to enable power on the USB port and allow using a USB flash drive, for instance. Fixes: 6acc5fa581b4 ("sunxi: H616: enable USB support for H616 boards") Reported-by: Mikhail Kalashnikov Signed-off-by: Andre Przywara --- configs/orangepi_zero2_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index f13735e91c7..50009e823cb 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438 CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_DDR3_1333=y +CONFIG_USB1_VBUS_PIN="PC16" CONFIG_R_I2C_ENABLE=y CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -- cgit v1.3.1 From 0d8ac5644eaf774c52669921ac4152874c6fc4ca Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 13 Jul 2022 16:27:57 +0100 Subject: sunxi: h616: (really) lower SPL stack address to avoid BROM data When using the USB OTG FEL mode on the Allwinner H616, the BootROM stores some data at the end of SRAM C. This is also the location where we place the initial SPL stack, so it will overwrite this data. We still need the BROM code after running the SPL, so should leave that area alone. Interestingly this does not seem to have an adverse effect, I guess on the "way out" (when we return to FEL after the SPL has run), this data is not needed by the BROM, for just the trailing end of the USB operation. However this is still wrong, and we should not clobber BROM data. Lower the SPL stack address to be situated right below the swap buffers we use in sunxi-fel: that should be out of the way of everyone else. This obsoletes a previous commit (eb53e7743c8f) with the same name: that one was changing the address in an *unused* macro in sunxi_common.h, so the previous patch didn't have any effect at all. Fixes: eb53e7743c8f ("sunxi: h616: lower SPL stack address to avoid BROM data") Signed-off-by: Andre Przywara --- common/spl/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 25cd18afda7..c521b02f4a3 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -370,7 +370,7 @@ config SPL_STACK default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB default 0x118000 if MACH_SUN50I_H6 - default 0x58000 if MACH_SUN50I_H616 + default 0x52a00 if MACH_SUN50I_H616 default 0x40000 if MACH_SUN8I_R528 default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5 default 0x18000 if MACH_SUN9I -- cgit v1.3.1 From 21b8051939b1a105ef8b128b2f492810ba34bc9a Mon Sep 17 00:00:00 2001 From: Stephen Graf Date: Fri, 1 Dec 2023 10:50:39 -0800 Subject: sunxi: correct documentation for SPI flashing The mtd_debug write does not work in this context. The flashcp command does work, provides both the erase and write functions and with the verbose option gives good feedback. Signed-off-by: Stephen Graf Reviewed-by: Andre Przywara --- doc/board/allwinner/sunxi.rst | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/doc/board/allwinner/sunxi.rst b/doc/board/allwinner/sunxi.rst index 797222d8d34..d0c89b956b1 100644 --- a/doc/board/allwinner/sunxi.rst +++ b/doc/board/allwinner/sunxi.rst @@ -251,8 +251,7 @@ the SPI flash content from Linux, using the `MTD utils`_:: # apt-get install mtd-utils # mtdinfo - # mtd_debug erase /dev/mtdX 0 0xf0000 - # mtd_debug write /dev/mtdX 0 0xf0000 u-boot-sunxi-with-spl.bin + # flashcp -v u-boot-sunxi-with-spl.bin /dev/mtdX ``/dev/mtdX`` needs to be replaced with the respective device name, as listed in the output of ``mtdinfo``. -- cgit v1.3.1 From 4bf34135fec54537368e2ac89b3971afff0d52eb Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Sun, 29 Oct 2023 15:40:09 +0800 Subject: sunxi: dts: arm64: update emac for Orange Pi Zero 3 The current emac setting is not suitable for Orange Pi Zero 3, move it back to Orange Pi Zero 2 DT. Also update phy mode and delay values for emac on Orange Pi Zero 3. With these changes, Ethernet now looks stable. Fixes: 95c3b0635ea4 ("sunxi: dts: arm64: update devicetree files from Linux-v6.6-rc6") Signed-off-by: Chukun Pan Reviewed-by: Jernej Skrabec --- arch/arm/dts/sun50i-h616-orangepi-zero.dtsi | 3 --- arch/arm/dts/sun50i-h616-orangepi-zero2.dts | 3 +++ arch/arm/dts/sun50i-h618-orangepi-zero3.dts | 2 ++ 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi index 15290e6892f..fc7315b9440 100644 --- a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi +++ b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi @@ -68,10 +68,7 @@ &emac0 { pinctrl-names = "default"; pinctrl-0 = <&ext_rgmii_pins>; - phy-mode = "rgmii"; phy-handle = <&ext_rgmii_phy>; - allwinner,rx-delay-ps = <3100>; - allwinner,tx-delay-ps = <700>; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts index d83852e72f0..b5d713926a3 100644 --- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts +++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts @@ -13,6 +13,9 @@ }; &emac0 { + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; + phy-mode = "rgmii"; phy-supply = <®_dcdce>; }; diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts index 00fe28caac9..b3b1b869212 100644 --- a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts +++ b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts @@ -13,6 +13,8 @@ }; &emac0 { + allwinner,tx-delay-ps = <700>; + phy-mode = "rgmii-rxid"; phy-supply = <®_dldo1>; }; -- cgit v1.3.1 From 9ac57fb3a25708d4406d3ac32e3ef09cce331bbf Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 13 Nov 2023 01:16:48 +0000 Subject: mtd: spi-nor: Add support for zBIT ZB25VQ128 Add support for the zBIT ZB25VQ128 (128M-bit) SPI NOR flash memory chip, as used on the Xunlong Orange Pi Zero 3 board. Signed-off-by: Andre Przywara Reviewed-by: Dragan Simic --- drivers/mtd/spi/Kconfig | 5 +++++ drivers/mtd/spi/spi-nor-ids.c | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 732b0760452..abed392c28d 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -224,6 +224,11 @@ config SPI_FLASH_XTX Add support for various XTX (XTX Technology Limited) SPI flash chips (XT25xxx). +config SPI_FLASH_ZBIT + bool "ZBIT SPI flash support" + help + Add support for Zbit Semiconductor Inc. SPI flash chips (ZB25xxx). + endif config SPI_FLASH_USE_4K_SECTORS diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3cb132dcffc..f86e7ff8e58 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -571,6 +571,11 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, +#endif +#ifdef CONFIG_SPI_FLASH_ZBIT + /* Zbit Semiconductor Inc. */ + { INFO("zb25vq128", 0x5e4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif { }, }; -- cgit v1.3.1 From 929f198d07f39b4a0b901a9f022581bf540bee1f Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Tue, 17 Oct 2023 17:08:52 +0100 Subject: sunxi: H616: remove default AXP305 selection The original H616 devices released about three years ago were typically paired with an X-Powers AXP305 PMIC. Newer devices uses the smaller AXP313, and there seem to be far more systems with this PMIC around now. Remove the default AXP305 selection for the H616 SoC from the Kconfig, and move the PMIC selection into the board defconfig files instead. Signed-off-by: Andre Przywara Reviewed-by: Jaehoon Chung --- configs/orangepi_zero2_defconfig | 1 + configs/x96_mate_defconfig | 1 + drivers/power/Kconfig | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 50009e823cb..98aed846f1f 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_I2C_SPEED=400000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y +CONFIG_AXP305_POWER=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig index 318951e19c2..e805e0952b3 100644 --- a/configs/x96_mate_defconfig +++ b/configs/x96_mate_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 +CONFIG_AXP305_POWER=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 2395720c99c..33b8bc1214d 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -56,7 +56,6 @@ choice depends on ARCH_SUNXI default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40 - default AXP305_POWER if MACH_SUN50I_H616 default AXP818_POWER if MACH_SUN8I_A83T default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S -- cgit v1.3.1 From d2e1cc69a24719e9939a84dc42bdf281af6ec35d Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 18 Oct 2023 01:06:52 +0100 Subject: sunxi: H616: Add OrangePi Zero 3 board support The OrangePi Zero 3 is a small development board featuring the Allwinner H618 SoC, shipping with up to 4GB of DRAM, Gigabit Ethernet, a micro-HDMI connector and two USB sockets. The board uses LPDDR4 DRAM and an X-Powers AXP313a PMIC, support for which was recently added to U-Boot. Add a defconfig file selecting the right drivers and DRAM options. Since the .dts file was synced from the Linux kernel repo already, we just need to add one line to the Makefile to actually build the .dtb. The DRAM parameters were derived from the values found in the BSP DRAM drivers on the SPI NOR flash. Signed-off-by: Andre Przywara Tested-by: Mikhail Kalashnikov Tested-by: Bob McChesney Tested-by: Stephen Graf --- arch/arm/dts/Makefile | 1 + board/sunxi/MAINTAINERS | 5 +++++ configs/orangepi_zero3_defconfig | 32 ++++++++++++++++++++++++++++++++ 3 files changed, 38 insertions(+) create mode 100644 configs/orangepi_zero3_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1be08c5fdc2..5fc888680b3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -835,6 +835,7 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \ sun50i-h6-tanix-tx6-mini.dtb dtb-$(CONFIG_MACH_SUN50I_H616) += \ sun50i-h616-orangepi-zero2.dtb \ + sun50i-h618-orangepi-zero3.dtb \ sun50i-h616-x96-mate.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-amarula-relic.dtb \ diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 00614372119..f556857a391 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -455,6 +455,11 @@ M: Jernej Skrabec S: Maintained F: configs/orangepi_zero2_defconfig +ORANGEPI ZERO 3 BOARD +M: Andre Przywara +S: Maintained +F: configs/orangepi_zero3_defconfig + ORANGEPI PC 2 BOARD M: Andre Przywara S: Maintained diff --git a/configs/orangepi_zero3_defconfig b/configs/orangepi_zero3_defconfig new file mode 100644 index 00000000000..5a019fed84b --- /dev/null +++ b/configs/orangepi_zero3_defconfig @@ -0,0 +1,32 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero3" +CONFIG_SPL=y +CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e +CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee +CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 +CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 +CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624 +CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f +CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_LPDDR4=y +CONFIG_DRAM_CLK=792 +CONFIG_USB1_VBUS_PIN="PC16" +CONFIG_R_I2C_ENABLE=y +CONFIG_SPL_SPI_SUNXI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=400000 +CONFIG_SPI_FLASH_ZBIT=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_SUN8I_EMAC=y +CONFIG_AXP313_POWER=y +CONFIG_SPI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y -- cgit v1.3.1