From eac5696bb83cee4ae63e96da1f547f7e1a48752a Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 10 Jul 2026 13:56:33 -0500 Subject: clk: mediaTek: mt8518: add clock tree type flags Add clock tree type flags to the mt8518 clock tree structures. These will be used later for parent lookup. Clock trees had to be split now that each tree has a different type flag. Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-17-f3f3a4a28dca@baylibre.com Signed-off-by: David Lechner --- drivers/clk/mediatek/clk-mt8518.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c index 2b213e720a0..51599c10cd5 100644 --- a/drivers/clk/mediatek/clk-mt8518.c +++ b/drivers/clk/mediatek/clk-mt8518.c @@ -1500,30 +1500,42 @@ static const struct mtk_gate top_clks[] = { GATE_TOP7(CLK_TOP_DISP_DPI, CLK_TOP_DISP_DPI_CK_SEL, 0), }; -static const struct mtk_clk_tree mt8518_clk_tree = { +static const struct mtk_clk_tree mt8518_apmixed_clk_tree = { .pll_parent = EXT_PARENT(CLK_PAD_CLK26M), + .ext_clk_rates = ext_clock_rates, + .num_ext_clks = ARRAY_SIZE(ext_clock_rates), + .plls = apmixed_plls, + .num_plls = ARRAY_SIZE(apmixed_plls), + .type = MTK_CLK_TREE_APMIXED, +}; + +static const struct mtk_clk_tree mt8518_topckgen_clk_tree = { .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), .fdivs_offs = CLK_TOP_DMPLL, .muxes_offs = CLK_TOP_UART0_SEL, - .plls = apmixed_plls, .fclks = top_fixed_clks, .fdivs = top_fixed_divs, .muxes = top_muxes, - .num_plls = ARRAY_SIZE(apmixed_plls), .num_fclks = ARRAY_SIZE(top_fixed_clks), .num_fdivs = ARRAY_SIZE(top_fixed_divs), .num_muxes = ARRAY_SIZE(top_muxes), + .type = MTK_CLK_TREE_TOPCKGEN, +}; + +static const struct mtk_clk_tree mt8518_clk_tree = { + .ext_clk_rates = ext_clock_rates, + .num_ext_clks = ARRAY_SIZE(ext_clock_rates), }; static int mt8518_apmixedsys_probe(struct udevice *dev) { - return mtk_common_clk_init(dev, &mt8518_clk_tree); + return mtk_common_clk_init(dev, &mt8518_apmixed_clk_tree); } static int mt8518_topckgen_probe(struct udevice *dev) { - return mtk_common_clk_init(dev, &mt8518_clk_tree); + return mtk_common_clk_init(dev, &mt8518_topckgen_clk_tree); } static int mt8518_topckgen_cg_probe(struct udevice *dev) @@ -1551,6 +1563,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = { .name = "mt8518-apmixedsys", .id = UCLASS_CLK, .of_match = mt8518_apmixed_compat, + .bind = mtk_common_clk_parent_bind, .probe = mt8518_apmixedsys_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_apmixedsys_ops, @@ -1561,6 +1574,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = { .name = "mt8518-topckgen", .id = UCLASS_CLK, .of_match = mt8518_topckgen_compat, + .bind = mtk_common_clk_parent_bind, .probe = mt8518_topckgen_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_topckgen_ops, -- cgit v1.3.1