From 41b2182af73efcdfd074570976264dddacee5b70 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 29 Apr 2022 15:34:44 +0200 Subject: crypto: fsl_hash: Remove unnecessary alignment check in caam_hash() While working on an LX2160 based board and updating to latest mainline I noticed problems using the HW accelerated hash functions on this platform, when trying to boot a FIT Kernel image. Here the resulting error message: Using 'conf-freescale_lx2160a.dtb' configuration Trying 'kernel-1' kernel subimage Verifying Hash Integrity ... sha256Error: Address arguments are not aligned CAAM was not setup properly or it is faulty error! Bad hash value for 'hash-1' hash node in 'kernel-1' image node Bad Data Hash ERROR: can't get kernel image! Testing and checking with Gaurav Jain from NXP has revealed, that this alignment check is not necessary here at all. So let's remove this check completely. Signed-off-by: Stefan Roese Cc: Gaurav Jain Cc: dullfire@yahoo.com Reviewed-by: Gaurav Jain --- drivers/crypto/fsl/fsl_hash.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 9e6829b7ad4..575196778cc 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -176,12 +176,6 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, uint32_t *desc; unsigned int size; - if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || - !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { - puts("Error: Address arguments are not aligned\n"); - return -EINVAL; - } - desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); -- cgit v1.3.1 From 48f44de8b41a2ed5579492a75806a37ce9e7e28e Mon Sep 17 00:00:00 2001 From: Christophe Leroy Date: Thu, 12 May 2022 16:21:53 +0200 Subject: Update email address and company name This patch updates my email address and company name. Signed-off-by: Christophe Leroy --- board/cssi/MAINTAINERS | 4 ++-- doc/git-mailrc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/cssi/MAINTAINERS b/board/cssi/MAINTAINERS index cbf1406a540..7d237b0b209 100644 --- a/board/cssi/MAINTAINERS +++ b/board/cssi/MAINTAINERS @@ -1,5 +1,5 @@ -BOARDS from CS Systemes d'Information -M: Christophe Leroy +BOARDS from CS GROUP France +M: Christophe Leroy S: Maintained F: board/cssi/ F: include/configs/MCR3000.h diff --git a/doc/git-mailrc b/doc/git-mailrc index 63c2f6e7daa..b00c2781901 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -95,7 +95,7 @@ alias nios2 nios alias powerpc uboot, afleming, stroese, wd, priyankajain, mariosix alias ppc powerpc -alias mpc8xx uboot, wd, Christophe Leroy +alias mpc8xx uboot, wd, Christophe Leroy alias mpc83xx uboot, mariosix alias mpc85xx uboot, afleming, priyankajain -- cgit v1.3.1 From 761157d3100be5918620f6c82bc119dbcc0637da Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Thu, 12 May 2022 08:21:01 +0200 Subject: arch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlock Without this register unlock it is not possible to configure the pinmux used for mcu spi0. Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes") Signed-off-by: Christian Gmeiner Reviewed-by: Nishanth Menon --- arch/arm/mach-k3/am642_init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c index add7ea83775..b16de9c9f08 100644 --- a/arch/arm/mach-k3/am642_init.c +++ b/arch/arm/mach-k3/am642_init.c @@ -47,6 +47,9 @@ static void ctrl_mmr_unlock(void) mmr_unlock(CTRL_MMR0_BASE, 3); mmr_unlock(CTRL_MMR0_BASE, 5); mmr_unlock(CTRL_MMR0_BASE, 6); + + /* Unlock all MCU_PADCFG_MMR1 module registers */ + mmr_unlock(MCU_PADCFG_MMR1_BASE, 1); } /* -- cgit v1.3.1 From 101a0f71e492d536bfe34f29caa065d04144ced0 Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Tue, 7 Jun 2022 10:13:00 +0200 Subject: .gitignore: add files produced by b4 b4 utility [1] is introduced by Linux Kernel developers and used to fetch patches and patch series from lore.kernel.org and is proven to be useful for U-Boot development. Detailed usage of the tool can be read under post from the original author [2]. This tool fetches files from the list and populates the source folder with additional files (*.cover and *.mbx) which are not ignored by git and shown as newly added files. Add those file patterns into .gitignore file, so they can be safely skipped during changes attestation. Link: [1]: https://pypi.org/project/b4/ Link: [2]: https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation Signed-off-by: Andrey Zhizhikin Reviewed-by: Tom Rini --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index 28c439f09fd..eb769f144c3 100644 --- a/.gitignore +++ b/.gitignore @@ -10,6 +10,7 @@ *.asn1.[ch] *.bin *.cfgout +*.cover *.dtb *.dtbo *.dtb.S @@ -22,6 +23,7 @@ *.lex.c *.lst *.mod.c +*.mbx *.o *.o.* *.order -- cgit v1.3.1 From e744bf3a4ba442a0e9ee1c509c70e1452e3a15d0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 14:30:14 -0400 Subject: odroid_xu3: Fix board environment variable When migrating CONFIG_CONS_INDEX to Kconfig, on this platform we changed what "board" evaluated to in the environment. This in turn meant that we would no longer try and find the correct fdtfile via the normal distro boot logic. Fix this by overriding board in the default environment, as done on other platforms where CONFIG_SYS_BOARD is not what we want to be in the board environment variable. Fixes: f76750d11133 ("Convert CONFIG_CONS_INDEX et al to Kconfig") Reported-by: Gabriel Hojda Tested-by: Gabriel Hojda Signed-off-by: Tom Rini --- include/configs/odroid_xu3.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index eb35d7b4ae2..360815bc03e 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -86,6 +86,7 @@ "rootfstype=ext4\0" \ "console=console=ttySAC2,115200n8\0" \ "fdtfile=exynos5422-odroidxu3.dtb\0" \ + "board=odroid\0" \ "board_name=odroidxu3\0" \ "mmcbootdev=0\0" \ "mmcrootdev=0\0" \ -- cgit v1.3.1 From 2ac0baab4aff1a0b45067d0b62f00c15f4e86856 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 9 Jun 2022 16:02:06 +0200 Subject: fs/squashfs: sqfs_read: Prevent arbitrary code execution Following Jincheng's report, an out-of-band write leading to arbitrary code execution is possible because on one side the squashfs logic accepts directory names up to 65535 bytes (u16), while U-Boot fs logic accepts directory names up to 255 bytes long. Prevent such an exploit from happening by capping directory name sizes to 255. Use a define for this purpose so that developers can link the limitation to its source and eventually kill it some day by dynamically allocating this array (if ever desired). Link: https://lore.kernel.org/all/CALO=DHFB+yBoXxVr5KcsK0iFdg+e7ywko4-e+72kjbcS8JBfPw@mail.gmail.com Reported-by: Jincheng Wang Signed-off-by: Miquel Raynal Tested-by: Jincheng Wang --- fs/squashfs/sqfs.c | 8 +++++--- include/fs.h | 4 +++- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 547d2fd4b30..b9f05efd9c9 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -975,6 +975,7 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) int i_number, offset = 0, ret; struct fs_dirent *dent; unsigned char *ipos; + u16 name_size; dirs = (struct squashfs_dir_stream *)fs_dirs; if (!dirs->size) { @@ -1057,9 +1058,10 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) return -SQFS_STOP_READDIR; } - /* Set entry name */ - strncpy(dent->name, dirs->entry->name, dirs->entry->name_size + 1); - dent->name[dirs->entry->name_size + 1] = '\0'; + /* Set entry name (capped at FS_DIRENT_NAME_LEN which is a U-Boot limitation) */ + name_size = min_t(u16, dirs->entry->name_size + 1, FS_DIRENT_NAME_LEN - 1); + strncpy(dent->name, dirs->entry->name, name_size); + dent->name[name_size] = '\0'; offset = dirs->entry->name_size + 1 + SQFS_ENTRY_BASE_LENGTH; dirs->entry_count--; diff --git a/include/fs.h b/include/fs.h index b43f16a692f..2195dc172ec 100644 --- a/include/fs.h +++ b/include/fs.h @@ -174,6 +174,8 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len, #define FS_DT_REG 8 /* regular file */ #define FS_DT_LNK 10 /* symbolic link */ +#define FS_DIRENT_NAME_LEN 256 + /** * struct fs_dirent - directory entry * @@ -194,7 +196,7 @@ struct fs_dirent { /** change_time: time of last modification */ struct rtc_time change_time; /** name: file name */ - char name[256]; + char name[FS_DIRENT_NAME_LEN]; }; /* Note: fs_dir_stream should be treated as opaque to the user of fs layer */ -- cgit v1.3.1 From 81755b8c20fe8ab7e10bd3a15fd48d37426ee45d Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 8 Jun 2022 00:42:22 +0100 Subject: usb: host: ehci-generic: Make resets and clocks optional The generic EHCI binding does not *require* resets and clocks properties, and indeed for instance the Allwinner A20 SoCs does not need or define any resets in its DT. Don't easily give up if clk_get_bulk() or reset_get_bulk() return an error, but check if that is due to the DT simply having no entries for either of them. This fixes USB operation on all boards with an Allwinner A10 or A20 SoC, which were reporting an error after commit ba96176ab70e2999: ======================= Bus usb@1c14000: ehci_generic usb@1c14000: Failed to get resets (err=-2) probe failed, error -2 ======================= Signed-off-by: Andre Przywara Reviewed-by: Patrice Chotard --- drivers/usb/host/ehci-generic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 4734af03962..15267e9a05a 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -69,7 +69,7 @@ static int ehci_usb_probe(struct udevice *dev) err = 0; ret = clk_get_bulk(dev, &priv->clocks); - if (ret) { + if (ret && ret != -ENOENT) { dev_err(dev, "Failed to get clocks (ret=%d)\n", ret); return ret; } @@ -81,7 +81,7 @@ static int ehci_usb_probe(struct udevice *dev) } err = reset_get_bulk(dev, &priv->resets); - if (err) { + if (ret && ret != -ENOENT) { dev_err(dev, "Failed to get resets (err=%d)\n", err); goto clk_err; } -- cgit v1.3.1 From b11b5afa6a17a2aedf174d4d4ee5d70b04e245c6 Mon Sep 17 00:00:00 2001 From: Heiko Thiery Date: Sat, 11 Jun 2022 08:09:04 +0200 Subject: arm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocks With the move to use DM_CLK the boards uart stops working. The used properties are not supported by the imx8mq clock driver. Thus the correct baudrate cannot be selected. Remove this properties here and the board can start with working uart. Keep it in the main dts because linux handles these porperties fine. Signed-off-by: Heiko Thiery --- arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi b/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi index 6f9c81462ea..d361f3f5592 100644 --- a/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-kontron-pitx-imx8m-u-boot.dtsi @@ -10,3 +10,18 @@ sd-uhs-sdr104; sd-uhs-ddr50; }; + +&uart1 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; + +&uart2 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; + +&uart3 { + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; +}; -- cgit v1.3.1 From ce9c579e2b7c877684d0140dd34b881e12fe5c59 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Tue, 14 Jun 2022 00:11:10 +0100 Subject: armv8: always use current exception level for TCR_ELx access Currently get_tcr() takes an "el" parameter, to select the proper version of the TCR_ELx system register. This is problematic in case of the Apple M1, since it runs with HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout, and we get the wrong version. For U-Boot's purposes the only sensible choice here is the current exception level, and indeed most callers treat it like that, so let's remove that parameter and read the current EL inside the function. This allows us to check for the E2H bit, and pretend it's EL1 in this case. There are two callers which don't care about the EL, and they pass 0, which looks wrong, but is irrelevant in these two cases, since we don't use the return value there. So the change cannot affect those two. Signed-off-by: Andre Przywara Reviewed-by: Mark Kettenis Tested-by: Mark Kettenis --- arch/arm/cpu/armv8/cache_v8.c | 28 ++++++++++++++++++++++++---- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 4 ++-- arch/arm/cpu/armv8/start.S | 2 +- arch/arm/include/asm/armv8/mmu.h | 4 +++- 4 files changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 3de18c7675b..e4736e56436 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -39,8 +39,28 @@ DECLARE_GLOBAL_DATA_PTR; * off: FFF */ -u64 get_tcr(int el, u64 *pips, u64 *pva_bits) +static int get_effective_el(void) { + int el = current_el(); + + if (el == 2) { + u64 hcr_el2; + + /* + * If we are using the EL2&0 translation regime, the TCR_EL2 + * looks like the EL1 version, even though we are in EL2. + */ + __asm__ ("mrs %0, HCR_EL2\n" : "=r" (hcr_el2)); + if (hcr_el2 & BIT(HCR_EL2_E2H_BIT)) + return 1; + } + + return el; +} + +u64 get_tcr(u64 *pips, u64 *pva_bits) +{ + int el = get_effective_el(); u64 max_addr = 0; u64 ips, va_bits; u64 tcr; @@ -115,7 +135,7 @@ static u64 *find_pte(u64 addr, int level) debug("addr=%llx level=%d\n", addr, level); - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -343,7 +363,7 @@ __weak u64 get_page_table_size(void) u64 va_bits; int start_level = 0; - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -415,7 +435,7 @@ __weak void mmu_setup(void) setup_all_pgtables(); el = current_el(); - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); /* enable the mmu */ diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 253008a9c13..c989a43cbeb 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -454,7 +454,7 @@ static inline void early_mmu_setup(void) /* point TTBR to the new table */ set_ttbr_tcr_mair(el, gd->arch.tlb_addr, - get_tcr(el, NULL, NULL) & + get_tcr(NULL, NULL) & ~(TCR_ORGN_MASK | TCR_IRGN_MASK), MEMORY_ATTRIBUTES); @@ -609,7 +609,7 @@ static inline void final_mmu_setup(void) invalidate_icache_all(); /* point TTBR to the new table */ - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); set_sctlr(get_sctlr() | CR_M); diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index d328e8c08a1..28f0df13f0d 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -125,7 +125,7 @@ pie_fixup_done: msr cptr_el3, xzr /* Enable FP/SIMD */ b 0f 2: mrs x1, hcr_el2 - tbnz x1, #34, 1f /* HCR_EL2.E2H */ + tbnz x1, #HCR_EL2_E2H_BIT, 1f /* HCR_EL2.E2H */ orr x1, x1, #HCR_EL2_AMO_EL2 /* Route SErrors to EL2 */ msr hcr_el2, x1 set_vbar vbar_el2, x0 diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index c36b2cf5a58..9f58cedb650 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -103,6 +103,8 @@ #define TCR_EL2_RSVD (1U << 31 | 1 << 23) #define TCR_EL3_RSVD (1U << 31 | 1 << 23) +#define HCR_EL2_E2H_BIT 34 + #ifndef __ASSEMBLY__ static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) { @@ -134,7 +136,7 @@ struct mm_region { extern struct mm_region *mem_map; void setup_pgtables(void); -u64 get_tcr(int el, u64 *pips, u64 *pva_bits); +u64 get_tcr(u64 *pips, u64 *pva_bits); #endif #endif /* _ASM_ARMV8_MMU_H_ */ -- cgit v1.3.1 From 2f51f946e3e97d3d9463e0f199d055dbcb4eef02 Mon Sep 17 00:00:00 2001 From: Corentin LABBE Date: Tue, 14 Jun 2022 08:44:07 +0000 Subject: board: ti: am335x: eth_cpsw should depend on CONFIG_NET The origin of this patch is the breaking of am335x-hs boot due to commit e41651fffda7 ("dm: Support parent devices with of-platdata") HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit. This commit added 10 driver binding pass and am335x boot only if one pass is done. SPL try to do more than one pass due to eth_cpsw failing. Since HS SPL does not need network (and NET is already disabled in config), the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled. Signed-off-by: Corentin LABBE Reviewed-by: Tom Rini Acked-by: Andrew Davis --- board/ti/am335x/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 7c0545892c9..2cb5b1cb3fc 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -902,7 +902,7 @@ int board_late_init(void) #endif /* CPSW plat */ -#if !CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(NET) && !CONFIG_IS_ENABLED(OF_CONTROL) struct cpsw_slave_data slave_data[] = { { .slave_reg_ofs = CPSW_SLAVE0_OFFSET, -- cgit v1.3.1 From 7e41abad9be46351b83c30ceefe55999a5376ece Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 14 Jun 2022 18:42:07 +0800 Subject: tools: binman: install btool btool is needed after install binman to system. Signed-off-by: Peng Fan Reviewed-by: Alper Nebi Yasak --- tools/binman/setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/binman/setup.py b/tools/binman/setup.py index 5ed94abdaf9..9a9206eb044 100644 --- a/tools/binman/setup.py +++ b/tools/binman/setup.py @@ -5,7 +5,7 @@ setup(name='binman', version='1.0', license='GPL-2.0+', scripts=['binman'], - packages=['binman', 'binman.etype'], + packages=['binman', 'binman.etype', 'binman.btool'], package_dir={'binman': ''}, package_data={'binman': ['README.rst', 'entries.rst']}, classifiers=['Environment :: Console', -- cgit v1.3.1 From 3c07d639ede998cb682c284d1ffc4a3ddb062e13 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 1 May 2022 18:43:55 +0200 Subject: net: Fix discuss discard typo Replace discuss with discard, that is what happens with packet with incorrect checksum. Fix the typo. Fixes: 4b37fd146bb ("Convert CONFIG_UDP_CHECKSUM to Kconfig") Signed-off-by: Marek Vasut Cc: Ramon Fried Cc: Simon Glass --- net/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/Kconfig b/net/Kconfig index 964a4fe4999..564ea8b2d28 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -158,7 +158,7 @@ config UDP_CHECKSUM default y if SANDBOX help Enable this to verify the checksum on UDP packets. If the checksum - is wrong then the packet is discussed and an error is shown, like + is wrong then the packet is discarded and an error is shown, like "UDP wrong checksum 29374a23 30ff3826" config BOOTP_SERVERIP -- cgit v1.3.1