From 83311886151f80ef24d30f850baece07d08863cb Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:11 -0600 Subject: x86: Rename existing FSP code to fsp1 Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/Kconfig | 25 +- arch/x86/cpu/baytrail/acpi.c | 2 +- arch/x86/cpu/baytrail/fsp_configs.c | 2 +- arch/x86/cpu/braswell/fsp_configs.c | 2 +- arch/x86/cpu/ivybridge/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/tnc.c | 2 +- arch/x86/include/asm/fsp/fsp_api.h | 67 ---- arch/x86/include/asm/fsp/fsp_azalia.h | 38 --- arch/x86/include/asm/fsp/fsp_bootmode.h | 23 -- arch/x86/include/asm/fsp/fsp_ffs.h | 153 --------- arch/x86/include/asm/fsp/fsp_fv.h | 136 -------- arch/x86/include/asm/fsp/fsp_hob.h | 98 ------ arch/x86/include/asm/fsp/fsp_infoheader.h | 38 --- arch/x86/include/asm/fsp/fsp_support.h | 188 ----------- arch/x86/include/asm/fsp/fsp_types.h | 62 ---- arch/x86/include/asm/fsp1/fsp_api.h | 67 ++++ arch/x86/include/asm/fsp1/fsp_azalia.h | 38 +++ arch/x86/include/asm/fsp1/fsp_bootmode.h | 23 ++ arch/x86/include/asm/fsp1/fsp_ffs.h | 153 +++++++++ arch/x86/include/asm/fsp1/fsp_fv.h | 136 ++++++++ arch/x86/include/asm/fsp1/fsp_hob.h | 98 ++++++ arch/x86/include/asm/fsp1/fsp_infoheader.h | 38 +++ arch/x86/include/asm/fsp1/fsp_support.h | 188 +++++++++++ arch/x86/include/asm/fsp1/fsp_types.h | 62 ++++ arch/x86/include/asm/u-boot-x86.h | 2 +- arch/x86/lib/Makefile | 3 +- arch/x86/lib/fsp/Makefile | 9 - arch/x86/lib/fsp/fsp_car.S | 111 ------- arch/x86/lib/fsp/fsp_common.c | 165 ---------- arch/x86/lib/fsp/fsp_dram.c | 108 ------ arch/x86/lib/fsp/fsp_graphics.c | 127 ------- arch/x86/lib/fsp/fsp_support.c | 366 --------------------- arch/x86/lib/fsp1/Makefile | 9 + arch/x86/lib/fsp1/fsp_car.S | 111 +++++++ arch/x86/lib/fsp1/fsp_common.c | 165 ++++++++++ arch/x86/lib/fsp1/fsp_dram.c | 108 ++++++ arch/x86/lib/fsp1/fsp_graphics.c | 127 +++++++ arch/x86/lib/fsp1/fsp_support.c | 366 +++++++++++++++++++++ .../som-db5800-som-6867/som-db5800-som-6867.c | 2 +- board/intel/cherryhill/cherryhill.c | 2 +- cmd/x86/fsp.c | 2 +- drivers/pci/pci-uclass.c | 2 +- 43 files changed, 1726 insertions(+), 1702 deletions(-) delete mode 100644 arch/x86/include/asm/fsp/fsp_api.h delete mode 100644 arch/x86/include/asm/fsp/fsp_azalia.h delete mode 100644 arch/x86/include/asm/fsp/fsp_bootmode.h delete mode 100644 arch/x86/include/asm/fsp/fsp_ffs.h delete mode 100644 arch/x86/include/asm/fsp/fsp_fv.h delete mode 100644 arch/x86/include/asm/fsp/fsp_hob.h delete mode 100644 arch/x86/include/asm/fsp/fsp_infoheader.h delete mode 100644 arch/x86/include/asm/fsp/fsp_support.h delete mode 100644 arch/x86/include/asm/fsp/fsp_types.h create mode 100644 arch/x86/include/asm/fsp1/fsp_api.h create mode 100644 arch/x86/include/asm/fsp1/fsp_azalia.h create mode 100644 arch/x86/include/asm/fsp1/fsp_bootmode.h create mode 100644 arch/x86/include/asm/fsp1/fsp_ffs.h create mode 100644 arch/x86/include/asm/fsp1/fsp_fv.h create mode 100644 arch/x86/include/asm/fsp1/fsp_hob.h create mode 100644 arch/x86/include/asm/fsp1/fsp_infoheader.h create mode 100644 arch/x86/include/asm/fsp1/fsp_support.h create mode 100644 arch/x86/include/asm/fsp1/fsp_types.h delete mode 100644 arch/x86/lib/fsp/Makefile delete mode 100644 arch/x86/lib/fsp/fsp_car.S delete mode 100644 arch/x86/lib/fsp/fsp_common.c delete mode 100644 arch/x86/lib/fsp/fsp_dram.c delete mode 100644 arch/x86/lib/fsp/fsp_graphics.c delete mode 100644 arch/x86/lib/fsp/fsp_support.c create mode 100644 arch/x86/lib/fsp1/Makefile create mode 100644 arch/x86/lib/fsp1/fsp_car.S create mode 100644 arch/x86/lib/fsp1/fsp_common.c create mode 100644 arch/x86/lib/fsp1/fsp_dram.c create mode 100644 arch/x86/lib/fsp1/fsp_graphics.c create mode 100644 arch/x86/lib/fsp1/fsp_support.c diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 218e817cf3f..314f8def7a4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -364,6 +364,29 @@ config HAVE_FSP Note: Without this binary U-Boot will not be able to set up its SDRAM so will not boot. +choice + prompt "FSP version" + depends on HAVE_FSP + default FSP_VERSION1 + help + Selects the FSP version to use. Intel has published several versions + of the FSP External Architecture Specification and this allows + selection of the version number used by a particular SoC. + +config FSP_VERSION1 + bool "FSP version 1.x" + help + This covers versions 1.0 and 1.1a. See here for details: + https://github.com/IntelFsp/fsp/wiki + +config FSP_VERSION2 + bool "FSP version 2.x" + help + This covers versions 2.0 and 2.1. See here for details: + https://github.com/IntelFsp/fsp/wiki + +endchoice + config FSP_FILE string "Firmware Support Package binary filename" depends on HAVE_FSP @@ -429,7 +452,7 @@ config ENABLE_MRC_CACHE For platforms that use Intel FSP for the memory initialization, please check FSP output HOB via U-Boot command 'fsp hob' to see - if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). + if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp1/fsp_hob.h). If such GUID does not exist, MRC cache is not available on such platform (eg: Intel Queensbay), which means selecting this option here does not make any difference. diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 445e4ba2d7f..1e3829a433c 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -167,7 +167,7 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs) * and PMC_BASE_ADDRESS are accessed, so we need make sure the base addresses * of these two blocks are programmed by either U-Boot or FSP. * - * It has been verified that 1st phase API (see arch/x86/lib/fsp/fsp_car.S) + * It has been verified that 1st phase API (see arch/x86/lib/fsp1/fsp_car.S) * on Intel BayTrail SoC already initializes these two base addresses so * we are safe to access these registers here. */ diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index cefd26299a4..5b5d66aa5e9 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -7,7 +7,7 @@ #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c index 7fe6fa7995a..607e333f21c 100644 --- a/arch/x86/cpu/braswell/fsp_configs.c +++ b/arch/x86/cpu/braswell/fsp_configs.c @@ -5,7 +5,7 @@ #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c index 2fd06b3bed7..773c2b2a0ae 100644 --- a/arch/x86/cpu/ivybridge/fsp_configs.c +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -5,7 +5,7 @@ #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index c4d117783cb..0dd1901e07b 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -5,7 +5,7 @@ */ #include -#include +#include void update_fsp_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 76556fc7f79..66737e655bb 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include static int __maybe_unused disable_igd(void) diff --git a/arch/x86/include/asm/fsp/fsp_api.h b/arch/x86/include/asm/fsp/fsp_api.h deleted file mode 100644 index f2d70799f33..00000000000 --- a/arch/x86/include/asm/fsp/fsp_api.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_API_H__ -#define __FSP_API_H__ - -#include - -/* - * FSP common configuration structure. - * This needs to be included in the platform-specific struct fsp_config_data. - */ -struct fsp_cfg_common { - struct fsp_header *fsp_hdr; - u32 stack_top; - u32 boot_mode; -}; - -/* - * FspInit continuation function prototype. - * Control will be returned to this callback function after FspInit API call. - */ -typedef void (*fsp_continuation_f)(u32 status, void *hob_list); - -struct fsp_init_params { - /* Non-volatile storage buffer pointer */ - void *nvs_buf; - /* Runtime buffer pointer */ - void *rt_buf; - /* Continuation function address */ - fsp_continuation_f continuation; -}; - -struct common_buf { - /* - * Stack top pointer used by the bootloader. The new stack frame will be - * set up at this location after FspInit API call. - */ - u32 stack_top; - u32 boot_mode; /* Current system boot mode */ - void *upd_data; /* User platform configuraiton data region */ - u32 tolum_size; /* Top of low usable memory size (FSP 1.1) */ - u32 reserved[6]; /* Reserved */ -}; - -enum fsp_phase { - /* Notification code for post PCI enuermation */ - INIT_PHASE_PCI = 0x20, - /* Notification code before transfering control to the payload */ - INIT_PHASE_BOOT = 0x40 -}; - -struct fsp_notify_params { - /* Notification phase used for NotifyPhase API */ - enum fsp_phase phase; -}; - -/* FspInit API function prototype */ -typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params); - -/* FspNotify API function prototype */ -typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params); - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_azalia.h b/arch/x86/include/asm/fsp/fsp_azalia.h deleted file mode 100644 index e59180bdae2..00000000000 --- a/arch/x86/include/asm/fsp/fsp_azalia.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2015, Google, Inc - */ - -#ifndef _FSP_AZALIA_H_ -#define _FSP_AZALIA_H_ - -struct __packed azalia_verb_table_header { - u32 vendor_device_id; - u16 sub_system_id; - u8 revision_id; /* 0xff applies to all steppings */ - u8 front_panel_support; - u16 number_of_rear_jacks; - u16 number_of_front_jacks; -}; - -struct __packed azalia_verb_table { - struct azalia_verb_table_header header; - const u32 *data; -}; - -struct __packed azalia_config { - u8 pme_enable:1; - u8 docking_supported:1; - u8 docking_attached:1; - u8 hdmi_codec_enable:1; - u8 azalia_v_ci_enable:1; - u8 rsvdbits:3; - /* number of verb tables provided by platform */ - u8 verb_table_num; - const struct azalia_verb_table *verb_table; - /* delay timer after azalia reset */ - u16 reset_wait_timer_ms; -}; - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_bootmode.h b/arch/x86/include/asm/fsp/fsp_bootmode.h deleted file mode 100644 index bc96ec308cb..00000000000 --- a/arch/x86/include/asm/fsp/fsp_bootmode.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_BOOT_MODE_H__ -#define __FSP_BOOT_MODE_H__ - -/* 0x21 - 0xf..f are reserved */ -#define BOOT_FULL_CONFIG 0x00 -#define BOOT_MINIMAL_CONFIG 0x01 -#define BOOT_NO_CONFIG_CHANGES 0x02 -#define BOOT_FULL_CONFIG_PLUS_DIAG 0x03 -#define BOOT_DEFAULT_SETTINGS 0x04 -#define BOOT_ON_S4_RESUME 0x05 -#define BOOT_ON_S5_RESUME 0x06 -#define BOOT_ON_S2_RESUME 0x10 -#define BOOT_ON_S3_RESUME 0x11 -#define BOOT_ON_FLASH_UPDATE 0x12 -#define BOOT_IN_RECOVERY_MODE 0x20 - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_ffs.h b/arch/x86/include/asm/fsp/fsp_ffs.h deleted file mode 100644 index b7558e5a17f..00000000000 --- a/arch/x86/include/asm/fsp/fsp_ffs.h +++ /dev/null @@ -1,153 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_FFS_H__ -#define __FSP_FFS_H__ - -/* Used to verify the integrity of the file */ -union __packed ffs_integrity { - struct { - /* - * The IntegrityCheck.checksum.header field is an 8-bit - * checksum of the file header. The State and - * IntegrityCheck.checksum.file fields are assumed to be zero - * and the checksum is calculated such that the entire header - * sums to zero. - */ - u8 header; - /* - * If the FFS_ATTRIB_CHECKSUM (see definition below) bit of - * the Attributes field is set to one, the - * IntegrityCheck.checksum.file field is an 8-bit checksum of - * the file data. If the FFS_ATTRIB_CHECKSUM bit of the - * Attributes field is cleared to zero, the - * IntegrityCheck.checksum.file field must be initialized with - * a value of 0xAA. The IntegrityCheck.checksum.file field is - * valid any time the EFI_FILE_DATA_VALID bit is set in the - * State field. - */ - u8 file; - } checksum; - - /* This is the full 16 bits of the IntegrityCheck field */ - u16 checksum16; -}; - -/* - * Each file begins with the header that describe the - * contents and state of the files. - */ -struct __packed ffs_file_header { - /* - * This GUID is the file name. - * It is used to uniquely identify the file. - */ - efi_guid_t name; - /* Used to verify the integrity of the file */ - union ffs_integrity integrity; - /* Identifies the type of file */ - u8 type; - /* Declares various file attribute bits */ - u8 attr; - /* The length of the file in bytes, including the FFS header */ - u8 size[3]; - /* - * Used to track the state of the file throughout the life of - * the file from creation to deletion. - */ - u8 state; -}; - -struct __packed ffs_file_header2 { - /* - * This GUID is the file name. It is used to uniquely identify the file. - * There may be only one instance of a file with the file name GUID of - * Name in any given firmware volume, except if the file type is - * EFI_FV_FILE_TYPE_FFS_PAD. - */ - efi_guid_t name; - /* Used to verify the integrity of the file */ - union ffs_integrity integrity; - /* Identifies the type of file */ - u8 type; - /* Declares various file attribute bits */ - u8 attr; - /* - * The length of the file in bytes, including the FFS header. - * The length of the file data is either - * (size - sizeof(struct ffs_file_header)). This calculation means a - * zero-length file has a size of 24 bytes, which is - * sizeof(struct ffs_file_header). Size is not required to be a - * multiple of 8 bytes. Given a file F, the next file header is located - * at the next 8-byte aligned firmware volume offset following the last - * byte of the file F. - */ - u8 size[3]; - /* - * Used to track the state of the file throughout the life of - * the file from creation to deletion. - */ - u8 state; - /* - * If FFS_ATTRIB_LARGE_FILE is set in attr, then ext_size exists - * and size must be set to zero. - * If FFS_ATTRIB_LARGE_FILE is not set then - * struct ffs_file_header is used. - */ - u32 ext_size; -}; - -/* - * Pseudo type. It is used as a wild card when retrieving sections. - * The section type EFI_SECTION_ALL matches all section types. - */ -#define EFI_SECTION_ALL 0x00 - -/* Encapsulation section Type values */ -#define EFI_SECTION_COMPRESSION 0x01 -#define EFI_SECTION_GUID_DEFINED 0x02 -#define EFI_SECTION_DISPOSABLE 0x03 - -/* Leaf section Type values */ -#define EFI_SECTION_PE32 0x10 -#define EFI_SECTION_PIC 0x11 -#define EFI_SECTION_TE 0x12 -#define EFI_SECTION_DXE_DEPEX 0x13 -#define EFI_SECTION_VERSION 0x14 -#define EFI_SECTION_USER_INTERFACE 0x15 -#define EFI_SECTION_COMPATIBILITY16 0x16 -#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17 -#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18 -#define EFI_SECTION_RAW 0x19 -#define EFI_SECTION_PEI_DEPEX 0x1B -#define EFI_SECTION_SMM_DEPEX 0x1C - -/* Common section header */ -struct __packed raw_section { - /* - * A 24-bit unsigned integer that contains the total size of - * the section in bytes, including the EFI_COMMON_SECTION_HEADER. - */ - u8 size[3]; - u8 type; -}; - -struct __packed raw_section2 { - /* - * A 24-bit unsigned integer that contains the total size of - * the section in bytes, including the EFI_COMMON_SECTION_HEADER. - */ - u8 size[3]; - u8 type; - /* - * If size is 0xFFFFFF, then ext_size contains the size of - * the section. If size is not equal to 0xFFFFFF, then this - * field does not exist. - */ - u32 ext_size; -}; - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_fv.h b/arch/x86/include/asm/fsp/fsp_fv.h deleted file mode 100644 index 511dfb78b81..00000000000 --- a/arch/x86/include/asm/fsp/fsp_fv.h +++ /dev/null @@ -1,136 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_FV___ -#define __FSP_FV___ - -/* Value of EFI_FV_FILE_ATTRIBUTES */ -#define EFI_FV_FILE_ATTR_ALIGNMENT 0x0000001F -#define EFI_FV_FILE_ATTR_FIXED 0x00000100 -#define EFI_FV_FILE_ATTR_MEMORY_MAPPED 0x00000200 - -/* Attributes bit definitions */ -#define EFI_FVB2_READ_DISABLED_CAP 0x00000001 -#define EFI_FVB2_READ_ENABLED_CAP 0x00000002 -#define EFI_FVB2_READ_STATUS 0x00000004 -#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008 -#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010 -#define EFI_FVB2_WRITE_STATUS 0x00000020 -#define EFI_FVB2_LOCK_CAP 0x00000040 -#define EFI_FVB2_LOCK_STATUS 0x00000080 -#define EFI_FVB2_STICKY_WRITE 0x00000200 -#define EFI_FVB2_MEMORY_MAPPED 0x00000400 -#define EFI_FVB2_ERASE_POLARITY 0x00000800 -#define EFI_FVB2_READ_LOCK_CAP 0x00001000 -#define EFI_FVB2_READ_LOCK_STATUS 0x00002000 -#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000 -#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000 -#define EFI_FVB2_ALIGNMENT 0x001F0000 -#define EFI_FVB2_ALIGNMENT_1 0x00000000 -#define EFI_FVB2_ALIGNMENT_2 0x00010000 -#define EFI_FVB2_ALIGNMENT_4 0x00020000 -#define EFI_FVB2_ALIGNMENT_8 0x00030000 -#define EFI_FVB2_ALIGNMENT_16 0x00040000 -#define EFI_FVB2_ALIGNMENT_32 0x00050000 -#define EFI_FVB2_ALIGNMENT_64 0x00060000 -#define EFI_FVB2_ALIGNMENT_128 0x00070000 -#define EFI_FVB2_ALIGNMENT_256 0x00080000 -#define EFI_FVB2_ALIGNMENT_512 0x00090000 -#define EFI_FVB2_ALIGNMENT_1K 0x000A0000 -#define EFI_FVB2_ALIGNMENT_2K 0x000B0000 -#define EFI_FVB2_ALIGNMENT_4K 0x000C0000 -#define EFI_FVB2_ALIGNMENT_8K 0x000D0000 -#define EFI_FVB2_ALIGNMENT_16K 0x000E0000 -#define EFI_FVB2_ALIGNMENT_32K 0x000F0000 -#define EFI_FVB2_ALIGNMENT_64K 0x00100000 -#define EFI_FVB2_ALIGNMENT_128K 0x00110000 -#define EFI_FVB2_ALIGNMENT_256K 0x00120000 -#define EFI_FVB2_ALIGNMENT_512K 0x00130000 -#define EFI_FVB2_ALIGNMENT_1M 0x00140000 -#define EFI_FVB2_ALIGNMENT_2M 0x00150000 -#define EFI_FVB2_ALIGNMENT_4M 0x00160000 -#define EFI_FVB2_ALIGNMENT_8M 0x00170000 -#define EFI_FVB2_ALIGNMENT_16M 0x00180000 -#define EFI_FVB2_ALIGNMENT_32M 0x00190000 -#define EFI_FVB2_ALIGNMENT_64M 0x001A0000 -#define EFI_FVB2_ALIGNMENT_128M 0x001B0000 -#define EFI_FVB2_ALIGNMENT_256M 0x001C0000 -#define EFI_FVB2_ALIGNMENT_512M 0x001D0000 -#define EFI_FVB2_ALIGNMENT_1G 0x001E0000 -#define EFI_FVB2_ALIGNMENT_2G 0x001F0000 - -struct fv_blkmap_entry { - /* The number of sequential blocks which are of the same size */ - u32 num_blocks; - /* The size of the blocks */ - u32 length; -}; - -/* Describes the features and layout of the firmware volume */ -struct fv_header { - /* - * The first 16 bytes are reserved to allow for the reset vector of - * processors whose reset vector is at address 0. - */ - u8 zero_vec[16]; - /* - * Declares the file system with which the firmware volume - * is formatted. - */ - efi_guid_t fs_guid; - /* - * Length in bytes of the complete firmware volume, including - * the header. - */ - u64 fv_len; - /* Set to EFI_FVH_SIGNATURE */ - u32 sign; - /* - * Declares capabilities and power-on defaults for the firmware - * volume. - */ - u32 attr; - /* Length in bytes of the complete firmware volume header */ - u16 hdr_len; - /* - * A 16-bit checksum of the firmware volume header. - * A valid header sums to zero. - */ - u16 checksum; - /* - * Offset, relative to the start of the header, of the extended - * header (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is - * no extended header. - */ - u16 ext_hdr_off; - /* This field must always be set to zero */ - u8 reserved[1]; - /* - * Set to 2. Future versions of this specification may define new - * header fields and will increment the Revision field accordingly. - */ - u8 rev; - /* - * An array of run-length encoded FvBlockMapEntry structures. - * The array is terminated with an entry of {0,0}. - */ - struct fv_blkmap_entry block_map[1]; -}; - -#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') - -/* Firmware Volume Header Revision definition */ -#define EFI_FVH_REVISION 0x02 - -/* Extension header pointed by ExtHeaderOffset of volume header */ -struct fv_ext_header { - /* firmware volume name */ - efi_guid_t fv_name; - /* Size of the rest of the extension header including this structure */ - u32 ext_hdr_size; -}; - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp/fsp_hob.h deleted file mode 100644 index 3bb79c4b67a..00000000000 --- a/arch/x86/include/asm/fsp/fsp_hob.h +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_HOB_H__ -#define __FSP_HOB_H__ - -#include - -enum pixel_format { - pixel_rgbx_8bpc, /* RGB 8 bit per color */ - pixel_bgrx_8bpc, /* BGR 8 bit per color */ - pixel_bitmask, -}; - -struct __packed hob_graphics_info { - phys_addr_t fb_base; /* framebuffer base address */ - u32 fb_size; /* framebuffer size */ - u32 version; - u32 width; - u32 height; - enum pixel_format pixel_format; - u32 red_mask; - u32 green_mask; - u32 blue_mask; - u32 reserved_mask; - u32 pixels_per_scanline; -}; - -/* FSP specific GUID HOB definitions */ -#define FSP_GUID_DATA1 0x912740be -#define FSP_GUID_DATA2 0x2284 -#define FSP_GUID_DATA3 0x4734 -#define FSP_GUID_DATA4_0 0xb9 -#define FSP_GUID_DATA4_1 0x71 -#define FSP_GUID_DATA4_2 0x84 -#define FSP_GUID_DATA4_3 0xb0 -#define FSP_GUID_DATA4_4 0x27 -#define FSP_GUID_DATA4_5 0x35 -#define FSP_GUID_DATA4_6 0x3f -#define FSP_GUID_DATA4_7 0x0c - -#define FSP_GUID_BYTE0 0xbe -#define FSP_GUID_BYTE1 0x40 -#define FSP_GUID_BYTE2 0x27 -#define FSP_GUID_BYTE3 0x91 -#define FSP_GUID_BYTE4 0x84 -#define FSP_GUID_BYTE5 0x22 -#define FSP_GUID_BYTE6 0x34 -#define FSP_GUID_BYTE7 0x47 -#define FSP_GUID_BYTE8 FSP_GUID_DATA4_0 -#define FSP_GUID_BYTE9 FSP_GUID_DATA4_1 -#define FSP_GUID_BYTE10 FSP_GUID_DATA4_2 -#define FSP_GUID_BYTE11 FSP_GUID_DATA4_3 -#define FSP_GUID_BYTE12 FSP_GUID_DATA4_4 -#define FSP_GUID_BYTE13 FSP_GUID_DATA4_5 -#define FSP_GUID_BYTE14 FSP_GUID_DATA4_6 -#define FSP_GUID_BYTE15 FSP_GUID_DATA4_7 - -#define FSP_HEADER_GUID \ - EFI_GUID(FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ - FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ - FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ - FSP_GUID_DATA4_6, FSP_GUID_DATA4_7) - -#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ - EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ - 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) - -#define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ - EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ - 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) - -#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \ - EFI_GUID(0x69a79759, 0x1373, 0x4367, \ - 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e) - -#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \ - EFI_GUID(0xd038747c, 0xd00c, 0x4980, \ - 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55) - -#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \ - EFI_GUID(0x9c7c3aa7, 0x5332, 0x4917, \ - 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07) - -/* The following GUIDs are newly introduced in FSP spec 1.1 */ - -#define FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID \ - EFI_GUID(0x73ff4f56, 0xaa8e, 0x4451, \ - 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44) - -#define FSP_GRAPHICS_INFO_HOB_GUID \ - EFI_GUID(0x39f62cce, 0x6825, 0x4669, \ - 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07) - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_infoheader.h b/arch/x86/include/asm/fsp/fsp_infoheader.h deleted file mode 100644 index 86f78014b7b..00000000000 --- a/arch/x86/include/asm/fsp/fsp_infoheader.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef _FSP_HEADER_H_ -#define _FSP_HEADER_H_ - -#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */ - -struct __packed fsp_header { - u32 sign; /* 'FSPH' */ - u32 hdr_len; /* header length */ - u8 reserved1[3]; - u8 hdr_rev; /* header rev */ - u32 img_rev; /* image rev */ - char img_id[8]; /* signature string */ - u32 img_size; /* image size */ - u32 img_base; /* image base */ - u32 img_attr; /* image attribute */ - u32 cfg_region_off; /* configuration region offset */ - u32 cfg_region_size; /* configuration region size */ - u32 api_num; /* number of API entries */ - u32 fsp_tempram_init; /* tempram_init offset */ - u32 fsp_init; /* fsp_init offset */ - u32 fsp_notify; /* fsp_notify offset */ - u32 fsp_mem_init; /* fsp_mem_init offset */ - u32 fsp_tempram_exit; /* fsp_tempram_exit offset */ - u32 fsp_silicon_init; /* fsp_silicon_init offset */ -}; - -#define FSP_HEADER_REVISION_1 1 -#define FSP_HEADER_REVISION_2 2 - -#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0) - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h deleted file mode 100644 index 7b92392a277..00000000000 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ /dev/null @@ -1,188 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_SUPPORT_H__ -#define __FSP_SUPPORT_H__ - -#include "fsp_types.h" -#include "fsp_hob.h" -#include "fsp_fv.h" -#include "fsp_ffs.h" -#include "fsp_api.h" -#include "fsp_infoheader.h" -#include "fsp_bootmode.h" -#include "fsp_azalia.h" -#include -#include - -#define FSP_LOWMEM_BASE 0x100000UL -#define FSP_HIGHMEM_BASE 0x100000000ULL -#define UPD_TERMINATOR 0x55AA - - -/** - * FSP Continuation assembly helper routine - * - * This routine jumps to the C version of FSP continuation function - */ -void asm_continuation(void); - -/** - * FSP initialization complete - * - * This is the function that indicates FSP initialization is complete and jumps - * back to the bootloader with HOB list pointer as the parameter. - * - * @hob_list: HOB list pointer - */ -void fsp_init_done(void *hob_list); - -/** - * FSP Continuation function - * - * @status: Always 0 - * @hob_list: HOB list pointer - * - * @retval: Never returns - */ -void fsp_continue(u32 status, void *hob_list); - -/** - * Find FSP header offset in FSP image - * - * @retval: the offset of FSP header. If signature is invalid, returns 0. - */ -struct fsp_header *find_fsp_header(void); - -/** - * FSP initialization wrapper function. - * - * @stack_top: bootloader stack top address - * @boot_mode: boot mode defined in fsp_bootmode.h - * @nvs_buf: Non-volatile memory buffer pointer - */ -void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); - -/** - * FSP notification wrapper function - * - * @fsp_hdr: Pointer to FSP information header - * @phase: FSP initialization phase defined in enum fsp_phase - * - * @retval: compatible status code with EFI_STATUS defined in PI spec - */ -u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); - -/** - * This function retrieves the top of usable low memory. - * - * @hob_list: A HOB list pointer. - * - * @retval: Usable low memory top. - */ -u32 fsp_get_usable_lowmem_top(const void *hob_list); - -/** - * This function retrieves the top of usable high memory. - * - * @hob_list: A HOB list pointer. - * - * @retval: Usable high memory top. - */ -u64 fsp_get_usable_highmem_top(const void *hob_list); - -/** - * This function retrieves a special reserved memory region. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the GUID HOB data buffer length. - * If the GUID HOB is located, the length will be updated. - * @guid: A pointer to the owner guild. - * - * @retval: Reserved region start address. - * 0 if this region does not exist. - */ -u64 fsp_get_reserved_mem_from_guid(const void *hob_list, - u64 *len, const efi_guid_t *guid); - -/** - * This function retrieves the FSP reserved normal memory. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the FSP reserved memory length buffer. - * If the GUID HOB is located, the length will be updated. - * @retval: FSP reserved memory base - * 0 if this region does not exist. - */ -u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); - -/** - * This function retrieves the TSEG reserved normal memory. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the TSEG reserved memory length buffer. - * If the GUID HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the TSEG reserved memory. - * @retval others: TSEG reserved memory base. - */ -u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); - -/** - * This function retrieves FSP Non-volatile Storage HOB buffer and size. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the NVS data buffer length. - * If the HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the NVS HOB. - * @retval others: FSP NVS data buffer pointer. - */ -void *fsp_get_nvs_data(const void *hob_list, u32 *len); - -/** - * This function retrieves Bootloader temporary stack buffer and size. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the bootloader temporary stack length. - * If the HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the bootloader temporary stack HOB. - * @retval others: Bootloader temporary stackbuffer pointer. - */ -void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); - -/** - * This function retrieves graphics information. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the graphics info HOB length. - * If the HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the graphics info HOB. - * @retval others: A pointer to struct hob_graphics_info. - */ -void *fsp_get_graphics_info(const void *hob_list, u32 *len); - -/** - * This function overrides the default configurations of FSP. - * - * @config: A pointer to the FSP configuration data structure - * @rt_buf: A pointer to the FSP runtime buffer data structure - * - * @return: None - */ -void update_fsp_configs(struct fsp_config_data *config, - struct fspinit_rtbuf *rt_buf); - -/** - * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init - * - * @return 0 if OK, -EPERM if the FSP gave an error. - */ -int fsp_init_phase_pci(void); - -#endif diff --git a/arch/x86/include/asm/fsp/fsp_types.h b/arch/x86/include/asm/fsp/fsp_types.h deleted file mode 100644 index 3d5b17ecf11..00000000000 --- a/arch/x86/include/asm/fsp/fsp_types.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_TYPES_H__ -#define __FSP_TYPES_H__ - -/** - * Returns a 16-bit signature built from 2 ASCII characters. - * - * This macro returns a 16-bit value built from the two ASCII characters - * specified by A and B. - * - * @A: The first ASCII character. - * @B: The second ASCII character. - * - * @return: A 16-bit value built from the two ASCII characters specified by - * A and B. - */ -#define SIGNATURE_16(A, B) ((A) | (B << 8)) - -/** - * Returns a 32-bit signature built from 4 ASCII characters. - * - * This macro returns a 32-bit value built from the four ASCII characters - * specified by A, B, C, and D. - * - * @A: The first ASCII character. - * @B: The second ASCII character. - * @C: The third ASCII character. - * @D: The fourth ASCII character. - * - * @return: A 32-bit value built from the two ASCII characters specified by - * A, B, C and D. - */ -#define SIGNATURE_32(A, B, C, D) \ - (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16)) - -/** - * Returns a 64-bit signature built from 8 ASCII characters. - * - * This macro returns a 64-bit value built from the eight ASCII characters - * specified by A, B, C, D, E, F, G,and H. - * - * @A: The first ASCII character. - * @B: The second ASCII character. - * @C: The third ASCII character. - * @D: The fourth ASCII character. - * @E: The fifth ASCII character. - * @F: The sixth ASCII character. - * @G: The seventh ASCII character. - * @H: The eighth ASCII character. - * - * @return: A 64-bit value built from the two ASCII characters specified by - * A, B, C, D, E, F, G and H. - */ -#define SIGNATURE_64(A, B, C, D, E, F, G, H) \ - (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32)) - -#endif diff --git a/arch/x86/include/asm/fsp1/fsp_api.h b/arch/x86/include/asm/fsp1/fsp_api.h new file mode 100644 index 00000000000..f2d70799f33 --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_api.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_API_H__ +#define __FSP_API_H__ + +#include + +/* + * FSP common configuration structure. + * This needs to be included in the platform-specific struct fsp_config_data. + */ +struct fsp_cfg_common { + struct fsp_header *fsp_hdr; + u32 stack_top; + u32 boot_mode; +}; + +/* + * FspInit continuation function prototype. + * Control will be returned to this callback function after FspInit API call. + */ +typedef void (*fsp_continuation_f)(u32 status, void *hob_list); + +struct fsp_init_params { + /* Non-volatile storage buffer pointer */ + void *nvs_buf; + /* Runtime buffer pointer */ + void *rt_buf; + /* Continuation function address */ + fsp_continuation_f continuation; +}; + +struct common_buf { + /* + * Stack top pointer used by the bootloader. The new stack frame will be + * set up at this location after FspInit API call. + */ + u32 stack_top; + u32 boot_mode; /* Current system boot mode */ + void *upd_data; /* User platform configuraiton data region */ + u32 tolum_size; /* Top of low usable memory size (FSP 1.1) */ + u32 reserved[6]; /* Reserved */ +}; + +enum fsp_phase { + /* Notification code for post PCI enuermation */ + INIT_PHASE_PCI = 0x20, + /* Notification code before transfering control to the payload */ + INIT_PHASE_BOOT = 0x40 +}; + +struct fsp_notify_params { + /* Notification phase used for NotifyPhase API */ + enum fsp_phase phase; +}; + +/* FspInit API function prototype */ +typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params); + +/* FspNotify API function prototype */ +typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params); + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_azalia.h b/arch/x86/include/asm/fsp1/fsp_azalia.h new file mode 100644 index 00000000000..e59180bdae2 --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_azalia.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2015, Google, Inc + */ + +#ifndef _FSP_AZALIA_H_ +#define _FSP_AZALIA_H_ + +struct __packed azalia_verb_table_header { + u32 vendor_device_id; + u16 sub_system_id; + u8 revision_id; /* 0xff applies to all steppings */ + u8 front_panel_support; + u16 number_of_rear_jacks; + u16 number_of_front_jacks; +}; + +struct __packed azalia_verb_table { + struct azalia_verb_table_header header; + const u32 *data; +}; + +struct __packed azalia_config { + u8 pme_enable:1; + u8 docking_supported:1; + u8 docking_attached:1; + u8 hdmi_codec_enable:1; + u8 azalia_v_ci_enable:1; + u8 rsvdbits:3; + /* number of verb tables provided by platform */ + u8 verb_table_num; + const struct azalia_verb_table *verb_table; + /* delay timer after azalia reset */ + u16 reset_wait_timer_ms; +}; + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_bootmode.h b/arch/x86/include/asm/fsp1/fsp_bootmode.h new file mode 100644 index 00000000000..bc96ec308cb --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_bootmode.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_BOOT_MODE_H__ +#define __FSP_BOOT_MODE_H__ + +/* 0x21 - 0xf..f are reserved */ +#define BOOT_FULL_CONFIG 0x00 +#define BOOT_MINIMAL_CONFIG 0x01 +#define BOOT_NO_CONFIG_CHANGES 0x02 +#define BOOT_FULL_CONFIG_PLUS_DIAG 0x03 +#define BOOT_DEFAULT_SETTINGS 0x04 +#define BOOT_ON_S4_RESUME 0x05 +#define BOOT_ON_S5_RESUME 0x06 +#define BOOT_ON_S2_RESUME 0x10 +#define BOOT_ON_S3_RESUME 0x11 +#define BOOT_ON_FLASH_UPDATE 0x12 +#define BOOT_IN_RECOVERY_MODE 0x20 + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_ffs.h b/arch/x86/include/asm/fsp1/fsp_ffs.h new file mode 100644 index 00000000000..b7558e5a17f --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_ffs.h @@ -0,0 +1,153 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_FFS_H__ +#define __FSP_FFS_H__ + +/* Used to verify the integrity of the file */ +union __packed ffs_integrity { + struct { + /* + * The IntegrityCheck.checksum.header field is an 8-bit + * checksum of the file header. The State and + * IntegrityCheck.checksum.file fields are assumed to be zero + * and the checksum is calculated such that the entire header + * sums to zero. + */ + u8 header; + /* + * If the FFS_ATTRIB_CHECKSUM (see definition below) bit of + * the Attributes field is set to one, the + * IntegrityCheck.checksum.file field is an 8-bit checksum of + * the file data. If the FFS_ATTRIB_CHECKSUM bit of the + * Attributes field is cleared to zero, the + * IntegrityCheck.checksum.file field must be initialized with + * a value of 0xAA. The IntegrityCheck.checksum.file field is + * valid any time the EFI_FILE_DATA_VALID bit is set in the + * State field. + */ + u8 file; + } checksum; + + /* This is the full 16 bits of the IntegrityCheck field */ + u16 checksum16; +}; + +/* + * Each file begins with the header that describe the + * contents and state of the files. + */ +struct __packed ffs_file_header { + /* + * This GUID is the file name. + * It is used to uniquely identify the file. + */ + efi_guid_t name; + /* Used to verify the integrity of the file */ + union ffs_integrity integrity; + /* Identifies the type of file */ + u8 type; + /* Declares various file attribute bits */ + u8 attr; + /* The length of the file in bytes, including the FFS header */ + u8 size[3]; + /* + * Used to track the state of the file throughout the life of + * the file from creation to deletion. + */ + u8 state; +}; + +struct __packed ffs_file_header2 { + /* + * This GUID is the file name. It is used to uniquely identify the file. + * There may be only one instance of a file with the file name GUID of + * Name in any given firmware volume, except if the file type is + * EFI_FV_FILE_TYPE_FFS_PAD. + */ + efi_guid_t name; + /* Used to verify the integrity of the file */ + union ffs_integrity integrity; + /* Identifies the type of file */ + u8 type; + /* Declares various file attribute bits */ + u8 attr; + /* + * The length of the file in bytes, including the FFS header. + * The length of the file data is either + * (size - sizeof(struct ffs_file_header)). This calculation means a + * zero-length file has a size of 24 bytes, which is + * sizeof(struct ffs_file_header). Size is not required to be a + * multiple of 8 bytes. Given a file F, the next file header is located + * at the next 8-byte aligned firmware volume offset following the last + * byte of the file F. + */ + u8 size[3]; + /* + * Used to track the state of the file throughout the life of + * the file from creation to deletion. + */ + u8 state; + /* + * If FFS_ATTRIB_LARGE_FILE is set in attr, then ext_size exists + * and size must be set to zero. + * If FFS_ATTRIB_LARGE_FILE is not set then + * struct ffs_file_header is used. + */ + u32 ext_size; +}; + +/* + * Pseudo type. It is used as a wild card when retrieving sections. + * The section type EFI_SECTION_ALL matches all section types. + */ +#define EFI_SECTION_ALL 0x00 + +/* Encapsulation section Type values */ +#define EFI_SECTION_COMPRESSION 0x01 +#define EFI_SECTION_GUID_DEFINED 0x02 +#define EFI_SECTION_DISPOSABLE 0x03 + +/* Leaf section Type values */ +#define EFI_SECTION_PE32 0x10 +#define EFI_SECTION_PIC 0x11 +#define EFI_SECTION_TE 0x12 +#define EFI_SECTION_DXE_DEPEX 0x13 +#define EFI_SECTION_VERSION 0x14 +#define EFI_SECTION_USER_INTERFACE 0x15 +#define EFI_SECTION_COMPATIBILITY16 0x16 +#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17 +#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18 +#define EFI_SECTION_RAW 0x19 +#define EFI_SECTION_PEI_DEPEX 0x1B +#define EFI_SECTION_SMM_DEPEX 0x1C + +/* Common section header */ +struct __packed raw_section { + /* + * A 24-bit unsigned integer that contains the total size of + * the section in bytes, including the EFI_COMMON_SECTION_HEADER. + */ + u8 size[3]; + u8 type; +}; + +struct __packed raw_section2 { + /* + * A 24-bit unsigned integer that contains the total size of + * the section in bytes, including the EFI_COMMON_SECTION_HEADER. + */ + u8 size[3]; + u8 type; + /* + * If size is 0xFFFFFF, then ext_size contains the size of + * the section. If size is not equal to 0xFFFFFF, then this + * field does not exist. + */ + u32 ext_size; +}; + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_fv.h b/arch/x86/include/asm/fsp1/fsp_fv.h new file mode 100644 index 00000000000..511dfb78b81 --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_fv.h @@ -0,0 +1,136 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_FV___ +#define __FSP_FV___ + +/* Value of EFI_FV_FILE_ATTRIBUTES */ +#define EFI_FV_FILE_ATTR_ALIGNMENT 0x0000001F +#define EFI_FV_FILE_ATTR_FIXED 0x00000100 +#define EFI_FV_FILE_ATTR_MEMORY_MAPPED 0x00000200 + +/* Attributes bit definitions */ +#define EFI_FVB2_READ_DISABLED_CAP 0x00000001 +#define EFI_FVB2_READ_ENABLED_CAP 0x00000002 +#define EFI_FVB2_READ_STATUS 0x00000004 +#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008 +#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010 +#define EFI_FVB2_WRITE_STATUS 0x00000020 +#define EFI_FVB2_LOCK_CAP 0x00000040 +#define EFI_FVB2_LOCK_STATUS 0x00000080 +#define EFI_FVB2_STICKY_WRITE 0x00000200 +#define EFI_FVB2_MEMORY_MAPPED 0x00000400 +#define EFI_FVB2_ERASE_POLARITY 0x00000800 +#define EFI_FVB2_READ_LOCK_CAP 0x00001000 +#define EFI_FVB2_READ_LOCK_STATUS 0x00002000 +#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000 +#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000 +#define EFI_FVB2_ALIGNMENT 0x001F0000 +#define EFI_FVB2_ALIGNMENT_1 0x00000000 +#define EFI_FVB2_ALIGNMENT_2 0x00010000 +#define EFI_FVB2_ALIGNMENT_4 0x00020000 +#define EFI_FVB2_ALIGNMENT_8 0x00030000 +#define EFI_FVB2_ALIGNMENT_16 0x00040000 +#define EFI_FVB2_ALIGNMENT_32 0x00050000 +#define EFI_FVB2_ALIGNMENT_64 0x00060000 +#define EFI_FVB2_ALIGNMENT_128 0x00070000 +#define EFI_FVB2_ALIGNMENT_256 0x00080000 +#define EFI_FVB2_ALIGNMENT_512 0x00090000 +#define EFI_FVB2_ALIGNMENT_1K 0x000A0000 +#define EFI_FVB2_ALIGNMENT_2K 0x000B0000 +#define EFI_FVB2_ALIGNMENT_4K 0x000C0000 +#define EFI_FVB2_ALIGNMENT_8K 0x000D0000 +#define EFI_FVB2_ALIGNMENT_16K 0x000E0000 +#define EFI_FVB2_ALIGNMENT_32K 0x000F0000 +#define EFI_FVB2_ALIGNMENT_64K 0x00100000 +#define EFI_FVB2_ALIGNMENT_128K 0x00110000 +#define EFI_FVB2_ALIGNMENT_256K 0x00120000 +#define EFI_FVB2_ALIGNMENT_512K 0x00130000 +#define EFI_FVB2_ALIGNMENT_1M 0x00140000 +#define EFI_FVB2_ALIGNMENT_2M 0x00150000 +#define EFI_FVB2_ALIGNMENT_4M 0x00160000 +#define EFI_FVB2_ALIGNMENT_8M 0x00170000 +#define EFI_FVB2_ALIGNMENT_16M 0x00180000 +#define EFI_FVB2_ALIGNMENT_32M 0x00190000 +#define EFI_FVB2_ALIGNMENT_64M 0x001A0000 +#define EFI_FVB2_ALIGNMENT_128M 0x001B0000 +#define EFI_FVB2_ALIGNMENT_256M 0x001C0000 +#define EFI_FVB2_ALIGNMENT_512M 0x001D0000 +#define EFI_FVB2_ALIGNMENT_1G 0x001E0000 +#define EFI_FVB2_ALIGNMENT_2G 0x001F0000 + +struct fv_blkmap_entry { + /* The number of sequential blocks which are of the same size */ + u32 num_blocks; + /* The size of the blocks */ + u32 length; +}; + +/* Describes the features and layout of the firmware volume */ +struct fv_header { + /* + * The first 16 bytes are reserved to allow for the reset vector of + * processors whose reset vector is at address 0. + */ + u8 zero_vec[16]; + /* + * Declares the file system with which the firmware volume + * is formatted. + */ + efi_guid_t fs_guid; + /* + * Length in bytes of the complete firmware volume, including + * the header. + */ + u64 fv_len; + /* Set to EFI_FVH_SIGNATURE */ + u32 sign; + /* + * Declares capabilities and power-on defaults for the firmware + * volume. + */ + u32 attr; + /* Length in bytes of the complete firmware volume header */ + u16 hdr_len; + /* + * A 16-bit checksum of the firmware volume header. + * A valid header sums to zero. + */ + u16 checksum; + /* + * Offset, relative to the start of the header, of the extended + * header (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is + * no extended header. + */ + u16 ext_hdr_off; + /* This field must always be set to zero */ + u8 reserved[1]; + /* + * Set to 2. Future versions of this specification may define new + * header fields and will increment the Revision field accordingly. + */ + u8 rev; + /* + * An array of run-length encoded FvBlockMapEntry structures. + * The array is terminated with an entry of {0,0}. + */ + struct fv_blkmap_entry block_map[1]; +}; + +#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') + +/* Firmware Volume Header Revision definition */ +#define EFI_FVH_REVISION 0x02 + +/* Extension header pointed by ExtHeaderOffset of volume header */ +struct fv_ext_header { + /* firmware volume name */ + efi_guid_t fv_name; + /* Size of the rest of the extension header including this structure */ + u32 ext_hdr_size; +}; + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_hob.h b/arch/x86/include/asm/fsp1/fsp_hob.h new file mode 100644 index 00000000000..3bb79c4b67a --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_hob.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_HOB_H__ +#define __FSP_HOB_H__ + +#include + +enum pixel_format { + pixel_rgbx_8bpc, /* RGB 8 bit per color */ + pixel_bgrx_8bpc, /* BGR 8 bit per color */ + pixel_bitmask, +}; + +struct __packed hob_graphics_info { + phys_addr_t fb_base; /* framebuffer base address */ + u32 fb_size; /* framebuffer size */ + u32 version; + u32 width; + u32 height; + enum pixel_format pixel_format; + u32 red_mask; + u32 green_mask; + u32 blue_mask; + u32 reserved_mask; + u32 pixels_per_scanline; +}; + +/* FSP specific GUID HOB definitions */ +#define FSP_GUID_DATA1 0x912740be +#define FSP_GUID_DATA2 0x2284 +#define FSP_GUID_DATA3 0x4734 +#define FSP_GUID_DATA4_0 0xb9 +#define FSP_GUID_DATA4_1 0x71 +#define FSP_GUID_DATA4_2 0x84 +#define FSP_GUID_DATA4_3 0xb0 +#define FSP_GUID_DATA4_4 0x27 +#define FSP_GUID_DATA4_5 0x35 +#define FSP_GUID_DATA4_6 0x3f +#define FSP_GUID_DATA4_7 0x0c + +#define FSP_GUID_BYTE0 0xbe +#define FSP_GUID_BYTE1 0x40 +#define FSP_GUID_BYTE2 0x27 +#define FSP_GUID_BYTE3 0x91 +#define FSP_GUID_BYTE4 0x84 +#define FSP_GUID_BYTE5 0x22 +#define FSP_GUID_BYTE6 0x34 +#define FSP_GUID_BYTE7 0x47 +#define FSP_GUID_BYTE8 FSP_GUID_DATA4_0 +#define FSP_GUID_BYTE9 FSP_GUID_DATA4_1 +#define FSP_GUID_BYTE10 FSP_GUID_DATA4_2 +#define FSP_GUID_BYTE11 FSP_GUID_DATA4_3 +#define FSP_GUID_BYTE12 FSP_GUID_DATA4_4 +#define FSP_GUID_BYTE13 FSP_GUID_DATA4_5 +#define FSP_GUID_BYTE14 FSP_GUID_DATA4_6 +#define FSP_GUID_BYTE15 FSP_GUID_DATA4_7 + +#define FSP_HEADER_GUID \ + EFI_GUID(FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ + FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ + FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ + FSP_GUID_DATA4_6, FSP_GUID_DATA4_7) + +#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ + EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ + 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) + +#define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ + EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ + 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) + +#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \ + EFI_GUID(0x69a79759, 0x1373, 0x4367, \ + 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e) + +#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \ + EFI_GUID(0xd038747c, 0xd00c, 0x4980, \ + 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55) + +#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \ + EFI_GUID(0x9c7c3aa7, 0x5332, 0x4917, \ + 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07) + +/* The following GUIDs are newly introduced in FSP spec 1.1 */ + +#define FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID \ + EFI_GUID(0x73ff4f56, 0xaa8e, 0x4451, \ + 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44) + +#define FSP_GRAPHICS_INFO_HOB_GUID \ + EFI_GUID(0x39f62cce, 0x6825, 0x4669, \ + 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07) + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_infoheader.h b/arch/x86/include/asm/fsp1/fsp_infoheader.h new file mode 100644 index 00000000000..86f78014b7b --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_infoheader.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef _FSP_HEADER_H_ +#define _FSP_HEADER_H_ + +#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */ + +struct __packed fsp_header { + u32 sign; /* 'FSPH' */ + u32 hdr_len; /* header length */ + u8 reserved1[3]; + u8 hdr_rev; /* header rev */ + u32 img_rev; /* image rev */ + char img_id[8]; /* signature string */ + u32 img_size; /* image size */ + u32 img_base; /* image base */ + u32 img_attr; /* image attribute */ + u32 cfg_region_off; /* configuration region offset */ + u32 cfg_region_size; /* configuration region size */ + u32 api_num; /* number of API entries */ + u32 fsp_tempram_init; /* tempram_init offset */ + u32 fsp_init; /* fsp_init offset */ + u32 fsp_notify; /* fsp_notify offset */ + u32 fsp_mem_init; /* fsp_mem_init offset */ + u32 fsp_tempram_exit; /* fsp_tempram_exit offset */ + u32 fsp_silicon_init; /* fsp_silicon_init offset */ +}; + +#define FSP_HEADER_REVISION_1 1 +#define FSP_HEADER_REVISION_2 2 + +#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0) + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h new file mode 100644 index 00000000000..7b92392a277 --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_SUPPORT_H__ +#define __FSP_SUPPORT_H__ + +#include "fsp_types.h" +#include "fsp_hob.h" +#include "fsp_fv.h" +#include "fsp_ffs.h" +#include "fsp_api.h" +#include "fsp_infoheader.h" +#include "fsp_bootmode.h" +#include "fsp_azalia.h" +#include +#include + +#define FSP_LOWMEM_BASE 0x100000UL +#define FSP_HIGHMEM_BASE 0x100000000ULL +#define UPD_TERMINATOR 0x55AA + + +/** + * FSP Continuation assembly helper routine + * + * This routine jumps to the C version of FSP continuation function + */ +void asm_continuation(void); + +/** + * FSP initialization complete + * + * This is the function that indicates FSP initialization is complete and jumps + * back to the bootloader with HOB list pointer as the parameter. + * + * @hob_list: HOB list pointer + */ +void fsp_init_done(void *hob_list); + +/** + * FSP Continuation function + * + * @status: Always 0 + * @hob_list: HOB list pointer + * + * @retval: Never returns + */ +void fsp_continue(u32 status, void *hob_list); + +/** + * Find FSP header offset in FSP image + * + * @retval: the offset of FSP header. If signature is invalid, returns 0. + */ +struct fsp_header *find_fsp_header(void); + +/** + * FSP initialization wrapper function. + * + * @stack_top: bootloader stack top address + * @boot_mode: boot mode defined in fsp_bootmode.h + * @nvs_buf: Non-volatile memory buffer pointer + */ +void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); + +/** + * FSP notification wrapper function + * + * @fsp_hdr: Pointer to FSP information header + * @phase: FSP initialization phase defined in enum fsp_phase + * + * @retval: compatible status code with EFI_STATUS defined in PI spec + */ +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); + +/** + * This function retrieves the top of usable low memory. + * + * @hob_list: A HOB list pointer. + * + * @retval: Usable low memory top. + */ +u32 fsp_get_usable_lowmem_top(const void *hob_list); + +/** + * This function retrieves the top of usable high memory. + * + * @hob_list: A HOB list pointer. + * + * @retval: Usable high memory top. + */ +u64 fsp_get_usable_highmem_top(const void *hob_list); + +/** + * This function retrieves a special reserved memory region. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the GUID HOB data buffer length. + * If the GUID HOB is located, the length will be updated. + * @guid: A pointer to the owner guild. + * + * @retval: Reserved region start address. + * 0 if this region does not exist. + */ +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, + u64 *len, const efi_guid_t *guid); + +/** + * This function retrieves the FSP reserved normal memory. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the FSP reserved memory length buffer. + * If the GUID HOB is located, the length will be updated. + * @retval: FSP reserved memory base + * 0 if this region does not exist. + */ +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); + +/** + * This function retrieves the TSEG reserved normal memory. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the TSEG reserved memory length buffer. + * If the GUID HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the TSEG reserved memory. + * @retval others: TSEG reserved memory base. + */ +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); + +/** + * This function retrieves FSP Non-volatile Storage HOB buffer and size. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the NVS data buffer length. + * If the HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the NVS HOB. + * @retval others: FSP NVS data buffer pointer. + */ +void *fsp_get_nvs_data(const void *hob_list, u32 *len); + +/** + * This function retrieves Bootloader temporary stack buffer and size. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the bootloader temporary stack length. + * If the HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the bootloader temporary stack HOB. + * @retval others: Bootloader temporary stackbuffer pointer. + */ +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); + +/** + * This function retrieves graphics information. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the graphics info HOB length. + * If the HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the graphics info HOB. + * @retval others: A pointer to struct hob_graphics_info. + */ +void *fsp_get_graphics_info(const void *hob_list, u32 *len); + +/** + * This function overrides the default configurations of FSP. + * + * @config: A pointer to the FSP configuration data structure + * @rt_buf: A pointer to the FSP runtime buffer data structure + * + * @return: None + */ +void update_fsp_configs(struct fsp_config_data *config, + struct fspinit_rtbuf *rt_buf); + +/** + * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init + * + * @return 0 if OK, -EPERM if the FSP gave an error. + */ +int fsp_init_phase_pci(void); + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_types.h b/arch/x86/include/asm/fsp1/fsp_types.h new file mode 100644 index 00000000000..3d5b17ecf11 --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_types.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_TYPES_H__ +#define __FSP_TYPES_H__ + +/** + * Returns a 16-bit signature built from 2 ASCII characters. + * + * This macro returns a 16-bit value built from the two ASCII characters + * specified by A and B. + * + * @A: The first ASCII character. + * @B: The second ASCII character. + * + * @return: A 16-bit value built from the two ASCII characters specified by + * A and B. + */ +#define SIGNATURE_16(A, B) ((A) | (B << 8)) + +/** + * Returns a 32-bit signature built from 4 ASCII characters. + * + * This macro returns a 32-bit value built from the four ASCII characters + * specified by A, B, C, and D. + * + * @A: The first ASCII character. + * @B: The second ASCII character. + * @C: The third ASCII character. + * @D: The fourth ASCII character. + * + * @return: A 32-bit value built from the two ASCII characters specified by + * A, B, C and D. + */ +#define SIGNATURE_32(A, B, C, D) \ + (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16)) + +/** + * Returns a 64-bit signature built from 8 ASCII characters. + * + * This macro returns a 64-bit value built from the eight ASCII characters + * specified by A, B, C, D, E, F, G,and H. + * + * @A: The first ASCII character. + * @B: The second ASCII character. + * @C: The third ASCII character. + * @D: The fourth ASCII character. + * @E: The fifth ASCII character. + * @F: The sixth ASCII character. + * @G: The seventh ASCII character. + * @H: The eighth ASCII character. + * + * @return: A 64-bit value built from the two ASCII characters specified by + * A, B, C, D, E, F, G and H. + */ +#define SIGNATURE_64(A, B, C, D, E, F, G, H) \ + (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32)) + +#endif diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index c252192bf41..2466ad2ad30 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -74,7 +74,7 @@ u32 isa_map_rom(u32 bus_addr, int size); /* arch/x86/lib/... */ int video_bios_init(void); -/* arch/x86/lib/fsp/... */ +/* arch/x86/lib/fsp1,2/... */ /** * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 906be5eab98..a8c7448ee45 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -43,7 +43,8 @@ ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_ZBOOT) += zimage.o endif obj-$(CONFIG_USE_HOB) += hob.o -obj-$(CONFIG_HAVE_FSP) += fsp/ +obj-$(CONFIG_FSP_VERSION1) += fsp1/ +obj-$(CONFIG_FSP_VERSION2) += fsp2/ ifdef CONFIG_SPL_BUILD ifdef CONFIG_TPL_BUILD diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile deleted file mode 100644 index 870de71bd71..00000000000 --- a/arch/x86/lib/fsp/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2015 Google, Inc - -obj-y += fsp_car.o -obj-y += fsp_common.o -obj-y += fsp_dram.o -obj-$(CONFIG_VIDEO_FSP) += fsp_graphics.o -obj-y += fsp_support.o diff --git a/arch/x86/lib/fsp/fsp_car.S b/arch/x86/lib/fsp/fsp_car.S deleted file mode 100644 index 8c54cea3db4..00000000000 --- a/arch/x86/lib/fsp/fsp_car.S +++ /dev/null @@ -1,111 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, Bin Meng - */ - -#include -#include - -.globl car_init -car_init: - /* - * Note: ebp holds the BIST value (built-in self test) so far, but ebp - * will be destroyed through the FSP call, thus we have to test the - * BIST value here before we call into FSP. - */ - test %ebp, %ebp - jz car_init_start - post_code(POST_BIST_FAILURE) - jmp die - -car_init_start: - post_code(POST_CAR_START) - lea find_fsp_header_romstack, %esp - jmp find_fsp_header - -find_fsp_header_ret: - /* EAX points to FSP_INFO_HEADER */ - mov %eax, %ebp - - /* sanity test */ - cmp $CONFIG_FSP_ADDR, %eax - jb die - - /* calculate TempRamInitEntry address */ - mov 0x30(%ebp), %eax - add 0x1c(%ebp), %eax - - /* call FSP TempRamInitEntry to setup temporary stack */ - lea temp_ram_init_romstack, %esp - jmp *%eax - -temp_ram_init_ret: - addl $4, %esp - cmp $0, %eax - jnz car_init_fail - - post_code(POST_CAR_CPU_CACHE) - - /* - * The FSP TempRamInit initializes the ecx and edx registers to - * point to a temporary but writable memory range (Cache-As-RAM). - * ecx: the start of this temporary memory range, - * edx: the end of this range. - */ - - /* stack grows down from top of CAR */ - movl %edx, %esp - subl $4, %esp - - xor %esi, %esi - jmp car_init_done - -.global fsp_init_done -fsp_init_done: - /* - * We come here from fsp_continue() with eax pointing to the HOB list. - * Save eax to esi temporarily. - */ - movl %eax, %esi - -car_init_done: - /* - * Re-initialize the ebp (BIST) to zero, as we already reach here - * which means we passed BIST testing before. - */ - xorl %ebp, %ebp - jmp car_init_ret - -car_init_fail: - post_code(POST_CAR_FAILURE) - -die: - hlt - jmp die - hlt - - /* - * The function call before CAR initialization is tricky. It cannot - * be called using the 'call' instruction but only the 'jmp' with - * the help of a handcrafted stack in the ROM. The stack needs to - * contain the function return address as well as the parameters. - */ - .balign 4 -find_fsp_header_romstack: - .long find_fsp_header_ret - - .balign 4 -temp_ram_init_romstack: - .long temp_ram_init_ret - .long temp_ram_init_params -temp_ram_init_params: -_dt_ucode_base_size: - /* These next two fields are filled in by binman */ -.globl ucode_base -ucode_base: /* Declared in microcode.h */ - .long 0 /* microcode base */ -.globl ucode_size -ucode_size: /* Declared in microcode.h */ - .long 0 /* microcode size */ - .long CONFIG_SYS_MONITOR_BASE /* code region base */ - .long CONFIG_SYS_MONITOR_LEN /* code region size */ diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c deleted file mode 100644 index ed0827c6e92..00000000000 --- a/arch/x86/lib/fsp/fsp_common.c +++ /dev/null @@ -1,165 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, Bin Meng - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int checkcpu(void) -{ - return 0; -} - -int print_cpuinfo(void) -{ - post_code(POST_CPU_INFO); - return default_print_cpuinfo(); -} - -int fsp_init_phase_pci(void) -{ - u32 status; - - /* call into FspNotify */ - debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); - status = fsp_notify(NULL, INIT_PHASE_PCI); - if (status) - debug("fail, error code %x\n", status); - else - debug("OK\n"); - - return status ? -EPERM : 0; -} - -void board_final_cleanup(void) -{ - u32 status; - - /* call into FspNotify */ - debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); - status = fsp_notify(NULL, INIT_PHASE_BOOT); - if (status) - debug("fail, error code %x\n", status); - else - debug("OK\n"); - - return; -} - -static __maybe_unused void *fsp_prepare_mrc_cache(void) -{ - struct mrc_data_container *cache; - struct mrc_region entry; - int ret; - - ret = mrccache_get_region(NULL, &entry); - if (ret) - return NULL; - - cache = mrccache_find_current(&entry); - if (!cache) - return NULL; - - debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, - cache->data, cache->data_size, cache->checksum); - - return cache->data; -} - -#ifdef CONFIG_HAVE_ACPI_RESUME -int fsp_save_s3_stack(void) -{ - struct udevice *dev; - int ret; - - if (gd->arch.prev_sleep_state == ACPI_S3) - return 0; - - ret = uclass_get_device(UCLASS_RTC, 0, &dev); - if (ret) { - debug("Cannot find RTC: err=%d\n", ret); - return -ENODEV; - } - - /* Save the stack address to CMOS */ - ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); - if (ret) { - debug("Save stack address to CMOS: err=%d\n", ret); - return -EIO; - } - - return 0; -} -#endif - -int arch_fsp_init(void) -{ - void *nvs; - int stack = CONFIG_FSP_TEMP_RAM_ADDR; - int boot_mode = BOOT_FULL_CONFIG; -#ifdef CONFIG_HAVE_ACPI_RESUME - int prev_sleep_state = chipset_prev_sleep_state(); - gd->arch.prev_sleep_state = prev_sleep_state; -#endif - - if (!gd->arch.hob_list) { -#ifdef CONFIG_ENABLE_MRC_CACHE - nvs = fsp_prepare_mrc_cache(); -#else - nvs = NULL; -#endif - -#ifdef CONFIG_HAVE_ACPI_RESUME - if (prev_sleep_state == ACPI_S3) { - if (nvs == NULL) { - /* If waking from S3 and no cache then */ - debug("No MRC cache found in S3 resume path\n"); - post_code(POST_RESUME_FAILURE); - /* Clear Sleep Type */ - chipset_clear_sleep_state(); - /* Reboot */ - debug("Rebooting..\n"); - outb(SYS_RST | RST_CPU, IO_PORT_RESET); - /* Should not reach here.. */ - panic("Reboot System"); - } - - /* - * DM is not available yet at this point, hence call - * CMOS access library which does not depend on DM. - */ - stack = cmos_read32(CMOS_FSP_STACK_ADDR); - boot_mode = BOOT_ON_S3_RESUME; - } -#endif - /* - * The first time we enter here, call fsp_init(). - * Note the execution does not return to this function, - * instead it jumps to fsp_continue(). - */ - fsp_init(stack, boot_mode, nvs); - } else { - /* - * The second time we enter here, adjust the size of malloc() - * pool before relocation. Given gd->malloc_base was adjusted - * after the call to board_init_f_init_reserve() in arch/x86/ - * cpu/start.S, we should fix up gd->malloc_limit here. - */ - gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN; - } - - return 0; -} diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c deleted file mode 100644 index 3a23b70410b..00000000000 --- a/arch/x86/lib/fsp/fsp_dram.c +++ /dev/null @@ -1,108 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, Bin Meng - */ - -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int dram_init(void) -{ - phys_size_t ram_size = 0; - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - - hdr = gd->arch.hob_list; - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_SYS_MEM || - res_desc->type == RES_MEM_RESERVED) { - ram_size += res_desc->len; - } - } - hdr = get_next_hob(hdr); - } - - gd->ram_size = ram_size; - post_code(POST_DRAM); - -#ifdef CONFIG_ENABLE_MRC_CACHE - gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, - &gd->arch.mrc_output_len); -#endif - - return 0; -} - -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = 0; - gd->bd->bi_dram[0].size = gd->ram_size; - - return 0; -} - -/* - * This function looks for the highest region of memory lower than 4GB which - * has enough space for U-Boot where U-Boot is aligned on a page boundary. - * It overrides the default implementation found elsewhere which simply - * picks the end of ram, wherever that may be. The location of the stack, - * the relocation address, and how far U-Boot is moved by relocation are - * set in the global data structure. - */ -ulong board_get_usable_ram_top(ulong total_size) -{ - return fsp_get_usable_lowmem_top(gd->arch.hob_list); -} - -unsigned int install_e820_map(unsigned int max_entries, - struct e820_entry *entries) -{ - unsigned int num_entries = 0; - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - - hdr = gd->arch.hob_list; - - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - entries[num_entries].addr = res_desc->phys_start; - entries[num_entries].size = res_desc->len; - - if (res_desc->type == RES_SYS_MEM) - entries[num_entries].type = E820_RAM; - else if (res_desc->type == RES_MEM_RESERVED) - entries[num_entries].type = E820_RESERVED; - - num_entries++; - } - hdr = get_next_hob(hdr); - } - - /* Mark PCIe ECAM address range as reserved */ - entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE; - entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE; - entries[num_entries].type = E820_RESERVED; - num_entries++; - -#ifdef CONFIG_HAVE_ACPI_RESUME - /* - * Everything between U-Boot's stack and ram top needs to be - * reserved in order for ACPI S3 resume to work. - */ - entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE; - entries[num_entries].size = gd->ram_top - gd->start_addr_sp + \ - CONFIG_STACK_SIZE; - entries[num_entries].type = E820_RESERVED; - num_entries++; -#endif - - return num_entries; -} diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c deleted file mode 100644 index 91d2d085572..00000000000 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2017, Bin Meng - */ - -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -struct pixel { - u8 pos; - u8 size; -}; - -static const struct fsp_framebuffer { - struct pixel red; - struct pixel green; - struct pixel blue; - struct pixel rsvd; -} fsp_framebuffer_format_map[] = { - [pixel_rgbx_8bpc] = { {0, 8}, {8, 8}, {16, 8}, {24, 8} }, - [pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} }, -}; - -static int save_vesa_mode(struct vesa_mode_info *vesa) -{ - const struct hob_graphics_info *ginfo; - const struct fsp_framebuffer *fbinfo; - - ginfo = fsp_get_graphics_info(gd->arch.hob_list, NULL); - - /* - * If there is no graphics info structure, bail out and keep - * running on the serial console. - * - * Note: on some platforms (eg: Braswell), the FSP will not produce - * the graphics info HOB unless you plug some cables to the display - * interface (eg: HDMI) on the board. - */ - if (!ginfo) { - debug("FSP graphics hand-off block not found\n"); - return -ENXIO; - } - - vesa->x_resolution = ginfo->width; - vesa->y_resolution = ginfo->height; - vesa->bits_per_pixel = 32; - vesa->bytes_per_scanline = ginfo->pixels_per_scanline * 4; - vesa->phys_base_ptr = ginfo->fb_base; - - if (ginfo->pixel_format >= pixel_bitmask) { - debug("FSP set unknown framebuffer format: %d\n", - ginfo->pixel_format); - return -EINVAL; - } - fbinfo = &fsp_framebuffer_format_map[ginfo->pixel_format]; - vesa->red_mask_size = fbinfo->red.size; - vesa->red_mask_pos = fbinfo->red.pos; - vesa->green_mask_size = fbinfo->green.size; - vesa->green_mask_pos = fbinfo->green.pos; - vesa->blue_mask_size = fbinfo->blue.size; - vesa->blue_mask_pos = fbinfo->blue.pos; - vesa->reserved_mask_size = fbinfo->rsvd.size; - vesa->reserved_mask_pos = fbinfo->rsvd.pos; - - return 0; -} - -static int fsp_video_probe(struct udevice *dev) -{ - struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); - struct video_priv *uc_priv = dev_get_uclass_priv(dev); - struct vesa_mode_info *vesa = &mode_info.vesa; - int ret; - - printf("Video: "); - - /* Initialize vesa_mode_info structure */ - ret = save_vesa_mode(vesa); - if (ret) - goto err; - - /* - * The framebuffer base address in the FSP graphics info HOB reflects - * the value assigned by the FSP. After PCI enumeration the framebuffer - * base address may be relocated. Let's get the updated one from device. - * - * For IGD, it seems to be always on BAR2. - */ - vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2); - - ret = vbe_setup_video_priv(vesa, uc_priv, plat); - if (ret) - goto err; - - printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, - vesa->bits_per_pixel); - - return 0; - -err: - printf("No video mode configured in FSP!\n"); - return ret; -} - -static const struct udevice_id fsp_video_ids[] = { - { .compatible = "fsp-fb" }, - { } -}; - -U_BOOT_DRIVER(fsp_video) = { - .name = "fsp_video", - .id = UCLASS_VIDEO, - .of_match = fsp_video_ids, - .probe = fsp_video_probe, -}; - -static struct pci_device_id fsp_video_supported[] = { - { PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, 0xffff00) }, - { }, -}; - -U_BOOT_PCI_DEVICE(fsp_video, fsp_video_supported); diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c deleted file mode 100644 index 0eaa9b232b1..00000000000 --- a/arch/x86/lib/fsp/fsp_support.c +++ /dev/null @@ -1,366 +0,0 @@ -// SPDX-License-Identifier: Intel -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#include -#include -#include - -struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void) -{ - /* - * This function may be called before the a stack is established, - * so special care must be taken. First, it cannot declare any local - * variable using stack. Only register variable can be used here. - * Secondly, some compiler version will add prolog or epilog code - * for the C function. If so the function call may not work before - * stack is ready. - * - * GCC 4.8.1 has been verified to be working for the following codes. - */ - volatile register u8 *fsp asm("eax"); - - /* Initalize the FSP base */ - fsp = (u8 *)CONFIG_FSP_ADDR; - - /* Check the FV signature, _FVH */ - if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) { - /* Go to the end of the FV header and align the address */ - fsp += ((struct fv_header *)fsp)->ext_hdr_off; - fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size; - fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8); - } else { - fsp = 0; - } - - /* Check the FFS GUID */ - if (fsp && - ((struct ffs_file_header *)fsp)->name.b[0] == FSP_GUID_BYTE0 && - ((struct ffs_file_header *)fsp)->name.b[1] == FSP_GUID_BYTE1 && - ((struct ffs_file_header *)fsp)->name.b[2] == FSP_GUID_BYTE2 && - ((struct ffs_file_header *)fsp)->name.b[3] == FSP_GUID_BYTE3 && - ((struct ffs_file_header *)fsp)->name.b[4] == FSP_GUID_BYTE4 && - ((struct ffs_file_header *)fsp)->name.b[5] == FSP_GUID_BYTE5 && - ((struct ffs_file_header *)fsp)->name.b[6] == FSP_GUID_BYTE6 && - ((struct ffs_file_header *)fsp)->name.b[7] == FSP_GUID_BYTE7 && - ((struct ffs_file_header *)fsp)->name.b[8] == FSP_GUID_BYTE8 && - ((struct ffs_file_header *)fsp)->name.b[9] == FSP_GUID_BYTE9 && - ((struct ffs_file_header *)fsp)->name.b[10] == FSP_GUID_BYTE10 && - ((struct ffs_file_header *)fsp)->name.b[11] == FSP_GUID_BYTE11 && - ((struct ffs_file_header *)fsp)->name.b[12] == FSP_GUID_BYTE12 && - ((struct ffs_file_header *)fsp)->name.b[13] == FSP_GUID_BYTE13 && - ((struct ffs_file_header *)fsp)->name.b[14] == FSP_GUID_BYTE14 && - ((struct ffs_file_header *)fsp)->name.b[15] == FSP_GUID_BYTE15) { - /* Add the FFS header size to find the raw section header */ - fsp += sizeof(struct ffs_file_header); - } else { - fsp = 0; - } - - if (fsp && - ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) { - /* Add the raw section header size to find the FSP header */ - fsp += sizeof(struct raw_section); - } else { - fsp = 0; - } - - return (struct fsp_header *)fsp; -} - -void fsp_continue(u32 status, void *hob_list) -{ - post_code(POST_MRC); - - assert(status == 0); - - /* The boot loader main function entry */ - fsp_init_done(hob_list); -} - -void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) -{ - struct fsp_config_data config_data; - fsp_init_f init; - struct fsp_init_params params; - struct fspinit_rtbuf rt_buf; - struct fsp_header *fsp_hdr; - struct fsp_init_params *params_ptr; -#ifdef CONFIG_FSP_USE_UPD - struct vpd_region *fsp_vpd; - struct upd_region *fsp_upd; -#endif - - fsp_hdr = find_fsp_header(); - if (fsp_hdr == NULL) { - /* No valid FSP info header was found */ - panic("Invalid FSP header"); - } - - config_data.common.fsp_hdr = fsp_hdr; - config_data.common.stack_top = stack_top; - config_data.common.boot_mode = boot_mode; - -#ifdef CONFIG_FSP_USE_UPD - /* Get VPD region start */ - fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base + - fsp_hdr->cfg_region_off); - - /* Verify the VPD data region is valid */ - assert(fsp_vpd->sign == VPD_IMAGE_ID); - - fsp_upd = &config_data.fsp_upd; - - /* Copy default data from Flash */ - memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset), - sizeof(struct upd_region)); - - /* Verify the UPD data region is valid */ - assert(fsp_upd->terminator == UPD_TERMINATOR); -#endif - - memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); - - /* Override any configuration if required */ - update_fsp_configs(&config_data, &rt_buf); - - memset(¶ms, 0, sizeof(struct fsp_init_params)); - params.nvs_buf = nvs_buf; - params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; - params.continuation = (fsp_continuation_f)asm_continuation; - - init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); - params_ptr = ¶ms; - - post_code(POST_PRE_MRC); - - /* Load GDT for FSP */ - setup_fsp_gdt(); - - /* - * Use ASM code to ensure the register value in EAX & EDX - * will be passed into fsp_continue - */ - asm volatile ( - "pushl %0;" - "call *%%eax;" - ".global asm_continuation;" - "asm_continuation:;" - "movl 4(%%esp), %%eax;" /* status */ - "movl 8(%%esp), %%edx;" /* hob_list */ - "jmp fsp_continue;" - : : "m"(params_ptr), "a"(init) - ); - - /* - * Should never get here. - * Control will continue from fsp_continue. - * This line below is to prevent the compiler from optimizing - * structure intialization. - * - * DO NOT REMOVE! - */ - init(¶ms); -} - -u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) -{ - fsp_notify_f notify; - struct fsp_notify_params params; - struct fsp_notify_params *params_ptr; - u32 status; - - if (!fsp_hdr) - fsp_hdr = (struct fsp_header *)find_fsp_header(); - - if (fsp_hdr == NULL) { - /* No valid FSP info header */ - panic("Invalid FSP header"); - } - - notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify); - params.phase = phase; - params_ptr = ¶ms; - - /* - * Use ASM code to ensure correct parameter is on the stack for - * FspNotify as U-Boot is using different ABI from FSP - */ - asm volatile ( - "pushl %1;" /* push notify phase */ - "call *%%eax;" /* call FspNotify */ - "addl $4, %%esp;" /* clean up the stack */ - : "=a"(status) : "m"(params_ptr), "a"(notify), "m"(*params_ptr) - ); - - return status; -} - -u32 fsp_get_usable_lowmem_top(const void *hob_list) -{ - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - phys_addr_t phys_start; - u32 top; -#ifdef CONFIG_FSP_BROKEN_HOB - struct hob_mem_alloc *res_mem; - phys_addr_t mem_base = 0; -#endif - - /* Get the HOB list for processing */ - hdr = hob_list; - - /* * Collect memory ranges */ - top = FSP_LOWMEM_BASE; - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_SYS_MEM) { - phys_start = res_desc->phys_start; - /* Need memory above 1MB to be collected here */ - if (phys_start >= FSP_LOWMEM_BASE && - phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) - top += (u32)(res_desc->len); - } - } - -#ifdef CONFIG_FSP_BROKEN_HOB - /* - * Find out the lowest memory base address allocated by FSP - * for the boot service data - */ - if (hdr->type == HOB_TYPE_MEM_ALLOC) { - res_mem = (struct hob_mem_alloc *)hdr; - if (!mem_base) - mem_base = res_mem->mem_base; - if (res_mem->mem_base < mem_base) - mem_base = res_mem->mem_base; - } -#endif - - hdr = get_next_hob(hdr); - } - -#ifdef CONFIG_FSP_BROKEN_HOB - /* - * Check whether the memory top address is below the FSP HOB list. - * If not, use the lowest memory base address allocated by FSP as - * the memory top address. This is to prevent U-Boot relocation - * overwrites the important boot service data which is used by FSP, - * otherwise the subsequent call to fsp_notify() will fail. - */ - if (top > (u32)hob_list) { - debug("Adjust memory top address due to a buggy FSP\n"); - top = (u32)mem_base; - } -#endif - - return top; -} - -u64 fsp_get_usable_highmem_top(const void *hob_list) -{ - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - phys_addr_t phys_start; - u64 top; - - /* Get the HOB list for processing */ - hdr = hob_list; - - /* Collect memory ranges */ - top = FSP_HIGHMEM_BASE; - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_SYS_MEM) { - phys_start = res_desc->phys_start; - /* Need memory above 4GB to be collected here */ - if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) - top += (u32)(res_desc->len); - } - } - hdr = get_next_hob(hdr); - } - - return top; -} - -u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, - const efi_guid_t *guid) -{ - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - - /* Get the HOB list for processing */ - hdr = hob_list; - - /* Collect memory ranges */ - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_MEM_RESERVED) { - if (!guidcmp(&res_desc->owner, guid)) { - if (len) - *len = (u32)(res_desc->len); - - return (u64)(res_desc->phys_start); - } - } - } - hdr = get_next_hob(hdr); - } - - return 0; -} - -u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; - u64 length; - u32 base; - - base = (u32)fsp_get_reserved_mem_from_guid(hob_list, - &length, &guid); - if ((len != 0) && (base != 0)) - *len = (u32)length; - - return base; -} - -u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; - u64 length; - u32 base; - - base = (u32)fsp_get_reserved_mem_from_guid(hob_list, - &length, &guid); - if ((len != 0) && (base != 0)) - *len = (u32)length; - - return base; -} - -void *fsp_get_nvs_data(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; - - return hob_get_guid_hob_data(hob_list, len, &guid); -} - -void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; - - return hob_get_guid_hob_data(hob_list, len, &guid); -} - -void *fsp_get_graphics_info(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_GRAPHICS_INFO_HOB_GUID; - - return hob_get_guid_hob_data(hob_list, len, &guid); -} diff --git a/arch/x86/lib/fsp1/Makefile b/arch/x86/lib/fsp1/Makefile new file mode 100644 index 00000000000..870de71bd71 --- /dev/null +++ b/arch/x86/lib/fsp1/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2015 Google, Inc + +obj-y += fsp_car.o +obj-y += fsp_common.o +obj-y += fsp_dram.o +obj-$(CONFIG_VIDEO_FSP) += fsp_graphics.o +obj-y += fsp_support.o diff --git a/arch/x86/lib/fsp1/fsp_car.S b/arch/x86/lib/fsp1/fsp_car.S new file mode 100644 index 00000000000..8c54cea3db4 --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_car.S @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014, Bin Meng + */ + +#include +#include + +.globl car_init +car_init: + /* + * Note: ebp holds the BIST value (built-in self test) so far, but ebp + * will be destroyed through the FSP call, thus we have to test the + * BIST value here before we call into FSP. + */ + test %ebp, %ebp + jz car_init_start + post_code(POST_BIST_FAILURE) + jmp die + +car_init_start: + post_code(POST_CAR_START) + lea find_fsp_header_romstack, %esp + jmp find_fsp_header + +find_fsp_header_ret: + /* EAX points to FSP_INFO_HEADER */ + mov %eax, %ebp + + /* sanity test */ + cmp $CONFIG_FSP_ADDR, %eax + jb die + + /* calculate TempRamInitEntry address */ + mov 0x30(%ebp), %eax + add 0x1c(%ebp), %eax + + /* call FSP TempRamInitEntry to setup temporary stack */ + lea temp_ram_init_romstack, %esp + jmp *%eax + +temp_ram_init_ret: + addl $4, %esp + cmp $0, %eax + jnz car_init_fail + + post_code(POST_CAR_CPU_CACHE) + + /* + * The FSP TempRamInit initializes the ecx and edx registers to + * point to a temporary but writable memory range (Cache-As-RAM). + * ecx: the start of this temporary memory range, + * edx: the end of this range. + */ + + /* stack grows down from top of CAR */ + movl %edx, %esp + subl $4, %esp + + xor %esi, %esi + jmp car_init_done + +.global fsp_init_done +fsp_init_done: + /* + * We come here from fsp_continue() with eax pointing to the HOB list. + * Save eax to esi temporarily. + */ + movl %eax, %esi + +car_init_done: + /* + * Re-initialize the ebp (BIST) to zero, as we already reach here + * which means we passed BIST testing before. + */ + xorl %ebp, %ebp + jmp car_init_ret + +car_init_fail: + post_code(POST_CAR_FAILURE) + +die: + hlt + jmp die + hlt + + /* + * The function call before CAR initialization is tricky. It cannot + * be called using the 'call' instruction but only the 'jmp' with + * the help of a handcrafted stack in the ROM. The stack needs to + * contain the function return address as well as the parameters. + */ + .balign 4 +find_fsp_header_romstack: + .long find_fsp_header_ret + + .balign 4 +temp_ram_init_romstack: + .long temp_ram_init_ret + .long temp_ram_init_params +temp_ram_init_params: +_dt_ucode_base_size: + /* These next two fields are filled in by binman */ +.globl ucode_base +ucode_base: /* Declared in microcode.h */ + .long 0 /* microcode base */ +.globl ucode_size +ucode_size: /* Declared in microcode.h */ + .long 0 /* microcode size */ + .long CONFIG_SYS_MONITOR_BASE /* code region base */ + .long CONFIG_SYS_MONITOR_LEN /* code region size */ diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c new file mode 100644 index 00000000000..591eef7b813 --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014, Bin Meng + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int checkcpu(void) +{ + return 0; +} + +int print_cpuinfo(void) +{ + post_code(POST_CPU_INFO); + return default_print_cpuinfo(); +} + +int fsp_init_phase_pci(void) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); + status = fsp_notify(NULL, INIT_PHASE_PCI); + if (status) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return status ? -EPERM : 0; +} + +void board_final_cleanup(void) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); + status = fsp_notify(NULL, INIT_PHASE_BOOT); + if (status) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return; +} + +static __maybe_unused void *fsp_prepare_mrc_cache(void) +{ + struct mrc_data_container *cache; + struct mrc_region entry; + int ret; + + ret = mrccache_get_region(NULL, &entry); + if (ret) + return NULL; + + cache = mrccache_find_current(&entry); + if (!cache) + return NULL; + + debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, + cache->data, cache->data_size, cache->checksum); + + return cache->data; +} + +#ifdef CONFIG_HAVE_ACPI_RESUME +int fsp_save_s3_stack(void) +{ + struct udevice *dev; + int ret; + + if (gd->arch.prev_sleep_state == ACPI_S3) + return 0; + + ret = uclass_get_device(UCLASS_RTC, 0, &dev); + if (ret) { + debug("Cannot find RTC: err=%d\n", ret); + return -ENODEV; + } + + /* Save the stack address to CMOS */ + ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); + if (ret) { + debug("Save stack address to CMOS: err=%d\n", ret); + return -EIO; + } + + return 0; +} +#endif + +int arch_fsp_init(void) +{ + void *nvs; + int stack = CONFIG_FSP_TEMP_RAM_ADDR; + int boot_mode = BOOT_FULL_CONFIG; +#ifdef CONFIG_HAVE_ACPI_RESUME + int prev_sleep_state = chipset_prev_sleep_state(); + gd->arch.prev_sleep_state = prev_sleep_state; +#endif + + if (!gd->arch.hob_list) { +#ifdef CONFIG_ENABLE_MRC_CACHE + nvs = fsp_prepare_mrc_cache(); +#else + nvs = NULL; +#endif + +#ifdef CONFIG_HAVE_ACPI_RESUME + if (prev_sleep_state == ACPI_S3) { + if (nvs == NULL) { + /* If waking from S3 and no cache then */ + debug("No MRC cache found in S3 resume path\n"); + post_code(POST_RESUME_FAILURE); + /* Clear Sleep Type */ + chipset_clear_sleep_state(); + /* Reboot */ + debug("Rebooting..\n"); + outb(SYS_RST | RST_CPU, IO_PORT_RESET); + /* Should not reach here.. */ + panic("Reboot System"); + } + + /* + * DM is not available yet at this point, hence call + * CMOS access library which does not depend on DM. + */ + stack = cmos_read32(CMOS_FSP_STACK_ADDR); + boot_mode = BOOT_ON_S3_RESUME; + } +#endif + /* + * The first time we enter here, call fsp_init(). + * Note the execution does not return to this function, + * instead it jumps to fsp_continue(). + */ + fsp_init(stack, boot_mode, nvs); + } else { + /* + * The second time we enter here, adjust the size of malloc() + * pool before relocation. Given gd->malloc_base was adjusted + * after the call to board_init_f_init_reserve() in arch/x86/ + * cpu/start.S, we should fix up gd->malloc_limit here. + */ + gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN; + } + + return 0; +} diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c new file mode 100644 index 00000000000..3bf65b495ca --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014, Bin Meng + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + phys_size_t ram_size = 0; + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + + hdr = gd->arch.hob_list; + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_SYS_MEM || + res_desc->type == RES_MEM_RESERVED) { + ram_size += res_desc->len; + } + } + hdr = get_next_hob(hdr); + } + + gd->ram_size = ram_size; + post_code(POST_DRAM); + +#ifdef CONFIG_ENABLE_MRC_CACHE + gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, + &gd->arch.mrc_output_len); +#endif + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; +} + +/* + * This function looks for the highest region of memory lower than 4GB which + * has enough space for U-Boot where U-Boot is aligned on a page boundary. + * It overrides the default implementation found elsewhere which simply + * picks the end of ram, wherever that may be. The location of the stack, + * the relocation address, and how far U-Boot is moved by relocation are + * set in the global data structure. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return fsp_get_usable_lowmem_top(gd->arch.hob_list); +} + +unsigned int install_e820_map(unsigned int max_entries, + struct e820_entry *entries) +{ + unsigned int num_entries = 0; + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + + hdr = gd->arch.hob_list; + + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + entries[num_entries].addr = res_desc->phys_start; + entries[num_entries].size = res_desc->len; + + if (res_desc->type == RES_SYS_MEM) + entries[num_entries].type = E820_RAM; + else if (res_desc->type == RES_MEM_RESERVED) + entries[num_entries].type = E820_RESERVED; + + num_entries++; + } + hdr = get_next_hob(hdr); + } + + /* Mark PCIe ECAM address range as reserved */ + entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE; + entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE; + entries[num_entries].type = E820_RESERVED; + num_entries++; + +#ifdef CONFIG_HAVE_ACPI_RESUME + /* + * Everything between U-Boot's stack and ram top needs to be + * reserved in order for ACPI S3 resume to work. + */ + entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE; + entries[num_entries].size = gd->ram_top - gd->start_addr_sp + \ + CONFIG_STACK_SIZE; + entries[num_entries].type = E820_RESERVED; + num_entries++; +#endif + + return num_entries; +} diff --git a/arch/x86/lib/fsp1/fsp_graphics.c b/arch/x86/lib/fsp1/fsp_graphics.c new file mode 100644 index 00000000000..52e71334f95 --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_graphics.c @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017, Bin Meng + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct pixel { + u8 pos; + u8 size; +}; + +static const struct fsp_framebuffer { + struct pixel red; + struct pixel green; + struct pixel blue; + struct pixel rsvd; +} fsp_framebuffer_format_map[] = { + [pixel_rgbx_8bpc] = { {0, 8}, {8, 8}, {16, 8}, {24, 8} }, + [pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} }, +}; + +static int save_vesa_mode(struct vesa_mode_info *vesa) +{ + const struct hob_graphics_info *ginfo; + const struct fsp_framebuffer *fbinfo; + + ginfo = fsp_get_graphics_info(gd->arch.hob_list, NULL); + + /* + * If there is no graphics info structure, bail out and keep + * running on the serial console. + * + * Note: on some platforms (eg: Braswell), the FSP will not produce + * the graphics info HOB unless you plug some cables to the display + * interface (eg: HDMI) on the board. + */ + if (!ginfo) { + debug("FSP graphics hand-off block not found\n"); + return -ENXIO; + } + + vesa->x_resolution = ginfo->width; + vesa->y_resolution = ginfo->height; + vesa->bits_per_pixel = 32; + vesa->bytes_per_scanline = ginfo->pixels_per_scanline * 4; + vesa->phys_base_ptr = ginfo->fb_base; + + if (ginfo->pixel_format >= pixel_bitmask) { + debug("FSP set unknown framebuffer format: %d\n", + ginfo->pixel_format); + return -EINVAL; + } + fbinfo = &fsp_framebuffer_format_map[ginfo->pixel_format]; + vesa->red_mask_size = fbinfo->red.size; + vesa->red_mask_pos = fbinfo->red.pos; + vesa->green_mask_size = fbinfo->green.size; + vesa->green_mask_pos = fbinfo->green.pos; + vesa->blue_mask_size = fbinfo->blue.size; + vesa->blue_mask_pos = fbinfo->blue.pos; + vesa->reserved_mask_size = fbinfo->rsvd.size; + vesa->reserved_mask_pos = fbinfo->rsvd.pos; + + return 0; +} + +static int fsp_video_probe(struct udevice *dev) +{ + struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct video_priv *uc_priv = dev_get_uclass_priv(dev); + struct vesa_mode_info *vesa = &mode_info.vesa; + int ret; + + printf("Video: "); + + /* Initialize vesa_mode_info structure */ + ret = save_vesa_mode(vesa); + if (ret) + goto err; + + /* + * The framebuffer base address in the FSP graphics info HOB reflects + * the value assigned by the FSP. After PCI enumeration the framebuffer + * base address may be relocated. Let's get the updated one from device. + * + * For IGD, it seems to be always on BAR2. + */ + vesa->phys_base_ptr = dm_pci_read_bar32(dev, 2); + + ret = vbe_setup_video_priv(vesa, uc_priv, plat); + if (ret) + goto err; + + printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, + vesa->bits_per_pixel); + + return 0; + +err: + printf("No video mode configured in FSP!\n"); + return ret; +} + +static const struct udevice_id fsp_video_ids[] = { + { .compatible = "fsp-fb" }, + { } +}; + +U_BOOT_DRIVER(fsp_video) = { + .name = "fsp_video", + .id = UCLASS_VIDEO, + .of_match = fsp_video_ids, + .probe = fsp_video_probe, +}; + +static struct pci_device_id fsp_video_supported[] = { + { PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, 0xffff00) }, + { }, +}; + +U_BOOT_PCI_DEVICE(fsp_video, fsp_video_supported); diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c new file mode 100644 index 00000000000..019a42f53fe --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_support.c @@ -0,0 +1,366 @@ +// SPDX-License-Identifier: Intel +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#include +#include +#include + +struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void) +{ + /* + * This function may be called before the a stack is established, + * so special care must be taken. First, it cannot declare any local + * variable using stack. Only register variable can be used here. + * Secondly, some compiler version will add prolog or epilog code + * for the C function. If so the function call may not work before + * stack is ready. + * + * GCC 4.8.1 has been verified to be working for the following codes. + */ + volatile register u8 *fsp asm("eax"); + + /* Initalize the FSP base */ + fsp = (u8 *)CONFIG_FSP_ADDR; + + /* Check the FV signature, _FVH */ + if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) { + /* Go to the end of the FV header and align the address */ + fsp += ((struct fv_header *)fsp)->ext_hdr_off; + fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size; + fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8); + } else { + fsp = 0; + } + + /* Check the FFS GUID */ + if (fsp && + ((struct ffs_file_header *)fsp)->name.b[0] == FSP_GUID_BYTE0 && + ((struct ffs_file_header *)fsp)->name.b[1] == FSP_GUID_BYTE1 && + ((struct ffs_file_header *)fsp)->name.b[2] == FSP_GUID_BYTE2 && + ((struct ffs_file_header *)fsp)->name.b[3] == FSP_GUID_BYTE3 && + ((struct ffs_file_header *)fsp)->name.b[4] == FSP_GUID_BYTE4 && + ((struct ffs_file_header *)fsp)->name.b[5] == FSP_GUID_BYTE5 && + ((struct ffs_file_header *)fsp)->name.b[6] == FSP_GUID_BYTE6 && + ((struct ffs_file_header *)fsp)->name.b[7] == FSP_GUID_BYTE7 && + ((struct ffs_file_header *)fsp)->name.b[8] == FSP_GUID_BYTE8 && + ((struct ffs_file_header *)fsp)->name.b[9] == FSP_GUID_BYTE9 && + ((struct ffs_file_header *)fsp)->name.b[10] == FSP_GUID_BYTE10 && + ((struct ffs_file_header *)fsp)->name.b[11] == FSP_GUID_BYTE11 && + ((struct ffs_file_header *)fsp)->name.b[12] == FSP_GUID_BYTE12 && + ((struct ffs_file_header *)fsp)->name.b[13] == FSP_GUID_BYTE13 && + ((struct ffs_file_header *)fsp)->name.b[14] == FSP_GUID_BYTE14 && + ((struct ffs_file_header *)fsp)->name.b[15] == FSP_GUID_BYTE15) { + /* Add the FFS header size to find the raw section header */ + fsp += sizeof(struct ffs_file_header); + } else { + fsp = 0; + } + + if (fsp && + ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) { + /* Add the raw section header size to find the FSP header */ + fsp += sizeof(struct raw_section); + } else { + fsp = 0; + } + + return (struct fsp_header *)fsp; +} + +void fsp_continue(u32 status, void *hob_list) +{ + post_code(POST_MRC); + + assert(status == 0); + + /* The boot loader main function entry */ + fsp_init_done(hob_list); +} + +void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) +{ + struct fsp_config_data config_data; + fsp_init_f init; + struct fsp_init_params params; + struct fspinit_rtbuf rt_buf; + struct fsp_header *fsp_hdr; + struct fsp_init_params *params_ptr; +#ifdef CONFIG_FSP_USE_UPD + struct vpd_region *fsp_vpd; + struct upd_region *fsp_upd; +#endif + + fsp_hdr = find_fsp_header(); + if (fsp_hdr == NULL) { + /* No valid FSP info header was found */ + panic("Invalid FSP header"); + } + + config_data.common.fsp_hdr = fsp_hdr; + config_data.common.stack_top = stack_top; + config_data.common.boot_mode = boot_mode; + +#ifdef CONFIG_FSP_USE_UPD + /* Get VPD region start */ + fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base + + fsp_hdr->cfg_region_off); + + /* Verify the VPD data region is valid */ + assert(fsp_vpd->sign == VPD_IMAGE_ID); + + fsp_upd = &config_data.fsp_upd; + + /* Copy default data from Flash */ + memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset), + sizeof(struct upd_region)); + + /* Verify the UPD data region is valid */ + assert(fsp_upd->terminator == UPD_TERMINATOR); +#endif + + memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); + + /* Override any configuration if required */ + update_fsp_configs(&config_data, &rt_buf); + + memset(¶ms, 0, sizeof(struct fsp_init_params)); + params.nvs_buf = nvs_buf; + params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; + params.continuation = (fsp_continuation_f)asm_continuation; + + init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); + params_ptr = ¶ms; + + post_code(POST_PRE_MRC); + + /* Load GDT for FSP */ + setup_fsp_gdt(); + + /* + * Use ASM code to ensure the register value in EAX & EDX + * will be passed into fsp_continue + */ + asm volatile ( + "pushl %0;" + "call *%%eax;" + ".global asm_continuation;" + "asm_continuation:;" + "movl 4(%%esp), %%eax;" /* status */ + "movl 8(%%esp), %%edx;" /* hob_list */ + "jmp fsp_continue;" + : : "m"(params_ptr), "a"(init) + ); + + /* + * Should never get here. + * Control will continue from fsp_continue. + * This line below is to prevent the compiler from optimizing + * structure intialization. + * + * DO NOT REMOVE! + */ + init(¶ms); +} + +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) +{ + fsp_notify_f notify; + struct fsp_notify_params params; + struct fsp_notify_params *params_ptr; + u32 status; + + if (!fsp_hdr) + fsp_hdr = (struct fsp_header *)find_fsp_header(); + + if (fsp_hdr == NULL) { + /* No valid FSP info header */ + panic("Invalid FSP header"); + } + + notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify); + params.phase = phase; + params_ptr = ¶ms; + + /* + * Use ASM code to ensure correct parameter is on the stack for + * FspNotify as U-Boot is using different ABI from FSP + */ + asm volatile ( + "pushl %1;" /* push notify phase */ + "call *%%eax;" /* call FspNotify */ + "addl $4, %%esp;" /* clean up the stack */ + : "=a"(status) : "m"(params_ptr), "a"(notify), "m"(*params_ptr) + ); + + return status; +} + +u32 fsp_get_usable_lowmem_top(const void *hob_list) +{ + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + phys_addr_t phys_start; + u32 top; +#ifdef CONFIG_FSP_BROKEN_HOB + struct hob_mem_alloc *res_mem; + phys_addr_t mem_base = 0; +#endif + + /* Get the HOB list for processing */ + hdr = hob_list; + + /* * Collect memory ranges */ + top = FSP_LOWMEM_BASE; + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_SYS_MEM) { + phys_start = res_desc->phys_start; + /* Need memory above 1MB to be collected here */ + if (phys_start >= FSP_LOWMEM_BASE && + phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) + top += (u32)(res_desc->len); + } + } + +#ifdef CONFIG_FSP_BROKEN_HOB + /* + * Find out the lowest memory base address allocated by FSP + * for the boot service data + */ + if (hdr->type == HOB_TYPE_MEM_ALLOC) { + res_mem = (struct hob_mem_alloc *)hdr; + if (!mem_base) + mem_base = res_mem->mem_base; + if (res_mem->mem_base < mem_base) + mem_base = res_mem->mem_base; + } +#endif + + hdr = get_next_hob(hdr); + } + +#ifdef CONFIG_FSP_BROKEN_HOB + /* + * Check whether the memory top address is below the FSP HOB list. + * If not, use the lowest memory base address allocated by FSP as + * the memory top address. This is to prevent U-Boot relocation + * overwrites the important boot service data which is used by FSP, + * otherwise the subsequent call to fsp_notify() will fail. + */ + if (top > (u32)hob_list) { + debug("Adjust memory top address due to a buggy FSP\n"); + top = (u32)mem_base; + } +#endif + + return top; +} + +u64 fsp_get_usable_highmem_top(const void *hob_list) +{ + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + phys_addr_t phys_start; + u64 top; + + /* Get the HOB list for processing */ + hdr = hob_list; + + /* Collect memory ranges */ + top = FSP_HIGHMEM_BASE; + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_SYS_MEM) { + phys_start = res_desc->phys_start; + /* Need memory above 4GB to be collected here */ + if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) + top += (u32)(res_desc->len); + } + } + hdr = get_next_hob(hdr); + } + + return top; +} + +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, + const efi_guid_t *guid) +{ + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + + /* Get the HOB list for processing */ + hdr = hob_list; + + /* Collect memory ranges */ + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_MEM_RESERVED) { + if (!guidcmp(&res_desc->owner, guid)) { + if (len) + *len = (u32)(res_desc->len); + + return (u64)(res_desc->phys_start); + } + } + } + hdr = get_next_hob(hdr); + } + + return 0; +} + +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; + u64 length; + u32 base; + + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, &guid); + if ((len != 0) && (base != 0)) + *len = (u32)length; + + return base; +} + +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; + u64 length; + u32 base; + + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, &guid); + if ((len != 0) && (base != 0)) + *len = (u32)length; + + return base; +} + +void *fsp_get_nvs_data(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} + +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} + +void *fsp_get_graphics_info(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_GRAPHICS_INFO_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c index ac12f303a3b..8f4c587371d 100644 --- a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c +++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c @@ -5,7 +5,7 @@ */ #include -#include +#include /* ALC262 Verb Table - 10EC0262 */ static const u32 verb_table_data13[] = { diff --git a/board/intel/cherryhill/cherryhill.c b/board/intel/cherryhill/cherryhill.c index 695af6bb7ec..c037d5b14cd 100644 --- a/board/intel/cherryhill/cherryhill.c +++ b/board/intel/cherryhill/cherryhill.c @@ -5,7 +5,7 @@ #include #include -#include +#include static const struct gpio_family gpio_family[] = { GPIO_FAMILY_CONF("SOUTHEAST_2_hshvfamily_2x3_rcomp_7_0", NA, 0, diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c index efa183854b7..fb27624422c 100644 --- a/cmd/x86/fsp.c +++ b/cmd/x86/fsp.c @@ -5,7 +5,7 @@ #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index ab3e1310eb5..b73d0cd70a7 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -12,7 +12,7 @@ #include #include #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) -#include +#include #endif #include "pci_internal.h" -- cgit v1.2.3 From 6e93c64117bb8d04586bf095a8af75c25c2a7392 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:12 -0600 Subject: x86: Move fsp_azalia.h to the generic fsp directory This header file is the same for FSP v1 and v2. Move it into the general fsp directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: remove forward declarations in fsp_support.h] Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_azalia.h | 38 +++++++++++++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_azalia.h | 38 --------------------------------- arch/x86/include/asm/fsp1/fsp_support.h | 3 +-- 3 files changed, 39 insertions(+), 40 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_azalia.h delete mode 100644 arch/x86/include/asm/fsp1/fsp_azalia.h diff --git a/arch/x86/include/asm/fsp/fsp_azalia.h b/arch/x86/include/asm/fsp/fsp_azalia.h new file mode 100644 index 00000000000..e59180bdae2 --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_azalia.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2015, Google, Inc + */ + +#ifndef _FSP_AZALIA_H_ +#define _FSP_AZALIA_H_ + +struct __packed azalia_verb_table_header { + u32 vendor_device_id; + u16 sub_system_id; + u8 revision_id; /* 0xff applies to all steppings */ + u8 front_panel_support; + u16 number_of_rear_jacks; + u16 number_of_front_jacks; +}; + +struct __packed azalia_verb_table { + struct azalia_verb_table_header header; + const u32 *data; +}; + +struct __packed azalia_config { + u8 pme_enable:1; + u8 docking_supported:1; + u8 docking_attached:1; + u8 hdmi_codec_enable:1; + u8 azalia_v_ci_enable:1; + u8 rsvdbits:3; + /* number of verb tables provided by platform */ + u8 verb_table_num; + const struct azalia_verb_table *verb_table; + /* delay timer after azalia reset */ + u16 reset_wait_timer_ms; +}; + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_azalia.h b/arch/x86/include/asm/fsp1/fsp_azalia.h deleted file mode 100644 index e59180bdae2..00000000000 --- a/arch/x86/include/asm/fsp1/fsp_azalia.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2015, Google, Inc - */ - -#ifndef _FSP_AZALIA_H_ -#define _FSP_AZALIA_H_ - -struct __packed azalia_verb_table_header { - u32 vendor_device_id; - u16 sub_system_id; - u8 revision_id; /* 0xff applies to all steppings */ - u8 front_panel_support; - u16 number_of_rear_jacks; - u16 number_of_front_jacks; -}; - -struct __packed azalia_verb_table { - struct azalia_verb_table_header header; - const u32 *data; -}; - -struct __packed azalia_config { - u8 pme_enable:1; - u8 docking_supported:1; - u8 docking_attached:1; - u8 hdmi_codec_enable:1; - u8 azalia_v_ci_enable:1; - u8 rsvdbits:3; - /* number of verb tables provided by platform */ - u8 verb_table_num; - const struct azalia_verb_table *verb_table; - /* delay timer after azalia reset */ - u16 reset_wait_timer_ms; -}; - -#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index 7b92392a277..b0c36a41fe2 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -14,7 +14,7 @@ #include "fsp_api.h" #include "fsp_infoheader.h" #include "fsp_bootmode.h" -#include "fsp_azalia.h" +#include #include #include @@ -22,7 +22,6 @@ #define FSP_HIGHMEM_BASE 0x100000000ULL #define UPD_TERMINATOR 0x55AA - /** * FSP Continuation assembly helper routine * -- cgit v1.2.3 From 8cd29798d6a8e3cd3061ba855f6ea2b95ec47afc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:13 -0600 Subject: x86: Create a new fsp_arch.h header At present fsp_support.h includes fsp_vpd.h which is an FPSv1 concept (VPD means Vital Product Data). For FSPv2 only UPD (Updatable Product Data) is used. To avoid mangling header files, put these two includes in a separate header which we can adjust as necessary for FSPv2. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp1/fsp_support.h | 3 +-- arch/x86/include/asm/fsp_arch.h | 20 ++++++++++++++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) create mode 100644 arch/x86/include/asm/fsp_arch.h diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index b0c36a41fe2..2fa6619c03c 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -14,9 +14,8 @@ #include "fsp_api.h" #include "fsp_infoheader.h" #include "fsp_bootmode.h" +#include #include -#include -#include #define FSP_LOWMEM_BASE 0x100000UL #define FSP_HIGHMEM_BASE 0x100000000ULL diff --git a/arch/x86/include/asm/fsp_arch.h b/arch/x86/include/asm/fsp_arch.h new file mode 100644 index 00000000000..fb7f9109f7b --- /dev/null +++ b/arch/x86/include/asm/fsp_arch.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Google LLC + * Written by Simon Glass + * + * Architecture-specific definitions (FSP config and VPD/UPD) + */ + +#ifndef __FSP_ARCH_H__ +#define __FSP_ARCH_H__ + +/* + * Note: use #ifndef __ASSEMBLY__ around any struct definitions or other C code + * since this file can be included from assembly. + */ + +#include +#include + +#endif -- cgit v1.2.3 From 8a0b4e2dd7ce8a93ef49bed916e96c569a95ff23 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:14 -0600 Subject: x86: Move fsp_api.h inclusion out of fsp_support.h This header file is different for each version of FSP. Move it into the fsp_arch.h header file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp1/fsp_support.h | 1 - arch/x86/include/asm/fsp_arch.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index 2fa6619c03c..c75afe93567 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -11,7 +11,6 @@ #include "fsp_hob.h" #include "fsp_fv.h" #include "fsp_ffs.h" -#include "fsp_api.h" #include "fsp_infoheader.h" #include "fsp_bootmode.h" #include diff --git a/arch/x86/include/asm/fsp_arch.h b/arch/x86/include/asm/fsp_arch.h index fb7f9109f7b..b223141c448 100644 --- a/arch/x86/include/asm/fsp_arch.h +++ b/arch/x86/include/asm/fsp_arch.h @@ -14,6 +14,7 @@ * since this file can be included from assembly. */ +#include #include #include -- cgit v1.2.3 From 2b5560a6bdafe4e1217938b8b772b8f545136dd8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:15 -0600 Subject: x86: Move fsp_types.h to the generic fsp directory This header file is the same for FSP v1 and v2. Move it into the general fsp directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_types.h | 62 +++++++++++++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_support.h | 2 +- arch/x86/include/asm/fsp1/fsp_types.h | 62 --------------------------------- 3 files changed, 63 insertions(+), 63 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_types.h delete mode 100644 arch/x86/include/asm/fsp1/fsp_types.h diff --git a/arch/x86/include/asm/fsp/fsp_types.h b/arch/x86/include/asm/fsp/fsp_types.h new file mode 100644 index 00000000000..3d5b17ecf11 --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_types.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_TYPES_H__ +#define __FSP_TYPES_H__ + +/** + * Returns a 16-bit signature built from 2 ASCII characters. + * + * This macro returns a 16-bit value built from the two ASCII characters + * specified by A and B. + * + * @A: The first ASCII character. + * @B: The second ASCII character. + * + * @return: A 16-bit value built from the two ASCII characters specified by + * A and B. + */ +#define SIGNATURE_16(A, B) ((A) | (B << 8)) + +/** + * Returns a 32-bit signature built from 4 ASCII characters. + * + * This macro returns a 32-bit value built from the four ASCII characters + * specified by A, B, C, and D. + * + * @A: The first ASCII character. + * @B: The second ASCII character. + * @C: The third ASCII character. + * @D: The fourth ASCII character. + * + * @return: A 32-bit value built from the two ASCII characters specified by + * A, B, C and D. + */ +#define SIGNATURE_32(A, B, C, D) \ + (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16)) + +/** + * Returns a 64-bit signature built from 8 ASCII characters. + * + * This macro returns a 64-bit value built from the eight ASCII characters + * specified by A, B, C, D, E, F, G,and H. + * + * @A: The first ASCII character. + * @B: The second ASCII character. + * @C: The third ASCII character. + * @D: The fourth ASCII character. + * @E: The fifth ASCII character. + * @F: The sixth ASCII character. + * @G: The seventh ASCII character. + * @H: The eighth ASCII character. + * + * @return: A 64-bit value built from the two ASCII characters specified by + * A, B, C, D, E, F, G and H. + */ +#define SIGNATURE_64(A, B, C, D, E, F, G, H) \ + (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32)) + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index c75afe93567..e5ec2af83e1 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -7,7 +7,7 @@ #ifndef __FSP_SUPPORT_H__ #define __FSP_SUPPORT_H__ -#include "fsp_types.h" +#include #include "fsp_hob.h" #include "fsp_fv.h" #include "fsp_ffs.h" diff --git a/arch/x86/include/asm/fsp1/fsp_types.h b/arch/x86/include/asm/fsp1/fsp_types.h deleted file mode 100644 index 3d5b17ecf11..00000000000 --- a/arch/x86/include/asm/fsp1/fsp_types.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_TYPES_H__ -#define __FSP_TYPES_H__ - -/** - * Returns a 16-bit signature built from 2 ASCII characters. - * - * This macro returns a 16-bit value built from the two ASCII characters - * specified by A and B. - * - * @A: The first ASCII character. - * @B: The second ASCII character. - * - * @return: A 16-bit value built from the two ASCII characters specified by - * A and B. - */ -#define SIGNATURE_16(A, B) ((A) | (B << 8)) - -/** - * Returns a 32-bit signature built from 4 ASCII characters. - * - * This macro returns a 32-bit value built from the four ASCII characters - * specified by A, B, C, and D. - * - * @A: The first ASCII character. - * @B: The second ASCII character. - * @C: The third ASCII character. - * @D: The fourth ASCII character. - * - * @return: A 32-bit value built from the two ASCII characters specified by - * A, B, C and D. - */ -#define SIGNATURE_32(A, B, C, D) \ - (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16)) - -/** - * Returns a 64-bit signature built from 8 ASCII characters. - * - * This macro returns a 64-bit value built from the eight ASCII characters - * specified by A, B, C, D, E, F, G,and H. - * - * @A: The first ASCII character. - * @B: The second ASCII character. - * @C: The third ASCII character. - * @D: The fourth ASCII character. - * @E: The fifth ASCII character. - * @F: The sixth ASCII character. - * @G: The seventh ASCII character. - * @H: The eighth ASCII character. - * - * @return: A 64-bit value built from the two ASCII characters specified by - * A, B, C, D, E, F, G and H. - */ -#define SIGNATURE_64(A, B, C, D, E, F, G, H) \ - (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32)) - -#endif -- cgit v1.2.3 From aae5b4613a4b68efee33ac6803440ccc3a18ec55 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:16 -0600 Subject: x86: Move fsp_fv.h to the generic fsp directory This header file is the same for FSP v1 and v2. Move it into the general fsp directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_fv.h | 136 ++++++++++++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_fv.h | 136 -------------------------------- arch/x86/include/asm/fsp1/fsp_support.h | 2 +- 3 files changed, 137 insertions(+), 137 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_fv.h delete mode 100644 arch/x86/include/asm/fsp1/fsp_fv.h diff --git a/arch/x86/include/asm/fsp/fsp_fv.h b/arch/x86/include/asm/fsp/fsp_fv.h new file mode 100644 index 00000000000..511dfb78b81 --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_fv.h @@ -0,0 +1,136 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_FV___ +#define __FSP_FV___ + +/* Value of EFI_FV_FILE_ATTRIBUTES */ +#define EFI_FV_FILE_ATTR_ALIGNMENT 0x0000001F +#define EFI_FV_FILE_ATTR_FIXED 0x00000100 +#define EFI_FV_FILE_ATTR_MEMORY_MAPPED 0x00000200 + +/* Attributes bit definitions */ +#define EFI_FVB2_READ_DISABLED_CAP 0x00000001 +#define EFI_FVB2_READ_ENABLED_CAP 0x00000002 +#define EFI_FVB2_READ_STATUS 0x00000004 +#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008 +#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010 +#define EFI_FVB2_WRITE_STATUS 0x00000020 +#define EFI_FVB2_LOCK_CAP 0x00000040 +#define EFI_FVB2_LOCK_STATUS 0x00000080 +#define EFI_FVB2_STICKY_WRITE 0x00000200 +#define EFI_FVB2_MEMORY_MAPPED 0x00000400 +#define EFI_FVB2_ERASE_POLARITY 0x00000800 +#define EFI_FVB2_READ_LOCK_CAP 0x00001000 +#define EFI_FVB2_READ_LOCK_STATUS 0x00002000 +#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000 +#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000 +#define EFI_FVB2_ALIGNMENT 0x001F0000 +#define EFI_FVB2_ALIGNMENT_1 0x00000000 +#define EFI_FVB2_ALIGNMENT_2 0x00010000 +#define EFI_FVB2_ALIGNMENT_4 0x00020000 +#define EFI_FVB2_ALIGNMENT_8 0x00030000 +#define EFI_FVB2_ALIGNMENT_16 0x00040000 +#define EFI_FVB2_ALIGNMENT_32 0x00050000 +#define EFI_FVB2_ALIGNMENT_64 0x00060000 +#define EFI_FVB2_ALIGNMENT_128 0x00070000 +#define EFI_FVB2_ALIGNMENT_256 0x00080000 +#define EFI_FVB2_ALIGNMENT_512 0x00090000 +#define EFI_FVB2_ALIGNMENT_1K 0x000A0000 +#define EFI_FVB2_ALIGNMENT_2K 0x000B0000 +#define EFI_FVB2_ALIGNMENT_4K 0x000C0000 +#define EFI_FVB2_ALIGNMENT_8K 0x000D0000 +#define EFI_FVB2_ALIGNMENT_16K 0x000E0000 +#define EFI_FVB2_ALIGNMENT_32K 0x000F0000 +#define EFI_FVB2_ALIGNMENT_64K 0x00100000 +#define EFI_FVB2_ALIGNMENT_128K 0x00110000 +#define EFI_FVB2_ALIGNMENT_256K 0x00120000 +#define EFI_FVB2_ALIGNMENT_512K 0x00130000 +#define EFI_FVB2_ALIGNMENT_1M 0x00140000 +#define EFI_FVB2_ALIGNMENT_2M 0x00150000 +#define EFI_FVB2_ALIGNMENT_4M 0x00160000 +#define EFI_FVB2_ALIGNMENT_8M 0x00170000 +#define EFI_FVB2_ALIGNMENT_16M 0x00180000 +#define EFI_FVB2_ALIGNMENT_32M 0x00190000 +#define EFI_FVB2_ALIGNMENT_64M 0x001A0000 +#define EFI_FVB2_ALIGNMENT_128M 0x001B0000 +#define EFI_FVB2_ALIGNMENT_256M 0x001C0000 +#define EFI_FVB2_ALIGNMENT_512M 0x001D0000 +#define EFI_FVB2_ALIGNMENT_1G 0x001E0000 +#define EFI_FVB2_ALIGNMENT_2G 0x001F0000 + +struct fv_blkmap_entry { + /* The number of sequential blocks which are of the same size */ + u32 num_blocks; + /* The size of the blocks */ + u32 length; +}; + +/* Describes the features and layout of the firmware volume */ +struct fv_header { + /* + * The first 16 bytes are reserved to allow for the reset vector of + * processors whose reset vector is at address 0. + */ + u8 zero_vec[16]; + /* + * Declares the file system with which the firmware volume + * is formatted. + */ + efi_guid_t fs_guid; + /* + * Length in bytes of the complete firmware volume, including + * the header. + */ + u64 fv_len; + /* Set to EFI_FVH_SIGNATURE */ + u32 sign; + /* + * Declares capabilities and power-on defaults for the firmware + * volume. + */ + u32 attr; + /* Length in bytes of the complete firmware volume header */ + u16 hdr_len; + /* + * A 16-bit checksum of the firmware volume header. + * A valid header sums to zero. + */ + u16 checksum; + /* + * Offset, relative to the start of the header, of the extended + * header (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is + * no extended header. + */ + u16 ext_hdr_off; + /* This field must always be set to zero */ + u8 reserved[1]; + /* + * Set to 2. Future versions of this specification may define new + * header fields and will increment the Revision field accordingly. + */ + u8 rev; + /* + * An array of run-length encoded FvBlockMapEntry structures. + * The array is terminated with an entry of {0,0}. + */ + struct fv_blkmap_entry block_map[1]; +}; + +#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') + +/* Firmware Volume Header Revision definition */ +#define EFI_FVH_REVISION 0x02 + +/* Extension header pointed by ExtHeaderOffset of volume header */ +struct fv_ext_header { + /* firmware volume name */ + efi_guid_t fv_name; + /* Size of the rest of the extension header including this structure */ + u32 ext_hdr_size; +}; + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_fv.h b/arch/x86/include/asm/fsp1/fsp_fv.h deleted file mode 100644 index 511dfb78b81..00000000000 --- a/arch/x86/include/asm/fsp1/fsp_fv.h +++ /dev/null @@ -1,136 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_FV___ -#define __FSP_FV___ - -/* Value of EFI_FV_FILE_ATTRIBUTES */ -#define EFI_FV_FILE_ATTR_ALIGNMENT 0x0000001F -#define EFI_FV_FILE_ATTR_FIXED 0x00000100 -#define EFI_FV_FILE_ATTR_MEMORY_MAPPED 0x00000200 - -/* Attributes bit definitions */ -#define EFI_FVB2_READ_DISABLED_CAP 0x00000001 -#define EFI_FVB2_READ_ENABLED_CAP 0x00000002 -#define EFI_FVB2_READ_STATUS 0x00000004 -#define EFI_FVB2_WRITE_DISABLED_CAP 0x00000008 -#define EFI_FVB2_WRITE_ENABLED_CAP 0x00000010 -#define EFI_FVB2_WRITE_STATUS 0x00000020 -#define EFI_FVB2_LOCK_CAP 0x00000040 -#define EFI_FVB2_LOCK_STATUS 0x00000080 -#define EFI_FVB2_STICKY_WRITE 0x00000200 -#define EFI_FVB2_MEMORY_MAPPED 0x00000400 -#define EFI_FVB2_ERASE_POLARITY 0x00000800 -#define EFI_FVB2_READ_LOCK_CAP 0x00001000 -#define EFI_FVB2_READ_LOCK_STATUS 0x00002000 -#define EFI_FVB2_WRITE_LOCK_CAP 0x00004000 -#define EFI_FVB2_WRITE_LOCK_STATUS 0x00008000 -#define EFI_FVB2_ALIGNMENT 0x001F0000 -#define EFI_FVB2_ALIGNMENT_1 0x00000000 -#define EFI_FVB2_ALIGNMENT_2 0x00010000 -#define EFI_FVB2_ALIGNMENT_4 0x00020000 -#define EFI_FVB2_ALIGNMENT_8 0x00030000 -#define EFI_FVB2_ALIGNMENT_16 0x00040000 -#define EFI_FVB2_ALIGNMENT_32 0x00050000 -#define EFI_FVB2_ALIGNMENT_64 0x00060000 -#define EFI_FVB2_ALIGNMENT_128 0x00070000 -#define EFI_FVB2_ALIGNMENT_256 0x00080000 -#define EFI_FVB2_ALIGNMENT_512 0x00090000 -#define EFI_FVB2_ALIGNMENT_1K 0x000A0000 -#define EFI_FVB2_ALIGNMENT_2K 0x000B0000 -#define EFI_FVB2_ALIGNMENT_4K 0x000C0000 -#define EFI_FVB2_ALIGNMENT_8K 0x000D0000 -#define EFI_FVB2_ALIGNMENT_16K 0x000E0000 -#define EFI_FVB2_ALIGNMENT_32K 0x000F0000 -#define EFI_FVB2_ALIGNMENT_64K 0x00100000 -#define EFI_FVB2_ALIGNMENT_128K 0x00110000 -#define EFI_FVB2_ALIGNMENT_256K 0x00120000 -#define EFI_FVB2_ALIGNMENT_512K 0x00130000 -#define EFI_FVB2_ALIGNMENT_1M 0x00140000 -#define EFI_FVB2_ALIGNMENT_2M 0x00150000 -#define EFI_FVB2_ALIGNMENT_4M 0x00160000 -#define EFI_FVB2_ALIGNMENT_8M 0x00170000 -#define EFI_FVB2_ALIGNMENT_16M 0x00180000 -#define EFI_FVB2_ALIGNMENT_32M 0x00190000 -#define EFI_FVB2_ALIGNMENT_64M 0x001A0000 -#define EFI_FVB2_ALIGNMENT_128M 0x001B0000 -#define EFI_FVB2_ALIGNMENT_256M 0x001C0000 -#define EFI_FVB2_ALIGNMENT_512M 0x001D0000 -#define EFI_FVB2_ALIGNMENT_1G 0x001E0000 -#define EFI_FVB2_ALIGNMENT_2G 0x001F0000 - -struct fv_blkmap_entry { - /* The number of sequential blocks which are of the same size */ - u32 num_blocks; - /* The size of the blocks */ - u32 length; -}; - -/* Describes the features and layout of the firmware volume */ -struct fv_header { - /* - * The first 16 bytes are reserved to allow for the reset vector of - * processors whose reset vector is at address 0. - */ - u8 zero_vec[16]; - /* - * Declares the file system with which the firmware volume - * is formatted. - */ - efi_guid_t fs_guid; - /* - * Length in bytes of the complete firmware volume, including - * the header. - */ - u64 fv_len; - /* Set to EFI_FVH_SIGNATURE */ - u32 sign; - /* - * Declares capabilities and power-on defaults for the firmware - * volume. - */ - u32 attr; - /* Length in bytes of the complete firmware volume header */ - u16 hdr_len; - /* - * A 16-bit checksum of the firmware volume header. - * A valid header sums to zero. - */ - u16 checksum; - /* - * Offset, relative to the start of the header, of the extended - * header (EFI_FIRMWARE_VOLUME_EXT_HEADER) or zero if there is - * no extended header. - */ - u16 ext_hdr_off; - /* This field must always be set to zero */ - u8 reserved[1]; - /* - * Set to 2. Future versions of this specification may define new - * header fields and will increment the Revision field accordingly. - */ - u8 rev; - /* - * An array of run-length encoded FvBlockMapEntry structures. - * The array is terminated with an entry of {0,0}. - */ - struct fv_blkmap_entry block_map[1]; -}; - -#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') - -/* Firmware Volume Header Revision definition */ -#define EFI_FVH_REVISION 0x02 - -/* Extension header pointed by ExtHeaderOffset of volume header */ -struct fv_ext_header { - /* firmware volume name */ - efi_guid_t fv_name; - /* Size of the rest of the extension header including this structure */ - u32 ext_hdr_size; -}; - -#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index e5ec2af83e1..8376b2ad40a 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -7,9 +7,9 @@ #ifndef __FSP_SUPPORT_H__ #define __FSP_SUPPORT_H__ +#include #include #include "fsp_hob.h" -#include "fsp_fv.h" #include "fsp_ffs.h" #include "fsp_infoheader.h" #include "fsp_bootmode.h" -- cgit v1.2.3 From e4499b52652cf2e13756d5b23b8d0118d5bf76d6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 2 Oct 2019 08:25:10 +0800 Subject: x86: Move fsp_hob.h to the generic fsp directory This header file is the same for FSP v1 and v2. Move it into the general fsp directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: remove inclusion of fsp_hob.h in fsp_support.h] Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_hob.h | 98 +++++++++++++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_hob.h | 98 --------------------------------- arch/x86/include/asm/fsp1/fsp_support.h | 2 +- 3 files changed, 99 insertions(+), 99 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_hob.h delete mode 100644 arch/x86/include/asm/fsp1/fsp_hob.h diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp/fsp_hob.h new file mode 100644 index 00000000000..3bb79c4b67a --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_hob.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_HOB_H__ +#define __FSP_HOB_H__ + +#include + +enum pixel_format { + pixel_rgbx_8bpc, /* RGB 8 bit per color */ + pixel_bgrx_8bpc, /* BGR 8 bit per color */ + pixel_bitmask, +}; + +struct __packed hob_graphics_info { + phys_addr_t fb_base; /* framebuffer base address */ + u32 fb_size; /* framebuffer size */ + u32 version; + u32 width; + u32 height; + enum pixel_format pixel_format; + u32 red_mask; + u32 green_mask; + u32 blue_mask; + u32 reserved_mask; + u32 pixels_per_scanline; +}; + +/* FSP specific GUID HOB definitions */ +#define FSP_GUID_DATA1 0x912740be +#define FSP_GUID_DATA2 0x2284 +#define FSP_GUID_DATA3 0x4734 +#define FSP_GUID_DATA4_0 0xb9 +#define FSP_GUID_DATA4_1 0x71 +#define FSP_GUID_DATA4_2 0x84 +#define FSP_GUID_DATA4_3 0xb0 +#define FSP_GUID_DATA4_4 0x27 +#define FSP_GUID_DATA4_5 0x35 +#define FSP_GUID_DATA4_6 0x3f +#define FSP_GUID_DATA4_7 0x0c + +#define FSP_GUID_BYTE0 0xbe +#define FSP_GUID_BYTE1 0x40 +#define FSP_GUID_BYTE2 0x27 +#define FSP_GUID_BYTE3 0x91 +#define FSP_GUID_BYTE4 0x84 +#define FSP_GUID_BYTE5 0x22 +#define FSP_GUID_BYTE6 0x34 +#define FSP_GUID_BYTE7 0x47 +#define FSP_GUID_BYTE8 FSP_GUID_DATA4_0 +#define FSP_GUID_BYTE9 FSP_GUID_DATA4_1 +#define FSP_GUID_BYTE10 FSP_GUID_DATA4_2 +#define FSP_GUID_BYTE11 FSP_GUID_DATA4_3 +#define FSP_GUID_BYTE12 FSP_GUID_DATA4_4 +#define FSP_GUID_BYTE13 FSP_GUID_DATA4_5 +#define FSP_GUID_BYTE14 FSP_GUID_DATA4_6 +#define FSP_GUID_BYTE15 FSP_GUID_DATA4_7 + +#define FSP_HEADER_GUID \ + EFI_GUID(FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ + FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ + FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ + FSP_GUID_DATA4_6, FSP_GUID_DATA4_7) + +#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ + EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ + 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) + +#define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ + EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ + 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) + +#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \ + EFI_GUID(0x69a79759, 0x1373, 0x4367, \ + 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e) + +#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \ + EFI_GUID(0xd038747c, 0xd00c, 0x4980, \ + 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55) + +#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \ + EFI_GUID(0x9c7c3aa7, 0x5332, 0x4917, \ + 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07) + +/* The following GUIDs are newly introduced in FSP spec 1.1 */ + +#define FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID \ + EFI_GUID(0x73ff4f56, 0xaa8e, 0x4451, \ + 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44) + +#define FSP_GRAPHICS_INFO_HOB_GUID \ + EFI_GUID(0x39f62cce, 0x6825, 0x4669, \ + 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07) + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_hob.h b/arch/x86/include/asm/fsp1/fsp_hob.h deleted file mode 100644 index 3bb79c4b67a..00000000000 --- a/arch/x86/include/asm/fsp1/fsp_hob.h +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_HOB_H__ -#define __FSP_HOB_H__ - -#include - -enum pixel_format { - pixel_rgbx_8bpc, /* RGB 8 bit per color */ - pixel_bgrx_8bpc, /* BGR 8 bit per color */ - pixel_bitmask, -}; - -struct __packed hob_graphics_info { - phys_addr_t fb_base; /* framebuffer base address */ - u32 fb_size; /* framebuffer size */ - u32 version; - u32 width; - u32 height; - enum pixel_format pixel_format; - u32 red_mask; - u32 green_mask; - u32 blue_mask; - u32 reserved_mask; - u32 pixels_per_scanline; -}; - -/* FSP specific GUID HOB definitions */ -#define FSP_GUID_DATA1 0x912740be -#define FSP_GUID_DATA2 0x2284 -#define FSP_GUID_DATA3 0x4734 -#define FSP_GUID_DATA4_0 0xb9 -#define FSP_GUID_DATA4_1 0x71 -#define FSP_GUID_DATA4_2 0x84 -#define FSP_GUID_DATA4_3 0xb0 -#define FSP_GUID_DATA4_4 0x27 -#define FSP_GUID_DATA4_5 0x35 -#define FSP_GUID_DATA4_6 0x3f -#define FSP_GUID_DATA4_7 0x0c - -#define FSP_GUID_BYTE0 0xbe -#define FSP_GUID_BYTE1 0x40 -#define FSP_GUID_BYTE2 0x27 -#define FSP_GUID_BYTE3 0x91 -#define FSP_GUID_BYTE4 0x84 -#define FSP_GUID_BYTE5 0x22 -#define FSP_GUID_BYTE6 0x34 -#define FSP_GUID_BYTE7 0x47 -#define FSP_GUID_BYTE8 FSP_GUID_DATA4_0 -#define FSP_GUID_BYTE9 FSP_GUID_DATA4_1 -#define FSP_GUID_BYTE10 FSP_GUID_DATA4_2 -#define FSP_GUID_BYTE11 FSP_GUID_DATA4_3 -#define FSP_GUID_BYTE12 FSP_GUID_DATA4_4 -#define FSP_GUID_BYTE13 FSP_GUID_DATA4_5 -#define FSP_GUID_BYTE14 FSP_GUID_DATA4_6 -#define FSP_GUID_BYTE15 FSP_GUID_DATA4_7 - -#define FSP_HEADER_GUID \ - EFI_GUID(FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ - FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ - FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ - FSP_GUID_DATA4_6, FSP_GUID_DATA4_7) - -#define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ - EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ - 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) - -#define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ - EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ - 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) - -#define FSP_HOB_RESOURCE_OWNER_FSP_GUID \ - EFI_GUID(0x69a79759, 0x1373, 0x4367, \ - 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e) - -#define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \ - EFI_GUID(0xd038747c, 0xd00c, 0x4980, \ - 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55) - -#define FSP_HOB_RESOURCE_OWNER_GRAPHICS_GUID \ - EFI_GUID(0x9c7c3aa7, 0x5332, 0x4917, \ - 0x82, 0xb9, 0x56, 0xa5, 0xf3, 0xe6, 0x2a, 0x07) - -/* The following GUIDs are newly introduced in FSP spec 1.1 */ - -#define FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID \ - EFI_GUID(0x73ff4f56, 0xaa8e, 0x4451, \ - 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44) - -#define FSP_GRAPHICS_INFO_HOB_GUID \ - EFI_GUID(0x39f62cce, 0x6825, 0x4669, \ - 0xbb, 0x56, 0x54, 0x1a, 0xba, 0x75, 0x3a, 0x07) - -#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index 8376b2ad40a..e204045482d 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -8,8 +8,8 @@ #define __FSP_SUPPORT_H__ #include +#include #include -#include "fsp_hob.h" #include "fsp_ffs.h" #include "fsp_infoheader.h" #include "fsp_bootmode.h" -- cgit v1.2.3 From 21a1133d823b3cadbbe9f18475948bfcd587be60 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 2 Oct 2019 08:26:41 +0800 Subject: x86: Move fsp_infoheader.h to the generic fsp directory This header file is the same for FSP v1 and v2. Move it into the general fsp directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: move rename of fsp_infoheader.h from previous patch to this one] Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_infoheader.h | 38 ++++++++++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_infoheader.h | 38 ------------------------------ arch/x86/include/asm/fsp1/fsp_support.h | 2 +- 3 files changed, 39 insertions(+), 39 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_infoheader.h delete mode 100644 arch/x86/include/asm/fsp1/fsp_infoheader.h diff --git a/arch/x86/include/asm/fsp/fsp_infoheader.h b/arch/x86/include/asm/fsp/fsp_infoheader.h new file mode 100644 index 00000000000..86f78014b7b --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_infoheader.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef _FSP_HEADER_H_ +#define _FSP_HEADER_H_ + +#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */ + +struct __packed fsp_header { + u32 sign; /* 'FSPH' */ + u32 hdr_len; /* header length */ + u8 reserved1[3]; + u8 hdr_rev; /* header rev */ + u32 img_rev; /* image rev */ + char img_id[8]; /* signature string */ + u32 img_size; /* image size */ + u32 img_base; /* image base */ + u32 img_attr; /* image attribute */ + u32 cfg_region_off; /* configuration region offset */ + u32 cfg_region_size; /* configuration region size */ + u32 api_num; /* number of API entries */ + u32 fsp_tempram_init; /* tempram_init offset */ + u32 fsp_init; /* fsp_init offset */ + u32 fsp_notify; /* fsp_notify offset */ + u32 fsp_mem_init; /* fsp_mem_init offset */ + u32 fsp_tempram_exit; /* fsp_tempram_exit offset */ + u32 fsp_silicon_init; /* fsp_silicon_init offset */ +}; + +#define FSP_HEADER_REVISION_1 1 +#define FSP_HEADER_REVISION_2 2 + +#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0) + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_infoheader.h b/arch/x86/include/asm/fsp1/fsp_infoheader.h deleted file mode 100644 index 86f78014b7b..00000000000 --- a/arch/x86/include/asm/fsp1/fsp_infoheader.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef _FSP_HEADER_H_ -#define _FSP_HEADER_H_ - -#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */ - -struct __packed fsp_header { - u32 sign; /* 'FSPH' */ - u32 hdr_len; /* header length */ - u8 reserved1[3]; - u8 hdr_rev; /* header rev */ - u32 img_rev; /* image rev */ - char img_id[8]; /* signature string */ - u32 img_size; /* image size */ - u32 img_base; /* image base */ - u32 img_attr; /* image attribute */ - u32 cfg_region_off; /* configuration region offset */ - u32 cfg_region_size; /* configuration region size */ - u32 api_num; /* number of API entries */ - u32 fsp_tempram_init; /* tempram_init offset */ - u32 fsp_init; /* fsp_init offset */ - u32 fsp_notify; /* fsp_notify offset */ - u32 fsp_mem_init; /* fsp_mem_init offset */ - u32 fsp_tempram_exit; /* fsp_tempram_exit offset */ - u32 fsp_silicon_init; /* fsp_silicon_init offset */ -}; - -#define FSP_HEADER_REVISION_1 1 -#define FSP_HEADER_REVISION_2 2 - -#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0) - -#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index e204045482d..ed4335ed295 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -9,9 +9,9 @@ #include #include +#include #include #include "fsp_ffs.h" -#include "fsp_infoheader.h" #include "fsp_bootmode.h" #include #include -- cgit v1.2.3 From 79b228baae06a57d0d01358e832d5ea2f2cc02d3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:19 -0600 Subject: x86: Move fsp_bootmode.h to the generic fsp directory This header file is the same for FSP v1 and v2, although there may be some additions to come. Move it into the generic fsp directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_bootmode.h | 23 +++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_bootmode.h | 23 ----------------------- arch/x86/include/asm/fsp1/fsp_support.h | 2 +- 3 files changed, 24 insertions(+), 24 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_bootmode.h delete mode 100644 arch/x86/include/asm/fsp1/fsp_bootmode.h diff --git a/arch/x86/include/asm/fsp/fsp_bootmode.h b/arch/x86/include/asm/fsp/fsp_bootmode.h new file mode 100644 index 00000000000..bc96ec308cb --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_bootmode.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_BOOT_MODE_H__ +#define __FSP_BOOT_MODE_H__ + +/* 0x21 - 0xf..f are reserved */ +#define BOOT_FULL_CONFIG 0x00 +#define BOOT_MINIMAL_CONFIG 0x01 +#define BOOT_NO_CONFIG_CHANGES 0x02 +#define BOOT_FULL_CONFIG_PLUS_DIAG 0x03 +#define BOOT_DEFAULT_SETTINGS 0x04 +#define BOOT_ON_S4_RESUME 0x05 +#define BOOT_ON_S5_RESUME 0x06 +#define BOOT_ON_S2_RESUME 0x10 +#define BOOT_ON_S3_RESUME 0x11 +#define BOOT_ON_FLASH_UPDATE 0x12 +#define BOOT_IN_RECOVERY_MODE 0x20 + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_bootmode.h b/arch/x86/include/asm/fsp1/fsp_bootmode.h deleted file mode 100644 index bc96ec308cb..00000000000 --- a/arch/x86/include/asm/fsp1/fsp_bootmode.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: Intel */ -/* - * Copyright (C) 2013, Intel Corporation - * Copyright (C) 2014, Bin Meng - */ - -#ifndef __FSP_BOOT_MODE_H__ -#define __FSP_BOOT_MODE_H__ - -/* 0x21 - 0xf..f are reserved */ -#define BOOT_FULL_CONFIG 0x00 -#define BOOT_MINIMAL_CONFIG 0x01 -#define BOOT_NO_CONFIG_CHANGES 0x02 -#define BOOT_FULL_CONFIG_PLUS_DIAG 0x03 -#define BOOT_DEFAULT_SETTINGS 0x04 -#define BOOT_ON_S4_RESUME 0x05 -#define BOOT_ON_S5_RESUME 0x06 -#define BOOT_ON_S2_RESUME 0x10 -#define BOOT_ON_S3_RESUME 0x11 -#define BOOT_ON_FLASH_UPDATE 0x12 -#define BOOT_IN_RECOVERY_MODE 0x20 - -#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index ed4335ed295..c2c5288ebd1 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -7,12 +7,12 @@ #ifndef __FSP_SUPPORT_H__ #define __FSP_SUPPORT_H__ +#include #include #include #include #include #include "fsp_ffs.h" -#include "fsp_bootmode.h" #include #include -- cgit v1.2.3 From 0e23d7660a06978d8953cbeedd931ab0df01294f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:00:20 -0600 Subject: x86: Move fsp_ffs.h include to fsp_arch.h This include file is only used for FSP v1. Avoid including it from fdt_support.h so we can use the latter with FSP v2. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp_arch.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/fsp_arch.h b/arch/x86/include/asm/fsp_arch.h index b223141c448..3b2077b3924 100644 --- a/arch/x86/include/asm/fsp_arch.h +++ b/arch/x86/include/asm/fsp_arch.h @@ -15,6 +15,7 @@ */ #include +#include #include #include -- cgit v1.2.3 From 8fce3f29e4ad4d0cf2084ef63d46aa391ebbc1d7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:10 -0600 Subject: binman: Pass the toolpath to binman from the main Makefile Pass in the toolpath in case binman needs to use tools compiled in the U-Boot tools/ directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 54da5cd51ce..9ea602bdf07 100644 --- a/Makefile +++ b/Makefile @@ -1213,6 +1213,7 @@ u-boot.ldr: u-boot # Use 'make BINMAN_DEBUG=1' to enable debugging quiet_cmd_binman = BINMAN $@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ + --toolpath $(objtree)/tools \ build -u -d u-boot.dtb -O . -m \ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ $(BINMAN_$(@F)) -- cgit v1.2.3 From 1f338e00fa81e72380c788163fc3c63939bf5eea Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:11 -0600 Subject: binman: Allow selection of logging verbosity Support a new BINMAN_VERBOSE option to the build, to allow passing the -v flag to binman. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- Makefile | 3 ++- tools/binman/README | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 9ea602bdf07..b68cbaf4377 100644 --- a/Makefile +++ b/Makefile @@ -1214,7 +1214,8 @@ u-boot.ldr: u-boot quiet_cmd_binman = BINMAN $@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ --toolpath $(objtree)/tools \ - build -u -d u-boot.dtb -O . -m \ + $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ + build -u -d u-boot.dtb -O . -m \ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ $(BINMAN_$(@F)) diff --git a/tools/binman/README b/tools/binman/README index b4f6392ab74..8e0f0a8c55b 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -934,6 +934,12 @@ BINMAN_DEBUG=1 to your build: make sandbox_defconfig make BINMAN_DEBUG=1 +To enable verbose logging from binman, base BINMAN_VERBOSE to your build, which +adds a -v option to the call to binman: + + make sandbox_defconfig + make BINMAN_VERBOSE=5 + History / Credits ----------------- -- cgit v1.2.3 From 7e45bb0867fd88ff044a71903882e6ff098dea11 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:13 -0600 Subject: mtd: spi: Add 'struct spi_flash {' to the code At present spi_flash is defined to be spi_nor which is confusing since it is not possible to find the 'spi_flash' by normal text search. Add a comment to help with this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/linux/mtd/spi-nor.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 709b49d3936..f9964a76645 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -246,7 +246,13 @@ enum spi_nor_option_flags { */ struct flash_info; -/* TODO: Remove, once all users of spi_flash interface are moved to MTD */ +/* + * TODO: Remove, once all users of spi_flash interface are moved to MTD + * + * struct spi_flash { + * Defined below (keep this text to enable searching for spi_flash decl) + * } + */ #define spi_flash spi_nor /** -- cgit v1.2.3 From 2e2c514a40e956d857707f157201c5606c0e9da0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:14 -0600 Subject: serial: ns16550: Allow serial to enabled/disabled in SPL At present this driver uses the wrong condition for including the code and drivers in SPL/TPL. Update it so that the code is only included if DM_SERIAL is enabled for SPL/TPL. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/serial/ns16550.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 6cf2be8f2b8..01f334938ea 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_MCRVAL (UART_MCR_DTR | \ UART_MCR_RTS) /* RTS/DTR */ -#ifndef CONFIG_DM_SERIAL +#if !CONFIG_IS_ENABLED(DM_SERIAL) #ifdef CONFIG_SYS_NS16550_PORT_MAPPED #define serial_out(x, y) outb(x, (ulong)y) #define serial_in(y) inb((ulong)y) @@ -86,7 +86,7 @@ static inline int serial_in_shift(void *addr, int shift) #endif } -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) #ifndef CONFIG_SYS_NS16550_CLK #define CONFIG_SYS_NS16550_CLK 0 @@ -301,7 +301,7 @@ DEBUG_UART_FUNCS #endif -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) static int ns16550_serial_putc(struct udevice *dev, const char ch) { struct NS16550 *const com_port = dev_get_priv(dev); -- cgit v1.2.3 From 9bb746d819b32cdb6994ad5c09c59170e866ef3e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:16 -0600 Subject: spl: Avoid checking for Ctrl-C in SPL with print_buffer() We don't have a console in SPL so it doesn't make sense to check for Ctrl-C when printing a memory dump. Skip this so that print_buffer() can be used in SPL. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- lib/display_options.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/display_options.c b/lib/display_options.c index cff20f37552..ec16d75e0e4 100644 --- a/lib/display_options.c +++ b/lib/display_options.c @@ -205,8 +205,10 @@ int print_buffer(ulong addr, const void *data, uint width, uint count, addr += thislinelen * width; count -= thislinelen; +#ifndef CONFIG_SPL_BUILD if (ctrlc()) return -1; +#endif } return 0; -- cgit v1.2.3 From a7da3d984db524cdec8336927a5825ffaa8443af Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:17 -0600 Subject: spl: handoff: Correct Kconfig condition for SPL and TPL At present these options can be enabled when bloblist is not enabled for SPL or TPL. This is incorrect as SPL handoff requires bloblist. Fix it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- common/spl/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index f467eca2be7..62b93c112b1 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -115,7 +115,7 @@ if SPL config SPL_HANDOFF bool "Pass hand-off information from SPL to U-Boot proper" - depends on HANDOFF + depends on HANDOFF && SPL_BLOBLIST default y help This option enables SPL to write handoff information. This can be @@ -1185,7 +1185,7 @@ if TPL config TPL_HANDOFF bool "Pass hand-off information from TPL to SPL and U-Boot proper" - depends on HANDOFF + depends on HANDOFF && TPL_BLOBLIST default y help This option enables TPL to write handoff information. This can be -- cgit v1.2.3 From 366291afe63fb4973161e01c29c43bc840a710a5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:18 -0600 Subject: spl: Add an arch-specific hook for writing to SPL handoff At present there is an arch-specific area in the SPL handoff area intended for use by arch-specific code, but there is no explicit call to fill in this data. Add a hook for this. Also use the hook to remove the sandbox-specific test code from write_spl_handoff(). Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/sandbox/cpu/spl.c | 7 +++++++ common/spl/spl.c | 12 +++++++++--- include/handoff.h | 13 +++++++++++++ 3 files changed, 29 insertions(+), 3 deletions(-) diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index 4f415c71d63..44c68a39bc6 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -78,3 +78,10 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) } hang(); } + +int handoff_arch_save(struct spl_handoff *ho) +{ + ho->arch.magic = TEST_HANDOFF_MAGIC; + + return 0; +} diff --git a/common/spl/spl.c b/common/spl/spl.c index 082fa2bd94d..730cd6b3084 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -356,17 +356,23 @@ static int setup_spl_handoff(void) return 0; } +__weak int handoff_arch_save(struct spl_handoff *ho) +{ + return 0; +} + static int write_spl_handoff(void) { struct spl_handoff *ho; + int ret; ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(struct spl_handoff)); if (!ho) return -ENOENT; handoff_save_dram(ho); -#ifdef CONFIG_SANDBOX - ho->arch.magic = TEST_HANDOFF_MAGIC; -#endif + ret = handoff_arch_save(ho); + if (ret) + return ret; debug(SPL_TPL_PROMPT "Wrote SPL handoff\n"); return 0; diff --git a/include/handoff.h b/include/handoff.h index aacb0f5ebf2..75d19b1f6e5 100644 --- a/include/handoff.h +++ b/include/handoff.h @@ -31,6 +31,19 @@ struct spl_handoff { void handoff_save_dram(struct spl_handoff *ho); void handoff_load_dram_size(struct spl_handoff *ho); void handoff_load_dram_banks(struct spl_handoff *ho); + +/** + * handoff_arch_save() - Save arch-specific info into the handoff area + * + * This is defined to an empty function by default, but arch-specific code can + * define it to write to spi_handoff->arch. It is called from + * write_spl_handoff(). + * + * @ho: Handoff area to fill in + * @return 0 if OK, -ve on error + */ +int handoff_arch_save(struct spl_handoff *ho); + #endif #endif -- cgit v1.2.3 From 3cd71981531a767e5109368fede61931944bdb5c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:19 -0600 Subject: spl: Set up the bloblist in board_init_r() At present the bloblist is set up in spl_common_init() which can be called from spl_early_init(), i.e. before SDRAM is ready. This prevents the bloblist from being located in SDRAM, which is useful on some platforms where SRAM is inaccessible after U-Boot relocates (e.g. x86 CAR region). It doesn't serve much purpose to have the bloblist available early, since very little is known about the platform then, and the handoff info is written when SPL is about to jump to U-Boot. Move the code to board_init_r() to avoid any restrictions. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- common/spl/spl.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 730cd6b3084..5fdd6d0d032 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -410,23 +410,6 @@ static int spl_common_init(bool setup_malloc) return ret; } #endif - if (CONFIG_IS_ENABLED(BLOBLIST)) { - ret = bloblist_init(); - if (ret) { - debug("%s: Failed to set up bloblist: ret=%d\n", - __func__, ret); - return ret; - } - } - if (CONFIG_IS_ENABLED(HANDOFF)) { - int ret; - - ret = setup_spl_handoff(); - if (ret) { - puts(SPL_TPL_PROMPT "Cannot set up SPL handoff\n"); - hang(); - } - } if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { ret = fdtdec_setup(); if (ret) { @@ -604,6 +587,24 @@ void board_init_r(gd_t *dummy1, ulong dummy2) */ timer_init(); #endif + if (CONFIG_IS_ENABLED(BLOBLIST)) { + ret = bloblist_init(); + if (ret) { + debug("%s: Failed to set up bloblist: ret=%d\n", + __func__, ret); + puts(SPL_TPL_PROMPT "Cannot set up bloblist\n"); + hang(); + } + } + if (CONFIG_IS_ENABLED(HANDOFF)) { + int ret; + + ret = setup_spl_handoff(); + if (ret) { + puts(SPL_TPL_PROMPT "Cannot set up SPL handoff\n"); + hang(); + } + } #if CONFIG_IS_ENABLED(BOARD_INIT) spl_board_init(); -- cgit v1.2.3 From 8e83b76df41f2a7c36adae7af7aa40a0b1ab36a1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:20 -0600 Subject: spl: Add a function to determine the U-Boot phase U-Boot is built in three phases: TPL, SPL and U-Boot proper. Sometimes it is necessary to use different init code depending on the phase. For example, TPL might do very basic CPU init, SPL might do a little more and U-Boot proper might bring the CPU up to full speed and enable all cores. Add a function which allows easy determination of the current phase being built. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/spl.h | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/include/spl.h b/include/spl.h index e4640f3830b..9be8d0ddcf6 100644 --- a/include/spl.h +++ b/include/spl.h @@ -49,6 +49,66 @@ static inline bool u_boot_first_phase(void) return false; } +enum u_boot_phase { + PHASE_TPL, + PHASE_SPL, + PHASE_U_BOOT, +}; + +/** + * spl_phase() - Find out the phase of U-Boot + * + * This can be used to avoid #ifdef logic and use if() instead. + * + * For example, to include code only in TPL, you might do: + * + * #ifdef CONFIG_TPL_BUILD + * ... + * #endif + * + * but with this you can use: + * + * if (spl_phase() == PHASE_TPL) { + * ... + * } + * + * To include code only in SPL, you might do: + * + * #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) + * ... + * #endif + * + * but with this you can use: + * + * if (spl_phase() == PHASE_SPL) { + * ... + * } + * + * To include code only in U-Boot proper, you might do: + * + * #ifndef CONFIG_SPL_BUILD + * ... + * #endif + * + * but with this you can use: + * + * if (spl_phase() == PHASE_U_BOOT) { + * ... + * } + * + * @return U-Boot phase + */ +static inline enum u_boot_phase spl_phase(void) +{ +#ifdef CONFIG_TPL_BUILD + return PHASE_TPL; +#elif CONFIG_SPL_BUILD + return PHASE_SPL; +#else + return PHASE_U_BOOT; +#endif +} + /* A string name for SPL or TPL */ #ifdef CONFIG_SPL_BUILD # ifdef CONFIG_TPL_BUILD -- cgit v1.2.3 From ff7abb85a43d501d29c43549eb3dceae25e00f10 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:24 -0600 Subject: x86: sysreset: Allow reset driver to be included in SPL/TPL At present this driver is always included in SPL and TPL, if U-Boot proper enables it. Update the Makefile to provide full control using the existing Kconfig options. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: make the Kconfig help text a little bit clearer] Signed-off-by: Bin Meng --- drivers/sysreset/Kconfig | 12 ++++++++++++ drivers/sysreset/Makefile | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index f565ae03109..5e6293ae69b 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -107,6 +107,18 @@ config SYSRESET_X86 help Reboot support for generic x86 processor reset. +config SYSRESET_SPL_X86 + bool "Enable support for x86 processor reboot driver in SPL" + depends on X86 + help + Reboot support for generic x86 processor reset in SPL. + +config SYSRESET_TPL_X86 + bool "Enable support for x86 processor reboot driver in TPL" + depends on X86 + help + Reboot support for generic x86 processor reset in TPL. + config SYSRESET_MCP83XX bool "Enable support MPC83xx SoC family reboot driver" help diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index cf01492295f..fff4a184a02 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -16,5 +16,5 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o -obj-$(CONFIG_SYSRESET_X86) += sysreset_x86.o +obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o -- cgit v1.2.3 From e2adc369ec5c10dda8b0e15cfc6399d81bcfc6d1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:25 -0600 Subject: x86: Rename some FSP functions to have an fsp_ prefix Given these exported function an fsp_ prefix since they are declared in an fsp.h header. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/cpu/baytrail/fsp_configs.c | 2 +- arch/x86/cpu/braswell/fsp_configs.c | 2 +- arch/x86/cpu/ivybridge/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/fsp_configs.c | 2 +- arch/x86/include/asm/fsp1/fsp_support.h | 6 +++--- arch/x86/lib/fsp1/fsp_car.S | 10 +++++----- arch/x86/lib/fsp1/fsp_support.c | 14 +++++++------- cmd/x86/fsp.c | 2 +- 8 files changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index 5b5d66aa5e9..1d1948c91a8 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -27,7 +27,7 @@ __weak void update_fsp_azalia_configs(struct azalia_config **azalia) * If the device tree does not specify an integer setting, use the default * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file. */ -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { struct upd_region *fsp_upd = &config->fsp_upd; diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c index 607e333f21c..60101d742d1 100644 --- a/arch/x86/cpu/braswell/fsp_configs.c +++ b/arch/x86/cpu/braswell/fsp_configs.c @@ -40,7 +40,7 @@ __weak void update_fsp_gpio_configs(struct gpio_family **family, * If the device tree does not specify an integer setting, use the default * provided in Intel's Braswell release FSP/BraswellFsp.bsf file. */ -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { struct upd_region *fsp_upd = &config->fsp_upd; diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c index 773c2b2a0ae..0e6453c8477 100644 --- a/arch/x86/cpu/ivybridge/fsp_configs.c +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -9,7 +9,7 @@ DECLARE_GLOBAL_DATA_PTR; -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { struct platform_config *plat_config = &config->plat_config; diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index 0dd1901e07b..381edd07615 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -7,7 +7,7 @@ #include #include -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { /* Initialize runtime buffer for fsp_init() */ diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index c2c5288ebd1..a0095d0de4b 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -25,7 +25,7 @@ * * This routine jumps to the C version of FSP continuation function */ -void asm_continuation(void); +void fsp_asm_continuation(void); /** * FSP initialization complete @@ -52,7 +52,7 @@ void fsp_continue(u32 status, void *hob_list); * * @retval: the offset of FSP header. If signature is invalid, returns 0. */ -struct fsp_header *find_fsp_header(void); +struct fsp_header *fsp_find_header(void); /** * FSP initialization wrapper function. @@ -172,7 +172,7 @@ void *fsp_get_graphics_info(const void *hob_list, u32 *len); * * @return: None */ -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf); /** diff --git a/arch/x86/lib/fsp1/fsp_car.S b/arch/x86/lib/fsp1/fsp_car.S index 8c54cea3db4..a64a6534357 100644 --- a/arch/x86/lib/fsp1/fsp_car.S +++ b/arch/x86/lib/fsp1/fsp_car.S @@ -20,10 +20,10 @@ car_init: car_init_start: post_code(POST_CAR_START) - lea find_fsp_header_romstack, %esp - jmp find_fsp_header + lea fsp_find_header_romstack, %esp + jmp fsp_find_header -find_fsp_header_ret: +fsp_find_header_ret: /* EAX points to FSP_INFO_HEADER */ mov %eax, %ebp @@ -91,8 +91,8 @@ die: * contain the function return address as well as the parameters. */ .balign 4 -find_fsp_header_romstack: - .long find_fsp_header_ret +fsp_find_header_romstack: + .long fsp_find_header_ret .balign 4 temp_ram_init_romstack: diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c index 019a42f53fe..b5b7d664a1e 100644 --- a/arch/x86/lib/fsp1/fsp_support.c +++ b/arch/x86/lib/fsp1/fsp_support.c @@ -8,7 +8,7 @@ #include #include -struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void) +struct fsp_header *__attribute__((optimize("O0"))) fsp_find_header(void) { /* * This function may be called before the a stack is established, @@ -93,7 +93,7 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) struct upd_region *fsp_upd; #endif - fsp_hdr = find_fsp_header(); + fsp_hdr = fsp_find_header(); if (fsp_hdr == NULL) { /* No valid FSP info header was found */ panic("Invalid FSP header"); @@ -124,12 +124,12 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); /* Override any configuration if required */ - update_fsp_configs(&config_data, &rt_buf); + fsp_update_configs(&config_data, &rt_buf); memset(¶ms, 0, sizeof(struct fsp_init_params)); params.nvs_buf = nvs_buf; params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; - params.continuation = (fsp_continuation_f)asm_continuation; + params.continuation = (fsp_continuation_f)fsp_asm_continuation; init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); params_ptr = ¶ms; @@ -146,8 +146,8 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) asm volatile ( "pushl %0;" "call *%%eax;" - ".global asm_continuation;" - "asm_continuation:;" + ".global fsp_asm_continuation;" + "fsp_asm_continuation:;" "movl 4(%%esp), %%eax;" /* status */ "movl 8(%%esp), %%edx;" /* hob_list */ "jmp fsp_continue;" @@ -173,7 +173,7 @@ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) u32 status; if (!fsp_hdr) - fsp_hdr = (struct fsp_header *)find_fsp_header(); + fsp_hdr = (struct fsp_header *)fsp_find_header(); if (fsp_hdr == NULL) { /* No valid FSP info header */ diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c index fb27624422c..b3b663021bc 100644 --- a/cmd/x86/fsp.c +++ b/cmd/x86/fsp.c @@ -11,7 +11,7 @@ DECLARE_GLOBAL_DATA_PTR; static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - struct fsp_header *hdr = find_fsp_header(); + struct fsp_header *hdr = fsp_find_header(); u32 img_addr = hdr->img_base; char *sign = (char *)&hdr->sign; int i; -- cgit v1.2.3 From 07f2f58b94b69ea962d1adea0b892825dea908e9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 24 Aug 2019 14:19:05 -0600 Subject: x86: fsp: Create a common fsp_support.h header Many support functions are common between FSP1 and FSP2. Add a new header to handle this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: remove forward declarations in fsp_support.h] Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_support.h | 125 ++++++++++++++++++++++++++++++++ arch/x86/include/asm/fsp1/fsp_support.h | 119 +----------------------------- drivers/pci/pci-uclass.c | 2 +- 3 files changed, 129 insertions(+), 117 deletions(-) create mode 100644 arch/x86/include/asm/fsp/fsp_support.h diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h new file mode 100644 index 00000000000..1c016faee86 --- /dev/null +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#ifndef __FSP_SUPPORT_H__ +#define __FSP_SUPPORT_H__ + +#include +#include +#include +#include +#include +#include +#include + +#define FSP_LOWMEM_BASE 0x100000UL +#define FSP_HIGHMEM_BASE 0x100000000ULL +#define UPD_TERMINATOR 0x55AA + +/** + * Find FSP header offset in FSP image + * + * @retval: the offset of FSP header. If signature is invalid, returns 0. + */ +struct fsp_header *fsp_find_header(void); + +/** + * FSP notification wrapper function + * + * @fsp_hdr: Pointer to FSP information header + * @phase: FSP initialization phase defined in enum fsp_phase + * + * @retval: compatible status code with EFI_STATUS defined in PI spec + */ +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); + +/** + * This function retrieves the top of usable low memory. + * + * @hob_list: A HOB list pointer. + * + * @retval: Usable low memory top. + */ +u32 fsp_get_usable_lowmem_top(const void *hob_list); + +/** + * This function retrieves the top of usable high memory. + * + * @hob_list: A HOB list pointer. + * + * @retval: Usable high memory top. + */ +u64 fsp_get_usable_highmem_top(const void *hob_list); + +/** + * This function retrieves a special reserved memory region. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the GUID HOB data buffer length. + * If the GUID HOB is located, the length will be updated. + * @guid: A pointer to the owner guild. + * + * @retval: Reserved region start address. + * 0 if this region does not exist. + */ +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, + u64 *len, const efi_guid_t *guid); + +/** + * This function retrieves the FSP reserved normal memory. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the FSP reserved memory length buffer. + * If the GUID HOB is located, the length will be updated. + * @retval: FSP reserved memory base + * 0 if this region does not exist. + */ +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); + +/** + * This function retrieves the TSEG reserved normal memory. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the TSEG reserved memory length buffer. + * If the GUID HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the TSEG reserved memory. + * @retval others: TSEG reserved memory base. + */ +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); + +/** + * This function retrieves FSP Non-volatile Storage HOB buffer and size. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the NVS data buffer length. + * If the HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the NVS HOB. + * @retval others: FSP NVS data buffer pointer. + */ +void *fsp_get_nvs_data(const void *hob_list, u32 *len); + +/** + * This function retrieves graphics information. + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the graphics info HOB length. + * If the HOB is located, the length will be updated. + * + * @retval NULL: Failed to find the graphics info HOB. + * @retval others: A pointer to struct hob_graphics_info. + */ +void *fsp_get_graphics_info(const void *hob_list, u32 *len); + +/** + * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init + * + * @return 0 if OK, -EPERM if the FSP gave an error. + */ +int fsp_init_phase_pci(void); + +#endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index a0095d0de4b..15c3a462e2e 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -4,21 +4,11 @@ * Copyright (C) 2014, Bin Meng */ -#ifndef __FSP_SUPPORT_H__ -#define __FSP_SUPPORT_H__ +#ifndef __FSP1_SUPPORT_H__ +#define __FSP1_SUPPORT_H__ -#include -#include -#include -#include -#include +#include #include "fsp_ffs.h" -#include -#include - -#define FSP_LOWMEM_BASE 0x100000UL -#define FSP_HIGHMEM_BASE 0x100000000ULL -#define UPD_TERMINATOR 0x55AA /** * FSP Continuation assembly helper routine @@ -47,13 +37,6 @@ void fsp_init_done(void *hob_list); */ void fsp_continue(u32 status, void *hob_list); -/** - * Find FSP header offset in FSP image - * - * @retval: the offset of FSP header. If signature is invalid, returns 0. - */ -struct fsp_header *fsp_find_header(void); - /** * FSP initialization wrapper function. * @@ -63,83 +46,6 @@ struct fsp_header *fsp_find_header(void); */ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); -/** - * FSP notification wrapper function - * - * @fsp_hdr: Pointer to FSP information header - * @phase: FSP initialization phase defined in enum fsp_phase - * - * @retval: compatible status code with EFI_STATUS defined in PI spec - */ -u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); - -/** - * This function retrieves the top of usable low memory. - * - * @hob_list: A HOB list pointer. - * - * @retval: Usable low memory top. - */ -u32 fsp_get_usable_lowmem_top(const void *hob_list); - -/** - * This function retrieves the top of usable high memory. - * - * @hob_list: A HOB list pointer. - * - * @retval: Usable high memory top. - */ -u64 fsp_get_usable_highmem_top(const void *hob_list); - -/** - * This function retrieves a special reserved memory region. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the GUID HOB data buffer length. - * If the GUID HOB is located, the length will be updated. - * @guid: A pointer to the owner guild. - * - * @retval: Reserved region start address. - * 0 if this region does not exist. - */ -u64 fsp_get_reserved_mem_from_guid(const void *hob_list, - u64 *len, const efi_guid_t *guid); - -/** - * This function retrieves the FSP reserved normal memory. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the FSP reserved memory length buffer. - * If the GUID HOB is located, the length will be updated. - * @retval: FSP reserved memory base - * 0 if this region does not exist. - */ -u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); - -/** - * This function retrieves the TSEG reserved normal memory. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the TSEG reserved memory length buffer. - * If the GUID HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the TSEG reserved memory. - * @retval others: TSEG reserved memory base. - */ -u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); - -/** - * This function retrieves FSP Non-volatile Storage HOB buffer and size. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the NVS data buffer length. - * If the HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the NVS HOB. - * @retval others: FSP NVS data buffer pointer. - */ -void *fsp_get_nvs_data(const void *hob_list, u32 *len); - /** * This function retrieves Bootloader temporary stack buffer and size. * @@ -152,18 +58,6 @@ void *fsp_get_nvs_data(const void *hob_list, u32 *len); */ void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); -/** - * This function retrieves graphics information. - * - * @hob_list: A HOB list pointer. - * @len: A pointer to the graphics info HOB length. - * If the HOB is located, the length will be updated. - * - * @retval NULL: Failed to find the graphics info HOB. - * @retval others: A pointer to struct hob_graphics_info. - */ -void *fsp_get_graphics_info(const void *hob_list, u32 *len); - /** * This function overrides the default configurations of FSP. * @@ -175,11 +69,4 @@ void *fsp_get_graphics_info(const void *hob_list, u32 *len); void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf); -/** - * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init - * - * @return 0 if OK, -EPERM if the FSP gave an error. - */ -int fsp_init_phase_pci(void); - #endif diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index b73d0cd70a7..ab3e1310eb5 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -12,7 +12,7 @@ #include #include #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) -#include +#include #endif #include "pci_internal.h" -- cgit v1.2.3 From 86875f050bf433fa8078ae9c53d8493f79941f1a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:27 -0600 Subject: x86: fsp: Use if() instead of #ifdef Update a few #ifdefs to if() to improve build coverage. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: recover the codes that got wrongly deleted in dram_init()] Signed-off-by: Bin Meng --- arch/x86/lib/fsp1/fsp_common.c | 9 ++++----- arch/x86/lib/fsp1/fsp_dram.c | 5 ++--- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c index 591eef7b813..bfd76dccbab 100644 --- a/arch/x86/lib/fsp1/fsp_common.c +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -116,11 +116,10 @@ int arch_fsp_init(void) #endif if (!gd->arch.hob_list) { -#ifdef CONFIG_ENABLE_MRC_CACHE - nvs = fsp_prepare_mrc_cache(); -#else - nvs = NULL; -#endif + if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) + nvs = fsp_prepare_mrc_cache(); + else + nvs = NULL; #ifdef CONFIG_HAVE_ACPI_RESUME if (prev_sleep_state == ACPI_S3) { diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c index 3bf65b495ca..75341bc5287 100644 --- a/arch/x86/lib/fsp1/fsp_dram.c +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -32,10 +32,9 @@ int dram_init(void) gd->ram_size = ram_size; post_code(POST_DRAM); -#ifdef CONFIG_ENABLE_MRC_CACHE - gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, + if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) + gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, &gd->arch.mrc_output_len); -#endif return 0; } -- cgit v1.2.3 From 12cf65a4d199e5d4ef8b167342579ab16d0f849b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 25 Aug 2019 10:10:59 -0600 Subject: x86: fsp: Tidy up comment style a little The comments in the FSP code use a different style from the rest of the x86 code. I am not sure it this is intentional. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: fix 2 comment style issues] Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_support.h | 42 ++++++++++++++++----------------- arch/x86/include/asm/fsp1/fsp_support.h | 30 +++++++++++++++-------- arch/x86/include/asm/hob.h | 18 +++++++------- arch/x86/lib/hob.c | 8 +++---- 4 files changed, 54 insertions(+), 44 deletions(-) diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index 1c016faee86..a6b32bf95df 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -20,98 +20,98 @@ #define UPD_TERMINATOR 0x55AA /** - * Find FSP header offset in FSP image + * fsp_find_header() - Find FSP header offset in FSP image * - * @retval: the offset of FSP header. If signature is invalid, returns 0. + * @return the offset of FSP header. If signature is invalid, returns 0. */ struct fsp_header *fsp_find_header(void); /** - * FSP notification wrapper function + * fsp_notify() - FSP notification wrapper function * * @fsp_hdr: Pointer to FSP information header * @phase: FSP initialization phase defined in enum fsp_phase * - * @retval: compatible status code with EFI_STATUS defined in PI spec + * @return compatible status code with EFI_STATUS defined in PI spec */ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); /** - * This function retrieves the top of usable low memory. + * fsp_get_usable_lowmem_top() - retrieves the top of usable low memory * * @hob_list: A HOB list pointer. * - * @retval: Usable low memory top. + * @return Usable low memory top. */ u32 fsp_get_usable_lowmem_top(const void *hob_list); /** - * This function retrieves the top of usable high memory. + * fsp_get_usable_highmem_top() - retrieves the top of usable high memory * * @hob_list: A HOB list pointer. * - * @retval: Usable high memory top. + * @return Usable high memory top. */ u64 fsp_get_usable_highmem_top(const void *hob_list); /** - * This function retrieves a special reserved memory region. + * fsp_get_reserved_mem_from_guid() - retrieves a special reserved memory region * * @hob_list: A HOB list pointer. * @len: A pointer to the GUID HOB data buffer length. * If the GUID HOB is located, the length will be updated. * @guid: A pointer to the owner guild. * - * @retval: Reserved region start address. + * @return Reserved region start address. * 0 if this region does not exist. */ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, const efi_guid_t *guid); /** - * This function retrieves the FSP reserved normal memory. + * fsp_get_fsp_reserved_mem() - retrieves the FSP reserved normal memory * * @hob_list: A HOB list pointer. * @len: A pointer to the FSP reserved memory length buffer. * If the GUID HOB is located, the length will be updated. - * @retval: FSP reserved memory base + * @return FSP reserved memory base * 0 if this region does not exist. */ u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); /** - * This function retrieves the TSEG reserved normal memory. + * fsp_get_tseg_reserved_mem() - retrieves the TSEG reserved normal memory * * @hob_list: A HOB list pointer. * @len: A pointer to the TSEG reserved memory length buffer. * If the GUID HOB is located, the length will be updated. * - * @retval NULL: Failed to find the TSEG reserved memory. - * @retval others: TSEG reserved memory base. + * @return NULL: Failed to find the TSEG reserved memory. + * @return others: TSEG reserved memory base. */ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); /** - * This function retrieves FSP Non-volatile Storage HOB buffer and size. + * fsp_get_nvs_data() - retrieves FSP Non-volatile Storage HOB buffer and size * * @hob_list: A HOB list pointer. * @len: A pointer to the NVS data buffer length. * If the HOB is located, the length will be updated. * - * @retval NULL: Failed to find the NVS HOB. - * @retval others: FSP NVS data buffer pointer. + * @return NULL: Failed to find the NVS HOB. + * @return others: FSP NVS data buffer pointer. */ void *fsp_get_nvs_data(const void *hob_list, u32 *len); /** - * This function retrieves graphics information. + * fsp_get_graphics_info() - retrieves graphics information. * * @hob_list: A HOB list pointer. * @len: A pointer to the graphics info HOB length. * If the HOB is located, the length will be updated. * - * @retval NULL: Failed to find the graphics info HOB. - * @retval others: A pointer to struct hob_graphics_info. + * @return NULL: Failed to find the graphics info HOB. + * @return others: A pointer to struct hob_graphics_info. */ void *fsp_get_graphics_info(const void *hob_list, u32 *len); diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index 15c3a462e2e..236c167fc86 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -11,14 +11,14 @@ #include "fsp_ffs.h" /** - * FSP Continuation assembly helper routine + * fsp_asm_continuation() - FSP Continuation assembly helper routine * * This routine jumps to the C version of FSP continuation function */ void fsp_asm_continuation(void); /** - * FSP initialization complete + * fsp_init_done() - FSP initialization complete * * This is the function that indicates FSP initialization is complete and jumps * back to the bootloader with HOB list pointer as the parameter. @@ -28,17 +28,17 @@ void fsp_asm_continuation(void); void fsp_init_done(void *hob_list); /** - * FSP Continuation function + * fsp_continue() - FSP Continuation function * * @status: Always 0 * @hob_list: HOB list pointer * - * @retval: Never returns + * @return Never returns */ void fsp_continue(u32 status, void *hob_list); /** - * FSP initialization wrapper function. + * fsp_init() - FSP initialization wrapper function * * @stack_top: bootloader stack top address * @boot_mode: boot mode defined in fsp_bootmode.h @@ -47,24 +47,34 @@ void fsp_continue(u32 status, void *hob_list); void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); /** - * This function retrieves Bootloader temporary stack buffer and size. + * fsp_notify() - FSP notification wrapper function + * + * @fsp_hdr: Pointer to FSP information header + * @phase: FSP initialization phase defined in enum fsp_phase + * + * @return compatible status code with EFI_STATUS defined in PI spec + */ +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); + +/** + * fsp_get_bootloader_tmp_mem() - retrieves temporary stack buffer and size * * @hob_list: A HOB list pointer. * @len: A pointer to the bootloader temporary stack length. * If the HOB is located, the length will be updated. * - * @retval NULL: Failed to find the bootloader temporary stack HOB. - * @retval others: Bootloader temporary stackbuffer pointer. + * @return NULL: Failed to find the bootloader temporary stack HOB. + * @return others: Bootloader temporary stackbuffer pointer. */ void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); /** - * This function overrides the default configurations of FSP. + * fsp_update_configs() - overrides the default configurations of FSP * * @config: A pointer to the FSP configuration data structure * @rt_buf: A pointer to the FSP runtime buffer data structure * - * @return: None + * @return None */ void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf); diff --git a/arch/x86/include/asm/hob.h b/arch/x86/include/asm/hob.h index b4239821aaa..56e11dbb28f 100644 --- a/arch/x86/include/asm/hob.h +++ b/arch/x86/include/asm/hob.h @@ -135,7 +135,7 @@ struct hob_guid { * * @hdr: A pointer to a HOB. * - * @return: A pointer to the next HOB in the HOB list. + * @return A pointer to the next HOB in the HOB list. */ static inline const struct hob_header *get_next_hob(const struct hob_header *hdr) @@ -152,8 +152,8 @@ static inline const struct hob_header *get_next_hob(const struct hob_header * * @hdr: A pointer to a HOB. * - * @retval true: The HOB specified by hdr is the last HOB in the HOB list. - * @retval false: The HOB specified by hdr is not the last HOB in the HOB list. + * @return true: The HOB specified by hdr is the last HOB in the HOB list. + * @return false: The HOB specified by hdr is not the last HOB in the HOB list. */ static inline bool end_of_hob(const struct hob_header *hdr) { @@ -169,7 +169,7 @@ static inline bool end_of_hob(const struct hob_header *hdr) * * @hdr: A pointer to a HOB. * - * @return: A pointer to the data buffer in a HOB. + * @return A pointer to the data buffer in a HOB. */ static inline void *get_guid_hob_data(const struct hob_header *hdr) { @@ -185,7 +185,7 @@ static inline void *get_guid_hob_data(const struct hob_header *hdr) * * @hdr: A pointer to a HOB. * - * @return: The size of the data buffer. + * @return The size of the data buffer. */ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) { @@ -198,7 +198,7 @@ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) * @type: HOB type to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching type; Otherwise NULL. + * @return A HOB object with matching type; Otherwise NULL. */ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list); @@ -208,7 +208,7 @@ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list); * @guid: GUID to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching GUID; Otherwise NULL. + * @return A HOB object with matching GUID; Otherwise NULL. */ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list); @@ -221,8 +221,8 @@ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, * If the GUID HOB is located, the length will be updated. * @guid A pointer to HOB GUID. * - * @retval NULL: Failed to find the GUID HOB. - * @retval others: GUID HOB data buffer pointer. + * @return NULL: Failed to find the GUID HOB. + * @return others: GUID HOB data buffer pointer. */ void *hob_get_guid_hob_data(const void *hob_list, u32 *len, const efi_guid_t *guid); diff --git a/arch/x86/lib/hob.c b/arch/x86/lib/hob.c index dcee29b04cf..f2c47240ee8 100644 --- a/arch/x86/lib/hob.c +++ b/arch/x86/lib/hob.c @@ -13,7 +13,7 @@ * @type: HOB type to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching type; Otherwise NULL. + * @return A HOB object with matching type; Otherwise NULL. */ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list) { @@ -38,7 +38,7 @@ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list) * @guid: GUID to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching GUID; Otherwise NULL. + * @return A HOB object with matching GUID; Otherwise NULL. */ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list) @@ -65,8 +65,8 @@ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, * If the GUID HOB is located, the length will be updated. * @guid A pointer to HOB GUID. * - * @retval NULL: Failed to find the GUID HOB. - * @retval others: GUID HOB data buffer pointer. + * @return NULL: Failed to find the GUID HOB. + * @return others: GUID HOB data buffer pointer. */ void *hob_get_guid_hob_data(const void *hob_list, u32 *len, const efi_guid_t *guid) -- cgit v1.2.3 From e9de4a7cd31a08d7bd2afa842db5aca57b3a37cb Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 24 Aug 2019 14:10:32 -0600 Subject: x86: fsp: Move common dram functions into a common file Most of the DRAM functionality can be shared between FSP1 and FSP2. Move it into a shared file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_support.h | 9 ++++ arch/x86/lib/Makefile | 1 + arch/x86/lib/fsp/Makefile | 5 ++ arch/x86/lib/fsp/fsp_dram.c | 90 ++++++++++++++++++++++++++++++++++ arch/x86/lib/fsp1/fsp_dram.c | 83 +++---------------------------- 5 files changed, 111 insertions(+), 77 deletions(-) create mode 100644 arch/x86/lib/fsp/Makefile create mode 100644 arch/x86/lib/fsp/fsp_dram.c diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index a6b32bf95df..215b0f7c9d5 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -122,4 +122,13 @@ void *fsp_get_graphics_info(const void *hob_list, u32 *len); */ int fsp_init_phase_pci(void); +/** + * fsp_scan_for_ram_size() - Scan the HOB list to find the RAM size + * + * This sets gd->ram_size based on what it finds. + * + * @return 0 if OK, -ve on error + */ +int fsp_scan_for_ram_size(void); + #endif diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index a8c7448ee45..ca0ca1066b0 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -43,6 +43,7 @@ ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_ZBOOT) += zimage.o endif obj-$(CONFIG_USE_HOB) += hob.o +obj-$(CONFIG_HAVE_FSP) += fsp/ obj-$(CONFIG_FSP_VERSION1) += fsp1/ obj-$(CONFIG_FSP_VERSION2) += fsp2/ diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile new file mode 100644 index 00000000000..e2160653def --- /dev/null +++ b/arch/x86/lib/fsp/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2019 Google LLC + +obj-y += fsp_dram.o diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c new file mode 100644 index 00000000000..8fe1e0bf73d --- /dev/null +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014, Bin Meng + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int fsp_scan_for_ram_size(void) +{ + phys_size_t ram_size = 0; + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + + hdr = gd->arch.hob_list; + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_SYS_MEM || + res_desc->type == RES_MEM_RESERVED) + ram_size += res_desc->len; + } + hdr = get_next_hob(hdr); + } + + gd->ram_size = ram_size; + post_code(POST_DRAM); + + return 0; +}; + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; +} + +unsigned int install_e820_map(unsigned int max_entries, + struct e820_entry *entries) +{ + unsigned int num_entries = 0; + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + + hdr = gd->arch.hob_list; + + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + entries[num_entries].addr = res_desc->phys_start; + entries[num_entries].size = res_desc->len; + + if (res_desc->type == RES_SYS_MEM) + entries[num_entries].type = E820_RAM; + else if (res_desc->type == RES_MEM_RESERVED) + entries[num_entries].type = E820_RESERVED; + + num_entries++; + } + hdr = get_next_hob(hdr); + } + + /* Mark PCIe ECAM address range as reserved */ + entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE; + entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE; + entries[num_entries].type = E820_RESERVED; + num_entries++; + +#ifdef CONFIG_HAVE_ACPI_RESUME + /* + * Everything between U-Boot's stack and ram top needs to be + * reserved in order for ACPI S3 resume to work. + */ + entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE; + entries[num_entries].size = gd->ram_top - gd->start_addr_sp + + CONFIG_STACK_SIZE; + entries[num_entries].type = E820_RESERVED; + num_entries++; +#endif + + return num_entries; +} diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c index 75341bc5287..6a3349b42af 100644 --- a/arch/x86/lib/fsp1/fsp_dram.c +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -4,33 +4,16 @@ */ #include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; +#include int dram_init(void) { - phys_size_t ram_size = 0; - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - - hdr = gd->arch.hob_list; - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_SYS_MEM || - res_desc->type == RES_MEM_RESERVED) { - ram_size += res_desc->len; - } - } - hdr = get_next_hob(hdr); - } + int ret; - gd->ram_size = ram_size; - post_code(POST_DRAM); + /* The FSP has already set up DRAM, so grab the info we need */ + ret = fsp_scan_for_ram_size(); + if (ret) + return ret; if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, @@ -39,14 +22,6 @@ int dram_init(void) return 0; } -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = 0; - gd->bd->bi_dram[0].size = gd->ram_size; - - return 0; -} - /* * This function looks for the highest region of memory lower than 4GB which * has enough space for U-Boot where U-Boot is aligned on a page boundary. @@ -59,49 +34,3 @@ ulong board_get_usable_ram_top(ulong total_size) { return fsp_get_usable_lowmem_top(gd->arch.hob_list); } - -unsigned int install_e820_map(unsigned int max_entries, - struct e820_entry *entries) -{ - unsigned int num_entries = 0; - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - - hdr = gd->arch.hob_list; - - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - entries[num_entries].addr = res_desc->phys_start; - entries[num_entries].size = res_desc->len; - - if (res_desc->type == RES_SYS_MEM) - entries[num_entries].type = E820_RAM; - else if (res_desc->type == RES_MEM_RESERVED) - entries[num_entries].type = E820_RESERVED; - - num_entries++; - } - hdr = get_next_hob(hdr); - } - - /* Mark PCIe ECAM address range as reserved */ - entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE; - entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE; - entries[num_entries].type = E820_RESERVED; - num_entries++; - -#ifdef CONFIG_HAVE_ACPI_RESUME - /* - * Everything between U-Boot's stack and ram top needs to be - * reserved in order for ACPI S3 resume to work. - */ - entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE; - entries[num_entries].size = gd->ram_top - gd->start_addr_sp + \ - CONFIG_STACK_SIZE; - entries[num_entries].type = E820_RESERVED; - num_entries++; -#endif - - return num_entries; -} -- cgit v1.2.3 From b2d544a15d2edf8199e45e06c44b3e99ace906bc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:30 -0600 Subject: x86: Move common fsp functions into a common file Some of this file can be shared between FSP1 and FSP2. Move it into a shared file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_support.h | 17 ++++++ arch/x86/include/asm/fsp1/fsp_support.h | 10 --- arch/x86/lib/fsp/Makefile | 1 + arch/x86/lib/fsp/fsp_common.c | 104 ++++++++++++++++++++++++++++++++ arch/x86/lib/fsp1/fsp_common.c | 87 -------------------------- 5 files changed, 122 insertions(+), 97 deletions(-) create mode 100644 arch/x86/lib/fsp/fsp_common.c diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index 215b0f7c9d5..8dea2e71ea9 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -131,4 +131,21 @@ int fsp_init_phase_pci(void); */ int fsp_scan_for_ram_size(void); +/** + * fsp_prepare_mrc_cache() - Find the DRAM training data from the MRC cache + * + * @return pointer to data, or NULL if no cache or no data found in the cache + */ +void *fsp_prepare_mrc_cache(void); + +/** + * fsp_notify() - FSP notification wrapper function + * + * @fsp_hdr: Pointer to FSP information header + * @phase: FSP initialization phase defined in enum fsp_phase + * + * @return compatible status code with EFI_STATUS defined in PI spec + */ +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); + #endif diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index 236c167fc86..a44a5504a4f 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -46,16 +46,6 @@ void fsp_continue(u32 status, void *hob_list); */ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); -/** - * fsp_notify() - FSP notification wrapper function - * - * @fsp_hdr: Pointer to FSP information header - * @phase: FSP initialization phase defined in enum fsp_phase - * - * @return compatible status code with EFI_STATUS defined in PI spec - */ -u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); - /** * fsp_get_bootloader_tmp_mem() - retrieves temporary stack buffer and size * diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile index e2160653def..e7a8427c2ec 100644 --- a/arch/x86/lib/fsp/Makefile +++ b/arch/x86/lib/fsp/Makefile @@ -2,4 +2,5 @@ # # Copyright 2019 Google LLC +obj-y += fsp_common.o obj-y += fsp_dram.o diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c new file mode 100644 index 00000000000..6678d75ffd5 --- /dev/null +++ b/arch/x86/lib/fsp/fsp_common.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014, Bin Meng + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int checkcpu(void) +{ + return 0; +} + +int print_cpuinfo(void) +{ + post_code(POST_CPU_INFO); + return default_print_cpuinfo(); +} + +int fsp_init_phase_pci(void) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); + status = fsp_notify(NULL, INIT_PHASE_PCI); + if (status) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return status ? -EPERM : 0; +} + +void board_final_cleanup(void) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); + status = fsp_notify(NULL, INIT_PHASE_BOOT); + if (status) + debug("fail, error code %x\n", status); + else + debug("OK\n"); +} + +void *fsp_prepare_mrc_cache(void) +{ + struct mrc_data_container *cache; + struct mrc_region entry; + int ret; + + ret = mrccache_get_region(NULL, &entry); + if (ret) + return NULL; + + cache = mrccache_find_current(&entry); + if (!cache) + return NULL; + + debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, + cache->data, cache->data_size, cache->checksum); + + return cache->data; +} + +#ifdef CONFIG_HAVE_ACPI_RESUME +int fsp_save_s3_stack(void) +{ + struct udevice *dev; + int ret; + + if (gd->arch.prev_sleep_state == ACPI_S3) + return 0; + + ret = uclass_get_device(UCLASS_RTC, 0, &dev); + if (ret) { + debug("Cannot find RTC: err=%d\n", ret); + return -ENODEV; + } + + /* Save the stack address to CMOS */ + ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); + if (ret) { + debug("Save stack address to CMOS: err=%d\n", ret); + return -EIO; + } + + return 0; +} +#endif diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c index bfd76dccbab..285ef72ebf8 100644 --- a/arch/x86/lib/fsp1/fsp_common.c +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -18,93 +18,6 @@ DECLARE_GLOBAL_DATA_PTR; -int checkcpu(void) -{ - return 0; -} - -int print_cpuinfo(void) -{ - post_code(POST_CPU_INFO); - return default_print_cpuinfo(); -} - -int fsp_init_phase_pci(void) -{ - u32 status; - - /* call into FspNotify */ - debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); - status = fsp_notify(NULL, INIT_PHASE_PCI); - if (status) - debug("fail, error code %x\n", status); - else - debug("OK\n"); - - return status ? -EPERM : 0; -} - -void board_final_cleanup(void) -{ - u32 status; - - /* call into FspNotify */ - debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); - status = fsp_notify(NULL, INIT_PHASE_BOOT); - if (status) - debug("fail, error code %x\n", status); - else - debug("OK\n"); - - return; -} - -static __maybe_unused void *fsp_prepare_mrc_cache(void) -{ - struct mrc_data_container *cache; - struct mrc_region entry; - int ret; - - ret = mrccache_get_region(NULL, &entry); - if (ret) - return NULL; - - cache = mrccache_find_current(&entry); - if (!cache) - return NULL; - - debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, - cache->data, cache->data_size, cache->checksum); - - return cache->data; -} - -#ifdef CONFIG_HAVE_ACPI_RESUME -int fsp_save_s3_stack(void) -{ - struct udevice *dev; - int ret; - - if (gd->arch.prev_sleep_state == ACPI_S3) - return 0; - - ret = uclass_get_device(UCLASS_RTC, 0, &dev); - if (ret) { - debug("Cannot find RTC: err=%d\n", ret); - return -ENODEV; - } - - /* Save the stack address to CMOS */ - ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); - if (ret) { - debug("Save stack address to CMOS: err=%d\n", ret); - return -EIO; - } - - return 0; -} -#endif - int arch_fsp_init(void) { void *nvs; -- cgit v1.2.3 From 62888d840fb99d0375dc33ef7b3404377f451bcf Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:31 -0600 Subject: x86: fsp: Move common support functions into a common file Some of this file can be shared between FSP1 and FSP2. Move it into a shared file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/x86/lib/fsp/Makefile | 1 + arch/x86/lib/fsp/fsp_support.c | 176 ++++++++++++++++++++++++++++++++++++++++ arch/x86/lib/fsp1/fsp_support.c | 167 -------------------------------------- 3 files changed, 177 insertions(+), 167 deletions(-) create mode 100644 arch/x86/lib/fsp/fsp_support.c diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile index e7a8427c2ec..9e348564737 100644 --- a/arch/x86/lib/fsp/Makefile +++ b/arch/x86/lib/fsp/Makefile @@ -4,3 +4,4 @@ obj-y += fsp_common.o obj-y += fsp_dram.o +obj-y += fsp_support.o diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c new file mode 100644 index 00000000000..014de35e563 --- /dev/null +++ b/arch/x86/lib/fsp/fsp_support.c @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: Intel +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng + */ + +#include +#include +#include + +u32 fsp_get_usable_lowmem_top(const void *hob_list) +{ + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + phys_addr_t phys_start; + u32 top; +#ifdef CONFIG_FSP_BROKEN_HOB + struct hob_mem_alloc *res_mem; + phys_addr_t mem_base = 0; +#endif + + /* Get the HOB list for processing */ + hdr = hob_list; + + /* * Collect memory ranges */ + top = FSP_LOWMEM_BASE; + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_SYS_MEM) { + phys_start = res_desc->phys_start; + /* Need memory above 1MB to be collected here */ + if (phys_start >= FSP_LOWMEM_BASE && + phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) + top += (u32)(res_desc->len); + } + } + +#ifdef CONFIG_FSP_BROKEN_HOB + /* + * Find out the lowest memory base address allocated by FSP + * for the boot service data + */ + if (hdr->type == HOB_TYPE_MEM_ALLOC) { + res_mem = (struct hob_mem_alloc *)hdr; + if (!mem_base) + mem_base = res_mem->mem_base; + if (res_mem->mem_base < mem_base) + mem_base = res_mem->mem_base; + } +#endif + + hdr = get_next_hob(hdr); + } + +#ifdef CONFIG_FSP_BROKEN_HOB + /* + * Check whether the memory top address is below the FSP HOB list. + * If not, use the lowest memory base address allocated by FSP as + * the memory top address. This is to prevent U-Boot relocation + * overwrites the important boot service data which is used by FSP, + * otherwise the subsequent call to fsp_notify() will fail. + */ + if (top > (u32)hob_list) { + debug("Adjust memory top address due to a buggy FSP\n"); + top = (u32)mem_base; + } +#endif + + return top; +} + +u64 fsp_get_usable_highmem_top(const void *hob_list) +{ + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + phys_addr_t phys_start; + u64 top; + + /* Get the HOB list for processing */ + hdr = hob_list; + + /* Collect memory ranges */ + top = FSP_HIGHMEM_BASE; + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_SYS_MEM) { + phys_start = res_desc->phys_start; + /* Need memory above 4GB to be collected here */ + if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) + top += (u32)(res_desc->len); + } + } + hdr = get_next_hob(hdr); + } + + return top; +} + +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, + const efi_guid_t *guid) +{ + const struct hob_header *hdr; + struct hob_res_desc *res_desc; + + /* Get the HOB list for processing */ + hdr = hob_list; + + /* Collect memory ranges */ + while (!end_of_hob(hdr)) { + if (hdr->type == HOB_TYPE_RES_DESC) { + res_desc = (struct hob_res_desc *)hdr; + if (res_desc->type == RES_MEM_RESERVED) { + if (!guidcmp(&res_desc->owner, guid)) { + if (len) + *len = (u32)(res_desc->len); + + return (u64)(res_desc->phys_start); + } + } + } + hdr = get_next_hob(hdr); + } + + return 0; +} + +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; + u64 length; + u32 base; + + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, &guid); + if (len && base) + *len = (u32)length; + + return base; +} + +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; + u64 length; + u32 base; + + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, &guid); + if (len && base) + *len = (u32)length; + + return base; +} + +void *fsp_get_nvs_data(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} + +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} + +void *fsp_get_graphics_info(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_GRAPHICS_INFO_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c index b5b7d664a1e..c7a2c73846b 100644 --- a/arch/x86/lib/fsp1/fsp_support.c +++ b/arch/x86/lib/fsp1/fsp_support.c @@ -197,170 +197,3 @@ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) return status; } - -u32 fsp_get_usable_lowmem_top(const void *hob_list) -{ - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - phys_addr_t phys_start; - u32 top; -#ifdef CONFIG_FSP_BROKEN_HOB - struct hob_mem_alloc *res_mem; - phys_addr_t mem_base = 0; -#endif - - /* Get the HOB list for processing */ - hdr = hob_list; - - /* * Collect memory ranges */ - top = FSP_LOWMEM_BASE; - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_SYS_MEM) { - phys_start = res_desc->phys_start; - /* Need memory above 1MB to be collected here */ - if (phys_start >= FSP_LOWMEM_BASE && - phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) - top += (u32)(res_desc->len); - } - } - -#ifdef CONFIG_FSP_BROKEN_HOB - /* - * Find out the lowest memory base address allocated by FSP - * for the boot service data - */ - if (hdr->type == HOB_TYPE_MEM_ALLOC) { - res_mem = (struct hob_mem_alloc *)hdr; - if (!mem_base) - mem_base = res_mem->mem_base; - if (res_mem->mem_base < mem_base) - mem_base = res_mem->mem_base; - } -#endif - - hdr = get_next_hob(hdr); - } - -#ifdef CONFIG_FSP_BROKEN_HOB - /* - * Check whether the memory top address is below the FSP HOB list. - * If not, use the lowest memory base address allocated by FSP as - * the memory top address. This is to prevent U-Boot relocation - * overwrites the important boot service data which is used by FSP, - * otherwise the subsequent call to fsp_notify() will fail. - */ - if (top > (u32)hob_list) { - debug("Adjust memory top address due to a buggy FSP\n"); - top = (u32)mem_base; - } -#endif - - return top; -} - -u64 fsp_get_usable_highmem_top(const void *hob_list) -{ - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - phys_addr_t phys_start; - u64 top; - - /* Get the HOB list for processing */ - hdr = hob_list; - - /* Collect memory ranges */ - top = FSP_HIGHMEM_BASE; - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_SYS_MEM) { - phys_start = res_desc->phys_start; - /* Need memory above 4GB to be collected here */ - if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) - top += (u32)(res_desc->len); - } - } - hdr = get_next_hob(hdr); - } - - return top; -} - -u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, - const efi_guid_t *guid) -{ - const struct hob_header *hdr; - struct hob_res_desc *res_desc; - - /* Get the HOB list for processing */ - hdr = hob_list; - - /* Collect memory ranges */ - while (!end_of_hob(hdr)) { - if (hdr->type == HOB_TYPE_RES_DESC) { - res_desc = (struct hob_res_desc *)hdr; - if (res_desc->type == RES_MEM_RESERVED) { - if (!guidcmp(&res_desc->owner, guid)) { - if (len) - *len = (u32)(res_desc->len); - - return (u64)(res_desc->phys_start); - } - } - } - hdr = get_next_hob(hdr); - } - - return 0; -} - -u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; - u64 length; - u32 base; - - base = (u32)fsp_get_reserved_mem_from_guid(hob_list, - &length, &guid); - if ((len != 0) && (base != 0)) - *len = (u32)length; - - return base; -} - -u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; - u64 length; - u32 base; - - base = (u32)fsp_get_reserved_mem_from_guid(hob_list, - &length, &guid); - if ((len != 0) && (base != 0)) - *len = (u32)length; - - return base; -} - -void *fsp_get_nvs_data(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; - - return hob_get_guid_hob_data(hob_list, len, &guid); -} - -void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; - - return hob_get_guid_hob_data(hob_list, len, &guid); -} - -void *fsp_get_graphics_info(const void *hob_list, u32 *len) -{ - const efi_guid_t guid = FSP_GRAPHICS_INFO_HOB_GUID; - - return hob_get_guid_hob_data(hob_list, len, &guid); -} -- cgit v1.2.3 From fdeb6f7dc6ed81ba50f1b56eb4bade9108f5f145 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:32 -0600 Subject: efi: Move inline functions to unconditional part of header At present these two functions are defined in efi_loader.h but only if CONFIG_EFI_LOADER is enabled. But these are functions that are useful to other code, such as that which deals with Intel Handoff Blocks (HOBs). Move these to the top of the function. Possibly ascii2unicode() should not be an inline function, since this might impact code size. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/efi_loader.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/efi_loader.h b/include/efi_loader.h index 53b369945b4..381da80cdce 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -12,6 +12,11 @@ #include #include +static inline int guidcmp(const void *g1, const void *g2) +{ + return memcmp(g1, g2, sizeof(efi_guid_t)); +} + /* No need for efi loader support in SPL */ #if CONFIG_IS_ENABLED(EFI_LOADER) @@ -563,11 +568,6 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr, (((_dp)->type == DEVICE_PATH_TYPE_##_type) && \ ((_dp)->sub_type == DEVICE_PATH_SUB_TYPE_##_subtype)) -static inline int guidcmp(const void *g1, const void *g2) -{ - return memcmp(g1, g2, sizeof(efi_guid_t)); -} - /* * Use these to indicate that your code / data should go into the EFI runtime * section and thus still be available when the OS is running -- cgit v1.2.3 From ceec18491c665bccb6702ac1ba835ca75e5e58a9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:33 -0600 Subject: x86: fsp: Add a few more definitions for FSP2 Add definitions for the FSP signature and the FSP init phase. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_infoheader.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/fsp/fsp_infoheader.h b/arch/x86/include/asm/fsp/fsp_infoheader.h index 86f78014b7b..e72c052ed1e 100644 --- a/arch/x86/include/asm/fsp/fsp_infoheader.h +++ b/arch/x86/include/asm/fsp/fsp_infoheader.h @@ -33,6 +33,19 @@ struct __packed fsp_header { #define FSP_HEADER_REVISION_1 1 #define FSP_HEADER_REVISION_2 2 -#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0) +enum fsp_type { + FSP_ATTR_COMP_TYPE_FSP_T = 1, + FSP_ATTR_COMP_TYPE_FSP_M = 2, + FSP_ATTR_COMP_TYPE_FSP_S = 3, +}; + +enum { + FSP_ATTR_GRAPHICS_SUPPORT = 1 << 0, + FSP_ATTR_COMP_TYPE_SHIFT = 28, + FSP_ATTR_COMP_TYPE_MASK = 0xfU << FSP_ATTR_COMP_TYPE_SHIFT, + +}; + +#define EFI_FSPH_SIGNATURE SIGNATURE_32('F', 'S', 'P', 'H') #endif -- cgit v1.2.3 From 46dd41fa5a8f08af903c7f0cfde9abfc16d7efe3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:34 -0600 Subject: x86: fsp: Add access to variable MRC data With FSP2 the non-volatile storage used by the FSP to init memory can be split into a fixed piece (determined at compile time) and a variable piece (determined at run time). Add support for reading the latter. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/include/asm/fsp/fsp_hob.h | 4 ++++ arch/x86/include/asm/fsp/fsp_support.h | 12 ++++++++++++ arch/x86/lib/fsp/fsp_support.c | 7 +++++++ 3 files changed, 23 insertions(+) diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp/fsp_hob.h index 3bb79c4b67a..d248520e972 100644 --- a/arch/x86/include/asm/fsp/fsp_hob.h +++ b/arch/x86/include/asm/fsp/fsp_hob.h @@ -69,6 +69,10 @@ struct __packed hob_graphics_info { EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) +#define FSP_VARIABLE_NV_DATA_HOB_GUID \ + EFI_GUID(0xa034147d, 0x690c, 0x4154, \ + 0x8d, 0xe6, 0xc0, 0x44, 0x64, 0x1d, 0xe9, 0x42) + #define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index 8dea2e71ea9..4ac27d26f55 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -103,6 +103,18 @@ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); */ void *fsp_get_nvs_data(const void *hob_list, u32 *len); +/** + * fsp_get_var_nvs_data() - get FSP variable Non-volatile Storage HOB buffer + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the NVS data buffer length. + * If the HOB is located, the length will be updated. + * + * @return NULL: Failed to find the NVS HOB. + * @return others: FSP NVS data buffer pointer. + */ +void *fsp_get_var_nvs_data(const void *hob_list, u32 *len); + /** * fsp_get_graphics_info() - retrieves graphics information. * diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index 014de35e563..983888fd743 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -161,6 +161,13 @@ void *fsp_get_nvs_data(const void *hob_list, u32 *len) return hob_get_guid_hob_data(hob_list, len, &guid); } +void *fsp_get_var_nvs_data(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_VARIABLE_NV_DATA_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} + void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) { const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; -- cgit v1.2.3 From d3abc5d1ee5ffea5647a22ddfff82c01d507f962 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:35 -0600 Subject: x86: Move common Intel CPU info code into a function Add cpu_intel_get_info() to find out the CPU info on modern Intel CPUs. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: add parameter and return value descriptions] Signed-off-by: Bin Meng --- arch/x86/cpu/broadwell/cpu_full.c | 9 +-------- arch/x86/cpu/intel_common/cpu.c | 13 +++++++++++++ arch/x86/cpu/ivybridge/model_206ax.c | 8 ++------ arch/x86/include/asm/cpu_common.h | 16 ++++++++++++++++ 4 files changed, 32 insertions(+), 14 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index c1db1845498..d8b84826586 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -645,14 +645,7 @@ void cpu_set_power_limits(int power_limit_1_time) static int broadwell_get_info(struct udevice *dev, struct cpu_info *info) { - msr_t msr; - - msr = msr_read(IA32_PERF_CTL); - info->cpu_freq = ((msr.lo >> 8) & 0xff) * BROADWELL_BCLK * 1000000; - info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | - 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; - - return 0; + return cpu_intel_get_info(info, BROADWELL_BCLK); } static int broadwell_get_count(struct udevice *dev) diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index d0ac17808c3..9357626b5a6 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -110,3 +111,15 @@ int cpu_set_flex_ratio_to_tdp_nominal(void) /* Not reached */ return -EINVAL; } + +int cpu_intel_get_info(struct cpu_info *info, int bclk) +{ + msr_t msr; + + msr = msr_read(IA32_PERF_CTL); + info->cpu_freq = ((msr.lo >> 8) & 0xff) * bclk * 1000000; + info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | + 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; + + return 0; +} diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 6edc3e233c2..68e78e9478b 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -436,12 +437,7 @@ static int model_206ax_init(struct udevice *dev) static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info) { - msr_t msr; - - msr = msr_read(MSR_IA32_PERF_CTL); - info->cpu_freq = ((msr.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK * 1000000; - info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | - 1 << CPU_FEAT_UCODE; + return cpu_intel_get_info(info, SANDYBRIDGE_BCLK); return 0; } diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index 4c91a5daced..5e398bec94c 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -8,6 +8,8 @@ #define IA32_PERF_CTL 0x199 +struct cpu_info; + /** * cpu_common_init() - Set up common CPU init * @@ -31,4 +33,18 @@ int cpu_common_init(void); */ int cpu_set_flex_ratio_to_tdp_nominal(void); +/** + * cpu_intel_get_info() - Obtain CPU info for Intel CPUs + * + * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same + * features. This function fills in these values, given the value of the base + * clock in MHz (typically this should be set to 100). + * + * @info: cpu_info struct to fill in + * @bclk_mz: the base clock in MHz + * + * @return 0 always + */ +int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); + #endif -- cgit v1.2.3 From 1eeb55755f4d50a9954d17cbb6f98b3285a9b976 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:36 -0600 Subject: x86: Add binman symbols to the image It is useful in SPL and TPL to access symbols from binman, such as the position and size of an entry in the ROM. Collect these symbols together in the SPL binaries. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/u-boot-spl.lds | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds index f20c0b810d3..c1e9bfbf66f 100644 --- a/arch/x86/cpu/u-boot-spl.lds +++ b/arch/x86/cpu/u-boot-spl.lds @@ -35,6 +35,12 @@ SECTIONS . = ALIGN(4); __data_end = .; __init_end = .; + . = ALIGN(4); + .binman_sym_table : { + __binman_sym_start = .; + KEEP(*(SORT(.binman_sym*))); + __binman_sym_end = .; + } _image_binary_end = .; -- cgit v1.2.3 From e46d00c77cd5a756e8cf3fae3b34eaa9ec012f0d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:37 -0600 Subject: x86: pci: Add a function to clear and set PCI config regs At present the x86 pre-DM equivalent of pci_bus_clrset_config32() does not exist. Add it to simplify PCI init code on x86. Also add the missing functions to this header. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/pci.c | 19 +++++++++++++++++++ arch/x86/include/asm/pci.h | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index c6218250e16..0ccde194d9a 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -16,6 +16,10 @@ #include #include +/* + * TODO(sjg@chromium.org): Drop the first parameter from each of these + * functions since it is not used. + */ int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) { @@ -54,6 +58,21 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, return 0; } +int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset, + ulong clr, ulong set, enum pci_size_t size) +{ + ulong value; + int ret; + + ret = pci_x86_read_config(bus, bdf, offset, &value, size); + if (ret) + return ret; + value &= ~clr; + value |= set; + + return pci_x86_write_config(bus, bdf, offset, value, size); +} + void pci_assign_irqs(int bus, int device, u8 irq[4]) { pci_dev_t bdf; diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 118ac937d93..fb1edf3df76 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -17,12 +17,52 @@ #ifndef __ASSEMBLY__ +/** + * pci_x86_read_config() - Read a configuration value from a device + * + * This function can be called before PCI is set up in driver model. + * + * @bus: Bus to read from (ignored, can be NULL) + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to read + * @valuep: Place to put the returned value + * @size: Access size + * @return 0 if OK, -ve on error + */ int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size); +/** + * pci_bus_write_config() - Write a configuration value to a device + * + * This function can be called before PCI is set up in driver model. + * + * @bus: Bus to read from (ignored, can be NULL) + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to write + * @value: Value to write + * @size: Access size + * @return 0 if OK, -ve on error + */ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size); +/** + * pci_bus_clrset_config32() - Update a configuration value for a device + * + * The register at @offset is updated to (oldvalue & ~clr) | set. This function + * can be called before PCI is set up in driver model. + * + * @bus: Bus to read from (ignored, can be NULL) + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to update + * @clr: Bits to clear + * @set: Bits to set + * @return 0 if OK, -ve on error + */ +int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset, + ulong clr, ulong set, enum pci_size_t size); + /** * Assign IRQ number to a PCI device * -- cgit v1.2.3 From 14dd93beb71727edf0c7ee288f2ee1ceceb6317a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:38 -0600 Subject: x86: spl: Use hang() instead of a while() loop Use the standard hang() function when booting fails since this implements the defined U-Boot behaviour for this situation. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/spl.c | 3 +-- arch/x86/lib/tpl.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 5d5d1a9ca74..01a96d294bb 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -183,8 +183,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); debug("ret=%d\n", ret); - while (1) - ; + hang(); } #endif diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 492a2d65216..3e662a8bdaf 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -108,8 +108,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { printf("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point); jump_to_spl(spl_image->entry_point); - while (1) - ; + hang(); } void spl_board_init(void) -- cgit v1.2.3 From daade119aa4b49d5ff6b1ebbdfeab0a8775c9344 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:39 -0600 Subject: x86: spl: Reduce priority of the basic SPL image loader This image loader works on systems where the flash is directly mapped to the last part of the 32-bit address space. On recent Intel systems (such as apollolake) this is not the case. Reduce the priority of this loader so that another one can override it. While we are here, rename the loader to BOOT_DEVICE_SPI_MMAP since BOOT_DEVICE_BOARD is not very descriptive. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/include/asm/spl.h | 3 +-- arch/x86/lib/spl.c | 5 +++-- arch/x86/lib/tpl.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/spl.h b/arch/x86/include/asm/spl.h index 27432b28979..1bef4877eb3 100644 --- a/arch/x86/include/asm/spl.h +++ b/arch/x86/include/asm/spl.h @@ -10,8 +10,7 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE enum { - BOOT_DEVICE_SPI = 10, - BOOT_DEVICE_BOARD, + BOOT_DEVICE_SPI_MMAP = 10, BOOT_DEVICE_CROS_VBOOT, }; diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 01a96d294bb..a7394913035 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -11,6 +11,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -142,7 +143,7 @@ void board_init_f_r(void) u32 spl_boot_device(void) { - return BOOT_DEVICE_BOARD; + return BOOT_DEVICE_SPI_MMAP; } int spl_start_uboot(void) @@ -168,7 +169,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, return 0; } -SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); +SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image); int spl_spi_load_image(void) { diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 3e662a8bdaf..cfefa78045e 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -71,7 +71,7 @@ void board_init_f_r(void) u32 spl_boot_device(void) { return IS_ENABLED(CONFIG_CHROMEOS) ? BOOT_DEVICE_CROS_VBOOT : - BOOT_DEVICE_BOARD; + BOOT_DEVICE_SPI_MMAP; } int spl_start_uboot(void) @@ -97,7 +97,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, return 0; } -SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); +SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image); int spl_spi_load_image(void) { -- cgit v1.2.3 From 12c81b2f4196ed7eb9f2d7d377b34280b1ca26c1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:40 -0600 Subject: x86: spl: Move broadwell-specific code out of generic x86 spl When TPL is running, broadwell needs to do different init from SPL. There is no need for this code to be in the generic x86 SPL file, so move it to arch_cpu_init(). Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/broadwell/cpu.c | 5 +++++ arch/x86/cpu/broadwell/cpu_full.c | 7 +++++++ arch/x86/lib/spl.c | 5 ----- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index bb7c3614081..bba8cd1e942 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -67,7 +67,12 @@ int arch_cpu_init(void) { post_code(POST_CPU_INIT); +#ifdef CONFIG_TPL + /* Do a mini-init if TPL has already done the full init */ + return x86_cpu_reinit_f(); +#else return x86_cpu_init_f(); +#endif } int checkcpu(void) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index d8b84826586..bd0b2037fa1 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -81,6 +81,13 @@ static const u8 power_limit_time_msr_to_sec[] = { [0x11] = 128, }; +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) +int arch_cpu_init(void) +{ + return 0; +} +#endif + /* * The core 100MHz BLCK is disabled in deeper c-states. One needs to calibrate * the 100MHz BCLCK against the 24MHz BLCK to restore the clocks properly diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index a7394913035..2baac913837 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -40,12 +40,7 @@ static int x86_spl_init(void) debug("%s: spl_init() failed\n", __func__); return ret; } -#ifdef CONFIG_TPL - /* Do a mini-init if TPL has already done the full init */ - ret = x86_cpu_reinit_f(); -#else ret = arch_cpu_init(); -#endif if (ret) { debug("%s: arch_cpu_init() failed\n", __func__); return ret; -- cgit v1.2.3 From c3863eadbc60d21b234ac5fb15c525b3cbc4f637 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:41 -0600 Subject: x86: fsp: Save usable RAM and hob_list in the handoff area The useable RAM is calculated when the RAM is inited. Save this value so that it can be easily used in U-Boot proper. Also save a pointer to the hob list so that it is accessible (before relocation only) in U-Boot proper. This avoids having to scan it in SPL, for everything U-Boot proper might need later. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: guard handoff_arch_save() with IS_ENABLED(CONFIG_USE_HOB)] Signed-off-by: Bin Meng --- arch/x86/cpu/intel_common/cpu_from_spl.c | 6 ++++++ arch/x86/include/asm/handoff.h | 8 ++++++++ arch/x86/lib/fsp/fsp_dram.c | 10 ++++++++++ 3 files changed, 24 insertions(+) diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c index a6233c75ce2..b7bb524162f 100644 --- a/arch/x86/cpu/intel_common/cpu_from_spl.c +++ b/arch/x86/cpu/intel_common/cpu_from_spl.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -21,6 +22,11 @@ int arch_cpu_init(void) { int ret; +#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB) + struct spl_handoff *ho = gd->spl_handoff; + + gd->arch.hob_list = ho->arch.hob_list; +#endif ret = x86_cpu_reinit_f(); return ret; diff --git a/arch/x86/include/asm/handoff.h b/arch/x86/include/asm/handoff.h index 4d18d59efed..aec49b9b815 100644 --- a/arch/x86/include/asm/handoff.h +++ b/arch/x86/include/asm/handoff.h @@ -9,7 +9,15 @@ #ifndef __x86_asm_handoff_h #define __x86_asm_handoff_h +/** + * struct arch_spl_handoff - architecture-specific handoff info + * + * @usable_ram_top: Value returned by board_get_usable_ram_top() in SPL + * @hob_list: Start of FSP hand-off blocks (HOBs) + */ struct arch_spl_handoff { + ulong usable_ram_top; + void *hob_list; }; #endif diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 8fe1e0bf73d..2d1023068fe 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -88,3 +88,13 @@ unsigned int install_e820_map(unsigned int max_entries, return num_entries; } + +#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB) +int handoff_arch_save(struct spl_handoff *ho) +{ + ho->arch.usable_ram_top = fsp_get_usable_lowmem_top(gd->arch.hob_list); + ho->arch.hob_list = gd->arch.hob_list; + + return 0; +} +#endif -- cgit v1.2.3 From 6172e94c3c4729347624626d71e4eaf96ff9dcb9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:43 -0600 Subject: x86: Change condition for using CAR At present we assume that CAR (Cache-as-RAM) is used if HOBs (Hand-off blocks) are not, since HOBs typically indicate that an FSP is in use, and FSPs handle the CAR init. However this is a bit indirect, and for FSP2 machines which use their own CAR implementation (such as apollolake) but use the FSP for other functions, the logic is wrong. To fix this, add a dedicated Kconfig option to indicate when CAR is used. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: fix a typo in the commit message] Signed-off-by: Bin Meng --- arch/x86/Kconfig | 8 ++++++++ arch/x86/cpu/start.S | 4 ++-- configs/slimbootloader_defconfig | 1 + 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 314f8def7a4..47bf28c434f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -364,6 +364,14 @@ config HAVE_FSP Note: Without this binary U-Boot will not be able to set up its SDRAM so will not boot. +config USE_CAR + bool "Use Cache-As-RAM (CAR) to get temporary RAM at start-up" + default y if !HAVE_FSP + help + Select this option if your board uses CAR init code, typically in a + car.S file, to get some initial memory for code execution. This is + common with Intel CPUs which don't use FSP. + choice prompt "FSP version" depends on HAVE_FSP diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 3c9bdf2a9d6..9b763942743 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -90,7 +90,7 @@ early_board_init_ret: jmp car_init .globl car_init_ret car_init_ret: -#ifndef CONFIG_USE_HOB +#ifdef CONFIG_USE_CAR /* * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, * or fully initialised SDRAM - we really don't care which) @@ -130,7 +130,7 @@ car_init_ret: /* Get address of global_data */ mov %fs:0, %edx -#ifdef CONFIG_USE_HOB +#if defined(CONFIG_USE_HOB) && !defined(CONFIG_USE_CAR) /* Store the HOB list if we have one */ test %esi, %esi jz skip_hob diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index f9fecff45ea..3cbb83c7a47 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -18,3 +18,4 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_PCI_PNP is not set CONFIG_CONSOLE_SCROLL_LINES=5 +# CONFIG_USE_CAR is not set -- cgit v1.2.3 From 08deb6d36f0a830181a3acce5eaece9431a828c0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:44 -0600 Subject: x86: Add more comments to the start-up code The full start-up sequence (TPL->SPL->U-Boot) can be a bit confusing since each phase has its own 'start' file. Add comments to explain this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/start.S | 12 ++++++++++++ arch/x86/cpu/start_from_spl.S | 5 +++-- arch/x86/cpu/start_from_tpl.S | 3 ++- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 9b763942743..01524635e9c 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -2,6 +2,18 @@ /* * U-Boot - x86 Startup Code * + * This is always the first code to run from the U-Boot source. To spell it out: + * + * 1. When TPL (Tertiary Program Loader) is enabled, the boot flow is + * TPL->SPL->U-Boot and this file is used for TPL. Then start_from_tpl.S is used + * for SPL and start_from_spl.S is used for U-Boot proper. + * + * 2. When SPL (Secondary Program Loader) is enabled, but not TPL, the boot + * flow is SPL->U-Boot and this file is used for SPL. Then start_from_spl.S is + * used for U-Boot proper. + * + * 3. When neither TPL nor SPL is used, this file is used for U-Boot proper. + * * (C) Copyright 2008-2011 * Graeme Russ, * diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S index 4d4e5d0758d..a73b4d7c459 100644 --- a/arch/x86/cpu/start_from_spl.S +++ b/arch/x86/cpu/start_from_spl.S @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * 32-bit x86 Startup Code when running from SPL - * + * 32-bit x86 Startup Code when running from SPL. This is the startup code in + * U-Boot proper, when SPL is used. + * Copyright 2018 Google, Inc * Written by Simon Glass */ diff --git a/arch/x86/cpu/start_from_tpl.S b/arch/x86/cpu/start_from_tpl.S index 44b5363a685..9a4974a5f1b 100644 --- a/arch/x86/cpu/start_from_tpl.S +++ b/arch/x86/cpu/start_from_tpl.S @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * 32-bit x86 Startup Code when running from TPL + * 32-bit x86 Startup Code when running from TPL. This is the startup code in + * SPL, when TPL is used. * * Copyright 2018 Google, Inc * Written by Simon Glass -- cgit v1.2.3 From ebe002cd180c4b9f7f92720acaf13e712a1cce93 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:46 -0600 Subject: x86: Add various MTRR indexes and values Add some new MTRRs used by Apollolake as well as a mask for the MTRR type. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/include/asm/msr-index.h | 22 ++++++++++++++++++++++ arch/x86/include/asm/mtrr.h | 1 + 2 files changed, 23 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 9c1dbe61d59..1a02d8c8fe5 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -43,6 +43,12 @@ #define MSR_PIC_MSG_CONTROL 0x2e #define PLATFORM_INFO_SET_TDP (1 << 29) +#define MSR_MTRR_CAP_MSR 0x0fe +#define MSR_MTRR_CAP_SMRR (1 << 11) +#define MSR_MTRR_CAP_WC (1 << 10) +#define MSR_MTRR_CAP_FIX (1 << 8) +#define MSR_MTRR_CAP_VCNT 0xff + #define MSR_IA32_PERFCTR0 0x000000c1 #define MSR_IA32_PERFCTR1 0x000000c2 #define MSR_FSB_FREQ 0x000000cd @@ -67,6 +73,11 @@ #define ENABLE_ULFM_AUTOCM_MASK (1 << 2) #define ENABLE_INDP_AUTOCM_MASK (1 << 3) +#define MSR_EMULATE_PM_TIMER 0x121 +#define EMULATE_DELAY_OFFSET_VALUE 20 +#define EMULATE_PM_TMR_EN (1 << 16) +#define EMULATE_DELAY_VALUE 0x13 + #define MSR_IA32_SYSENTER_CS 0x00000174 #define MSR_IA32_SYSENTER_ESP 0x00000175 #define MSR_IA32_SYSENTER_EIP 0x00000176 @@ -78,9 +89,14 @@ #define MSR_FLEX_RATIO 0x194 #define FLEX_RATIO_LOCK (1 << 20) #define FLEX_RATIO_EN (1 << 16) +/* This is burst mode BIT 38 in IA32_MISC_ENABLE MSR at offset 1A0h */ +#define BURST_MODE_DISABLE (1 << 6) #define MSR_IA32_MISC_ENABLES 0x000001a0 #define MSR_TEMPERATURE_TARGET 0x1a2 +#define MSR_PREFETCH_CTL 0x1a4 +#define PREFETCH_L1_DISABLE (1 << 0) +#define PREFETCH_L2_DISABLE (1 << 2) #define MSR_OFFCORE_RSP_0 0x000001a6 #define MSR_OFFCORE_RSP_1 0x000001a7 #define MSR_MISC_PWR_MGMT 0x1aa @@ -600,6 +616,12 @@ #define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490 #define MSR_IA32_VMX_VMFUNC 0x00000491 +#define MSR_IA32_PQR_ASSOC 0xc8f +/* MSR bits 33:32 encode slot number 0-3 */ +#define MSR_IA32_PQR_ASSOC_MASK (1 << 0 | 1 << 1) + +#define MSR_L2_QOS_MASK(reg) (0xd10 + (reg)) + /* VMX_BASIC bits and bitmasks */ #define VMX_BASIC_VMCS_SIZE_SHIFT 32 #define VMX_BASIC_64 0x0001000000000000LLU diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 2d897f82ef7..6f29e75ce65 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -25,6 +25,7 @@ #define MTRR_CAP_FIX (1 << 8) #define MTRR_CAP_VCNT_MASK 0xff +#define MTRR_DEF_TYPE_MASK 0xff #define MTRR_DEF_TYPE_EN (1 << 11) #define MTRR_DEF_TYPE_FIX_EN (1 << 10) -- cgit v1.2.3 From bdeb2bccbf40474eca8ef039ab794ba46cd971e5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:47 -0600 Subject: x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMIT This MSR number is used on most modern Intel processors, so drop the confusing NHM prefix (which might mean Nehalem). Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: drop MSR_IVT_TURBO_RATIO_LIMIT as no code uses it] Signed-off-by: Bin Meng --- arch/x86/cpu/broadwell/cpu_full.c | 2 +- arch/x86/include/asm/msr-index.h | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index bd0b2037fa1..9686cf5e0e7 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -346,7 +346,7 @@ static void set_max_ratio(void) /* Check for configurable TDP option */ if (turbo_get_state() == TURBO_ENABLED) { - msr = msr_read(MSR_NHM_TURBO_RATIO_LIMIT); + msr = msr_read(MSR_TURBO_RATIO_LIMIT); perf_ctl.lo = (msr.lo & 0xff) << 8; } else if (cpu_config_tdp_levels()) { /* Set to nominal TDP ratio */ diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 1a02d8c8fe5..6cb58708090 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -101,8 +101,7 @@ #define MSR_OFFCORE_RSP_1 0x000001a7 #define MSR_MISC_PWR_MGMT 0x1aa #define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0) -#define MSR_NHM_TURBO_RATIO_LIMIT 0x000001ad -#define MSR_IVT_TURBO_RATIO_LIMIT 0x000001ae +#define MSR_TURBO_RATIO_LIMIT 0x000001ad #define MSR_IA32_ENERGY_PERFORMANCE_BIAS 0x1b0 #define ENERGY_POLICY_PERFORMANCE 0 -- cgit v1.2.3 From d3e773613b6d159204de4894a4e0d191717ce318 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:45 -0600 Subject: dm: core: Use U-Boot logging instead of pr_debug() The pr_debug() functions do not response to setting the log level and in fact have their own separate log level. Use U-Boot logging instead. Perhaps we should make these options redirect to log_debug(), etc.? Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/core/lists.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/core/lists.c b/drivers/core/lists.c index a1f828463ec..4681b3e5dd1 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -6,6 +6,8 @@ * Marek Vasut */ +#define LOG_CATEGORY LOGC_DM + #include #include #include @@ -139,13 +141,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, if (devp) *devp = NULL; name = ofnode_get_name(node); - pr_debug("bind node %s\n", name); + log_debug("bind node %s\n", name); compat_list = ofnode_get_property(node, "compatible", &compat_length); if (!compat_list) { if (compat_length == -FDT_ERR_NOTFOUND) { - pr_debug("Device '%s' has no compatible string\n", - name); + log_debug("Device '%s' has no compatible string\n", + name); return 0; } @@ -160,8 +162,8 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, */ for (i = 0; i < compat_length; i += strlen(compat) + 1) { compat = compat_list + i; - pr_debug(" - attempt to match compatible string '%s'\n", - compat); + log_debug(" - attempt to match compatible string '%s'\n", + compat); for (entry = driver; entry != driver + n_ents; entry++) { ret = driver_check_compatible(entry->of_match, &id, @@ -178,11 +180,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, return 0; } - pr_debug(" - found match at '%s'\n", entry->name); + log_debug(" - found match at '%s': '%s' matches '%s'\n", + entry->name, entry->of_match->compatible, + id->compatible); ret = device_bind_with_driver_data(parent, entry, name, id->data, node, &dev); if (ret == -ENODEV) { - pr_debug("Driver '%s' refuses to bind\n", entry->name); + log_debug("Driver '%s' refuses to bind\n", entry->name); continue; } if (ret) { @@ -198,7 +202,7 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, } if (!found && !result && ret != -ENODEV) - pr_debug("No match for node '%s'\n", name); + log_debug("No match for node '%s'\n", name); return result; } -- cgit v1.2.3 From c8b31cce45477dea51b3c65b2c0e12ea9cced9f0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:47 -0600 Subject: dm: core: Drop a few early returns Two functions in this file return early for no good reason. Adjust the code to match the standard DM style of returning 0 at the end of the function on success. Oddly enough this save 12 bytes of code size on ARM. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/core/uclass.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index b33296542f6..af575bbeb72 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -714,8 +714,11 @@ int uclass_pre_probe_device(struct udevice *dev) if (!dev->parent) return 0; uc_drv = dev->parent->uclass->uc_drv; - if (uc_drv->child_pre_probe) - return uc_drv->child_pre_probe(dev); + if (uc_drv->child_pre_probe) { + ret = uc_drv->child_pre_probe(dev); + if (ret) + return ret; + } return 0; } @@ -735,8 +738,11 @@ int uclass_post_probe_device(struct udevice *dev) } uc_drv = dev->uclass->uc_drv; - if (uc_drv->post_probe) - return uc_drv->post_probe(dev); + if (uc_drv->post_probe) { + ret = uc_drv->post_probe(dev); + if (ret) + return ret; + } return 0; } -- cgit v1.2.3 From fdd72be486144f154fdfac91e7bfc2d503fea9fb Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:48 -0600 Subject: dm: core: Add documentation on how to debug driver model Sometimes devices don't appear and it can be confusing. Add a few notes to help with this situation. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: fix 2 issues in the doc and include the doc in the index.rst] Signed-off-by: Bin Meng --- doc/driver-model/debugging.rst | 62 ++++++++++++++++++++++++++++++++++++++++++ doc/driver-model/index.rst | 1 + 2 files changed, 63 insertions(+) create mode 100644 doc/driver-model/debugging.rst diff --git a/doc/driver-model/debugging.rst b/doc/driver-model/debugging.rst new file mode 100644 index 00000000000..4f4a8d4805f --- /dev/null +++ b/doc/driver-model/debugging.rst @@ -0,0 +1,62 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Simon Glass + +Debugging driver model +====================== + +This document aims to provide help when you cannot work out why driver model is +not doing what you expect. + + +Useful techniques in general +---------------------------- + +Here are some useful debugging features generally. + + - If you are writing a new feature, consider doing it in sandbox instead of + on your board. Sandbox has no limits, allows easy debugging (e.g. gdb) and + you can write emulators for most common devices. + - Put '#define DEBUG' at the top of a file, to activate all the debug() and + log_debug() statements in that file. + - Where logging is used, change the logging level, e.g. in SPL with + CONFIG_SPL_LOG_MAX_LEVEL=7 (which is LOGL_DEBUG) and + CONFIG_LOG_DEFAULT_LEVEL=7 + - Where logging of return values is implemented with log_msg_ret(), set + CONFIG_LOG_ERROR_RETURN=y to see exactly where the error is happening + - Make sure you have a debug UART enabled - see CONFIG_DEBUG_UART. With this + you can get serial output (printf(), etc.) before the serial driver is + running. + - Use a JTAG emulator to set breakpoints and single-step through code + +Not that most of these increase code/data size somewhat when enabled. + + +Failure to locate a device +-------------------------- + +Let's say you have uclass_first_device_err() and it is not finding anything. + +If it is returning an error, then that gives you a clue. Look up linux/errno.h +to see errors. Common ones are: + + - -ENOMEM which indicates that memory is short. If it happens in SPL or + before relocation in U-Boot, check CONFIG_SPL_SYS_MALLOC_F_LEN and + CONFIG_SYS_MALLOC_F_LEN as they may need to be larger. Add '#define DEBUG' + at the very top of malloc_simple.c to get an idea of where your memory is + going. + - -EINVAL which typically indicates that something was missing or wrong in + the device tree node. Check that everything is correct and look at the + ofdata_to_platdata() method in the driver. + +If there is no error, you should check if the device is actually bound. Call +dm_dump_all() just before you locate the device to make sure it exists. + +If it does not exist, check your device tree compatible strings match up with +what the driver expects (in the struct udevice_id array). + +If you are using of-platdata (e.g. CONFIG_SPL_OF_PLATDATA), check that the +driver name is the same as the first compatible string in the device tree (with +invalid-variable characters converted to underscore). + +If you are really stuck, #define DEBUG at the top of lists.c should show you +what is going on. diff --git a/doc/driver-model/index.rst b/doc/driver-model/index.rst index ea32c36335f..6d55774b4c2 100644 --- a/doc/driver-model/index.rst +++ b/doc/driver-model/index.rst @@ -6,6 +6,7 @@ Driver Model .. toctree:: :maxdepth: 2 + debugging design fdt-fixup fs_firmware_loader -- cgit v1.2.3 From fe9a967925521c78fb52621ee760ead381a80cb7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:51 -0600 Subject: dm: test: Fix running of multiple test from command line At present when multiple 'ut dm' commands are executed, all but the first is run with a flat tree, even if live tree is enabled. This is because the live tree node pointer is set to NULL and never restored. This does not affect normal test running, which just runs all the test in one go, but can be confusing when several individual tests are run during the same U-Boot run. Correct this by restoring the pointer. Fixes: c166c47ba3 (dm: test: Add support for running tests with livetree) Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- test/dm/test-main.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/test/dm/test-main.c b/test/dm/test-main.c index 5d79ce641d7..487d8b96275 100644 --- a/test/dm/test-main.c +++ b/test/dm/test-main.c @@ -188,8 +188,12 @@ static int dm_test_main(const char *test_name) else printf("Failures: %d\n", uts->fail_count); + /* Put everything back to normal so that sandbox works as expected */ +#ifdef CONFIG_OF_LIVE + gd->of_root = uts->of_root; +#endif gd->dm_root = NULL; - ut_assertok(dm_init(false)); + ut_assertok(dm_init(IS_ENABLED(CONFIG_OF_LIVE))); dm_scan_platdata(false); dm_scan_fdt(gd->fdt_blob, false); -- cgit v1.2.3 From ad9504793622c3c745460572b236109e2d69bae4 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:52 -0600 Subject: dm: test: Don't fail when tests are skipped due to build At present tests that are marked as only for livetree fail when executed on sandbox_flattree. They cannot actually be executed, but we should not resport them as 'not found', since this causes errors. Instead, they should be silently skipped. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- test/dm/test-main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/dm/test-main.c b/test/dm/test-main.c index 487d8b96275..74f77ccc849 100644 --- a/test/dm/test-main.c +++ b/test/dm/test-main.c @@ -130,7 +130,7 @@ static int dm_test_main(const char *test_name) const int n_ents = ll_entry_count(struct unit_test, dm_test); struct unit_test_state *uts = &global_dm_test_state; struct unit_test *test; - int run_count; + int found; uts->priv = &_global_priv_dm_test_state; uts->fail_count = 0; @@ -148,7 +148,7 @@ static int dm_test_main(const char *test_name) if (!test_name) printf("Running %d driver model tests\n", n_ents); - run_count = 0; + found = 0; #ifdef CONFIG_OF_LIVE uts->of_root = gd->of_root; #endif @@ -180,10 +180,10 @@ static int dm_test_main(const char *test_name) ut_assertok(dm_do_test(uts, test, false)); runs++; } - run_count += runs; + found++; } - if (test_name && !run_count) + if (test_name && !found) printf("Test '%s' not found\n", test_name); else printf("Failures: %d\n", uts->fail_count); -- cgit v1.2.3 From ea14778d0680f8a3f262a06ceb52ea17deb6a104 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:53 -0600 Subject: dm: core: Call ofdata_to_platdata() with of-platdata At present this function is never called when of-platdata is enabled since we never have a device tree. However, this function is responsible for copying over the of-platdata, so we must call it. Otherwise the probe() method would have to be used. Correct this and fix the sandbox serial driver to not read from the device tree and try to write to what is read-only platdata on some platforms. Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree) Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/core/device.c | 3 ++- drivers/serial/sandbox.c | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/core/device.c b/drivers/core/device.c index 05dadf98f95..84f0f0fbf0e 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -404,7 +404,8 @@ int device_probe(struct udevice *dev) goto fail; } - if (drv->ofdata_to_platdata && dev_has_of_node(dev)) { + if (drv->ofdata_to_platdata && + (CONFIG_IS_ENABLED(OF_PLATDATA) || dev_has_of_node(dev))) { ret = drv->ofdata_to_platdata(dev); if (ret) goto fail; diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 33102fc872f..2f7bc248871 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -220,6 +220,8 @@ static int sandbox_serial_ofdata_to_platdata(struct udevice *dev) const char *colour; int i; + if (CONFIG_IS_ENABLED(OF_PLATDATA)) + return 0; plat->colour = -1; colour = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "sandbox,text-colour", NULL); -- cgit v1.2.3 From 4805a7af8ebd4c604e1e32355927ec5035685121 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:55 -0600 Subject: dm: core: Correct the return value for uclass_find_first_device() This function returns -ENODEV when there is no device. This is inconsistent with other functions, such as uclass_find_next_device(), which returns 0. Update it and tidy up the incorrect '-1' values in the comments. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- drivers/core/uclass.c | 2 +- include/dm/uclass-internal.h | 4 ++-- test/dm/core.c | 3 +-- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index af575bbeb72..f217876cd2c 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -225,7 +225,7 @@ int uclass_find_first_device(enum uclass_id id, struct udevice **devp) if (ret) return ret; if (list_empty(&uc->dev_head)) - return -ENODEV; + return 0; *devp = list_first_entry(&uc->dev_head, struct udevice, uclass_node); diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 6977995246d..6e3f15c2b08 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -69,7 +69,7 @@ int uclass_find_device(enum uclass_id id, int index, struct udevice **devp); * The device is not prepared for use - this is an internal function. * The function uclass_get_device_tail() can be used to probe the device. * - * @return 0 if OK (found or not found), -1 on error + * @return 0 if OK (found or not found), -ve on error */ int uclass_find_first_device(enum uclass_id id, struct udevice **devp); @@ -81,7 +81,7 @@ int uclass_find_first_device(enum uclass_id id, struct udevice **devp); * The device is not prepared for use - this is an internal function. * The function uclass_get_device_tail() can be used to probe the device. * - * @return 0 if OK (found or not found), -1 on error + * @return 0 if OK (found or not found), -ve on error */ int uclass_find_next_device(struct udevice **devp); diff --git a/test/dm/core.c b/test/dm/core.c index edd55b05d6e..f74c4308439 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -749,8 +749,7 @@ static int dm_test_uclass_devices_find(struct unit_test_state *uts) ut_assert(dev); } - ret = uclass_find_first_device(UCLASS_TEST_DUMMY, &dev); - ut_assert(ret == -ENODEV); + ut_assertok(uclass_find_first_device(UCLASS_TEST_DUMMY, &dev)); ut_assert(!dev); return 0; -- cgit v1.2.3 From e5f739045890eef2e97488c9c2a7d036ab908e58 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:56 -0600 Subject: dm: core: Add device_foreach_child() We have a 'safe' version of this function but sometimes it is not needed. Add a normal version too and update a few places that can use it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/mach-uniphier/pinctrl-glue.c | 4 ++-- drivers/block/blk-uclass.c | 4 ++-- include/dm/device.h | 9 +++++++++ 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c index c4d3b17c39d..b45f72f59a7 100644 --- a/arch/arm/mach-uniphier/pinctrl-glue.c +++ b/arch/arm/mach-uniphier/pinctrl-glue.c @@ -13,14 +13,14 @@ int uniphier_pin_init(const char *pinconfig_name) { - struct udevice *pctldev, *config, *next; + struct udevice *pctldev, *config; int ret; ret = uclass_first_device(UCLASS_PINCTRL, &pctldev); if (ret) return ret; - device_foreach_child_safe(config, next, pctldev) { + device_foreach_child(config, pctldev) { if (strcmp(config->name, pinconfig_name)) continue; diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index baaf431e5e0..e8f58b3f5e4 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -142,9 +142,9 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) */ struct blk_desc *blk_get_by_device(struct udevice *dev) { - struct udevice *child_dev, *next; + struct udevice *child_dev; - device_foreach_child_safe(child_dev, next, dev) { + device_foreach_child(child_dev, dev) { if (device_get_uclass_id(child_dev) != UCLASS_BLK) continue; diff --git a/include/dm/device.h b/include/dm/device.h index 27a6d7b9fdb..d1210429e92 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -679,6 +679,15 @@ static inline bool device_is_on_pci_bus(struct udevice *dev) #define device_foreach_child_safe(pos, next, parent) \ list_for_each_entry_safe(pos, next, &parent->child_head, sibling_node) +/** + * device_foreach_child() - iterate through child devices + * + * @pos: struct udevice * for the current device + * @parent: parent device to scan + */ +#define device_foreach_child(pos, parent) \ + list_for_each_entry(pos, &parent->child_head, sibling_node) + /** * dm_scan_fdt_dev() - Bind child device in a the device tree * -- cgit v1.2.3 From 22327003a9d23c25044ce411e2daa992c835763c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:57 -0600 Subject: dm: test: Correct a stray backslash in dm_test_destroy() This should perhaps be a period. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: add the ending period and reword the commit message] Signed-off-by: Bin Meng --- test/dm/test-main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/dm/test-main.c b/test/dm/test-main.c index 74f77ccc849..72648162a91 100644 --- a/test/dm/test-main.c +++ b/test/dm/test-main.c @@ -64,7 +64,7 @@ static int dm_test_destroy(struct unit_test_state *uts) /* * If the uclass doesn't exist we don't want to create it. So - * check that here before we call uclass_find_device()/ + * check that here before we call uclass_find_device(). */ uc = uclass_find(id); if (!uc) -- cgit v1.2.3 From a605b0f76791b0ec0d7f1703b07ad876c12be1b3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:55:59 -0600 Subject: sandbox: spmi: Add ranges property for address translation At present address translation does not work since there is no ranges property in the spmi nodes. Add empty ranges properties and a little more logging so that this shows the error: /tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \ -c "ut dm spmi_access_peripheral" -L7 -v ... pm8916_gpio_probe() bad address: returning err=-22 Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/sandbox/dts/test.dts | 2 ++ drivers/gpio/pm8916_gpio.c | 12 ++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 27b0baab278..50d245ae917 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -713,11 +713,13 @@ compatible = "sandbox,spmi"; #address-cells = <0x1>; #size-cells = <0x1>; + ranges; pm8916@0 { compatible = "qcom,spmi-pmic"; reg = <0x0 0x1>; #address-cells = <0x1>; #size-cells = <0x1>; + ranges; spmi_gpios: gpios@c000 { compatible = "qcom,pm8916-gpio"; diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c index bbe214d5eea..74a773c099b 100644 --- a/drivers/gpio/pm8916_gpio.c +++ b/drivers/gpio/pm8916_gpio.c @@ -172,16 +172,16 @@ static int pm8916_gpio_probe(struct udevice *dev) priv->pid = dev_read_addr(dev); if (priv->pid == FDT_ADDR_T_NONE) - return -EINVAL; + return log_msg_ret("bad address", -EINVAL); /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x10) - return -ENODEV; + return log_msg_ret("bad type", -ENXIO); reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); if (reg != 0x5 && reg != 0x1) - return -ENODEV; + return log_msg_ret("bad subtype", -ENXIO); return 0; } @@ -257,16 +257,16 @@ static int pm8941_pwrkey_probe(struct udevice *dev) priv->pid = devfdt_get_addr(dev); if (priv->pid == FDT_ADDR_T_NONE) - return -EINVAL; + return log_msg_ret("bad address", -EINVAL); /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x1) - return -ENODEV; + return log_msg_ret("bad type", -ENXIO); reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); if (reg != 0x1) - return -ENODEV; + return log_msg_ret("bad subtype", -ENXIO); return 0; } -- cgit v1.2.3 From 5abd58f0de66955f14e37da49e9d2d3e2f92ef88 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:00 -0600 Subject: sandbox: mmc: Fix up MMC emulator for valgrind At present running sandbox with valgrind produces some warnings due to the MMC emulator not filling in all the expected fields. Fix it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: use sizeof() instead of hardcoded 16] Signed-off-by: Bin Meng --- drivers/mmc/sandbox_mmc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c index 2fa7d8c3dcd..899952d773c 100644 --- a/drivers/mmc/sandbox_mmc.c +++ b/drivers/mmc/sandbox_mmc.c @@ -27,6 +27,7 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, { switch (cmd->cmdidx) { case MMC_CMD_ALL_SEND_CID: + memset(cmd->response, '\0', sizeof(cmd->response)); break; case SD_CMD_SEND_RELATIVE_ADDR: cmd->response[0] = 0 << 16; /* mmc->rca */ @@ -43,11 +44,14 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, case MMC_CMD_SEND_CSD: cmd->response[0] = 0; cmd->response[1] = 10 << 16; /* 1 << block_len */ + cmd->response[2] = 0; + cmd->response[3] = 0; break; case SD_CMD_SWITCH_FUNC: { if (!data) break; u32 *resp = (u32 *)data->dest; + resp[3] = 0; resp[7] = cpu_to_be32(SD_HIGHSPEED_BUSY); if ((cmd->cmdarg & 0xF) == UHS_SDR12_BUS_SPEED) resp[4] = (cmd->cmdarg & 0xF) << 24; -- cgit v1.2.3 From 3414581380d9dace84ac6347aa1b448d12ba900d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:01 -0600 Subject: sandbox: Rename PCI ID for swap_case to be more specific Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more descriptive and allows us to add new PCI emulators without any conflict or confusion. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/sandbox/include/asm/test.h | 2 +- drivers/misc/swap_case.c | 5 +++-- test/dm/pci.c | 6 +++--- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index cbf209693da..1b21af6bed7 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -12,7 +12,7 @@ #define SANDBOX_I2C_TEST_ADDR 0x59 #define SANDBOX_PCI_VENDOR_ID 0x1234 -#define SANDBOX_PCI_DEVICE_ID 0x5678 +#define SANDBOX_PCI_SWAP_CASE_EMUL_ID 0x5678 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 6afc6d9466b..eb32d101f96 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -129,7 +129,7 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, *valuep = SANDBOX_PCI_VENDOR_ID; break; case PCI_DEVICE_ID: - *valuep = SANDBOX_PCI_DEVICE_ID; + *valuep = SANDBOX_PCI_SWAP_CASE_EMUL_ID; break; case PCI_CLASS_DEVICE: if (size == PCI_SIZE_8) { @@ -417,7 +417,8 @@ U_BOOT_DRIVER(sandbox_swap_case_emul) = { }; static struct pci_device_id sandbox_swap_case_supported[] = { - { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_DEVICE_ID), SWAP_CASE_DRV_DATA }, + { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_SWAP_CASE_EMUL_ID), + SWAP_CASE_DRV_DATA }, {}, }; diff --git a/test/dm/pci.c b/test/dm/pci.c index c325f6600e7..e70b65aea4a 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -38,7 +38,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); device = 0; ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); - ut_asserteq(SANDBOX_PCI_DEVICE_ID, device); + ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device); /* Test bus#1 and its devices */ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus)); @@ -50,7 +50,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap)); device = 0; ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); - ut_asserteq(SANDBOX_PCI_DEVICE_ID, device); + ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device); return 0; } @@ -170,7 +170,7 @@ static int dm_test_pci_mixed(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x1f, 0), &swap)); device = 0; ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); - ut_asserteq(SANDBOX_PCI_DEVICE_ID, device); + ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device); /* First test I/O */ io_addr = dm_pci_read_bar32(swap, 0); -- cgit v1.2.3 From 239cdcff5a5df19e69ee2a97f5540a82678cbec7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:02 -0600 Subject: sandbox: Add support for clrsetio_32() and friends These functions are available on x86 but not sandbox. They are useful shortcuts and clarify the code, so add them to sandbox. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/sandbox/include/asm/io.h | 42 ++++++++++++++++++++++++++++++++++++------ arch/sandbox/lib/pci_io.c | 12 ++++++------ 2 files changed, 42 insertions(+), 12 deletions(-) diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 2a350a826c4..481787b516b 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -110,13 +110,21 @@ phys_addr_t map_to_sysmem(const void *ptr); #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) /* I/O access functions */ -int inl(unsigned int addr); -int inw(unsigned int addr); -int inb(unsigned int addr); +int _inl(unsigned int addr); +int _inw(unsigned int addr); +int _inb(unsigned int addr); -void outl(unsigned int value, unsigned int addr); -void outw(unsigned int value, unsigned int addr); -void outb(unsigned int value, unsigned int addr); +void _outl(unsigned int value, unsigned int addr); +void _outw(unsigned int value, unsigned int addr); +void _outb(unsigned int value, unsigned int addr); + +#define inb(port) _inb((uintptr_t)(port)) +#define inw(port) _inw((uintptr_t)(port)) +#define inl(port) _inl((uintptr_t)(port)) + +#define outb(val, port) _outb(val, (uintptr_t)(port)) +#define outw(val, port) _outw(val, (uintptr_t)(port)) +#define outl(val, port) _outl(val, (uintptr_t)(port)) #define out_arch(type,endian,a,v) write##type(cpu_to_##endian(v),a) #define in_arch(type,endian,a) endian##_to_cpu(read##type(a)) @@ -188,6 +196,28 @@ static inline void memcpy_toio(volatile void *dst, const void *src, int count) #define insw(port, buf, ns) _insw((u16 *)port, buf, ns) #define outsw(port, buf, ns) _outsw((u16 *)port, buf, ns) +/* IO space accessors */ +#define clrio(type, addr, clear) \ + out##type(in##type(addr) & ~(clear), (addr)) + +#define setio(type, addr, set) \ + out##type(in##type(addr) | (set), (addr)) + +#define clrsetio(type, addr, clear, set) \ + out##type((in##type(addr) & ~(clear)) | (set), (addr)) + +#define clrio_32(addr, clear) clrio(l, addr, clear) +#define clrio_16(addr, clear) clrio(w, addr, clear) +#define clrio_8(addr, clear) clrio(b, addr, clear) + +#define setio_32(addr, set) setio(l, addr, set) +#define setio_16(addr, set) setio(w, addr, set) +#define setio_8(addr, set) setio(b, addr, set) + +#define clrsetio_32(addr, clear, set) clrsetio(l, addr, clear, set) +#define clrsetio_16(addr, clear, set) clrsetio(w, addr, clear, set) +#define clrsetio_8(addr, clear, set) clrsetio(b, addr, clear, set) + #include #include diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c index 01822c60695..f22e47c7f6d 100644 --- a/arch/sandbox/lib/pci_io.c +++ b/arch/sandbox/lib/pci_io.c @@ -91,7 +91,7 @@ static int pci_io_write(unsigned int addr, ulong value, pci_size_t size) return -ENOSYS; } -int inl(unsigned int addr) +int _inl(unsigned int addr) { unsigned long value; int ret; @@ -101,7 +101,7 @@ int inl(unsigned int addr) return ret ? 0 : value; } -int inw(unsigned int addr) +int _inw(unsigned int addr) { unsigned long value; int ret; @@ -111,7 +111,7 @@ int inw(unsigned int addr) return ret ? 0 : value; } -int inb(unsigned int addr) +int _inb(unsigned int addr) { unsigned long value; int ret; @@ -121,17 +121,17 @@ int inb(unsigned int addr) return ret ? 0 : value; } -void outl(unsigned int value, unsigned int addr) +void _outl(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_32); } -void outw(unsigned int value, unsigned int addr) +void _outw(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_16); } -void outb(unsigned int value, unsigned int addr) +void _outb(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_8); } -- cgit v1.2.3 From cea7c0956ac2134e67f9d93bd96b2f2b4b85b430 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:03 -0600 Subject: sandbox: swap_case: Use statics where possible Some functions and a struct should be marked static since they are not used outside this file. Update them. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/misc/swap_case.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index eb32d101f96..8abf88a8fff 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -286,8 +286,8 @@ static void sandbox_swap_case_do_op(enum swap_case_op op, char *str, int len) } } -int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr, - ulong *valuep, enum pci_size_t size) +static int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr, + ulong *valuep, enum pci_size_t size) { struct swap_case_priv *priv = dev_get_priv(dev); unsigned int offset; @@ -304,8 +304,8 @@ int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr, return 0; } -int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr, - ulong value, enum pci_size_t size) +static int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr, + ulong value, enum pci_size_t size) { struct swap_case_priv *priv = dev_get_priv(dev); unsigned int offset; @@ -392,7 +392,7 @@ static int sandbox_swap_case_unmap_physmem(struct udevice *dev, return 0; } -struct dm_pci_emul_ops sandbox_swap_case_emul_ops = { +static struct dm_pci_emul_ops sandbox_swap_case_emul_ops = { .get_devfn = sandbox_swap_case_get_devfn, .read_config = sandbox_swap_case_read_config, .write_config = sandbox_swap_case_write_config, -- cgit v1.2.3 From fae2c16ede7bf00c8f7873a96fc2b34d5345d751 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:04 -0600 Subject: sandbox: pci: Drop the get_devfn() method This method is not used anymore since the bus/device/function of PCI devices can be obtained from their (parent's per-child) platform data. Drop it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/misc/swap_case.c | 8 -------- include/pci.h | 7 ------- 2 files changed, 15 deletions(-) diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 8abf88a8fff..18d756e9cd5 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -54,13 +54,6 @@ struct swap_case_priv { char mem_text[MEM_TEXT_SIZE]; }; -static int sandbox_swap_case_get_devfn(struct udevice *dev) -{ - struct pci_child_platdata *plat = dev_get_parent_platdata(dev); - - return plat->devfn; -} - static int sandbox_swap_case_use_ea(struct udevice *dev) { return !!ofnode_get_property(dev->node, "use-ea", NULL); @@ -393,7 +386,6 @@ static int sandbox_swap_case_unmap_physmem(struct udevice *dev, } static struct dm_pci_emul_ops sandbox_swap_case_emul_ops = { - .get_devfn = sandbox_swap_case_get_devfn, .read_config = sandbox_swap_case_read_config, .write_config = sandbox_swap_case_write_config, .read_io = sandbox_swap_case_read_io, diff --git a/include/pci.h b/include/pci.h index 298d0d43559..999a594cddf 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1490,13 +1490,6 @@ int dm_pci_find_class(uint find_class, int index, struct udevice **devp); * struct dm_pci_emul_ops - PCI device emulator operations */ struct dm_pci_emul_ops { - /** - * get_devfn(): Check which device and function this emulators - * - * @dev: device to check - * @return the device and function this emulates, or -ve on error - */ - int (*get_devfn)(struct udevice *dev); /** * read_config() - Read a PCI configuration value * -- cgit v1.2.3 From 37a1cf9c9c4c670e074feb8fb2fc6b4a40a80b1b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:06 -0600 Subject: sandbox: pci: Move pci_offset_to_barnum() to pci.h This function is useful in PCI emulators. More it into the header file to avoid duplicating it in other drivers. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/misc/swap_case.c | 7 ++----- include/pci.h | 4 ++++ 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 18d756e9cd5..75fe6416707 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -24,9 +24,6 @@ struct swap_case_platdata { u32 bar[6]; }; -#define offset_to_barnum(offset) \ - (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32)) - enum { MEM_TEXT_SIZE = 0x100, }; @@ -144,7 +141,7 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, int barnum; u32 *bar, result; - barnum = offset_to_barnum(offset); + barnum = pci_offset_to_barnum(offset); bar = &plat->bar[barnum]; result = *bar; @@ -224,7 +221,7 @@ static int sandbox_swap_case_write_config(struct udevice *emul, uint offset, int barnum; u32 *bar; - barnum = offset_to_barnum(offset); + barnum = pci_offset_to_barnum(offset); bar = &plat->bar[barnum]; debug("w bar %d=%lx\n", barnum, value); diff --git a/include/pci.h b/include/pci.h index 999a594cddf..2b82b2c5a3e 100644 --- a/include/pci.h +++ b/include/pci.h @@ -215,6 +215,10 @@ #define PCI_BASE_ADDRESS_IO_MASK (~0x03ULL) /* bit 1 is reserved if address_space = 1 */ +/* Convert a regsister address (e.g. PCI_BASE_ADDRESS_1) to a bar # (e.g. 1) */ +#define pci_offset_to_barnum(offset) \ + (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32)) + /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c -- cgit v1.2.3 From 189882c9337bd4fa0a6b2c5de3031cd6f4b8e262 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:07 -0600 Subject: sandbox: Add a -T flag to use the test device tree U-Boot already supports using -D to indicate that it should use the normal device tree. It is sometimes useful to run with the test device tree, e.g. when running a test. Add a -T option for this along with some documentation. It can be used like this: /tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev" (this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT) Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- arch/sandbox/cpu/start.c | 25 +++++++++++++++++++++++++ doc/arch/sandbox.rst | 9 +++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 82828f0c1d4..cfc542c8066 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -147,6 +147,31 @@ static int sandbox_cmdline_cb_default_fdt(struct sandbox_state *state, SANDBOX_CMDLINE_OPT_SHORT(default_fdt, 'D', 0, "Use the default u-boot.dtb control FDT in U-Boot directory"); +static int sandbox_cmdline_cb_test_fdt(struct sandbox_state *state, + const char *arg) +{ + const char *fmt = "/arch/sandbox/dts/test.dtb"; + char *p; + char *fname; + int len; + + len = strlen(state->argv[0]) + strlen(fmt) + 1; + fname = os_malloc(len); + if (!fname) + return -ENOMEM; + strcpy(fname, state->argv[0]); + p = strrchr(fname, '/'); + if (!p) + p = fname + strlen(fname); + len -= p - fname; + snprintf(p, len, fmt, p); + state->fdt_fname = fname; + + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(test_fdt, 'T', 0, + "Use the test.dtb control FDT in U-Boot directory"); + static int sandbox_cmdline_cb_interactive(struct sandbox_state *state, const char *arg) { diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst index 5c0caebcbf0..54933b56759 100644 --- a/doc/arch/sandbox.rst +++ b/doc/arch/sandbox.rst @@ -103,6 +103,8 @@ A device tree binary file can be provided with -d. If you edit the source (it is stored at arch/sandbox/dts/sandbox.dts) you must rebuild U-Boot to recreate the binary file. +To use the default device tree, use -D. To use the test device tree, use -T. + To execute commands directly, use the -c option. You can specify a single command, or multiple commands separated by a semicolon, as is normal in U-Boot. Be careful with quoting as the shell will normally process and @@ -499,6 +501,13 @@ run natively on your board if desired (and enabled). To run all tests use "make check". +To run a single test in an existing sandbox build, you can use -T to use the +test device tree, and -c to select the test: + + /tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev" + +This runs dm_test_pci_busdev() which is in test/dm/pci.c + Memory Map ---------- -- cgit v1.2.3 From b0e2c23d3ea7786492178302758712e498bba380 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:08 -0600 Subject: sandbox: pci: Increase the memory space Increase the memory space so we can support the p2sb bus which needs multiples of 1MB. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/sandbox/dts/test.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 50d245ae917..5e859ba11d9 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -447,7 +447,7 @@ device_type = "pci"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 + ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 0x01000000 0 0x20000000 0x20000000 0 0x2000>; pci@0,0 { compatible = "pci-generic"; -- cgit v1.2.3 From e77663cf747b4c01fc72e3af1c72996a0f586613 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:09 -0600 Subject: sandbox: Allow use of real I/O with readl(), etc. At present these functions are stubbed out. For more comprehensive testing with PCI devices it is useful to be able to fully emulate I/O access. Add simple implementations for these. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: change to use 'const void *' in sandbox_write(); cast 'addr' in read/write macros in arch/sandbox/include/asm/io.h; remove the unnecessary cast in readq/writeq in nvme.h] Signed-off-by: Bin Meng --- arch/sandbox/cpu/cpu.c | 52 ++++++++++++++++++++++++++++++++++++++++ arch/sandbox/include/asm/io.h | 28 +++++++++++++++------- arch/sandbox/include/asm/state.h | 1 + 3 files changed, 72 insertions(+), 9 deletions(-) diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index fdfb209f77d..2046cb53c4a 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -225,6 +225,58 @@ phys_addr_t map_to_sysmem(const void *ptr) return mentry->tag; } +unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size) +{ + struct sandbox_state *state = state_get_current(); + + if (!state->allow_memio) + return 0; + + switch (size) { + case SB_SIZE_8: + return *(u8 *)addr; + case SB_SIZE_16: + return *(u16 *)addr; + case SB_SIZE_32: + return *(u32 *)addr; + case SB_SIZE_64: + return *(u64 *)addr; + } + + return 0; +} + +void sandbox_write(const void *addr, unsigned int val, + enum sandboxio_size_t size) +{ + struct sandbox_state *state = state_get_current(); + + if (!state->allow_memio) + return; + + switch (size) { + case SB_SIZE_8: + *(u8 *)addr = val; + break; + case SB_SIZE_16: + *(u16 *)addr = val; + break; + case SB_SIZE_32: + *(u32 *)addr = val; + break; + case SB_SIZE_64: + *(u64 *)addr = val; + break; + } +} + +void sandbox_set_enable_memio(bool enable) +{ + struct sandbox_state *state = state_get_current(); + + state->allow_memio = enable; +} + void sandbox_set_enable_pci_map(int enable) { enable_pci_map = enable; diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 481787b516b..4a35c419723 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -6,6 +6,13 @@ #ifndef __SANDBOX_ASM_IO_H #define __SANDBOX_ASM_IO_H +enum sandboxio_size_t { + SB_SIZE_8, + SB_SIZE_16, + SB_SIZE_32, + SB_SIZE_64, +}; + void *phys_to_virt(phys_addr_t paddr); #define phys_to_virt phys_to_virt @@ -38,18 +45,21 @@ static inline void unmap_sysmem(const void *vaddr) /* Map from a pointer to our RAM buffer */ phys_addr_t map_to_sysmem(const void *ptr); -/* Define nops for sandbox I/O access */ -#define readb(addr) ((void)addr, 0) -#define readw(addr) ((void)addr, 0) -#define readl(addr) ((void)addr, 0) +unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size); +void sandbox_write(const void *addr, unsigned int val, + enum sandboxio_size_t size); + +#define readb(addr) sandbox_read((const void *)addr, SB_SIZE_8) +#define readw(addr) sandbox_read((const void *)addr, SB_SIZE_16) +#define readl(addr) sandbox_read((const void *)addr, SB_SIZE_32) #ifdef CONFIG_SANDBOX64 -#define readq(addr) ((void)addr, 0) +#define readq(addr) sandbox_read((const void *)addr, SB_SIZE_64) #endif -#define writeb(v, addr) ((void)addr) -#define writew(v, addr) ((void)addr) -#define writel(v, addr) ((void)addr) +#define writeb(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_8) +#define writew(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_16) +#define writel(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_32) #ifdef CONFIG_SANDBOX64 -#define writeq(v, addr) ((void)addr) +#define writeq(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_64) #endif /* diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index 2d773d3fa6b..ad3e94beb9a 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -102,6 +102,7 @@ struct sandbox_state { ulong next_tag; /* Next address tag to allocate */ struct list_head mapmem_head; /* struct sandbox_mapmem_entry */ bool hwspinlock; /* Hardware Spinlock status */ + bool allow_memio; /* Allow readl() etc. to work */ /* * This struct is getting large. -- cgit v1.2.3 From 9b69ba4a787209da59e69fd4e411ab6561b0447f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:10 -0600 Subject: pci: sandbox: Move the emulators into their own node Sandbox pci works using emulation drivers which are currently children of the pci device: pci-controller { pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; emul@1f,0 { compatible = "sandbox,swap-case"; }; }; }; In this case the emulation device is attached to pci device on address f800 (device 1f, function 0) and provides the swap-case functionality. However this is not ideal, since every device on a PCI bus has a child device. This is only really the case for sandbox, but we want to avoid special-case code for sandbox. Worse, child devices cannot be probed before their parents. This forces us to use 'find' rather than 'get' to obtain the emulator device. In fact the emulator devices are never probed. There is code in sandbox_pci_emul_post_probe() which tries to track when emulators are active, but at present this does not work. A better approach seems to be to add a separate node elsewhere in the device tree, an 'emulation parent'. This could be given a bogus address (such as -1) to hide the emulators away from the 'pci' command, but it seems better to keep it at the root node to avoid such hacks. Then we can use a phandle to point from the device to the correct emulator, and only on sandbox. The code to find an emulator does not interfere with normal pci operation. Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator given a bus, and finding a bus given an emulator. Update the existing device trees and the code for finding an emulator. This brings PCI emulators more into line with I2C. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: fix 3 typos in the commit message; encode bus number in the labels of swap_case_emul nodes; mention commit 4345998ae9df in sandbox_pci_get_emul()] Signed-off-by: Bin Meng --- arch/sandbox/dts/sandbox.dtsi | 11 ++++++++--- arch/sandbox/dts/test.dts | 38 +++++++++++++++++++++++++------------- doc/driver-model/pci-info.rst | 23 ++++++++++++----------- drivers/pci/pci-emul-uclass.c | 36 ++++++++++++++++++++++++++++++------ include/dm/uclass-id.h | 1 + 5 files changed, 76 insertions(+), 33 deletions(-) diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index c6d5650c20b..f09bc70b0da 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -103,9 +103,14 @@ pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul>; + }; + }; + + emul { + compatible = "sandbox,pci-emul-parent"; + swap_case_emul: emul@1f,0 { + compatible = "sandbox,swap-case"; }; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 5e859ba11d9..b6d09600976 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -452,24 +452,31 @@ pci@0,0 { compatible = "pci-generic"; reg = <0x0000 0 0 0 0>; - emul@0,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul0_0>; }; pci@1,0 { compatible = "pci-generic"; reg = <0x0800 0 0 0 0>; - emul@0,0 { - compatible = "sandbox,swap-case"; - use-ea; - }; + sandbox,emul = <&swap_case_emul0_1>; }; pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul0_1f>; + }; + }; + + pci-emul0 { + compatible = "sandbox,pci-emul-parent"; + swap_case_emul0_0: emul0@0,0 { + compatible = "sandbox,swap-case"; + }; + swap_case_emul0_1: emul0@1,0 { + compatible = "sandbox,swap-case"; + use-ea; + }; + swap_case_emul0_1f: emul0@1f,0 { + compatible = "sandbox,swap-case"; }; }; @@ -499,9 +506,14 @@ pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul2_1f>; + }; + }; + + pci-emul2 { + compatible = "sandbox,pci-emul-parent"; + swap_case_emul2_1f: emul2@1f,0 { + compatible = "sandbox,swap-case"; }; }; diff --git a/doc/driver-model/pci-info.rst b/doc/driver-model/pci-info.rst index d93ab8b61d5..f39ff990a67 100644 --- a/doc/driver-model/pci-info.rst +++ b/doc/driver-model/pci-info.rst @@ -113,14 +113,17 @@ Sandbox ------- With sandbox we need a device emulator for each device on the bus since there -is no real PCI bus. This works by looking in the device tree node for a -driver. For example:: - +is no real PCI bus. This works by looking in the device tree node for an +emulator driver. For example:: pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { + sandbox,emul = <&emul_1f>; + }; + pci-emul { + compatible = "sandbox,pci-emul-parent"; + emul_1f: emul@1f,0 { compatible = "sandbox,swap-case"; }; }; @@ -130,14 +133,16 @@ Note that the first cell in the 'reg' value is the bus/device/function. See PCI_BDF() for the encoding (it is also specified in the IEEE Std 1275-1994 PCI bus binding document, v2.1) +The pci-emul node should go outside the pci bus node, since otherwise it will +be scanned as a PCI device, causing confusion. + When this bus is scanned we will end up with something like this:: `- * pci-controller @ 05c660c8, 0 `- pci@1f,0 @ 05c661c8, 63488 - `- emul@1f,0 @ 05c662c8 + `- emul@1f,0 @ 05c662c8 -When accesses go to the pci@1f,0 device they are forwarded to its child, the -emulator. +When accesses go to the pci@1f,0 device they are forwarded to its emulator. The sandbox PCI drivers also support dynamic driver binding, allowing device driver to declare the driver binding information via U_BOOT_PCI_DEVICE(), @@ -164,7 +169,3 @@ When this bus is scanned we will end up with something like this:: pci [ + ] pci_sandbo |-- pci-controller1 pci_emul [ ] sandbox_sw | |-- sandbox_swap_case_emul pci_emul [ ] sandbox_sw | `-- sandbox_swap_case_emul - -Note the difference from the statically declared device nodes is that the -device is directly attached to the host controller, instead of via a container -device like pci@1f,0. diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c index 38227583547..6b4efcea37d 100644 --- a/drivers/pci/pci-emul-uclass.c +++ b/drivers/pci/pci-emul-uclass.c @@ -10,6 +10,7 @@ #include #include #include +#include struct sandbox_pci_emul_priv { int dev_count; @@ -30,13 +31,14 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, } *containerp = dev; - if (device_get_uclass_id(dev) == UCLASS_PCI_GENERIC) { - ret = device_find_first_child(dev, emulp); - if (ret) - return ret; - } else { + /* + * See commit 4345998ae9df, + * "pci: sandbox: Support dynamically binding device driver" + */ + ret = uclass_find_device_by_phandle(UCLASS_PCI_EMUL, dev, + "sandbox,emul", emulp); + if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) *emulp = dev; - } return *emulp ? 0 : -ENODEV; } @@ -68,3 +70,25 @@ UCLASS_DRIVER(pci_emul) = { .pre_remove = sandbox_pci_emul_pre_remove, .priv_auto_alloc_size = sizeof(struct sandbox_pci_emul_priv), }; + +/* + * This uclass is a child of the pci bus. Its platdata is not defined here so + * is defined by its parent, UCLASS_PCI, which uses struct pci_child_platdata. + * See per_child_platdata_auto_alloc_size in UCLASS_DRIVER(pci). + */ +UCLASS_DRIVER(pci_emul_parent) = { + .id = UCLASS_PCI_EMUL_PARENT, + .name = "pci_emul_parent", + .post_bind = dm_scan_fdt_dev, +}; + +static const struct udevice_id pci_emul_parent_ids[] = { + { .compatible = "sandbox,pci-emul-parent" }, + { } +}; + +U_BOOT_DRIVER(pci_emul_parent_drv) = { + .name = "pci_emul_parent_drv", + .id = UCLASS_PCI_EMUL_PARENT, + .of_match = pci_emul_parent_ids, +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index d4d96106b37..f431f3bf294 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -23,6 +23,7 @@ enum uclass_id { UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */ UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ + UCLASS_PCI_EMUL_PARENT, /* parent for PCI device emulators */ UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ -- cgit v1.2.3 From be0d8fa452a4b6ed09a4228980052c35ef7331e0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 31 Aug 2019 17:59:32 -0600 Subject: pci: sandbox: Probe PCI emulation devices when used At present PCI emulation devices are not probed before use, since they used to be children of the device that used them, and children cannot be probed before their parents. Now that PCI emulation devices are attached to the root node, we can simply probe them, and avoid using the internal function. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng --- drivers/pci/pci-emul-uclass.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c index 6b4efcea37d..fd87b3ea4e6 100644 --- a/drivers/pci/pci-emul-uclass.c +++ b/drivers/pci/pci-emul-uclass.c @@ -10,7 +10,6 @@ #include #include #include -#include struct sandbox_pci_emul_priv { int dev_count; @@ -35,8 +34,8 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, * See commit 4345998ae9df, * "pci: sandbox: Support dynamically binding device driver" */ - ret = uclass_find_device_by_phandle(UCLASS_PCI_EMUL, dev, - "sandbox,emul", emulp); + ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul", + emulp); if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) *emulp = dev; -- cgit v1.2.3 From 0911569b285c82dcda166c46d689bc561272995c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:12 -0600 Subject: pci: Show the result of binding a device Update the debugging info a little to show the result of trying to bind a PCI device. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/pci/pci-uclass.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index ab3e1310eb5..4c84c656856 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -790,7 +790,7 @@ int pci_bind_bus_devices(struct udevice *bus) if (!PCI_FUNC(bdf)) found_multi = header_type & 0x80; - debug("%s: bus %d/%s: found device %x, function %d\n", __func__, + debug("%s: bus %d/%s: found device %x, function %d", __func__, bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf)); pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device, PCI_SIZE_16); @@ -800,6 +800,7 @@ int pci_bind_bus_devices(struct udevice *bus) /* Find this device in the device tree */ ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev); + debug(": find ret=%d\n", ret); /* If nothing in the device tree, bind a device */ if (ret == -ENODEV) { -- cgit v1.2.3 From 90c668605fa81ab5046a8b05c7a1fa858811d4bf Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:13 -0600 Subject: pci: Disable autoconfig in SPL At present U-Boot runs autoconfig in SPL but this is best left to U-Boot proper. For TPL and SPL we can normally used fixed BARs and save code size and time. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/pci/pci-uclass.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 4c84c656856..896cb6b23a1 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -983,7 +983,7 @@ static int pci_uclass_post_probe(struct udevice *bus) if (ret) return ret; -#ifdef CONFIG_PCI_PNP +#if CONFIG_IS_ENABLED(PCI_PNP) ret = pci_auto_config_devices(bus); if (ret < 0) return ret; -- cgit v1.2.3 From bdaa976153b29c88822e6c196e48f6ad2f881846 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:14 -0600 Subject: pci: Correct 'specifified' and 'Plese' typos Fix these spelling errors the header file and documentation. Fix a small typo in the PCI documentation. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- doc/driver-model/pci-info.rst | 2 +- include/pci.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/driver-model/pci-info.rst b/doc/driver-model/pci-info.rst index f39ff990a67..3c1b1adf077 100644 --- a/doc/driver-model/pci-info.rst +++ b/doc/driver-model/pci-info.rst @@ -103,7 +103,7 @@ in each of these nodes. If PCI devices are not listed in the device tree, U_BOOT_PCI_DEVICE can be used to specify the driver to use for the device. The device tree takes precedence -over U_BOOT_PCI_DEVICE. Plese note with U_BOOT_PCI_DEVICE, only drivers with +over U_BOOT_PCI_DEVICE. Please note with U_BOOT_PCI_DEVICE, only drivers with DM_FLAG_PRE_RELOC will be bound before relocation. If neither device tree nor U_BOOT_PCI_DEVICE is provided, the built-in driver (either pci_bridge_drv or pci_generic_drv) will be used. diff --git a/include/pci.h b/include/pci.h index 2b82b2c5a3e..8aa6636cfbf 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1595,7 +1595,7 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, /** * pci_get_devfn() - Extract the devfn from fdt_pci_addr of the device * - * Get devfn from fdt_pci_addr of the specifified device + * Get devfn from fdt_pci_addr of the specified device * * @dev: PCI device * @return devfn in bits 15...8 if found, -ENODEV if not found -- cgit v1.2.3 From f365152a55e6619d5f87d851790e329f7b441b61 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:15 -0600 Subject: pci: Add more debug detail when resources are exhausted If PCI auto-config runs out of memory, show a few more details to help diagnose the problem. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: change %x to %llx to avoid build warnings on some platforms] Signed-off-by: Bin Meng --- drivers/pci/pci_auto_common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c index 84908e6154c..86903166101 100644 --- a/drivers/pci/pci_auto_common.c +++ b/drivers/pci/pci_auto_common.c @@ -45,7 +45,9 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, addr = ((res->bus_lower - 1) | (size - 1)) + 1; if (addr - res->bus_start + size > res->size) { - debug("No room in resource"); + debug("No room in resource, avail start=%llx / size=%llx, " + "need=%llx\n", (unsigned long long)res->bus_lower, + (unsigned long long)res->size, (unsigned long long)size); goto error; } -- cgit v1.2.3 From 6a73cf3d8fe32f3bddd4ba7dd47dcb75df5ca592 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:16 -0600 Subject: pci: Show a message if PCI autoconfig fails At present this fails silently which can be confusing since some devices on the PCI bus may not work correctly. Show a message in this case. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: add a '\n' in the PCI autoconfig fail message] Signed-off-by: Bin Meng --- drivers/pci/pci_auto.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 1a3bf708347..28667bde8da 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -39,6 +39,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num, for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { + int ret = 0; + /* Tickle the BAR and get the response */ if (!enum_only) dm_pci_write_config32(dev, bar, 0xffffffff); @@ -97,9 +99,13 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num, (unsigned long long)bar_size); } - if (!enum_only && pciauto_region_allocate(bar_res, bar_size, - &bar_value, - found_mem64) == 0) { + if (!enum_only) { + ret = pciauto_region_allocate(bar_res, bar_size, + &bar_value, found_mem64); + if (ret) + printf("PCI: Failed autoconfig bar %x\n", bar); + } + if (!enum_only && !ret) { /* Write it out and update our limit */ dm_pci_write_config32(dev, bar, (u32)bar_value); -- cgit v1.2.3 From 33c215af4b9de32e5052bb716411dc34ce9b63ac Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 15 Sep 2019 12:08:58 -0600 Subject: dm: pci: Add a function to read a PCI BAR At present PCI address transaction is not supported so drivers must manually read the correct BAR after reading the device tree info. The ns16550 has a suitable implementation, so move this code into the core DM support. Note that there is no live-tree equivalent at present. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: correct the unclear comments in test.dts] Signed-off-by: Bin Meng --- arch/sandbox/dts/test.dts | 7 +++++-- drivers/core/fdtaddr.c | 33 +++++++++++++++++++++++++++++++++ drivers/core/read.c | 11 +++++++++++ drivers/serial/ns16550.c | 31 +------------------------------ include/dm/fdtaddr.h | 8 ++++++++ include/dm/read.h | 25 +++++++++++++++++++++++++ test/dm/pci.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 128 insertions(+), 32 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index b6d09600976..25cac056bbd 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -456,12 +456,15 @@ }; pci@1,0 { compatible = "pci-generic"; - reg = <0x0800 0 0 0 0>; + /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ + reg = <0x02000814 0 0 0 0 + 0x01000810 0 0 0 0>; sandbox,emul = <&swap_case_emul0_1>; }; pci@1f,0 { compatible = "pci-generic"; - reg = <0xf800 0 0 0 0>; + /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ + reg = <0x0100f810 0 0 0 0>; sandbox,emul = <&swap_case_emul0_1f>; }; }; diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index 6850003a287..c9a941116a3 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -190,3 +190,36 @@ void *devfdt_map_physmem(struct udevice *dev, unsigned long size) return map_physmem(addr, size, MAP_NOCACHE); } + +fdt_addr_t devfdt_get_addr_pci(struct udevice *dev) +{ + ulong addr; + + addr = devfdt_get_addr(dev); + if (CONFIG_IS_ENABLED(PCI) && IS_ENABLED(CONFIG_DM_PCI) && + addr == FDT_ADDR_T_NONE) { + struct fdt_pci_addr pci_addr; + u32 bar; + int ret; + + ret = fdtdec_get_pci_addr(gd->fdt_blob, + dev_of_offset(dev), + FDT_PCI_SPACE_MEM32, "reg", + &pci_addr); + if (ret) { + /* try if there is any i/o-mapped register */ + ret = fdtdec_get_pci_addr(gd->fdt_blob, + dev_of_offset(dev), + FDT_PCI_SPACE_IO, "reg", + &pci_addr); + if (ret) + return FDT_ADDR_T_NONE; + } + ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); + if (ret) + return FDT_ADDR_T_NONE; + addr = bar; + } + + return addr; +} diff --git a/drivers/core/read.c b/drivers/core/read.c index fb3dcd9a790..9602e52d1b1 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -307,3 +307,14 @@ int dev_read_alias_highest_id(const char *stem) return fdtdec_get_alias_highest_id(gd->fdt_blob, stem); } + +fdt_addr_t dev_read_addr_pci(struct udevice *dev) +{ + ulong addr; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE && !of_live_active()) + addr = devfdt_get_addr_pci(dev); + + return addr; +} diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 01f334938ea..754b6e99215 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -440,36 +440,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) int err; /* try Processor Local Bus device first */ - addr = dev_read_addr(dev); -#if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI) - if (addr == FDT_ADDR_T_NONE) { - /* then try pci device */ - struct fdt_pci_addr pci_addr; - u32 bar; - int ret; - - /* we prefer to use a memory-mapped register */ - ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), - FDT_PCI_SPACE_MEM32, "reg", - &pci_addr); - if (ret) { - /* try if there is any i/o-mapped register */ - ret = fdtdec_get_pci_addr(gd->fdt_blob, - dev_of_offset(dev), - FDT_PCI_SPACE_IO, - "reg", &pci_addr); - if (ret) - return ret; - } - - ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); - if (ret) - return ret; - - addr = bar; - } -#endif - + addr = dev_read_addr_pci(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h index 57b326cb336..959d3bc2d69 100644 --- a/include/dm/fdtaddr.h +++ b/include/dm/fdtaddr.h @@ -138,4 +138,12 @@ fdt_addr_t devfdt_get_addr_name(struct udevice *dev, const char *name); fdt_addr_t devfdt_get_addr_size_name(struct udevice *dev, const char *name, fdt_size_t *size); +/** + * devfdt_get_addr_pci() - Read an address and handle PCI address translation + * + * @dev: Device to read from + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t devfdt_get_addr_pci(struct udevice *dev); + #endif diff --git a/include/dm/read.h b/include/dm/read.h index 803daf7620c..d37fcb504d3 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -248,6 +248,26 @@ fdt_addr_t dev_read_addr(struct udevice *dev); */ void *dev_read_addr_ptr(struct udevice *dev); +/** + * dev_read_addr_pci() - Read an address and handle PCI address translation + * + * At present U-Boot does not have address translation logic for PCI in the + * livetree implementation (of_addr.c). This special function supports this for + * the flat tree implementation. + * + * This function should be removed (and code should use dev_read() instead) + * once: + * + * 1. PCI address translation is added; and either + * 2. everything uses livetree where PCI translation is used (which is feasible + * in SPL and U-Boot proper) or PCI address translation is added to + * fdtdec_get_addr() and friends. + * + * @dev: Device to read from + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t dev_read_addr_pci(struct udevice *dev); + /** * dev_remap_addr() - Get the reg property of a device as a * memory-mapped I/O pointer @@ -691,6 +711,11 @@ static inline void *dev_read_addr_ptr(struct udevice *dev) return devfdt_get_addr_ptr(dev); } +static inline fdt_addr_t dev_read_addr_pci(struct udevice *dev) +{ + return devfdt_get_addr_pci(dev); +} + static inline void *dev_remap_addr(struct udevice *dev) { return devfdt_remap_addr(dev); diff --git a/test/dm/pci.c b/test/dm/pci.c index e70b65aea4a..fb93e4c78ae 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -294,3 +294,48 @@ static int dm_test_pci_ea(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_pci_ea, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test the dev_read_addr_pci() function */ +static int dm_test_pci_addr_flat(struct unit_test_state *uts) +{ + struct udevice *swap1f, *swap1; + ulong io_addr, mem_addr; + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f)); + io_addr = dm_pci_read_bar32(swap1f, 0); + ut_asserteq(io_addr, dev_read_addr_pci(swap1f)); + + /* + * This device has both I/O and MEM spaces but the MEM space appears + * first + */ + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1)); + mem_addr = dm_pci_read_bar32(swap1, 1); + ut_asserteq(mem_addr, dev_read_addr_pci(swap1)); + + return 0; +} +DM_TEST(dm_test_pci_addr_flat, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | + DM_TESTF_FLAT_TREE); + +/* + * Test the dev_read_addr_pci() function with livetree. That function is + * not currently fully implemented, in that it fails to return the BAR address. + * Once that is implemented this test can be removed and dm_test_pci_addr_flat() + * can be used for both flattree and livetree by removing the DM_TESTF_FLAT_TREE + * flag above. + */ +static int dm_test_pci_addr_live(struct unit_test_state *uts) +{ + struct udevice *swap1f, *swap1; + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f)); + ut_asserteq(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1f)); + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1)); + ut_asserteq(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1)); + + return 0; +} +DM_TEST(dm_test_pci_addr_live, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | + DM_TESTF_LIVE_TREE); -- cgit v1.2.3 From 4e8de068a3b210c0fea2b29372b25c60c7b6dc9e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:18 -0600 Subject: serial: ns16550: Add a PCI device/function field When this UART is used early in boot (before PCI is set up) it is convenient to store the PCI BDF of the UART so that it can be manually configured. This is useful when it is used as a debug UART, for example. Add a new field to hold this information, so that drivers can simply use the existing platform data. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/ns16550.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/ns16550.h b/include/ns16550.h index 22b89e4d6d1..701efeea855 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -52,6 +52,7 @@ * @reg_width: IO accesses size of registers (in bytes) * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) * @clock: UART base clock speed in Hz + * @bdf: PCI slot/function (pci_dev_t) */ struct ns16550_platdata { unsigned long base; @@ -60,6 +61,9 @@ struct ns16550_platdata { int reg_offset; int clock; u32 fcr; +#if defined(CONFIG_PCI) && defined(CONFIG_SPL) + int bdf; +#endif }; struct udevice; -- cgit v1.2.3 From 7bc4f0f88327bcd3c2daafe969f049dcfab41b00 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 15 Sep 2019 18:10:36 -0600 Subject: binman: Allow verbose output with all commands At present the verbose flag only works for the 'build' command. This is not intended, nor is it useful. Update the code to support the verbose flag and make use of a command exception handler. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng --- tools/binman/control.py | 36 +++++++++++++++--------------------- 1 file changed, 15 insertions(+), 21 deletions(-) diff --git a/tools/binman/control.py b/tools/binman/control.py index 9e7587864ce..cb51bc2dd46 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -468,29 +468,23 @@ def Binman(args): command.Run(pager, fname) return 0 - if args.cmd == 'ls': + if args.cmd in ['ls', 'extract', 'replace']: try: + tout.Init(args.verbosity) tools.PrepareOutputDir(None) - ListEntries(args.image, args.paths) - finally: - tools.FinaliseOutputDir() - return 0 - - if args.cmd == 'extract': - try: - tools.PrepareOutputDir(None) - ExtractEntries(args.image, args.filename, args.outdir, args.paths, - not args.uncompressed) - finally: - tools.FinaliseOutputDir() - return 0 - - if args.cmd == 'replace': - try: - tools.PrepareOutputDir(None) - ReplaceEntries(args.image, args.filename, args.indir, args.paths, - do_compress=not args.compressed, - allow_resize=not args.fix_size, write_map=args.map) + if args.cmd == 'ls': + ListEntries(args.image, args.paths) + + if args.cmd == 'extract': + ExtractEntries(args.image, args.filename, args.outdir, args.paths, + not args.uncompressed) + + if args.cmd == 'replace': + ReplaceEntries(args.image, args.filename, args.indir, args.paths, + do_compress=not args.compressed, + allow_resize=not args.fix_size, write_map=args.map) + except: + raise finally: tools.FinaliseOutputDir() return 0 -- cgit v1.2.3 From 4e185e8dd7aa3ff7618d228ebfaffb507a569c07 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:20 -0600 Subject: binman: Add a base implementation of Entry.ReadChildData() At present this function is not present in the Entry base class so it is hard to find the documentation for it. Move the docs from the section class and expand it a little. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- tools/binman/entry.py | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tools/binman/entry.py b/tools/binman/entry.py index 6a2c6e0d92e..f2f1b967a4d 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -717,6 +717,22 @@ features to produce new behaviours. data = self.section.ReadChildData(self, decomp) return data + def ReadChildData(self, child, decomp=True): + """Read the data for a particular child + + This reads data from the parent and extracts the piece that relates to + the given child. + + Args: + child: Child to read (must be valid) + decomp: True to decompress any compressed data before returning it; + False to return the raw, uncompressed data + + Returns: + Data for the child (bytes) + """ + pass + def LoadData(self, decomp=True): data = self.ReadData(decomp) self.contents_size = len(data) -- cgit v1.2.3 From 2d553c006d46653f3e0367cc5bfe36a9c7128eb5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:21 -0600 Subject: binman: Handle reading data for end-at-4gb sections Some x86 sections have special offsets which currently result in empty data being returned from the 'extract' command. Fix this by taking account of the skip-at-start property. Add a little more debugging while we are here. Signed-off-by: Simon Glass Acked-by: Bin Meng --- tools/binman/entry.py | 6 ++++-- tools/binman/etype/section.py | 16 +++++----------- tools/binman/image.py | 2 ++ 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/tools/binman/entry.py b/tools/binman/entry.py index f2f1b967a4d..fe8e1dd8a57 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -714,17 +714,19 @@ features to produce new behaviours. """ # Use True here so that we get an uncompressed section to work from, # although compressed sections are currently not supported + tout.Debug("ReadChildData section '%s', entry '%s'" % + (self.section.GetPath(), self.GetPath())) data = self.section.ReadChildData(self, decomp) return data def ReadChildData(self, child, decomp=True): - """Read the data for a particular child + """Read the data for a particular child entry This reads data from the parent and extracts the piece that relates to the given child. Args: - child: Child to read (must be valid) + child: Child entry to read data for (must be valid) decomp: True to decompress any compressed data before returning it; False to return the raw, uncompressed data diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 5d34fc546af..8179daf5628 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -500,18 +500,12 @@ class Entry_section(Entry): return data def ReadChildData(self, child, decomp=True): - """Read the data for a particular child entry - - Args: - child: Child entry to read data for - decomp: True to return uncompressed data, False to leave the data - compressed if it is compressed - - Returns: - Data contents of entry - """ + tout.Debug("ReadChildData for child '%s'" % child.GetPath()) parent_data = self.ReadData(True) - data = parent_data[child.offset:child.offset + child.size] + offset = child.offset - self._skip_at_start + tout.Debug("Extract for child '%s': offset %#x, skip_at_start %#x, result %#x" % + (child.GetPath(), child.offset, self._skip_at_start, offset)) + data = parent_data[offset:offset + child.size] if decomp: indata = data data = tools.Decompress(indata, child.compress) diff --git a/tools/binman/image.py b/tools/binman/image.py index 7b39a1ddcec..2beab7fd4d2 100644 --- a/tools/binman/image.py +++ b/tools/binman/image.py @@ -201,6 +201,8 @@ class Image(section.Entry_section): return entry def ReadData(self, decomp=True): + tout.Debug("Image '%s' ReadData(), size=%#x" % + (self.GetPath(), len(self._data))) return self._data def GetListEntries(self, entry_paths): -- cgit v1.2.3 From 0b7ebee38e5d9167360bc756fcfb72af8badc74f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:22 -0600 Subject: binman: Take account of skip-at-start with image-header The image-header currently sets it offset assuming that skip-at-start is zero. This does not work on x86 where offsets end at 4GB. Add in this value so that the offset is correct. Signed-off-by: Simon Glass Acked-by: Bin Meng --- tools/binman/etype/image_header.py | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/binman/etype/image_header.py b/tools/binman/etype/image_header.py index 4b69eda1a22..b9327dd799b 100644 --- a/tools/binman/etype/image_header.py +++ b/tools/binman/etype/image_header.py @@ -100,6 +100,7 @@ class Entry_image_header(Entry): offset = offset else: offset = image_size - IMAGE_HEADER_LEN + offset += self.section.GetStartOffset() return Entry.Pack(self, offset) def ProcessContents(self): -- cgit v1.2.3 From fd42948fc9868207573992eaabf4f3e8144a3d1e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:23 -0600 Subject: log: Add log_nop() to avoid unused-variable warnings If a log statement includes a variable and logging is disabled, this can generate warnings about unused variables. Add a bit more complexity to the macros to avoid this for the common case. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/log.h | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/include/log.h b/include/log.h index 6d15e955d7e..d8f18a6afdf 100644 --- a/include/log.h +++ b/include/log.h @@ -76,6 +76,18 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, int line, const char *func, const char *fmt, ...) __attribute__ ((format (__printf__, 6, 7))); +static inline int _log_nop(enum log_category_t cat, enum log_level_t level, + const char *file, int line, const char *func, + const char *fmt, ...) + __attribute__ ((format (__printf__, 6, 7))); + +static inline int _log_nop(enum log_category_t cat, enum log_level_t level, + const char *file, int line, const char *func, + const char *fmt, ...) +{ + return 0; +} + /* Define this at the top of a file to add a prefix to debug messages */ #ifndef pr_fmt #define pr_fmt(fmt) fmt @@ -101,13 +113,14 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, #define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #else #define _LOG_MAX_LEVEL LOGL_INFO -#define log_err(_fmt...) -#define log_warning(_fmt...) -#define log_notice(_fmt...) -#define log_info(_fmt...) -#define log_debug(_fmt...) -#define log_content(_fmt...) -#define log_io(_fmt...) +#define log_err(_fmt...) log_nop(LOG_CATEGORY, LOGL_ERR, ##_fmt) +#define log_warning(_fmt...) log_nop(LOG_CATEGORY, LOGL_WARNING, ##_fmt) +#define log_notice(_fmt...) log_nop(LOG_CATEGORY, LOGL_NOTICE, ##_fmt) +#define log_info(_fmt...) log_nop(LOG_CATEGORY, LOGL_INFO, ##_fmt) +#define log_debug(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG, ##_fmt) +#define log_content(_fmt...) log_nop(LOG_CATEGORY, \ + LOGL_DEBUG_CONTENT, ##_fmt) +#define log_io(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #endif #if CONFIG_IS_ENABLED(LOG) @@ -129,6 +142,12 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, #define log(_cat, _level, _fmt, _args...) #endif +#define log_nop(_cat, _level, _fmt, _args...) ({ \ + int _l = _level; \ + _log_nop((enum log_category_t)(_cat), _l, __FILE__, __LINE__, \ + __func__, pr_fmt(_fmt), ##_args); \ +}) + #ifdef DEBUG #define _DEBUG 1 #else -- cgit v1.2.3 From e37d963ec80351e51c3b0832d9306bd91b1dafbf Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:24 -0600 Subject: cros_ec: Add MEC_EMI_BASE and size to the header file Provide these values which are part of the EC interface now. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/ec_commands.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/ec_commands.h b/include/ec_commands.h index 392c1f1a43a..444ba61e591 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -71,6 +71,10 @@ #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ +/* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource */ +#define MEC_EMI_BASE 0x800 +#define MEC_EMI_SIZE 8 + #define EC_LPC_ADDR_MEMMAP 0x900 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ -- cgit v1.2.3 From 9da3776bf6d782be47edcc8f15b89d1ffbd33724 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:25 -0600 Subject: iod: Enhance to support display of multiple values At present the 'iod' command differs from 'md' in that it only shows a single value. It is useful to see a dump of multiple values, particularly when x86 peripherals contain register sets accessible via I/O ports. Enhance the command to match md. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: correct multi-line comment format style] Signed-off-by: Bin Meng --- cmd/io.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 66 insertions(+), 19 deletions(-) diff --git a/cmd/io.c b/cmd/io.c index 79faf814ff7..7fee9674a28 100644 --- a/cmd/io.c +++ b/cmd/io.c @@ -11,6 +11,13 @@ #include #include +/* Display values from last command */ +static ulong last_addr, last_size; +static ulong last_length = 0x40; +static ulong base_address; + +#define DISP_LINE_LEN 16 + /* * IO Display * @@ -19,26 +26,66 @@ */ int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - ulong addr; - int size; - - if (argc != 2) + ulong addr, length, bytes; + u8 buf[DISP_LINE_LEN]; + int size, todo; + + /* + * We use the last specified parameters, unless new ones are + * entered. + */ + addr = last_addr; + size = last_size; + length = last_length; + + if (argc < 2) return CMD_RET_USAGE; - size = cmd_get_data_size(argv[0], 4); - if (size < 0) - return 1; - - addr = simple_strtoul(argv[1], NULL, 16); - - printf("%04x: ", (u16) addr); - - if (size == 4) - printf("%08x\n", inl(addr)); - else if (size == 2) - printf("%04x\n", inw(addr)); - else - printf("%02x\n", inb(addr)); + if ((flag & CMD_FLAG_REPEAT) == 0) { + /* + * New command specified. Check for a size specification. + * Defaults to long if no or incorrect specification. + */ + size = cmd_get_data_size(argv[0], 4); + if (size < 0) + return 1; + + /* Address is specified since argc > 1 */ + addr = simple_strtoul(argv[1], NULL, 16); + addr += base_address; + + /* + * If another parameter, it is the length to display. + * Length is the number of objects, not number of bytes. + */ + if (argc > 2) + length = simple_strtoul(argv[2], NULL, 16); + } + + bytes = size * length; + + /* Print the lines */ + for (; bytes > 0; addr += todo) { + u8 *ptr = buf; + int i; + + todo = min(bytes, (ulong)DISP_LINE_LEN); + for (i = 0; i < todo; i += size, ptr += size) { + if (size == 4) + *(u32 *)ptr = inl(addr + i); + else if (size == 2) + *(u16 *)ptr = inw(addr + i); + else + *ptr = inb(addr + i); + } + print_buffer(addr, buf, size, todo / size, + DISP_LINE_LEN / size); + bytes -= todo; + } + + last_addr = addr; + last_length = length; + last_size = size; return 0; } @@ -69,7 +116,7 @@ int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) } /**************************************************/ -U_BOOT_CMD(iod, 2, 0, do_io_iod, +U_BOOT_CMD(iod, 3, 1, do_io_iod, "IO space display", "[.b, .w, .l] address"); U_BOOT_CMD(iow, 3, 0, do_io_iow, -- cgit v1.2.3 From 535e07846af6d05eece6e51e4c7b53239d3ac8ba Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:26 -0600 Subject: arm: mxs: Correct CONFIG_SPL_NO_CPU_SUPPORT option At present this is defined in Kconfig but there is a separate one in the CONFIG whitelist. It looks like these are duplicates. Rename the non-Kconfig one and remove it from the whitelist. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/cpu/arm926ejs/Makefile | 2 +- include/configs/mxs.h | 2 +- scripts/config_whitelist.txt | 1 - 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index fdb0c926fb2..b051025bb0a 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -7,7 +7,7 @@ extra-y = start.o obj-y = cpu.o cache.o ifdef CONFIG_SPL_BUILD -ifdef CONFIG_SPL_NO_CPU_SUPPORT_CODE +ifdef CONFIG_SPL_NO_CPU_SUPPORT extra-y := endif endif diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 6cadd720d2b..e079f8035b8 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -45,7 +45,7 @@ /* SPL */ #ifndef CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NO_CPU_SUPPORT_CODE +#define CONFIG_SPL_NO_CPU_SUPPORT #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 5a007d37091..cb855354ae9 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1721,7 +1721,6 @@ CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SOFTECC CONFIG_SPL_NAND_WORKSPACE -CONFIG_SPL_NO_CPU_SUPPORT_CODE CONFIG_SPL_PAD_TO CONFIG_SPL_PANIC_ON_RAW_IMAGE CONFIG_SPL_PBL_PAD -- cgit v1.2.3 From 27084c03d36a7f0e4d7c1679761e81567f1d5442 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:27 -0600 Subject: spl: Allow tiny printf() to be controlled in SPL and TPL At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/Kconfig | 2 +- arch/arm/mach-omap2/Kconfig | 6 +++--- arch/arm/mach-rmobile/Kconfig | 2 +- arch/arm/mach-rmobile/Kconfig.32 | 14 +++++++------- arch/arm/mach-socfpga/Kconfig | 4 ++-- common/spl/Kconfig | 2 +- common/xyzModem.c | 2 +- configs/am335x_pdu001_defconfig | 2 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 2 +- configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig | 2 +- configs/sandbox_spl_defconfig | 2 +- drivers/gpio/gpio-uclass.c | 4 ++-- drivers/mmc/mmc.c | 2 +- drivers/mtd/spi/sf-uclass.c | 2 +- lib/Kconfig | 20 ++++++++++++++++---- lib/Makefile | 2 +- 18 files changed, 43 insertions(+), 31 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3b0e315061a..7086db368fb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -954,7 +954,7 @@ config ARCH_SUNXI select USB if DISTRO_DEFAULTS select USB_KEYBOARD if DISTRO_DEFAULTS select USB_STORAGE if DISTRO_DEFAULTS - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM imply CMD_GPT imply CMD_UBI if NAND diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index ed8056e8718..4c87cbc00f7 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -11,7 +11,7 @@ config OMAP34XX select ARM_ERRATA_454179 select ARM_ERRATA_621766 select ARM_ERRATA_725233 - select USE_TINY_PRINTF if SPL + select SPL_USE_TINY_PRINTF if SPL imply NAND_OMAP_GPMC imply SPL_FS_EXT4 imply SPL_FS_FAT @@ -31,7 +31,7 @@ config OMAP34XX config OMAP44XX bool "OMAP44XX SoC" - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_DISPLAY_PRINT @@ -124,7 +124,7 @@ config AM33XX imply SPL_NAND_SUPPORT imply SYS_I2C_OMAP24XX imply SYS_THUMB_BUILD - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF help Support for AM335x SOC from Texas Instruments. The AM335x high performance SOC features a Cortex-A8 diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index 52ab8914257..8343000c8fa 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -32,7 +32,7 @@ config RCAR_GEN3 imply SPL_SYS_MALLOC_SIMPLE imply SPL_TINY_MEMSET imply SPL_YMODEM_SUPPORT - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF config RZA1 prompt "Renesas ARM SoCs RZ/A1 (32bit)" diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 1441c806920..d5e437f0d2e 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -65,7 +65,7 @@ config TARGET_GOSE select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_KOELSCH @@ -74,7 +74,7 @@ config TARGET_KOELSCH select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_LAGER @@ -83,7 +83,7 @@ config TARGET_LAGER select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_KZM9G @@ -95,7 +95,7 @@ config TARGET_ALT select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_SILK @@ -104,7 +104,7 @@ config TARGET_SILK select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_PORTER @@ -113,7 +113,7 @@ config TARGET_PORTER select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_STOUT @@ -122,7 +122,7 @@ config TARGET_STOUT select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM endchoice diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 1d914648e31..ee79953fcc2 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -45,7 +45,7 @@ config TARGET_SOCFPGA_ARRIA10 select SPL_SYSCON if SPL select ETH_DESIGNWARE_SOCFPGA imply FPGA_SOCFPGA - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF config TARGET_SOCFPGA_CYCLONE5 bool @@ -59,7 +59,7 @@ config TARGET_SOCFPGA_GEN5 imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC imply SPL_STACK_R imply SPL_SYS_MALLOC_SIMPLE - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF config TARGET_SOCFPGA_STRATIX10 bool diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 62b93c112b1..048b85ba7a2 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -963,7 +963,7 @@ config SPL_SERIAL_SUPPORT for displaying messages while SPL is running. It also brings in printf() and panic() functions. This should normally be enabled unless there are space reasons not to. Even then, consider - enabling USE_TINY_PRINTF which is a small printf() version. + enabling SPL_USE_TINY_PRINTF which is a small printf() version. config SPL_SPI_FLASH_SUPPORT bool "Support SPI flash drivers" diff --git a/common/xyzModem.c b/common/xyzModem.c index e85da74a698..6bf2375671d 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -173,7 +173,7 @@ parse_num (char *s, unsigned long *val, char **es, char *delim) } -#if defined(DEBUG) && !defined(CONFIG_USE_TINY_PRINTF) +#if defined(DEBUG) && !CONFIG_IS_ENABLED(USE_TINY_PRINTF) /* * Note: this debug setup works by storing the strings in a fixed buffer */ diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index e69f81b6e54..1a1d58d3cc8 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -51,5 +51,5 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_TPS65910=y CONFIG_CONS_INDEX=4 -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set # CONFIG_EFI_LOADER is not set diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 7aa8c54a128..c45fc68ac3f 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -67,7 +67,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 22ccf526f69..a9e58047acc 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -67,5 +67,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 486a2e089b7..bdfa13a0a71 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -65,7 +65,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index b3c2970207c..01adbf0b192 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -65,5 +65,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 0b3391a2a6b..409b8a38d5e 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -191,7 +191,7 @@ CONFIG_OSD=y CONFIG_SANDBOX_OSD=y CONFIG_FS_CBFS=y CONFIG_FS_CRAMFS=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 01cfa2f7884..90fbed455b8 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -294,7 +294,7 @@ int dm_gpio_request(struct gpio_desc *desc, const char *label) static int dm_gpio_requestf(struct gpio_desc *desc, const char *fmt, ...) { -#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_USE_TINY_PRINTF) +#if !defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(USE_TINY_PRINTF) va_list args; char buf[40]; @@ -343,7 +343,7 @@ int gpio_request(unsigned gpio, const char *label) */ int gpio_requestf(unsigned gpio, const char *fmt, ...) { -#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_USE_TINY_PRINTF) +#if !defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(USE_TINY_PRINTF) va_list args; char buf[40]; diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index c8f71cd0c1b..6bece7f3073 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2577,7 +2577,7 @@ static int mmc_startup(struct mmc *mmc) bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); #if !defined(CONFIG_SPL_BUILD) || \ (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ - !defined(CONFIG_USE_TINY_PRINTF)) + !CONFIG_IS_ENABLED(USE_TINY_PRINTF)) sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), (mmc->cid[3] >> 16) & 0xffff); diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index 719a2fd23ae..c6107522be0 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -66,7 +66,7 @@ int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, char *str; int ret; -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_TINY_PRINTF) +#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(USE_TINY_PRINTF) str = "spi_flash"; #else char name[30]; diff --git a/lib/Kconfig b/lib/Kconfig index 3da45a5ec32..135f0b372b0 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -40,12 +40,12 @@ config PRINTF config SPL_PRINTF bool select SPL_SPRINTF - select SPL_STRTO if !USE_TINY_PRINTF + select SPL_STRTO if !SPL_USE_TINY_PRINTF config TPL_PRINTF bool select TPL_SPRINTF - select TPL_STRTO if !USE_TINY_PRINTF + select TPL_STRTO if !TPL_USE_TINY_PRINTF config SPRINTF bool @@ -95,9 +95,9 @@ config SYS_HZ get_timer() must operate in milliseconds and this option must be set to 1000. -config USE_TINY_PRINTF +config SPL_USE_TINY_PRINTF bool "Enable tiny printf() version" - depends on SPL || TPL + depends on SPL default y help This option enables a tiny, stripped down printf version. @@ -107,6 +107,18 @@ config USE_TINY_PRINTF The supported format specifiers are %c, %s, %u/%d and %x. +config TPL_USE_TINY_PRINTF + bool "Enable tiny printf() version" + depends on TPL + default y if SPL_USE_TINY_PRINTF + help + This option enables a tiny, stripped down printf version. + This should only be used in space limited environments, + like SPL versions with hard memory limits. This version + reduces the code size by about 2.5KiB on armv7. + + The supported format specifiers are %c, %s, %u/%d and %x. + config PANIC_HANG bool "Do not reset the system on fatal error" help diff --git a/lib/Makefile b/lib/Makefile index 2fffd68f943..d248d8626ce 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -106,7 +106,7 @@ obj-y += panic.o ifeq ($(CONFIG_$(SPL_TPL_)BUILD),y) # SPL U-Boot may use full-printf, tiny-printf or none at all -ifdef CONFIG_USE_TINY_PRINTF +ifdef CONFIG_$(SPL_TPL_)USE_TINY_PRINTF obj-$(CONFIG_$(SPL_TPL_)SPRINTF) += tiny-printf.o else obj-$(CONFIG_$(SPL_TPL_)SPRINTF) += vsprintf.o strmhz.o -- cgit v1.2.3 From b51882d0079d3275bdb83ce49fdc8a90133f7f07 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:28 -0600 Subject: spl: Convert CONFIG_SPL_SIZE_LIMIT to hex This is currently a decimal value which is not as convenient or meaningful. Also U-Boot tends to use hex everywhere. Convert this option to hex and add a comment for the size_check macro. Signed-off-by: Simon Glass Reviewed-by: Simon Goldschmidt Acked-by: Bin Meng [bmeng: correct the typo in the commit title] Signed-off-by: Bin Meng --- Makefile | 10 +++++++--- arch/arm/mach-socfpga/Kconfig | 2 +- common/spl/Kconfig | 2 +- configs/evb-rk3288_defconfig | 2 +- configs/tinker-rk3288_defconfig | 2 +- 5 files changed, 11 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index b68cbaf4377..35930393031 100644 --- a/Makefile +++ b/Makefile @@ -337,14 +337,18 @@ endif # KBUILD_MODULES := 1 #endif +# Check ths size of a binary: +# Args: +# $1: File to check +# #2: Size limit in bytes (decimal or 0xhex) define size_check actual=$$( wc -c $1 | awk '{print $$1}'); \ limit=$$( printf "%d" $2 ); \ if test $$actual -gt $$limit; then \ echo "$1 exceeds file size limit:" >&2; \ - echo " limit: $$limit bytes" >&2; \ - echo " actual: $$actual bytes" >&2; \ - echo " excess: $$((actual - limit)) bytes" >&2; \ + echo " limit: $$(printf %#x bytes $$limit) bytes" >&2; \ + echo " actual: $$(printf %#x $$actual) bytes" >&2; \ + echo " excess: $$(printf %#x $$((actual - limit))) bytes" >&2;\ exit 1; \ fi endef diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index ee79953fcc2..45de153aa5a 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -4,7 +4,7 @@ config NR_DRAM_BANKS default 1 config SPL_SIZE_LIMIT - default 65536 if TARGET_SOCFPGA_GEN5 + default 0x10000 if TARGET_SOCFPGA_GEN5 config SPL_SIZE_LIMIT_PROVIDE_STACK default 0x200 if TARGET_SOCFPGA_GEN5 diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 048b85ba7a2..ef4fb19e52c 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -26,7 +26,7 @@ config SPL_FRAMEWORK and the Linux Kernel. If unsure, say Y. config SPL_SIZE_LIMIT - int "Maximum size of SPL image" + hex "Maximum size of SPL image" depends on SPL default 69632 if ARCH_MX6 default 0 diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7b0e908f715..043ee32bb44 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SPL_SIZE_LIMIT=307200 +CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 93286084525..eff3b06b5ce 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SPL_SIZE_LIMIT=307200 +CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -- cgit v1.2.3 From 59c871bca799e1dae0144192d936ac0a3c172686 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:30 -0600 Subject: spl: Allow distinguishing between two phases in U-Boot U-Boot has two distinct phases: before and after relocation. These are commonly referred to as F (running from Flash) and R (Relocated and running from RAM). Some drivers want to do different things in these phases so update the SPL phase function to return a different value for each. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/spl.h | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/include/spl.h b/include/spl.h index 9be8d0ddcf6..c7cc2b0767c 100644 --- a/include/spl.h +++ b/include/spl.h @@ -50,9 +50,10 @@ static inline bool u_boot_first_phase(void) } enum u_boot_phase { - PHASE_TPL, - PHASE_SPL, - PHASE_U_BOOT, + PHASE_TPL, /* Running in TPL */ + PHASE_SPL, /* Running in SPL */ + PHASE_BOARD_F, /* Running in U-Boot before relocation */ + PHASE_BOARD_R, /* Running in U-Boot after relocation */ }; /** @@ -92,7 +93,7 @@ enum u_boot_phase { * * but with this you can use: * - * if (spl_phase() == PHASE_U_BOOT) { + * if (spl_phase() == PHASE_BOARD_F) { * ... * } * @@ -105,7 +106,12 @@ static inline enum u_boot_phase spl_phase(void) #elif CONFIG_SPL_BUILD return PHASE_SPL; #else - return PHASE_U_BOOT; + DECLARE_GLOBAL_DATA_PTR; + + if (!(gd->flags & GD_FLG_RELOC)) + return PHASE_BOARD_F; + else + return PHASE_BOARD_R; #endif } -- cgit v1.2.3 From 49a0f8cc964c612164ef101267f90266279409a7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:32 -0600 Subject: x86: Move acpi_s3.h to a common location At present this hedaer is only available on x86. To allow sandbox to use it for testing, move it to a common location. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/baytrail/acpi.c | 2 +- arch/x86/cpu/cpu.c | 2 +- arch/x86/cpu/wakeup.S | 2 +- arch/x86/include/asm/acpi_s3.h | 130 ---------------------------------------- arch/x86/lib/acpi_s3.c | 2 +- arch/x86/lib/coreboot_table.c | 2 +- arch/x86/lib/fsp/fsp_common.c | 2 +- arch/x86/lib/fsp1/fsp_common.c | 2 +- drivers/pci/pci_rom.c | 2 +- drivers/sysreset/sysreset_x86.c | 2 +- include/acpi_s3.h | 130 ++++++++++++++++++++++++++++++++++++++++ 11 files changed, 139 insertions(+), 139 deletions(-) delete mode 100644 arch/x86/include/asm/acpi_s3.h create mode 100644 include/acpi_s3.h diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 1e3829a433c..f44228e6939 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -4,10 +4,10 @@ */ #include +#include #include #include #include -#include #include #include #include diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 290ee084e5e..9ee4b0294ae 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -19,13 +19,13 @@ */ #include +#include #include #include #include #include #include #include -#include #include #include #include diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S index 663b02f27d8..244ca1276af 100644 --- a/arch/x86/cpu/wakeup.S +++ b/arch/x86/cpu/wakeup.S @@ -5,7 +5,7 @@ * From coreboot src/arch/x86/wakeup.S */ -#include +#include #include #include diff --git a/arch/x86/include/asm/acpi_s3.h b/arch/x86/include/asm/acpi_s3.h deleted file mode 100644 index baa848dcd15..00000000000 --- a/arch/x86/include/asm/acpi_s3.h +++ /dev/null @@ -1,130 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017, Bin Meng - */ - -#ifndef __ASM_ACPI_S3_H__ -#define __ASM_ACPI_S3_H__ - -#define WAKEUP_BASE 0x600 - -/* PM1_STATUS register */ -#define WAK_STS (1 << 15) -#define PCIEXPWAK_STS (1 << 14) -#define RTC_STS (1 << 10) -#define SLPBTN_STS (1 << 9) -#define PWRBTN_STS (1 << 8) -#define GBL_STS (1 << 5) -#define BM_STS (1 << 4) -#define TMR_STS (1 << 0) - -/* PM1_CNT register */ -#define SLP_EN (1 << 13) -#define SLP_TYP_SHIFT 10 -#define SLP_TYP (7 << SLP_TYP_SHIFT) -#define SLP_TYP_S0 0 -#define SLP_TYP_S1 1 -#define SLP_TYP_S3 5 -#define SLP_TYP_S4 6 -#define SLP_TYP_S5 7 - -/* Memory size reserved for S3 resume */ -#define S3_RESERVE_SIZE 0x1000 - -#ifndef __ASSEMBLY__ - -extern char __wakeup[]; -extern int __wakeup_size; - -enum acpi_sleep_state { - ACPI_S0, - ACPI_S1, - ACPI_S2, - ACPI_S3, - ACPI_S4, - ACPI_S5, -}; - -/** - * acpi_ss_string() - get ACPI-defined sleep state string - * - * @pm1_cnt: ACPI-defined sleep state - * @return: a pointer to the sleep state string. - */ -static inline char *acpi_ss_string(enum acpi_sleep_state state) -{ - char *ss_string[] = { "S0", "S1", "S2", "S3", "S4", "S5"}; - - return ss_string[state]; -} - -/** - * acpi_sleep_from_pm1() - get ACPI-defined sleep state from PM1_CNT register - * - * @pm1_cnt: PM1_CNT register value - * @return: ACPI-defined sleep state if given valid PM1_CNT register value, - * -EINVAL otherwise. - */ -static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt) -{ - switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { - case SLP_TYP_S0: - return ACPI_S0; - case SLP_TYP_S1: - return ACPI_S1; - case SLP_TYP_S3: - return ACPI_S3; - case SLP_TYP_S4: - return ACPI_S4; - case SLP_TYP_S5: - return ACPI_S5; - } - - return -EINVAL; -} - -/** - * chipset_prev_sleep_state() - Get chipset previous sleep state - * - * This returns chipset previous sleep state from ACPI registers. - * Platform codes must supply this routine in order to support ACPI S3. - * - * @return ACPI_S0/S1/S2/S3/S4/S5. - */ -enum acpi_sleep_state chipset_prev_sleep_state(void); - -/** - * chipset_clear_sleep_state() - Clear chipset sleep state - * - * This clears chipset sleep state in ACPI registers. - * Platform codes must supply this routine in order to support ACPI S3. - */ -void chipset_clear_sleep_state(void); - -struct acpi_fadt; -/** - * acpi_resume() - Do ACPI S3 resume - * - * This calls U-Boot wake up assembly stub and jumps to OS's wake up vector. - * - * @fadt: FADT table pointer in the ACPI table - * @return: Never returns - */ -void acpi_resume(struct acpi_fadt *fadt); - -/** - * acpi_s3_reserve() - Reserve memory for ACPI S3 resume - * - * This copies memory where real mode interrupt handler stubs reside to the - * reserved place on the stack. - * - * This routine should be called by reserve_arch() before U-Boot is relocated - * when ACPI S3 resume is enabled. - * - * @return: 0 always - */ -int acpi_s3_reserve(void); - -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_ACPI_S3_H__ */ diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c index 03917188a9b..197636c4b50 100644 --- a/arch/x86/lib/acpi_s3.c +++ b/arch/x86/lib/acpi_s3.c @@ -4,8 +4,8 @@ */ #include +#include #include -#include #include #include #include diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c index 2d08a2db0db..8685aa30467 100644 --- a/arch/x86/lib/coreboot_table.c +++ b/arch/x86/lib/coreboot_table.c @@ -4,8 +4,8 @@ */ #include +#include #include -#include #include #include diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index 6678d75ffd5..40ba866d77c 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -4,10 +4,10 @@ */ #include +#include #include #include #include -#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c index 285ef72ebf8..e8066d8de39 100644 --- a/arch/x86/lib/fsp1/fsp_common.c +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -4,10 +4,10 @@ */ #include +#include #include #include #include -#include #include #include #include diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 2cede1211bb..1d4064e3769 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -35,7 +35,7 @@ #include #ifdef CONFIG_X86 -#include +#include DECLARE_GLOBAL_DATA_PTR; #endif diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c index 072f7948efa..8e2d1eaa7a1 100644 --- a/drivers/sysreset/sysreset_x86.c +++ b/drivers/sysreset/sysreset_x86.c @@ -6,11 +6,11 @@ */ #include +#include #include #include #include #include -#include #include #include diff --git a/include/acpi_s3.h b/include/acpi_s3.h new file mode 100644 index 00000000000..baa848dcd15 --- /dev/null +++ b/include/acpi_s3.h @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017, Bin Meng + */ + +#ifndef __ASM_ACPI_S3_H__ +#define __ASM_ACPI_S3_H__ + +#define WAKEUP_BASE 0x600 + +/* PM1_STATUS register */ +#define WAK_STS (1 << 15) +#define PCIEXPWAK_STS (1 << 14) +#define RTC_STS (1 << 10) +#define SLPBTN_STS (1 << 9) +#define PWRBTN_STS (1 << 8) +#define GBL_STS (1 << 5) +#define BM_STS (1 << 4) +#define TMR_STS (1 << 0) + +/* PM1_CNT register */ +#define SLP_EN (1 << 13) +#define SLP_TYP_SHIFT 10 +#define SLP_TYP (7 << SLP_TYP_SHIFT) +#define SLP_TYP_S0 0 +#define SLP_TYP_S1 1 +#define SLP_TYP_S3 5 +#define SLP_TYP_S4 6 +#define SLP_TYP_S5 7 + +/* Memory size reserved for S3 resume */ +#define S3_RESERVE_SIZE 0x1000 + +#ifndef __ASSEMBLY__ + +extern char __wakeup[]; +extern int __wakeup_size; + +enum acpi_sleep_state { + ACPI_S0, + ACPI_S1, + ACPI_S2, + ACPI_S3, + ACPI_S4, + ACPI_S5, +}; + +/** + * acpi_ss_string() - get ACPI-defined sleep state string + * + * @pm1_cnt: ACPI-defined sleep state + * @return: a pointer to the sleep state string. + */ +static inline char *acpi_ss_string(enum acpi_sleep_state state) +{ + char *ss_string[] = { "S0", "S1", "S2", "S3", "S4", "S5"}; + + return ss_string[state]; +} + +/** + * acpi_sleep_from_pm1() - get ACPI-defined sleep state from PM1_CNT register + * + * @pm1_cnt: PM1_CNT register value + * @return: ACPI-defined sleep state if given valid PM1_CNT register value, + * -EINVAL otherwise. + */ +static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt) +{ + switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { + case SLP_TYP_S0: + return ACPI_S0; + case SLP_TYP_S1: + return ACPI_S1; + case SLP_TYP_S3: + return ACPI_S3; + case SLP_TYP_S4: + return ACPI_S4; + case SLP_TYP_S5: + return ACPI_S5; + } + + return -EINVAL; +} + +/** + * chipset_prev_sleep_state() - Get chipset previous sleep state + * + * This returns chipset previous sleep state from ACPI registers. + * Platform codes must supply this routine in order to support ACPI S3. + * + * @return ACPI_S0/S1/S2/S3/S4/S5. + */ +enum acpi_sleep_state chipset_prev_sleep_state(void); + +/** + * chipset_clear_sleep_state() - Clear chipset sleep state + * + * This clears chipset sleep state in ACPI registers. + * Platform codes must supply this routine in order to support ACPI S3. + */ +void chipset_clear_sleep_state(void); + +struct acpi_fadt; +/** + * acpi_resume() - Do ACPI S3 resume + * + * This calls U-Boot wake up assembly stub and jumps to OS's wake up vector. + * + * @fadt: FADT table pointer in the ACPI table + * @return: Never returns + */ +void acpi_resume(struct acpi_fadt *fadt); + +/** + * acpi_s3_reserve() - Reserve memory for ACPI S3 resume + * + * This copies memory where real mode interrupt handler stubs reside to the + * reserved place on the stack. + * + * This routine should be called by reserve_arch() before U-Boot is relocated + * when ACPI S3 resume is enabled. + * + * @return: 0 always + */ +int acpi_s3_reserve(void); + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_ACPI_S3_H__ */ -- cgit v1.2.3 From a827ba910cdbcae6d0a1c2ce7b91b41d00218a4c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 31 Aug 2019 21:23:18 -0600 Subject: x86: pci: Drop the first parameter in pci_x86_r/w_config() This parameter is needed by the PCI driver-mode interface but is always NULL on x86. There are a number of calls to this function so it makes sense to minimise the parameters. Adjust the x86 function to omit the first parameter, and introduce stub functions to handle the conversion. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng --- arch/x86/cpu/broadwell/cpu.c | 7 ++----- arch/x86/cpu/ivybridge/cpu.c | 3 +-- arch/x86/cpu/pci.c | 20 ++++++++------------ arch/x86/include/asm/pci.h | 15 ++++++--------- drivers/pci/pci_x86.c | 16 ++++++++++++++-- 5 files changed, 31 insertions(+), 30 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index bba8cd1e942..297f1e0b682 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -103,11 +103,8 @@ int print_cpuinfo(void) void board_debug_uart_init(void) { - struct udevice *bus = NULL; - /* com1 / com2 decode range */ - pci_x86_write_config(bus, PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16); + pci_x86_write_config(PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16); - pci_x86_write_config(bus, PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, - PCI_SIZE_16); + pci_x86_write_config(PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, PCI_SIZE_16); } diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index c8b16e32c03..6db9da81b71 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -199,6 +199,5 @@ int print_cpuinfo(void) void board_debug_uart_init(void) { /* This enables the debug UART */ - pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN, - PCI_SIZE_16); + pci_x86_write_config(PCH_LPC_DEV, LPC_EN, COMA_LPC_EN, PCI_SIZE_16); } diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index 0ccde194d9a..e1aae158ce5 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -16,12 +16,8 @@ #include #include -/* - * TODO(sjg@chromium.org): Drop the first parameter from each of these - * functions since it is not used. - */ -int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong *valuep, enum pci_size_t size) +int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, + enum pci_size_t size) { outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); switch (size) { @@ -39,8 +35,8 @@ int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, return 0; } -int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong value, enum pci_size_t size) +int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, + enum pci_size_t size) { outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); switch (size) { @@ -58,19 +54,19 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, return 0; } -int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong clr, ulong set, enum pci_size_t size) +int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set, + enum pci_size_t size) { ulong value; int ret; - ret = pci_x86_read_config(bus, bdf, offset, &value, size); + ret = pci_x86_read_config(bdf, offset, &value, size); if (ret) return ret; value &= ~clr; value |= set; - return pci_x86_write_config(bus, bdf, offset, value, size); + return pci_x86_write_config(bdf, offset, value, size); } void pci_assign_irqs(int bus, int device, u8 irq[4]) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index fb1edf3df76..2a720735728 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -22,30 +22,28 @@ * * This function can be called before PCI is set up in driver model. * - * @bus: Bus to read from (ignored, can be NULL) * @bdf: PCI device address: bus, device and function -see PCI_BDF() * @offset: Register offset to read * @valuep: Place to put the returned value * @size: Access size * @return 0 if OK, -ve on error */ -int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong *valuep, enum pci_size_t size); +int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, + enum pci_size_t size); /** * pci_bus_write_config() - Write a configuration value to a device * * This function can be called before PCI is set up in driver model. * - * @bus: Bus to read from (ignored, can be NULL) * @bdf: PCI device address: bus, device and function -see PCI_BDF() * @offset: Register offset to write * @value: Value to write * @size: Access size * @return 0 if OK, -ve on error */ -int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong value, enum pci_size_t size); +int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, + enum pci_size_t size); /** * pci_bus_clrset_config32() - Update a configuration value for a device @@ -53,15 +51,14 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, * The register at @offset is updated to (oldvalue & ~clr) | set. This function * can be called before PCI is set up in driver model. * - * @bus: Bus to read from (ignored, can be NULL) * @bdf: PCI device address: bus, device and function -see PCI_BDF() * @offset: Register offset to update * @clr: Bits to clear * @set: Bits to set * @return 0 if OK, -ve on error */ -int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong clr, ulong set, enum pci_size_t size); +int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set, + enum pci_size_t size); /** * Assign IRQ number to a PCI device diff --git a/drivers/pci/pci_x86.c b/drivers/pci/pci_x86.c index 520ea4649e1..e76a9c6e44f 100644 --- a/drivers/pci/pci_x86.c +++ b/drivers/pci/pci_x86.c @@ -8,9 +8,21 @@ #include #include +static int _pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, + ulong *valuep, enum pci_size_t size) +{ + return pci_x86_read_config(bdf, offset, valuep, size); +} + +static int _pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong value, enum pci_size_t size) +{ + return pci_x86_write_config(bdf, offset, value, size); +} + static const struct dm_pci_ops pci_x86_ops = { - .read_config = pci_x86_read_config, - .write_config = pci_x86_write_config, + .read_config = _pci_x86_read_config, + .write_config = _pci_x86_write_config, }; static const struct udevice_id pci_x86_ids[] = { -- cgit v1.2.3 From e2493a7f5a06854d45175a4aa356ba3a2d810300 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:35 -0600 Subject: x86: Use a common definition of MSR_IA32_PERF_CTL Remove the duplicate definition as it is not needed. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/broadwell/cpu.c | 2 +- arch/x86/cpu/broadwell/cpu_full.c | 2 +- arch/x86/cpu/intel_common/cpu.c | 2 +- arch/x86/include/asm/cpu_common.h | 2 -- 4 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 297f1e0b682..61003a6d68f 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -57,7 +57,7 @@ void set_max_freq(void) } perf_ctl.hi = 0; - msr_write(IA32_PERF_CTL, perf_ctl); + msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("CPU: frequency set to %d MHz\n", ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 9686cf5e0e7..0e3d8781392 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -357,7 +357,7 @@ static void set_max_ratio(void) msr = msr_read(MSR_PLATFORM_INFO); perf_ctl.lo = msr.lo & 0xff00; } - msr_write(IA32_PERF_CTL, perf_ctl); + msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("cpu: frequency set to %d\n", ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 9357626b5a6..3a0d505a321 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -116,7 +116,7 @@ int cpu_intel_get_info(struct cpu_info *info, int bclk) { msr_t msr; - msr = msr_read(IA32_PERF_CTL); + msr = msr_read(MSR_IA32_PERF_CTL); info->cpu_freq = ((msr.lo >> 8) & 0xff) * bclk * 1000000; info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index 5e398bec94c..7ae3bd1c535 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -6,8 +6,6 @@ #ifndef __ASM_CPU_COMMON_H #define __ASM_CPU_COMMON_H -#define IA32_PERF_CTL 0x199 - struct cpu_info; /** -- cgit v1.2.3 From 246ac08b037befab08805750049df75044ab7f6c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:36 -0600 Subject: x86: Add a common function to set CPU thermal target This code appears in a few places, so move it to a common file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/broadwell/cpu_full.c | 20 +------------------- arch/x86/cpu/intel_common/cpu.c | 22 ++++++++++++++++++++++ arch/x86/cpu/ivybridge/model_206ax.c | 25 +++---------------------- arch/x86/include/asm/cpu_common.h | 11 +++++++++++ 4 files changed, 37 insertions(+), 41 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 0e3d8781392..d1f3c07109f 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -495,24 +495,6 @@ static void configure_misc(void) msr_write(MSR_IA32_PACKAGE_THERM_INTERRUPT, msr); } -static void configure_thermal_target(struct udevice *dev) -{ - int tcc_offset; - msr_t msr; - - tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "intel,tcc-offset", 0); - - /* Set TCC activaiton offset if supported */ - msr = msr_read(MSR_PLATFORM_INFO); - if ((msr.lo & (1 << 30)) && tcc_offset) { - msr = msr_read(MSR_TEMPERATURE_TARGET); - msr.lo &= ~(0xf << 24); /* Bits 27:24 */ - msr.lo |= (tcc_offset & 0xf) << 24; - msr_write(MSR_TEMPERATURE_TARGET, msr); - } -} - static void configure_dca_cap(void) { struct cpuid_result cpuid_regs; @@ -562,7 +544,7 @@ static void cpu_core_init(struct udevice *dev) configure_misc(); /* Thermal throttle activation offset */ - configure_thermal_target(dev); + cpu_configure_thermal_target(dev); /* Enable Direct Cache Access */ configure_dca_cap(); diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 3a0d505a321..7d0ed73b4b6 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -123,3 +123,25 @@ int cpu_intel_get_info(struct cpu_info *info, int bclk) return 0; } + +int cpu_configure_thermal_target(struct udevice *dev) +{ + u32 tcc_offset; + msr_t msr; + int ret; + + ret = dev_read_u32(dev, "tcc-offset", &tcc_offset); + if (!ret) + return -ENOENT; + + /* Set TCC activaiton offset if supported */ + msr = msr_read(MSR_PLATFORM_INFO); + if (msr.lo & (1 << 30)) { + msr = msr_read(MSR_TEMPERATURE_TARGET); + msr.lo &= ~(0xf << 24); /* Bits 27:24 */ + msr.lo |= (tcc_offset & 0xf) << 24; + msr_write(MSR_TEMPERATURE_TARGET, msr); + } + + return 0; +} diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 68e78e9478b..ed66d2dd8d7 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -283,26 +283,6 @@ static void configure_c_states(void) msr_write(MSR_PP1_CURRENT_CONFIG, msr); } -static int configure_thermal_target(struct udevice *dev) -{ - int tcc_offset; - msr_t msr; - - tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "tcc-offset", 0); - - /* Set TCC activaiton offset if supported */ - msr = msr_read(MSR_PLATFORM_INFO); - if ((msr.lo & (1 << 30)) && tcc_offset) { - msr = msr_read(MSR_TEMPERATURE_TARGET); - msr.lo &= ~(0xf << 24); /* Bits 27:24 */ - msr.lo |= (tcc_offset & 0xf) << 24; - msr_write(MSR_TEMPERATURE_TARGET, msr); - } - - return 0; -} - static void configure_misc(void) { msr_t msr; @@ -414,10 +394,11 @@ static int model_206ax_init(struct udevice *dev) configure_misc(); /* Thermal throttle activation offset */ - ret = configure_thermal_target(dev); + ret = cpu_configure_thermal_target(dev); if (ret) { debug("Cannot set thermal target\n"); - return ret; + if (ret != -ENOENT) + return ret; } /* Enable Direct Cache Access */ diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index 7ae3bd1c535..e158c96ce6a 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -45,4 +45,15 @@ int cpu_set_flex_ratio_to_tdp_nominal(void); */ int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); +/** + * cpu_configure_thermal_target() - Set the thermal target for a CPU + * + * This looks up the tcc-offset property and uses it to set the + * MSR_TEMPERATURE_TARGET value. + * + * @dev: CPU device + * @return 0 if OK, -ENOENT if no target is given in device tree + */ +int cpu_configure_thermal_target(struct udevice *dev); + #endif -- cgit v1.2.3 From 55a6b13a75276fbdf7186b34b4ad72238a7ec16b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:37 -0600 Subject: x86: Use a common bus clock for Intel CPUs Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in a common file and tidy up the copies. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/broadwell/cpu.c | 2 +- arch/x86/cpu/broadwell/cpu_full.c | 4 ++-- arch/x86/cpu/ivybridge/model_206ax.c | 4 ++-- arch/x86/include/asm/arch-broadwell/cpu.h | 3 --- arch/x86/include/asm/arch-broadwell/pch.h | 3 --- arch/x86/include/asm/arch-ivybridge/model_206ax.h | 3 --- arch/x86/include/asm/cpu_common.h | 5 +++++ 7 files changed, 10 insertions(+), 14 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 61003a6d68f..586a2e8f05a 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -60,7 +60,7 @@ void set_max_freq(void) msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("CPU: frequency set to %d MHz\n", - ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } int arch_cpu_init(void) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index d1f3c07109f..58cc2f362cc 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -360,7 +360,7 @@ static void set_max_ratio(void) msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("cpu: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } int broadwell_init(struct udevice *dev) @@ -634,7 +634,7 @@ void cpu_set_power_limits(int power_limit_1_time) static int broadwell_get_info(struct udevice *dev, struct cpu_info *info) { - return cpu_intel_get_info(info, BROADWELL_BCLK); + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); } static int broadwell_get_count(struct udevice *dev) diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index ed66d2dd8d7..3177ba3297f 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -346,7 +346,7 @@ static void set_max_ratio(void) msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("model_x06ax: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } static void set_energy_perf_bias(u8 policy) @@ -418,7 +418,7 @@ static int model_206ax_init(struct udevice *dev) static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info) { - return cpu_intel_get_info(info, SANDYBRIDGE_BCLK); + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); return 0; } diff --git a/arch/x86/include/asm/arch-broadwell/cpu.h b/arch/x86/include/asm/arch-broadwell/cpu.h index ca22a799968..3bc3bd6609e 100644 --- a/arch/x86/include/asm/arch-broadwell/cpu.h +++ b/arch/x86/include/asm/arch-broadwell/cpu.h @@ -21,9 +21,6 @@ #define CPUID_BROADWELL_D0 0x306d3 #define CPUID_BROADWELL_E0 0x306d4 -/* Broadwell bus clock is fixed at 100MHz */ -#define BROADWELL_BCLK 100 - #define BROADWELL_FAMILY_ULT 0x306d0 #define CORE_THREAD_COUNT_MSR 0x35 diff --git a/arch/x86/include/asm/arch-broadwell/pch.h b/arch/x86/include/asm/arch-broadwell/pch.h index 23153a040fa..ecdf6d16f94 100644 --- a/arch/x86/include/asm/arch-broadwell/pch.h +++ b/arch/x86/include/asm/arch-broadwell/pch.h @@ -6,9 +6,6 @@ #ifndef __ASM_ARCH_PCH_H #define __ASM_ARCH_PCH_H -/* CPU bus clock is fixed at 100MHz */ -#define CPU_BCLK 100 - #define PMBASE 0x40 #define ACPI_CNTL 0x44 #define ACPI_EN (1 << 7) diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h b/arch/x86/include/asm/arch-ivybridge/model_206ax.h index 850d96bdd9a..10caaa24226 100644 --- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h +++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h @@ -8,9 +8,6 @@ #ifndef _ASM_ARCH_MODEL_206AX_H #define _ASM_ARCH_MODEL_206AX_H -/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ -#define SANDYBRIDGE_BCLK 100 - #define CPUID_VMX (1 << 5) #define CPUID_SMX (1 << 6) #define MSR_FEATURE_CONFIG 0x13c diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index e158c96ce6a..f42eb323089 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -6,6 +6,11 @@ #ifndef __ASM_CPU_COMMON_H #define __ASM_CPU_COMMON_H +/* Standard Intel bus clock is fixed at 100MHz */ +enum { + INTEL_BCLK_MHZ = 100 +}; + struct cpu_info; /** -- cgit v1.2.3 From 2f0c2f03e71a68d7e5d8770c10d0154ead6dd104 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:38 -0600 Subject: x86: Add common functions for TDP and perf control These functions are the same on modern Intel CPUs, so use common code to set them. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: return false instead of 0 in cpu_ivybridge_config_tdp_levels(); fix 'muiltiplier' and 'desgn' typos] Signed-off-by: Bin Meng --- arch/x86/cpu/broadwell/cpu.c | 7 ++---- arch/x86/cpu/broadwell/cpu_full.c | 9 -------- arch/x86/cpu/intel_common/cpu.c | 20 +++++++++++++++++ arch/x86/cpu/ivybridge/model_206ax.c | 27 +++++++++-------------- arch/x86/cpu/ivybridge/northbridge.c | 2 +- arch/x86/include/asm/arch-ivybridge/model_206ax.h | 2 +- arch/x86/include/asm/cpu_common.h | 18 +++++++++++++++ 7 files changed, 52 insertions(+), 33 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 586a2e8f05a..55a7439f1c1 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -41,12 +41,9 @@ int arch_cpu_init_dm(void) void set_max_freq(void) { - msr_t msr, perf_ctl, platform_info; + msr_t msr, perf_ctl; - /* Check for configurable TDP option */ - platform_info = msr_read(MSR_PLATFORM_INFO); - - if ((platform_info.hi >> 1) & 3) { + if (cpu_config_tdp_levels()) { /* Set to nominal TDP ratio */ msr = msr_read(MSR_CONFIG_TDP_NOMINAL); perf_ctl.lo = (msr.lo & 0xff) << 8; diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 58cc2f362cc..169b5b02a6a 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -329,15 +329,6 @@ static int bsp_init_before_ap_bringup(struct udevice *dev) return 0; } -static int cpu_config_tdp_levels(void) -{ - msr_t platform_info; - - /* Bits 34:33 indicate how many levels supported */ - platform_info = msr_read(MSR_PLATFORM_INFO); - return (platform_info.hi >> 1) & 3; -} - static void set_max_ratio(void) { msr_t msr, perf_ctl; diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 7d0ed73b4b6..1898903853f 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -145,3 +145,23 @@ int cpu_configure_thermal_target(struct udevice *dev) return 0; } + +void cpu_set_perf_control(uint clk_ratio) +{ + msr_t perf_ctl; + + perf_ctl.lo = (clk_ratio & 0xff) << 8; + perf_ctl.hi = 0; + msr_write(MSR_IA32_PERF_CTL, perf_ctl); + debug("CPU: frequency set to %d MHz\n", clk_ratio * INTEL_BCLK_MHZ); +} + +bool cpu_config_tdp_levels(void) +{ + msr_t platform_info; + + /* Bits 34:33 indicate how many levels supported */ + platform_info = msr_read(MSR_PLATFORM_INFO); + + return ((platform_info.hi >> 1) & 3) != 0; +} diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 3177ba3297f..56ab6bf4acf 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -140,19 +140,16 @@ static const u8 power_limit_time_msr_to_sec[] = { [0x11] = 128, }; -int cpu_config_tdp_levels(void) +bool cpu_ivybridge_config_tdp_levels(void) { struct cpuid_result result; - msr_t platform_info; /* Minimum CPU revision */ result = cpuid(1); if (result.eax < IVB_CONFIG_TDP_MIN_CPUID) - return 0; + return false; - /* Bits 34:33 indicate how many levels supported */ - platform_info = msr_read(MSR_PLATFORM_INFO); - return (platform_info.hi >> 1) & 3; + return cpu_config_tdp_levels(); } /* @@ -213,7 +210,7 @@ void set_power_limits(u8 power_limit_1_time) msr_write(MSR_PKG_POWER_LIMIT, limit); /* Use nominal TDP values for CPUs with configurable TDP */ - if (cpu_config_tdp_levels()) { + if (cpu_ivybridge_config_tdp_levels()) { msr = msr_read(MSR_CONFIG_TDP_NOMINAL); limit.hi = 0; limit.lo = msr.lo & 0xff; @@ -329,24 +326,20 @@ static void configure_dca_cap(void) static void set_max_ratio(void) { - msr_t msr, perf_ctl; - - perf_ctl.hi = 0; + msr_t msr; + uint ratio; /* Check for configurable TDP option */ - if (cpu_config_tdp_levels()) { + if (cpu_ivybridge_config_tdp_levels()) { /* Set to nominal TDP ratio */ msr = msr_read(MSR_CONFIG_TDP_NOMINAL); - perf_ctl.lo = (msr.lo & 0xff) << 8; + ratio = msr.lo & 0xff; } else { /* Platform Info bits 15:8 give max ratio */ msr = msr_read(MSR_PLATFORM_INFO); - perf_ctl.lo = msr.lo & 0xff00; + ratio = (msr.lo & 0xff00) >> 8; } - msr_write(MSR_IA32_PERF_CTL, perf_ctl); - - debug("model_x06ax: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); + cpu_set_perf_control(ratio); } static void set_energy_perf_bias(u8 policy) diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c index a809b823b3b..0f427afcb82 100644 --- a/arch/x86/cpu/ivybridge/northbridge.c +++ b/arch/x86/cpu/ivybridge/northbridge.c @@ -141,7 +141,7 @@ static void northbridge_init(struct udevice *dev, int rev) * CPUs with configurable TDP also need power limits set * in MCHBAR. Use same values from MSR_PKG_POWER_LIMIT. */ - if (cpu_config_tdp_levels()) { + if (cpu_ivybridge_config_tdp_levels()) { msr_t msr = msr_read(MSR_PKG_POWER_LIMIT); writel(msr.lo, MCHBAR_REG(0x59A0)); diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h b/arch/x86/include/asm/arch-ivybridge/model_206ax.h index 10caaa24226..4839ebc3124 100644 --- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h +++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h @@ -58,6 +58,6 @@ /* Configure power limits for turbo mode */ void set_power_limits(u8 power_limit_1_time); -int cpu_config_tdp_levels(void); +bool cpu_ivybridge_config_tdp_levels(void); #endif diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index f42eb323089..c61d74e4a00 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* + * Common code for Intel CPUs + * * Copyright (c) 2016 Google, Inc */ @@ -61,4 +63,20 @@ int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); */ int cpu_configure_thermal_target(struct udevice *dev); +/** + * cpu_set_perf_control() - Set the nominal CPU clock speed + * + * This sets the clock speed as a multiplier of BCLK + * + * @clk_ratio: Ratio to use + */ +void cpu_set_perf_control(uint clk_ratio); + +/** + * cpu_config_tdp_levels() - Check for configurable TDP option + * + * @return true if the CPU has configurable TDP (Thermal-design power) + */ +bool cpu_config_tdp_levels(void); + #endif -- cgit v1.2.3 From f6d00da459694a42c1de1e42b159595e2f5ad56f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:39 -0600 Subject: x86: Tidy up some duplicate MSR defines Some MSR registers are defined twice in different parts of the file. Move them together and remove the duplicates. Also drop some thermal defines which are not used. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/baytrail/cpu.c | 6 +-- arch/x86/cpu/broadwell/cpu_full.c | 6 +-- arch/x86/cpu/turbo.c | 10 ++-- arch/x86/include/asm/msr-index.h | 106 ++++++++++++++++---------------------- 4 files changed, 54 insertions(+), 74 deletions(-) diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 2eb917283bc..9394eab956b 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -68,9 +68,9 @@ static void set_max_freq(void) msr_t msr; /* Enable speed step */ - msr = msr_read(MSR_IA32_MISC_ENABLES); - msr.lo |= (1 << 16); - msr_write(MSR_IA32_MISC_ENABLES, msr); + msr = msr_read(MSR_IA32_MISC_ENABLE); + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; + msr_write(MSR_IA32_MISC_ENABLE, msr); /* * Set guaranteed ratio [21:16] from IACORE_RATIOS to bits [15:8] of diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 169b5b02a6a..895edeb4bc4 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -470,9 +470,9 @@ static void configure_misc(void) msr_t msr; msr = msr_read(MSR_IA32_MISC_ENABLE); - msr.lo |= (1 << 0); /* Fast String enable */ - msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ - msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ + msr.lo |= MISC_ENABLE_FAST_STRING; + msr.lo |= MISC_ENABLE_TM1; + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; msr_write(MSR_IA32_MISC_ENABLE, msr); /* Disable thermal interrupts */ diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index a41d511238d..be468d2b2ca 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -60,8 +60,8 @@ int turbo_get_state(void) cpuid_regs = cpuid(CPUID_LEAF_PM); turbo_cap = !!(cpuid_regs.eax & PM_CAP_TURBO_MODE); - msr = msr_read(MSR_IA32_MISC_ENABLES); - turbo_en = !(msr.hi & H_MISC_DISABLE_TURBO); + msr = msr_read(MSR_IA32_MISC_ENABLE); + turbo_en = !(msr.hi & MISC_DISABLE_TURBO); if (!turbo_cap && turbo_en) { /* Unavailable */ @@ -86,9 +86,9 @@ void turbo_enable(void) /* Only possible if turbo is available but hidden */ if (turbo_get_state() == TURBO_DISABLED) { /* Clear Turbo Disable bit in Misc Enables */ - msr = msr_read(MSR_IA32_MISC_ENABLES); - msr.hi &= ~H_MISC_DISABLE_TURBO; - msr_write(MSR_IA32_MISC_ENABLES, msr); + msr = msr_read(MSR_IA32_MISC_ENABLE); + msr.hi &= ~MISC_DISABLE_TURBO; + msr_write(MSR_IA32_MISC_ENABLE, msr); /* Update cached turbo state */ set_global_turbo_state(TURBO_ENABLED); diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 6cb58708090..5bc8b6c22c7 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -92,7 +92,38 @@ /* This is burst mode BIT 38 in IA32_MISC_ENABLE MSR at offset 1A0h */ #define BURST_MODE_DISABLE (1 << 6) -#define MSR_IA32_MISC_ENABLES 0x000001a0 +#define MSR_IA32_MISC_ENABLE 0x000001a0 + +/* MISC_ENABLE bits: architectural */ +#define MISC_ENABLE_FAST_STRING BIT_ULL(0) +#define MISC_ENABLE_TCC BIT_ULL(1) +#define MISC_DISABLE_TURBO BIT_ULL(6) +#define MISC_ENABLE_EMON BIT_ULL(7) +#define MISC_ENABLE_BTS_UNAVAIL BIT_ULL(11) +#define MISC_ENABLE_PEBS_UNAVAIL BIT_ULL(12) +#define MISC_ENABLE_ENHANCED_SPEEDSTEP BIT_ULL(16) +#define MISC_ENABLE_MWAIT BIT_ULL(18) +#define MISC_ENABLE_LIMIT_CPUID BIT_ULL(22) +#define MISC_ENABLE_XTPR_DISABLE BIT_ULL(23) +#define MISC_ENABLE_XD_DISABLE BIT_ULL(34) + +/* MISC_ENABLE bits: model-specific, meaning may vary from core to core */ +#define MISC_ENABLE_X87_COMPAT BIT_ULL(2) +#define MISC_ENABLE_TM1 BIT_ULL(3) +#define MISC_ENABLE_SPLIT_LOCK_DISABLE BIT_ULL(4) +#define MISC_ENABLE_L3CACHE_DISABLE BIT_ULL(6) +#define MISC_ENABLE_SUPPRESS_LOCK BIT_ULL(8) +#define MISC_ENABLE_PREFETCH_DISABLE BIT_ULL(9) +#define MISC_ENABLE_FERR BIT_ULL(10) +#define MISC_ENABLE_FERR_MULTIPLEX BIT_ULL(10) +#define MISC_ENABLE_TM2 BIT_ULL(13) +#define MISC_ENABLE_ADJ_PREF_DISABLE BIT_ULL(19) +#define MISC_ENABLE_SPEEDSTEP_LOCK BIT_ULL(20) +#define MISC_ENABLE_L1D_CONTEXT BIT_ULL(24) +#define MISC_ENABLE_DCU_PREF_DISABLE BIT_ULL(37) +#define MISC_ENABLE_TURBO_DISABLE BIT_ULL(38) +#define MISC_ENABLE_IP_PREF_DISABLE BIT_ULL(39) + #define MSR_TEMPERATURE_TARGET 0x1a2 #define MSR_PREFETCH_CTL 0x1a4 #define PREFETCH_L1_DISABLE (1 << 0) @@ -108,6 +139,17 @@ #define ENERGY_POLICY_NORMAL 6 #define ENERGY_POLICY_POWERSAVE 15 +#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 + +#define PACKAGE_THERM_STATUS_PROCHOT BIT(0) +#define PACKAGE_THERM_STATUS_POWER_LIMIT BIT(10) + +#define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2 + +#define PACKAGE_THERM_INT_HIGH_ENABLE BIT(0) +#define PACKAGE_THERM_INT_LOW_ENABLE BIT(1) +#define PACKAGE_THERM_INT_PLN_ENABLE BIT(24) + #define MSR_LBR_SELECT 0x000001c8 #define MSR_LBR_TOS 0x000001c9 #define MSR_IA32_PLATFORM_DCA_CAP 0x1f8 @@ -419,68 +461,6 @@ #define MSR_THERM2_CTL_TM_SELECT (1ULL << 16) -#define MSR_IA32_MISC_ENABLE 0x000001a0 -#define H_MISC_DISABLE_TURBO (1 << 6) - -#define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 - -#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 -#define ENERGY_PERF_BIAS_PERFORMANCE 0 -#define ENERGY_PERF_BIAS_NORMAL 6 -#define ENERGY_PERF_BIAS_POWERSAVE 15 - -#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 - -#define PACKAGE_THERM_STATUS_PROCHOT (1 << 0) -#define PACKAGE_THERM_STATUS_POWER_LIMIT (1 << 10) - -#define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2 - -#define PACKAGE_THERM_INT_HIGH_ENABLE (1 << 0) -#define PACKAGE_THERM_INT_LOW_ENABLE (1 << 1) -#define PACKAGE_THERM_INT_PLN_ENABLE (1 << 24) - -/* Thermal Thresholds Support */ -#define THERM_INT_THRESHOLD0_ENABLE (1 << 15) -#define THERM_SHIFT_THRESHOLD0 8 -#define THERM_MASK_THRESHOLD0 (0x7f << THERM_SHIFT_THRESHOLD0) -#define THERM_INT_THRESHOLD1_ENABLE (1 << 23) -#define THERM_SHIFT_THRESHOLD1 16 -#define THERM_MASK_THRESHOLD1 (0x7f << THERM_SHIFT_THRESHOLD1) -#define THERM_STATUS_THRESHOLD0 (1 << 6) -#define THERM_LOG_THRESHOLD0 (1 << 7) -#define THERM_STATUS_THRESHOLD1 (1 << 8) -#define THERM_LOG_THRESHOLD1 (1 << 9) - -/* MISC_ENABLE bits: architectural */ -#define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) -#define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) -#define MSR_IA32_MISC_ENABLE_EMON (1ULL << 7) -#define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1ULL << 11) -#define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1ULL << 12) -#define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP (1ULL << 16) -#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18) -#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << 22) -#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << 23) -#define MSR_IA32_MISC_ENABLE_XD_DISABLE (1ULL << 34) - -/* MISC_ENABLE bits: model-specific, meaning may vary from core to core */ -#define MSR_IA32_MISC_ENABLE_X87_COMPAT (1ULL << 2) -#define MSR_IA32_MISC_ENABLE_TM1 (1ULL << 3) -#define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE (1ULL << 4) -#define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << 6) -#define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK (1ULL << 8) -#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE (1ULL << 9) -#define MSR_IA32_MISC_ENABLE_FERR (1ULL << 10) -#define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX (1ULL << 10) -#define MSR_IA32_MISC_ENABLE_TM2 (1ULL << 13) -#define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE (1ULL << 19) -#define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK (1ULL << 20) -#define MSR_IA32_MISC_ENABLE_L1D_CONTEXT (1ULL << 24) -#define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE (1ULL << 37) -#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) -#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) - #define MSR_IA32_TSC_DEADLINE 0x000006E0 /* P4/Xeon+ specific */ -- cgit v1.2.3 From a27520904f54643c9e55f5672f005a207c911f32 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:40 -0600 Subject: x86: Add new common CPU functions for turbo/burst mode Add a few more CPU functions that are common on Intel CPUs. Also add attribution for the code source. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: add missing MSR_IA32_MISC_ENABLE write back in cpu_set_eist(); fix 2 typos in cpu_get_burst_mode_state() comments] Signed-off-by: Bin Meng --- arch/x86/cpu/intel_common/cpu.c | 61 +++++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/cpu_common.h | 49 +++++++++++++++++++++++++++++++ 2 files changed, 110 insertions(+) diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 1898903853f..4d093a53912 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -1,12 +1,17 @@ // SPDX-License-Identifier: GPL-2.0 /* + * Copyright (C) 2014 Google Inc. * Copyright (c) 2016 Google, Inc + * Copyright (C) 2015-2018 Intel Corporation. + * Copyright (C) 2018 Siemens AG + * Some code taken from coreboot cpulib.c */ #include #include #include #include +#include #include #include #include @@ -165,3 +170,59 @@ bool cpu_config_tdp_levels(void) return ((platform_info.hi >> 1) & 3) != 0; } + +void cpu_set_p_state_to_turbo_ratio(void) +{ + msr_t msr; + + msr = msr_read(MSR_TURBO_RATIO_LIMIT); + cpu_set_perf_control(msr.lo); +} + +enum burst_mode_t cpu_get_burst_mode_state(void) +{ + enum burst_mode_t state; + int burst_en, burst_cap; + msr_t msr; + uint eax; + + eax = cpuid_eax(0x6); + burst_cap = eax & 0x2; + msr = msr_read(MSR_IA32_MISC_ENABLE); + burst_en = !(msr.hi & BURST_MODE_DISABLE); + + if (!burst_cap && burst_en) + state = BURST_MODE_UNAVAILABLE; + else if (burst_cap && !burst_en) + state = BURST_MODE_DISABLED; + else if (burst_cap && burst_en) + state = BURST_MODE_ENABLED; + else + state = BURST_MODE_UNKNOWN; + + return state; +} + +void cpu_set_burst_mode(bool burst_mode) +{ + msr_t msr; + + msr = msr_read(MSR_IA32_MISC_ENABLE); + if (burst_mode) + msr.hi &= ~BURST_MODE_DISABLE; + else + msr.hi |= BURST_MODE_DISABLE; + msr_write(MSR_IA32_MISC_ENABLE, msr); +} + +void cpu_set_eist(bool eist_status) +{ + msr_t msr; + + msr = msr_read(MSR_IA32_MISC_ENABLE); + if (eist_status) + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; + else + msr.lo &= ~MISC_ENABLE_ENHANCED_SPEEDSTEP; + msr_write(MSR_IA32_MISC_ENABLE, msr); +} diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index c61d74e4a00..cdd99a90b76 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -79,4 +79,53 @@ void cpu_set_perf_control(uint clk_ratio); */ bool cpu_config_tdp_levels(void); +/** enum burst_mode_t - Burst-mode states */ +enum burst_mode_t { + BURST_MODE_UNKNOWN, + BURST_MODE_UNAVAILABLE, + BURST_MODE_DISABLED, + BURST_MODE_ENABLED +}; + +/* + * cpu_get_burst_mode_state() - Get the Burst/Turbo Mode State + * + * This reads MSR IA32_MISC_ENABLE 0x1A0 + * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED. + * Also checks cpuid 0x6 to see whether burst mode is supported. + * + * @return current burst mode status + */ +enum burst_mode_t cpu_get_burst_mode_state(void); + +/** + * cpu_set_burst_mode() - Set CPU burst mode + * + * @burst_mode: true to enable burst mode, false to disable + */ +void cpu_set_burst_mode(bool burst_mode); + +/** + * cpu_set_eist() - Enable Enhanced Intel Speed Step Technology + * + * @eist_status: true to enable EIST, false to disable + */ +void cpu_set_eist(bool eist_status); + +/** + * cpu_set_p_state_to_turbo_ratio() - Set turbo ratio + * + * TURBO_RATIO_LIMIT MSR (0x1AD) Bits 31:0 indicates the + * factory configured values for of 1-core, 2-core, 3-core + * and 4-core turbo ratio limits for all processors. + * + * 7:0 - MAX_TURBO_1_CORE + * 15:8 - MAX_TURBO_2_CORES + * 23:16 - MAX_TURBO_3_CORES + * 31:24 - MAX_TURBO_4_CORES + * + * Set PERF_CTL MSR (0x199) P_Req with that value. + */ +void cpu_set_p_state_to_turbo_ratio(void); + #endif -- cgit v1.2.3 From 594d272cfd3dc43f118efb952676715b0382af24 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:41 -0600 Subject: dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/core/fdtaddr.c | 13 +++++------- include/fdtdec.h | 17 ---------------- lib/fdtdec.c | 54 -------------------------------------------------- 3 files changed, 5 insertions(+), 79 deletions(-) diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index c9a941116a3..575798fae93 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -202,16 +202,13 @@ fdt_addr_t devfdt_get_addr_pci(struct udevice *dev) u32 bar; int ret; - ret = fdtdec_get_pci_addr(gd->fdt_blob, - dev_of_offset(dev), - FDT_PCI_SPACE_MEM32, "reg", - &pci_addr); + ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_MEM32, + "reg", &pci_addr); if (ret) { /* try if there is any i/o-mapped register */ - ret = fdtdec_get_pci_addr(gd->fdt_blob, - dev_of_offset(dev), - FDT_PCI_SPACE_IO, "reg", - &pci_addr); + ret = ofnode_read_pci_addr(dev_ofnode(dev), + FDT_PCI_SPACE_IO, "reg", + &pci_addr); if (ret) return FDT_ADDR_T_NONE; } diff --git a/include/fdtdec.h b/include/fdtdec.h index 635f53083b7..f1e58f9732d 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -416,23 +416,6 @@ fdt_addr_t fdtdec_get_addr(const void *blob, int node, fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, const char *prop_name, fdt_size_t *sizep); -/** - * Look at an address property in a node and return the pci address which - * corresponds to the given type in the form of fdt_pci_addr. - * The property must hold one fdt_pci_addr with a lengh. - * - * @param blob FDT blob - * @param node node to examine - * @param type pci address type (FDT_PCI_SPACE_xxx) - * @param prop_name name of property to find - * @param addr returns pci address in the form of fdt_pci_addr - * @return 0 if ok, -ENOENT if the property did not exist, -EINVAL if the - * format of the property was invalid, -ENXIO if the requested - * address type was not found - */ -int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, - const char *prop_name, struct fdt_pci_addr *addr); - /** * Look at the compatible property of a device node that represents a PCI * device and extract pci vendor id and device id from it. diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 74430c8b2ff..17736ce6655 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -186,60 +186,6 @@ fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name) } #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI) -int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, - const char *prop_name, struct fdt_pci_addr *addr) -{ - const u32 *cell; - int len; - int ret = -ENOENT; - - debug("%s: %s: ", __func__, prop_name); - - /* - * If we follow the pci bus bindings strictly, we should check - * the value of the node's parent node's #address-cells and - * #size-cells. They need to be 3 and 2 accordingly. However, - * for simplicity we skip the check here. - */ - cell = fdt_getprop(blob, node, prop_name, &len); - if (!cell) - goto fail; - - if ((len % FDT_PCI_REG_SIZE) == 0) { - int num = len / FDT_PCI_REG_SIZE; - int i; - - for (i = 0; i < num; i++) { - debug("pci address #%d: %08lx %08lx %08lx\n", i, - (ulong)fdt32_to_cpu(cell[0]), - (ulong)fdt32_to_cpu(cell[1]), - (ulong)fdt32_to_cpu(cell[2])); - if ((fdt32_to_cpu(*cell) & type) == type) { - addr->phys_hi = fdt32_to_cpu(cell[0]); - addr->phys_mid = fdt32_to_cpu(cell[1]); - addr->phys_lo = fdt32_to_cpu(cell[2]); - break; - } - - cell += (FDT_PCI_ADDR_CELLS + - FDT_PCI_SIZE_CELLS); - } - - if (i == num) { - ret = -ENXIO; - goto fail; - } - - return 0; - } - - ret = -EINVAL; - -fail: - debug("(not found)\n"); - return ret; -} - int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) { const char *list, *end; -- cgit v1.2.3 From 75d8f49481a5c260d0cf1024d41f0b29d57e0efe Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:42 -0600 Subject: sandbox: pci: Create a new sandbox_pci_read_bar() function The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng [bmeng: remove inclusion of in pci_sandbox.c] Signed-off-by: Bin Meng --- arch/sandbox/include/asm/test.h | 15 +++++++++++++++ drivers/misc/Makefile | 2 +- drivers/misc/swap_case.c | 18 +++--------------- drivers/pci/pci-emul-uclass.c | 20 ++++++++++++++++++++ 4 files changed, 39 insertions(+), 16 deletions(-) diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 1b21af6bed7..cd2b9e3155d 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -198,4 +198,19 @@ int sandbox_get_pch_spi_protect(struct udevice *dev); */ int sandbox_get_pci_ep_irq_count(struct udevice *dev); +/** + * sandbox_pci_read_bar() - Read the BAR value for a read_config operation + * + * This is used in PCI emulators to read a base address reset. This has special + * rules because when the register is set to 0xffffffff it can be used to + * discover the type and size of the BAR. + * + * @barval: Current value of the BAR + * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or + * PCI_BASE_ADDRESS_MEM_TYPE_32) + * @size: Size of BAR in bytes + * @return BAR value to return from emulator + */ +uint sandbox_pci_read_bar(u32 barval, int type, uint size); + #endif diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 509c588582d..0001d105bae 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o +obj-$(CONFIG_SANDBOX) += swap_case.o endif ifdef CONFIG_DM_I2C @@ -52,7 +53,6 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o -obj-$(CONFIG_SANDBOX) += swap_case.o obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 75fe6416707..11189d16c83 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -139,25 +139,13 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, case PCI_BASE_ADDRESS_4: case PCI_BASE_ADDRESS_5: { int barnum; - u32 *bar, result; + u32 *bar; barnum = pci_offset_to_barnum(offset); bar = &plat->bar[barnum]; - result = *bar; - if (*bar == 0xffffffff) { - if (barinfo[barnum].type) { - result = (~(barinfo[barnum].size - 1) & - PCI_BASE_ADDRESS_IO_MASK) | - PCI_BASE_ADDRESS_SPACE_IO; - } else { - result = (~(barinfo[barnum].size - 1) & - PCI_BASE_ADDRESS_MEM_MASK) | - PCI_BASE_ADDRESS_MEM_TYPE_32; - } - } - debug("r bar %d=%x\n", barnum, result); - *valuep = result; + *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type, + barinfo[barnum].size); break; } case PCI_CAPABILITY_LIST: diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c index fd87b3ea4e6..0dcf937d9a6 100644 --- a/drivers/pci/pci-emul-uclass.c +++ b/drivers/pci/pci-emul-uclass.c @@ -42,6 +42,26 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, return *emulp ? 0 : -ENODEV; } +uint sandbox_pci_read_bar(u32 barval, int type, uint size) +{ + u32 result; + + result = barval; + if (result == 0xffffffff) { + if (type == PCI_BASE_ADDRESS_SPACE_IO) { + result = (~(size - 1) & + PCI_BASE_ADDRESS_IO_MASK) | + PCI_BASE_ADDRESS_SPACE_IO; + } else { + result = (~(size - 1) & + PCI_BASE_ADDRESS_MEM_MASK) | + PCI_BASE_ADDRESS_MEM_TYPE_32; + } + } + + return result; +} + static int sandbox_pci_emul_post_probe(struct udevice *dev) { struct sandbox_pci_emul_priv *priv = dev->uclass->priv; -- cgit v1.2.3 From 12e927b0a842408467fe7dbe627ca350d2300348 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:43 -0600 Subject: x86: Allow the PCH and LPC uclasses to work with of-platdata At present these uclasses assumes that they are used with a device tree. Update them to support of-platdata as well. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/lpc-uclass.c | 2 ++ drivers/pch/pch-uclass.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c index 505d7a943d2..1302a6e34a1 100644 --- a/arch/x86/lib/lpc-uclass.c +++ b/arch/x86/lib/lpc-uclass.c @@ -10,5 +10,7 @@ UCLASS_DRIVER(lpc) = { .id = UCLASS_LPC, .name = "lpc", +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .post_bind = dm_scan_fdt_dev, +#endif }; diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c index caf8b72803c..ad4906aa58b 100644 --- a/drivers/pch/pch-uclass.c +++ b/drivers/pch/pch-uclass.c @@ -64,5 +64,7 @@ int pch_ioctl(struct udevice *dev, ulong req, void *data, int size) UCLASS_DRIVER(pch) = { .id = UCLASS_PCH, .name = "pch", +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .post_bind = dm_scan_fdt_dev, +#endif }; -- cgit v1.2.3 From 6ccb2f890bb5bfdd6aed4a99294fd77508436c40 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:45 -0600 Subject: x86: Refactor mtrr_commit() to allow for shared code Move the code that actually sets up the MTRR into another function so it can be used elsewhere in the file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/mtrr.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 0939736164d..6218d149e30 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -50,11 +50,20 @@ void mtrr_close(struct mtrr_state *state, bool do_caches) enable_caches(); } +static void set_var_mtrr(uint reg, uint type, uint64_t start, uint64_t size) +{ + u64 mask; + + wrmsrl(MTRR_PHYS_BASE_MSR(reg), start | type); + mask = ~(size - 1); + mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; + wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask | MTRR_PHYS_MASK_VALID); +} + int mtrr_commit(bool do_caches) { struct mtrr_request *req = gd->arch.mtrr_req; struct mtrr_state state; - uint64_t mask; int i; debug("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr, @@ -65,12 +74,8 @@ int mtrr_commit(bool do_caches) debug("open\n"); mtrr_open(&state, do_caches); debug("open done\n"); - for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) { - mask = ~(req->size - 1); - mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; - wrmsrl(MTRR_PHYS_BASE_MSR(i), req->start | req->type); - wrmsrl(MTRR_PHYS_MASK_MSR(i), mask | MTRR_PHYS_MASK_VALID); - } + for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) + set_var_mtrr(i, req->type, req->start, req->size); /* Clear the ones that are unused */ debug("clear\n"); -- cgit v1.2.3 From add3f4c9186fbd94b6e89c1d277b544a7a6ad404 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:46 -0600 Subject: x86: Add a function to set variable MTRRs Normally U-Boot handles MTRRs through an add/commit process which overwrites all MTRRs. But in very early boot it is not desirable to clear the existing MTRRs since they may be in use and it can cause a hang. Add a new mtrr_set_next_var() function which sets up the next available MTRR to the required region. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: pass 'type' to set_var_mtrr() in mtrr_set_next_var()] Signed-off-by: Bin Meng --- arch/x86/cpu/mtrr.c | 38 ++++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/mtrr.h | 12 ++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 6218d149e30..a00db422e7a 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -112,3 +112,41 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) return 0; } + +static int get_var_mtrr_count(void) +{ + return msr_read(MSR_MTRR_CAP_MSR).lo & MSR_MTRR_CAP_VCNT; +} + +static int get_free_var_mtrr(void) +{ + struct msr_t maskm; + int vcnt; + int i; + + vcnt = get_var_mtrr_count(); + + /* Identify the first var mtrr which is not valid */ + for (i = 0; i < vcnt; i++) { + maskm = msr_read(MTRR_PHYS_MASK_MSR(i)); + if ((maskm.lo & MTRR_PHYS_MASK_VALID) == 0) + return i; + } + + /* No free var mtrr */ + return -ENOSPC; +} + +int mtrr_set_next_var(uint type, uint64_t start, uint64_t size) +{ + int mtrr; + + mtrr = get_free_var_mtrr(); + if (mtrr < 0) + return mtrr; + + set_var_mtrr(mtrr, type, start, size); + debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); + + return 0; +} diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 6f29e75ce65..672617256e9 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -117,6 +117,18 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size); */ int mtrr_commit(bool do_caches); +/** + * mtrr_set_next_var() - set up a variable MTRR + * + * This finds the first free variable MTRR and sets to the given area + * + * @type: Requested type (MTRR_TYPE_) + * @start: Start address + * @size: Size + * @return 0 on success, -ENOSPC if there are no more MTRRs + */ +int mtrr_set_next_var(uint type, uint64_t base, uint64_t size); + #endif #if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0) -- cgit v1.2.3 From b377ebbd5b8fc371b0b27dd3551f2cc3718757dc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:48 -0600 Subject: x86: cpu: Don't include the cpu driver in TPL We don't need this driver very early in boot and it adds code size. Drop it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 3f1f62da2b1..6296b55ff8a 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -26,7 +26,10 @@ endif extra-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += resetvec.o start16.o -obj-y += cpu.o cpu_x86.o +obj-y += cpu.o +ifndef CONFIG_TPL_BUILD +obj-y += cpu_x86.o +endif ifndef CONFIG_$(SPL_)X86_64 AFLAGS_REMOVE_call32.o := -mregparm=3 \ -- cgit v1.2.3 From cc2d27dcdc3e1c76d09d54015e3992380bd7e0fa Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 25 Sep 2019 08:56:49 -0600 Subject: x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/init_helpers.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 4774a9bdb78..3e3a11ac2fa 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -12,15 +12,23 @@ DECLARE_GLOBAL_DATA_PTR; int init_cache_f_r(void) { -#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) && \ - !defined(CONFIG_SYS_SLIMBOOTLOADER) + bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) || + IS_ENABLED(CONFIG_FSP_VERSION2); int ret; - ret = mtrr_commit(false); - /* If MTRR MSR is not implemented by the processor, just ignore it */ - if (ret && ret != -ENOSYS) - return ret; -#endif + do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && + !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); + + if (do_mtrr) { + ret = mtrr_commit(false); + /* + * If MTRR MSR is not implemented by the processor, just ignore + * it + */ + if (ret && ret != -ENOSYS) + return ret; + } + /* Initialise the CPU cache(s) */ return init_cache(); } -- cgit v1.2.3