From dd4a822016941edcded62d2b55cacd16ef4d4ae6 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 9 Nov 2023 09:54:07 +0530 Subject: arm64: zynqmp: Introduce kria SOM defconfig Enable the initial kria SOM specific configurations like pinctrl, pinconf etc. Also add the environment file. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20231109042407.6123-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp_kria.env | 66 ++++++++++ configs/xilinx_zynqmp_kria_defconfig | 227 +++++++++++++++++++++++++++++++++++ 2 files changed, 293 insertions(+) create mode 100644 board/xilinx/zynqmp/zynqmp_kria.env create mode 100644 configs/xilinx_zynqmp_kria_defconfig diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env new file mode 100644 index 00000000000..70384538ab1 --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp_kria.env @@ -0,0 +1,66 @@ +autoload=no +baudrate=115200 +boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr} +boot_efi_binary=if fdt addr ${fdt_addr_r}; then bootefi bootmgr ${fdt_addr_r};else bootefi bootmgr ${fdtcontroladdr};fi;load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} efi/boot/bootaa64.efi; if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r};else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi +boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}${boot_syslinux_conf} +boot_net_usb_start=usb start +boot_prefixes=/ /boot/ +boot_script_dhcp=boot.scr.uimg +boot_scripts=boot.scr.uimg boot.scr +boot_syslinux_conf=extlinux/extlinux.conf +bootcmd_dhcp=run boot_net_usb_start; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;setenv efi_fdtfile ${fdtfile}; setenv efi_old_vci ${bootp_vci};setenv efi_old_arch ${bootp_arch};setenv bootp_vci PXEClient:Arch:00011:UNDI:003000;setenv bootp_arch 0xb;if dhcp ${kernel_addr_r}; then tftpboot ${fdt_addr_r} dtb/${efi_fdtfile};if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r}; else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi;fi;setenv bootp_vci ${efi_old_vci};setenv bootp_arch ${efi_old_arch};setenv efi_fdtfile;setenv efi_old_arch;setenv efi_old_vci; +bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...; +bootcmd_mmc0=devnum=0; run mmc_boot +bootcmd_mmc1=devnum=1; run mmc_boot +bootcmd_pxe=run boot_net_usb_start; dhcp; if pxe get; then pxe boot; fi +bootcmd_usb0=devnum=0; run usb_boot +bootcmd_usb1=devnum=1; run usb_boot +bootcmd_usb2=devnum=2; run usb_boot +bootcmd_usb3=devnum=3; run usb_boot +bootdelay=2 +bootfstype=fat +bootm_low=0 +bootm_size=0x80000000 +distro_bootcmd=scsi_need_init=; for target in ${boot_targets}; do run bootcmd_${target}; done +efi_dtb_prefixes=/ /dtb/ /dtb/current/ +fdt_addr_r=0x40000000 +fdt_high=0x10000000 +fileaddr=0x18000000 +initrd_high=0x79000000 +kernel_addr_r=0x18000000 +load_efi_dtb=load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}${efi_fdtfile} +mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi +pxefile_addr_r=0x10000000 +ramdisk_addr_r=0x02100000 +scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinux; run scan_dev_for_scripts; done;run scan_dev_for_efi; +scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpart in ${devplist}; do if fstype ${devtype} ${devnum}:${distro_bootpart} bootfstype; then run scan_dev_for_boot; fi; done; setenv devplist +scan_dev_for_efi=setenv efi_fdtfile ${fdtfile}; for prefix in ${efi_dtb_prefixes}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${efi_fdtfile}; then run load_efi_dtb; fi;done;if test -e ${devtype} ${devnum}:${distro_bootpart} efi/boot/bootaa64.efi; then echo Found EFI removable media binary efi/boot/bootaa64.efi; run boot_efi_binary; echo EFI LOAD FAILED: continuing...; fi; setenv efi_fdtfile +scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${boot_syslinux_conf}; then echo Found ${prefix}${boot_syslinux_conf}; run boot_extlinux; echo SCRIPT FAILED: continuing...; fi +scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echo Found U-Boot script ${prefix}${script}; run boot_a_script; echo SCRIPT FAILED: continuing...; fi; done +script_offset_f=0x3e80000 +script_size_f=0x80000 +scriptaddr=0x20000000 +usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; run scan_dev_for_boot_part; fi +preboot=setenv boot_targets; setenv modeboot; run board_setup + +# SOM specific boot methods +som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; fi;" +som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd + +k26_starter=SMK-K26-XCL2G +k24_starter=SMK-K24-XCL2G +bootcmd=setenv model $board_name && if setexpr model gsub .*$k24_starter* $k24_starter || setexpr model gsub .*$k26_starter* $k26_starter; then run som_cc_boot; else run som_mmc_boot; run som_cc_boot; fi + +usb_hub_init=mw 1000 0056 && sleep 1 && i2c write 1000 2d aa 2 -s + +# usb hub init +kv260_setup=i2c dev 1 && run usb_hub_init +# usb hub init +kr260_setup=i2c dev 1 && run usb_hub_init; i2c dev 2 && run usb_hub_init; +# usb hub init with enabling PM nodes for ... +kd240_setup=i2c dev 0 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47 + +board_setup=\ +if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\ +if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\ +if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi; diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig new file mode 100644 index 00000000000..daedf1de01e --- /dev/null +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -0,0 +1,227 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_LEN=0x4040000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_ENV_SOURCE_FILE="zynqmp_kria" +CONFIG_SF_DEFAULT_SPEED=30000000 +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0x2200000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-smk-k26-revA" +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_DM_RESET=y +CONFIG_SPL_STACK_R_ADDR=0x18000000 +CONFIG_SPL_STACK=0xfffffffc +CONFIG_SPL_SIZE_LIMIT=0x2a000 +CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2220000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_CMD_FRU=y +CONFIG_SYS_LOAD_ADDR=0x8000000 +CONFIG_ENV_ADDR=0x2200000 +CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 +CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_PREBOOT=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_CLOCKS=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_BSS_MAX_SIZE=0x80000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_FS_LOAD_KERNEL_NAME="" +CONFIG_SPL_FS_LOAD_ARGS_NAME="" +CONFIG_SPL_FPGA=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000 +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOAD_SECURE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_SDRAM=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_RTC=y +CONFIG_CMD_TIME=y +CONFIG_CMD_GETTIME=y +CONFIG_CMD_RNG=y +CONFIG_CMD_KASLRSEED=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_SMC=y +CONFIG_CMD_TPM=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_MTDPARTS_SPREAD=y +CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y +CONFIG_CMD_UBI=y +CONFIG_PARTITION_TYPE_GUID=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_BOARD=y +CONFIG_OF_LIST="" +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent interrupts iommus power-domains" +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_ENV_FAT_DEVICE_AND_PART=":auto" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SATA=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_TFTP=y +CONFIG_DFU_TIMEOUT=y +CONFIG_DFU_MMC=y +CONFIG_DFU_MTD=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000 +CONFIG_DMA=y +CONFIG_XILINX_DPDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_GPIO_HOG=y +CONFIG_XILINX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_SLG7XL45106_I2C_GPO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_ADIN=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_XILINX_GMII2RGMII=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y +CONFIG_XILINX_AXIEMAC=y +CONFIG_ZYNQ_GEM=y +CONFIG_PHY=y +CONFIG_PHY_XILINX_ZYNQMP=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_POWER_DOMAIN=y +CONFIG_ZYNQMP_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_CADENCE_TTC=y +CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RTC=y +CONFIG_RTC_EMULATION=y +CONFIG_RTC_ZYNQMP=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_ARM_DCC=y +CONFIG_XILINX_UARTLITE=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_SOC_XILINX_ZYNQMP=y +CONFIG_SPI=y +CONFIG_ZYNQ_SPI=y +CONFIG_ZYNQMP_GQSPI=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_CMD_POWEROFF=y +CONFIG_SYSRESET_PSCI=y +CONFIG_TPM2_TIS_SPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_VIDEO_COPY=y +CONFIG_I2C_EDID=y +CONFIG_VIDEO_ZYNQMP_DPSUB=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y +CONFIG_PANIC_HANG=y +CONFIG_TPM=y +CONFIG_SPL_GZIP=y +CONFIG_EFI_SET_TIME=y +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -- cgit v1.3.1 From 4ff083f09bc2d26071233529bd08436499fd3f8d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Nov 2023 16:55:48 +0100 Subject: arm64: zynqmp: Do not expose usbhub nodes Upstream dwc3 U-Boot driver is not able to handle child nodes properly that's why comment them in DT for now. This patch should be reverted when dwc3 driver handles it properly. DT node itself is aligned with dt schema. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/537c91a7ac0843358c4e33aa10d9e035d8e92faf.1699286139.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 3 ++- arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 3 ++- arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 3 ++- arch/arm/dts/zynqmp-sck-kv-g-revA.dtso | 2 ++ arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 3 ++- 5 files changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso index 5a5c1efd6b9..8d0ddecdc14 100644 --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso @@ -87,7 +87,7 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; - +#if 0 usbhub0: usb-hub { /* u36 */ i2c-bus = <&i2c1>; compatible = "microchip,usb5744"; @@ -98,6 +98,7 @@ compatible = "microchip,usb2244"; reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; }; +#endif }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso index 30a0230d476..95b1dc5aa57 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso @@ -139,7 +139,7 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; - +#if 0 usbhub0: usb-hub { /* u43 */ i2c-bus = <&usbhub_i2c0>; compatible = "microchip,usb5744"; @@ -150,6 +150,7 @@ compatible = "microchip,usb2244"; reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; }; +#endif }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 8f4c52d6d64..e2387a2abb8 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -139,7 +139,7 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; - +#if 0 usbhub0: usb-hub { /* u43 */ i2c-bus = <&usbhub_i2c0>; compatible = "microchip,usb5744"; @@ -150,6 +150,7 @@ compatible = "microchip,usb2244"; reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; }; +#endif }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso index c4f1da92186..f43c159cdca 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso @@ -131,10 +131,12 @@ pinctrl-0 = <&pinctrl_usb0_default>; phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; +#if 0 usbhub: usb5744 { /* u43 */ compatible = "microchip,usb5744"; reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; +#endif }; &dwc3_0 { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso index 6c5e0e56606..3643569cc7c 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso @@ -113,13 +113,14 @@ phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; assigned-clock-rates = <250000000>, <20000000>; - +#if 0 usb5744: usb-hub { /* u43 */ status = "okay"; compatible = "microchip,usb5744"; i2c-bus = <&i2c1>; reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; +#endif }; &dwc3_0 { -- cgit v1.3.1 From c7c82cbe2dd3991460e15fbc0b265023154c5827 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 8 Nov 2023 08:36:40 +0100 Subject: arm64: zynqmp: Remove description for 8T49N240 8T49N240 driver was never upstreamed by IDT and there is no user of this driver that's why remove description for this chip with also remove this driver. Reviewed-by: Radhey Shyam Pandey Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/52aec21f121713160d5953b0a41a10cb196482b3.1699428990.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 8 +------- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 10 +--------- 2 files changed, 2 insertions(+), 16 deletions(-) diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index bf7569c6dda..cc57c2a1b0b 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -311,13 +311,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - clock_8t49n287: clock-generator@6c { /* u39 8T49N240 */ - #clock-cells = <1>; /* author David Cater */ - compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ - reg = <0x6c>; - /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ - /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ - }; + /* u39 8T49N240 */ }; i2c@3 { /* PMBUS2_INA226 */ #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index c456c375ac8..9acccad40e7 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -532,15 +532,7 @@ /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */ /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ - clock_8t49n287: clock-generator@60 { /* u39 8T49N240 - pcie clocking 3 */ - #clock-cells = <1>; /* author David Cater */ - compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ - reg = <0x60>; - /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ - /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ - - }; - + /* u39 8T49N240 - pcie clocking 3 */ }; }; }; -- cgit v1.3.1 From 3c6b1fdade236e5fa97b058529a91da476627461 Mon Sep 17 00:00:00 2001 From: Mayuresh Chitale Date: Thu, 16 Nov 2023 22:10:24 +0530 Subject: net: axi_emac: Use reg property for DMA registers As per the xlnx,axi-ethernet-1.00.a DT documentation in linux, the AXI DMA registers can be obtained via the reg property or via a separate node for the axistream DMA controller. Currently only the latter is supported, so add support to fetch the DMA controller registers from the "reg" property. Signed-off-by: Mayuresh Chitale Reviewed-by: Michal Simek Link: https://lore.kernel.org/r/20231116164024.139934-1-mchitale@ventanamicro.com Signed-off-by: Michal Simek --- drivers/net/xilinx_axi_emac.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 54f22327684..ef151ee51b4 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -903,12 +903,11 @@ static int axi_emac_of_to_plat(struct udevice *dev) ret = dev_read_phandle_with_args(dev, "axistream-connected", NULL, 0, 0, &axistream_node); - if (ret) { - printf("%s: axistream is not found\n", __func__); - return -EINVAL; - } + if (!ret) + plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node); + else + plat->dmatx = (struct axidma_reg *)dev_read_addr_index(dev, 1); - plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node); if (!plat->dmatx) { printf("%s: axi_dma register space not found\n", __func__); return -EINVAL; -- cgit v1.3.1 From 891b4814800bd3ad5d16c5d45e0cd05709f64721 Mon Sep 17 00:00:00 2001 From: Mayuresh Chitale Date: Thu, 16 Nov 2023 22:21:02 +0530 Subject: pci: xilinx: Fix "reg" not found error Fix the driver to use the dev_read_addr_size API to fetch the reg property from the DT. Signed-off-by: Mayuresh Chitale Link: https://lore.kernel.org/r/20231116165103.140968-2-mchitale@ventanamicro.com Signed-off-by: Michal Simek --- drivers/pci/pcie_xilinx.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-) diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c index 53fd121e905..fdc9b08c10b 100644 --- a/drivers/pci/pcie_xilinx.c +++ b/drivers/pci/pcie_xilinx.c @@ -8,11 +8,10 @@ #include #include #include -#include #include #include - -#include +#include +#include /** * struct xilinx_pcie - Xilinx PCIe controller state @@ -140,20 +139,16 @@ static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf, static int pcie_xilinx_of_to_plat(struct udevice *dev) { struct xilinx_pcie *pcie = dev_get_priv(dev); - struct fdt_resource reg_res; - DECLARE_GLOBAL_DATA_PTR; - int err; - - err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg", - 0, ®_res); - if (err < 0) { - pr_err("\"reg\" resource not found\n"); - return err; - } - - pcie->cfg_base = map_physmem(reg_res.start, - fdt_resource_size(®_res), - MAP_NOCACHE); + fdt_addr_t addr; + fdt_size_t size; + + addr = dev_read_addr_size(dev, &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + pcie->cfg_base = devm_ioremap(dev, addr, size); + if (IS_ERR(pcie->cfg_base)) + return PTR_ERR(pcie->cfg_base); return 0; } -- cgit v1.3.1 From a62b01ded171415e0278bfc951a31895e63d166f Mon Sep 17 00:00:00 2001 From: Mayuresh Chitale Date: Thu, 16 Nov 2023 22:21:03 +0530 Subject: pci: xilinx: Enable MMIO region The host bridge MMIO region is disabled by default due to which MMIO accesses cause an exception. Fix it by setting the bridge enable bit. This change is ported from the linux pcie-xilinx driver. Signed-off-by: Mayuresh Chitale Reviewed-by: Michal Simek Link: https://lore.kernel.org/r/20231116165103.140968-3-mchitale@ventanamicro.com Signed-off-by: Michal Simek --- drivers/pci/pcie_xilinx.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c index fdc9b08c10b..3db460b5f93 100644 --- a/drivers/pci/pcie_xilinx.c +++ b/drivers/pci/pcie_xilinx.c @@ -24,6 +24,8 @@ struct xilinx_pcie { /* Register definitions */ #define XILINX_PCIE_REG_PSCR 0x144 #define XILINX_PCIE_REG_PSCR_LNKUP BIT(11) +#define XILINX_PCIE_REG_RPSC 0x148 +#define XILINX_PCIE_REG_RPSC_BEN BIT(0) /** * pcie_xilinx_link_up() - Check whether the PCIe link is up @@ -141,6 +143,7 @@ static int pcie_xilinx_of_to_plat(struct udevice *dev) struct xilinx_pcie *pcie = dev_get_priv(dev); fdt_addr_t addr; fdt_size_t size; + u32 rpsc; addr = dev_read_addr_size(dev, &size); if (addr == FDT_ADDR_T_NONE) @@ -150,6 +153,11 @@ static int pcie_xilinx_of_to_plat(struct udevice *dev) if (IS_ERR(pcie->cfg_base)) return PTR_ERR(pcie->cfg_base); + /* Enable the Bridge enable bit */ + rpsc = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC); + rpsc |= XILINX_PCIE_REG_RPSC_BEN; + __raw_writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC); + return 0; } -- cgit v1.3.1 From 1cd876bdac4f0298e1355a5aeddcbc0f19b68821 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 13 Nov 2023 10:05:27 +0100 Subject: xilinx: zynq: Generate dfu for SPI only when enabled Bitmain S9 board is not enabling SPI that's why CONFIG_SYS_SPI_U_BOOT_OFFS symbol is not present which ends in build failure when EFI/DFU infrastructure is enabled. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/3ea0572dbda8f21270c00a77528eb6ec954c7c40.1699866313.git.michal.simek@amd.com --- board/xilinx/zynq/board.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 3b6581e3046..6c365910011 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -184,6 +184,7 @@ void set_dfu_alt_info(char *interface, char *devstr) "mmc 0=boot.bin fat 0 1;" "%s fat 0 1", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); break; +#if defined(CONFIG_SPL_SPI_LOAD) case ZYNQ_BM_QSPI: snprintf(buf, DFU_ALT_BUF_LEN, "sf 0:0=boot.bin raw 0 0x1500000;" @@ -191,6 +192,7 @@ void set_dfu_alt_info(char *interface, char *devstr) CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, CONFIG_SYS_SPI_U_BOOT_OFFS); break; +#endif default: return; } -- cgit v1.3.1 From a6955800bfe47131dcabc65a4f5140f556387944 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 13 Nov 2023 10:05:28 +0100 Subject: xilinx: zynq: Enable capsule update for Antminer S9 Capsule update helps with easier firmware development that's why enable it by default to be able to update system without replugging SD card again and again. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/8f8deb5f46c0f2d4b687b626f4de221873133856.1699866313.git.michal.simek@amd.com --- configs/bitmain_antminer_s9_defconfig | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index b8c9afd9cfc..5c9b97819b1 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -42,7 +42,6 @@ CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_BOOTZ=y CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_ELF is not set -# CONFIG_CMD_DM is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y @@ -50,6 +49,7 @@ CONFIG_CMD_FPGA_LOADMK=y CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_PART=y # CONFIG_CMD_SETEXPR is not set @@ -60,11 +60,15 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_PXE=y CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_MTDPARTS_SPREAD=y +CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_IS_IN_NAND=y @@ -74,6 +78,8 @@ CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTP_SERVERIP=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_DFU_TIMEOUT=y +CONFIG_DFU_MMC=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQPL=y CONFIG_MMC_SDHCI=y @@ -93,4 +99,6 @@ CONFIG_ZYNQ_SERIAL=y CONFIG_WDT=y CONFIG_WDT_CDNS=y CONFIG_SYS_TIMER_COUNTS_DOWN=y -# CONFIG_EFI_LOADER is not set +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_TOOLS_MKEFICAPSULE=y -- cgit v1.3.1 From 4c18d9f6d0a52ce63993a59d7d63529fd294358f Mon Sep 17 00:00:00 2001 From: Mayuresh Chitale Date: Thu, 16 Nov 2023 22:13:34 +0530 Subject: drivers: xilinx_spi: Use udevice in start_tranfer Modify start_transfer and related functions to take a udevice parameter as input instead of spi_slave. This is needed so that start_transfer can be used directly via the xfer callback. Also fix a compiler warning. Signed-off-by: Mayuresh Chitale Tested-by: Love Kumar Link: https://lore.kernel.org/r/20231116164336.140171-2-mchitale@ventanamicro.com Signed-off-by: Michal Simek --- drivers/spi/xilinx_spi.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index b58a3f632a4..d9faceec189 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -67,7 +67,7 @@ /* SPI Slave Select Register (spissr), [1] p13, [2] p13 */ #define SPISSR_MASK(cs) (1 << (cs)) #define SPISSR_ACT(cs) ~SPISSR_MASK(cs) -#define SPISSR_OFF ~0UL +#define SPISSR_OFF (~0U) /* SPI Software Reset Register (ssr) */ #define SPISSR_RESET_VALUE 0x0a @@ -217,9 +217,9 @@ static u32 xilinx_spi_read_rxfifo(struct udevice *bus, u8 *rxp, u32 rxbytes) return i; } -static int start_transfer(struct spi_slave *spi, const void *dout, void *din, u32 len) +static int start_transfer(struct udevice *dev, const void *dout, void *din, u32 len) { - struct udevice *bus = spi->dev->parent; + struct udevice *bus = dev->parent; struct xilinx_spi_priv *priv = dev_get_priv(bus); struct xilinx_spi_regs *regs = priv->regs; u32 count, txbytes, rxbytes; @@ -259,10 +259,9 @@ static int start_transfer(struct spi_slave *spi, const void *dout, void *din, u3 return 0; } -static void xilinx_spi_startup_block(struct spi_slave *spi) +static void xilinx_spi_startup_block(struct udevice *dev) { - struct dm_spi_slave_plat *slave_plat = - dev_get_parent_plat(spi->dev); + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); unsigned char txp; unsigned char rxp[8]; @@ -270,13 +269,13 @@ static void xilinx_spi_startup_block(struct spi_slave *spi) * Perform a dummy read as a work around for * the startup block issue. */ - spi_cs_activate(spi->dev, slave_plat->cs); + spi_cs_activate(dev, slave_plat->cs); txp = 0x9f; - start_transfer(spi, (void *)&txp, NULL, 1); + start_transfer(dev, (void *)&txp, NULL, 1); - start_transfer(spi, NULL, (void *)rxp, 6); + start_transfer(dev, NULL, (void *)rxp, 6); - spi_cs_deactivate(spi->dev); + spi_cs_deactivate(dev); } static int xilinx_spi_mem_exec_op(struct spi_slave *spi, @@ -294,14 +293,15 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi, * as QSPI provides command. So first command fails. */ if (!startup) { - xilinx_spi_startup_block(spi); + xilinx_spi_startup_block(spi->dev); startup++; } spi_cs_activate(spi->dev, slave_plat->cs); if (op->cmd.opcode) { - ret = start_transfer(spi, (void *)&op->cmd.opcode, NULL, 1); + ret = start_transfer(spi->dev, (void *)&op->cmd.opcode, + NULL, 1); if (ret) goto done; } @@ -313,7 +313,7 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi, addr_buf[i] = op->addr.val >> (8 * (op->addr.nbytes - i - 1)); - ret = start_transfer(spi, (void *)addr_buf, NULL, + ret = start_transfer(spi->dev, (void *)addr_buf, NULL, op->addr.nbytes); if (ret) goto done; @@ -322,16 +322,16 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi, dummy_len = (op->dummy.nbytes * op->data.buswidth) / op->dummy.buswidth; - ret = start_transfer(spi, NULL, NULL, dummy_len); + ret = start_transfer(spi->dev, NULL, NULL, dummy_len); if (ret) goto done; } if (op->data.nbytes) { if (op->data.dir == SPI_MEM_DATA_IN) { - ret = start_transfer(spi, NULL, + ret = start_transfer(spi->dev, NULL, op->data.buf.in, op->data.nbytes); } else { - ret = start_transfer(spi, op->data.buf.out, + ret = start_transfer(spi->dev, op->data.buf.out, NULL, op->data.nbytes); } if (ret) -- cgit v1.3.1 From 954d437d266207e6cb6c5d5706891ddde3671b6e Mon Sep 17 00:00:00 2001 From: Mayuresh Chitale Date: Thu, 16 Nov 2023 22:13:35 +0530 Subject: drivers: xilinx_spi: Add xfer callback Add the xfer callback which is used by the MMC_SPI driver and generally by the dm_spi_xfer callback. Signed-off-by: Mayuresh Chitale Tested-by: Love Kumar Link: https://lore.kernel.org/r/20231116164336.140171-3-mchitale@ventanamicro.com Signed-off-by: Michal Simek --- drivers/spi/xilinx_spi.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index d9faceec189..b63cda20912 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -278,6 +278,18 @@ static void xilinx_spi_startup_block(struct udevice *dev) spi_cs_deactivate(dev); } +static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev); + int ret; + + spi_cs_activate(dev, slave_plat->cs); + ret = start_transfer(dev, dout, din, bitlen / 8); + spi_cs_deactivate(dev); + return ret; +} + static int xilinx_spi_mem_exec_op(struct spi_slave *spi, const struct spi_mem_op *op) { @@ -427,6 +439,7 @@ static const struct spi_controller_mem_ops xilinx_spi_mem_ops = { static const struct dm_spi_ops xilinx_spi_ops = { .claim_bus = xilinx_spi_claim_bus, .release_bus = xilinx_spi_release_bus, + .xfer = xilinx_spi_xfer, .set_speed = xilinx_spi_set_speed, .set_mode = xilinx_spi_set_mode, .mem_ops = &xilinx_spi_mem_ops, -- cgit v1.3.1 From 218539e2e7fab46bb35fb09b38ac4de4480e7836 Mon Sep 17 00:00:00 2001 From: Mayuresh Chitale Date: Thu, 16 Nov 2023 22:13:36 +0530 Subject: drivers: xilinx_spi: Probe fifo_depth at runtime If the fifo-size DT parameter is not provided then probe the controller's fifo depth at runtime. This is ported from a patch in the Linux Xilinx SPI driver. Signed-off-by: Mayuresh Chitale Reviewed-by: Michal Simek Link: https://lore.kernel.org/r/1422029330-10971-5-git-send-email-ricardo.ribalda@gmail.com Tested-by: Love Kumar Link: https://lore.kernel.org/r/20231116164336.140171-4-mchitale@ventanamicro.com Signed-off-by: Michal Simek --- drivers/spi/xilinx_spi.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index b63cda20912..94ddf4967ea 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -109,6 +109,27 @@ struct xilinx_spi_priv { u8 startup; }; +static int xilinx_spi_find_buffer_size(struct xilinx_spi_regs *regs) +{ + u8 sr; + int n_words = 0; + + /* + * Before the buffer_size detection reset the core + * to make sure to start with a clean state. + */ + writel(SPISSR_RESET_VALUE, ®s->srr); + + /* Fill the Tx FIFO with as many words as possible */ + do { + writel(0, ®s->spidtr); + sr = readl(®s->spisr); + n_words++; + } while (!(sr & SPISR_TX_FULL)); + + return n_words; +} + static int xilinx_spi_probe(struct udevice *bus) { struct xilinx_spi_priv *priv = dev_get_priv(bus); @@ -116,6 +137,8 @@ static int xilinx_spi_probe(struct udevice *bus) regs = priv->regs = dev_read_addr_ptr(bus); priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0); + if (!priv->fifo_depth) + priv->fifo_depth = xilinx_spi_find_buffer_size(regs); writel(SPISSR_RESET_VALUE, ®s->srr); -- cgit v1.3.1 From 2c8a09219cdb04450173f41a0b5449998b8031c4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 10 Nov 2023 13:34:35 +0100 Subject: arm64: zynqmp: Add multiboot support for SPL/SPI offset calculation In case of A/B update systems there should be an option to load the same binary/binaries to different location and they should work. Before this patch boot.bin with U-Boot SPL can be added to whatever 32k offset in SPI and SPL finds u-boot.itb at CONFIG_SYS_SPI_U_BOOT_OFFS offset. In case of A/B update systems that means that SPL is at different locations but it still points to the same u-boot.itb which is not correct. That's why include multiboot value to offset calculation to be able to point to image from the same base. It doesn't affect any current system which starts from 0 offset. This patch also change Kria defconfig which uses A/B setup. Partition A starts at multiboot 64, partition B at multiboot 496. And also print message about used SPI offset which is useful for all cases. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/93903a53ad9358ae69991558b787f574797effbe.1699619666.git.michal.simek@amd.com --- board/xilinx/zynqmp/zynqmp.c | 15 +++++++++++++++ configs/xilinx_zynqmp_kria_defconfig | 2 +- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index f1628030848..59feaaf6f32 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -681,3 +681,18 @@ void set_dfu_alt_info(char *interface, char *devstr) puts("DFU alt info setting: done\n"); } #endif + +#if defined(CONFIG_SPL_SPI_LOAD) +unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash) +{ + u32 offset; + int multiboot = multi_boot(); + + offset = multiboot * SZ_32K; + offset += CONFIG_SYS_SPI_U_BOOT_OFFS; + + log_info("SPI offset:\t0x%x\n", offset); + + return offset; +} +#endif diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index daedf1de01e..a20df1a4072 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -48,7 +48,7 @@ CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_SYS_MAXARGS=64 -- cgit v1.3.1 From 0e54b473f2ea121972d8c97cc0fb3a608502edfa Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 24 Nov 2023 14:16:49 +0100 Subject: ARM: zynq: Remove deprecated device_type property Based on DT specification device_type property is deprecated and should be used only for cpu and memory nodes. That's why remove other usage. In this case ethernet-phy. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/70201ca4ad49ace6f7c27015af9df58a335d2a1f.1700831800.git.michal.simek@amd.com --- arch/arm/dts/zynq-cc108.dts | 1 - arch/arm/dts/zynq-syzygy-hub.dts | 1 - arch/arm/dts/zynq-zc702.dts | 1 - arch/arm/dts/zynq-zc706.dts | 1 - arch/arm/dts/zynq-zc770-xm010.dts | 1 - arch/arm/dts/zynq-zc770-xm013.dts | 1 - arch/arm/dts/zynq-zed.dts | 1 - arch/arm/dts/zynq-zybo-z7.dts | 1 - arch/arm/dts/zynq-zybo.dts | 1 - 9 files changed, 9 deletions(-) diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts index 593ca4a49cf..ec39aad1c0c 100644 --- a/arch/arm/dts/zynq-cc108.dts +++ b/arch/arm/dts/zynq-cc108.dts @@ -49,7 +49,6 @@ ethernet_phy: ethernet-phy@1 { reg = <1>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts index 99f248d4e5f..1b3eddc667d 100644 --- a/arch/arm/dts/zynq-syzygy-hub.dts +++ b/arch/arm/dts/zynq-syzygy-hub.dts @@ -48,7 +48,6 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 0106d7bb177..6083f99dc8d 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -88,7 +88,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index ceea982546e..bbdbf99aee9 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -49,7 +49,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index 199384bec96..ff475f86824 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -46,7 +46,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index add75999f47..02298b98163 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -41,7 +41,6 @@ ethernet_phy: ethernet-phy@7 { reg = <7>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index 70bc41822e3..1d967bd1a28 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -44,7 +44,6 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts index 83b84130979..b621860705c 100644 --- a/arch/arm/dts/zynq-zybo-z7.dts +++ b/arch/arm/dts/zynq-zybo-z7.dts @@ -55,7 +55,6 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; }; }; diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts index 0ce5238c9a8..c3d97858d7f 100644 --- a/arch/arm/dts/zynq-zybo.dts +++ b/arch/arm/dts/zynq-zybo.dts @@ -45,7 +45,6 @@ ethernet_phy: ethernet-phy@0 { reg = <0>; - device_type = "ethernet-phy"; }; }; -- cgit v1.3.1 From cfb41b011dd675564d2ac2f6613e54c999fb8399 Mon Sep 17 00:00:00 2001 From: Tanmay Shah Date: Mon, 4 Dec 2023 13:56:17 -0800 Subject: mailbox: zynqmp: support smc calls to TF-A Use SMC calls to TF-A to operate IPI for execution level below 3. For EL3 use hardcode IPI registers as TF-A isn't available in EL3. Hence, in EL3 remote and local IPI ids retrieved using xlnx,ipi-id property are unused. Signed-off-by: Tanmay Shah Link: https://lore.kernel.org/r/20231204215620.63334-2-tanmay.shah@amd.com Signed-off-by: Michal Simek --- drivers/mailbox/zynqmp-ipi.c | 88 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 86 insertions(+), 2 deletions(-) diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index 3e4ec47389f..acd0b287dba 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -8,9 +8,12 @@ #include #include #include +#include #include #include #include +#include +#include #include #include #include @@ -21,6 +24,43 @@ #define IPI_BIT_MASK_PMU0 0x10000 #define IPI_INT_REG_BASE_APU 0xFF300000 +/* IPI agent ID any */ +#define IPI_ID_ANY 0xFFUL + +/* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */ +#define USE_SMC 0 + +/* Default IPI SMC function IDs */ +#define SMC_IPI_MAILBOX_OPEN 0x82001000U +#define SMC_IPI_MAILBOX_RELEASE 0x82001001U +#define SMC_IPI_MAILBOX_STATUS_ENQUIRY 0x82001002U +#define SMC_IPI_MAILBOX_NOTIFY 0x82001003U +#define SMC_IPI_MAILBOX_ACK 0x82001004U +#define SMC_IPI_MAILBOX_ENABLE_IRQ 0x82001005U +#define SMC_IPI_MAILBOX_DISABLE_IRQ 0x82001006U + +/* IPI SMC Macros */ + +/* + * Flag to indicate if notification interrupt + * to be disabled. + */ +#define IPI_SMC_ENQUIRY_DIRQ_MASK BIT(0) + +/* + * Flag to indicate if notification interrupt + * to be enabled. + */ +#define IPI_SMC_ACK_EIRQ_MASK BIT(0) + +/* IPI mailbox status */ +#define IPI_MB_STATUS_IDLE 0 +#define IPI_MB_STATUS_SEND_PENDING 1 +#define IPI_MB_STATUS_RECV_PENDING 2 + +#define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */ +#define IPI_MB_CHNL_RX 1 /* IPI mailbox RX channel */ + struct ipi_int_regs { u32 trig; /* 0x0 */ u32 obs; /* 0x4 */ @@ -39,8 +79,23 @@ struct zynqmp_ipi { void __iomem *local_res_regs; void __iomem *remote_req_regs; void __iomem *remote_res_regs; + u32 remote_id; + u32 local_id; }; +static int zynqmp_ipi_fw_call(struct zynqmp_ipi *ipi_mbox, + unsigned long a0, unsigned long a3) +{ + struct arm_smccc_res res = {0}; + unsigned long a1, a2; + + a1 = ipi_mbox->local_id; + a2 = ipi_mbox->remote_id; + arm_smccc_smc(a0, a1, a2, a3, 0, 0, 0, 0, &res); + + return (int)res.a0; +} + static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data) { const struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data; @@ -51,6 +106,15 @@ static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data) for (size_t i = 0; i < msg->len; i++) writel(msg->buf[i], &mbx[i]); + /* Use SMC calls for Exception Level less than 3 where TF-A is available */ + if (!IS_ENABLED(CONFIG_SPL_BUILD) && current_el() < 3) { + ret = zynqmp_ipi_fw_call(zynqmp, SMC_IPI_MAILBOX_NOTIFY, 0); + + debug("%s, send %ld bytes\n", __func__, msg->len); + + return ret; + } + /* Write trigger interrupt */ writel(IPI_BIT_MASK_PMU0, &ipi_int_apu->trig); @@ -67,16 +131,23 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data) struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data; struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev); u32 *mbx = (u32 *)zynqmp->local_res_regs; + int ret = 0; /* * PMU Firmware does not trigger IPI interrupt for API call responses so - * there is no need to check ISR flags + * there is no need to check ISR flags for EL3. */ for (size_t i = 0; i < msg->len; i++) msg->buf[i] = readl(&mbx[i]); + /* Ack to remote if EL is not 3 */ + if (!IS_ENABLED(CONFIG_SPL_BUILD) && current_el() < 3) { + ret = zynqmp_ipi_fw_call(zynqmp, SMC_IPI_MAILBOX_ACK, + IPI_SMC_ACK_EIRQ_MASK); + } + debug("%s, recv %ld bytes\n", __func__, msg->len); - return 0; + return ret; }; static int zynqmp_ipi_probe(struct udevice *dev) @@ -84,6 +155,7 @@ static int zynqmp_ipi_probe(struct udevice *dev) struct zynqmp_ipi *zynqmp = dev_get_priv(dev); struct resource res; ofnode node; + int ret; debug("%s(dev=%p)\n", __func__, dev); @@ -91,6 +163,18 @@ static int zynqmp_ipi_probe(struct udevice *dev) /* Note IPI mailbox node needs to be the first one in DT */ node = ofnode_first_subnode(dev_ofnode(dev)); + ret = dev_read_u32(dev, "xlnx,ipi-id", &zynqmp->local_id); + if (ret) { + dev_err(dev, "can't get local ipi id\n"); + return ret; + } + + ret = ofnode_read_u32(node, "xlnx,ipi-id", &zynqmp->remote_id); + if (ret) { + dev_err(dev, "can't get remote ipi id\n"); + return ret; + } + if (ofnode_read_resource_byname(node, "local_request_region", &res)) { dev_err(dev, "No reg property for local_request_region\n"); return -EINVAL; -- cgit v1.3.1 From e2c3e9c2b1dda376c10e991af5ead7404a240682 Mon Sep 17 00:00:00 2001 From: Tanmay Shah Date: Mon, 4 Dec 2023 13:56:18 -0800 Subject: mailbox: add el3 support only for zynqmp platform If U-Boot is running in Exception Level 3 then use hardcode register values for mailbox message passing with PMU. This is only supported for zynqmp platform. Signed-off-by: Tanmay Shah Link: https://lore.kernel.org/r/20231204215620.63334-3-tanmay.shah@amd.com Signed-off-by: Michal Simek --- drivers/mailbox/zynqmp-ipi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index acd0b287dba..e76561f3102 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -81,6 +81,7 @@ struct zynqmp_ipi { void __iomem *remote_res_regs; u32 remote_id; u32 local_id; + bool el3_supported; }; static int zynqmp_ipi_fw_call(struct zynqmp_ipi *ipi_mbox, @@ -115,6 +116,12 @@ static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data) return ret; } + /* Return if EL3 is not supported */ + if (!zynqmp->el3_supported) { + dev_err(chan->dev, "mailbox in EL3 only supported for zynqmp"); + return -EOPNOTSUPP; + } + /* Write trigger interrupt */ writel(IPI_BIT_MASK_PMU0, &ipi_int_apu->trig); @@ -159,6 +166,9 @@ static int zynqmp_ipi_probe(struct udevice *dev) debug("%s(dev=%p)\n", __func__, dev); + if (IS_ENABLED(CONFIG_SPL_BUILD) || of_machine_is_compatible("xlnx,zynqmp")) + zynqmp->el3_supported = true; + /* Get subnode where the regs are defined */ /* Note IPI mailbox node needs to be the first one in DT */ node = ofnode_first_subnode(dev_ofnode(dev)); -- cgit v1.3.1 From babee72ff618b7ad98ff5c1800659a505cdc0a94 Mon Sep 17 00:00:00 2001 From: Tanmay Shah Date: Mon, 4 Dec 2023 13:56:19 -0800 Subject: mailbox: zynqmp: support mulitple mboxes via device-tree As of now only one mailbox agent is supported by mailbox driver. On zynqmp platform there are about 7 mailbox agents which can communicate over same IPI channel to U-Boot. This patch series introduces new "zynqmp_ipi_dest" driver which adds one to multi-channel mailbox support. Following format in device-tree is expected as per latest bindings: zynqmp-ipi { compatible = "xlnx,zynqmp-ipi-mailbox"; mbox_1: mailbox@1 { /* New compatible for child node */ compatible = "xlnx,zynqmp-ipi-dest-mailbox"; ... }; ... mbox_n: mailbox@n { compatible = "xlnx,zynqmp-ipi-dest-mailbox"; ... } }; Then mailbox client uses child mailbox node as following: ipi-dest-1 { ... mboxes = , ; mbox-names = "tx", "rx"; ... }; New "zynqmp_ipi_dest" driver is for devices with "xlnx,zynqmp-ipi-dest-mailbox" compatible string. This driver will take care of mailbox send recv ops and it replaces previous "zynqmp_ipi" driver. Now "zynqmp_ipi" driver simply binds each child device with "zynqmp_ipi_dest" driver. However, its important to maintain backward comaptibility with previous bindings where child node does not have compatible string. In such case, new driver isn't probed by U-Boot during boot and system fails to boot. To resolve this issue firmware-zynqmp.c driver probes all the IPI parent node driver which binds each child node device with "zynqmp_ipi_dest" driver. This makes sure corresponding child driver will be probed when requested using mbox_get_by_name or mbox_get_by_idx framework calls. This way multiple mailbox agents are supported in device-tree without breaking previous binding support. Signed-off-by: Tanmay Shah Link: https://lore.kernel.org/r/20231204215620.63334-4-tanmay.shah@amd.com Signed-off-by: Michal Simek --- drivers/firmware/firmware-zynqmp.c | 22 +++++++++++++ drivers/mailbox/zynqmp-ipi.c | 65 ++++++++++++++++++++++++++++++-------- 2 files changed, 74 insertions(+), 13 deletions(-) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 8ea15c7ed33..dfad798a2e7 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -290,10 +291,31 @@ int zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size) static int zynqmp_power_probe(struct udevice *dev) { + struct udevice *ipi_dev; + ofnode ipi_node; int ret; debug("%s, (dev=%p)\n", __func__, dev); + /* + * Probe all IPI parent node driver. It is important to have IPI + * devices available when requested by mbox_get_by* API. + * If IPI device isn't available, then mailbox request fails and + * that causes system boot failure. + * To avoid this make sure all IPI parent drivers are probed here, + * and IPI parent driver binds each child node to mailbox driver. + * This way mbox_get_by_* API will have correct mailbox device + * driver probed. + */ + ofnode_for_each_compatible_node(ipi_node, "xlnx,zynqmp-ipi-mailbox") { + ret = uclass_get_device_by_ofnode(UCLASS_NOP, ipi_node, &ipi_dev); + if (ret) { + dev_err(dev, "failed to get IPI device from node %s\n", + ofnode_get_name(ipi_node)); + return ret; + } + } + ret = mbox_get_by_name(dev, "tx", &zynqmp_power.tx_chan); if (ret) { debug("%s: Cannot find tx mailbox\n", __func__); diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index e76561f3102..eb86847bbe2 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -157,7 +158,7 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data) return ret; }; -static int zynqmp_ipi_probe(struct udevice *dev) +static int zynqmp_ipi_dest_probe(struct udevice *dev) { struct zynqmp_ipi *zynqmp = dev_get_priv(dev); struct resource res; @@ -166,14 +167,12 @@ static int zynqmp_ipi_probe(struct udevice *dev) debug("%s(dev=%p)\n", __func__, dev); + node = dev_ofnode(dev); + if (IS_ENABLED(CONFIG_SPL_BUILD) || of_machine_is_compatible("xlnx,zynqmp")) zynqmp->el3_supported = true; - /* Get subnode where the regs are defined */ - /* Note IPI mailbox node needs to be the first one in DT */ - node = ofnode_first_subnode(dev_ofnode(dev)); - - ret = dev_read_u32(dev, "xlnx,ipi-id", &zynqmp->local_id); + ret = dev_read_u32(dev->parent, "xlnx,ipi-id", &zynqmp->local_id); if (ret) { dev_err(dev, "can't get local ipi id\n"); return ret; @@ -191,6 +190,8 @@ static int zynqmp_ipi_probe(struct udevice *dev) }; zynqmp->local_req_regs = devm_ioremap(dev, res.start, (res.start - res.end)); + if (!zynqmp->local_req_regs) + return -EINVAL; if (ofnode_read_resource_byname(node, "local_response_region", &res)) { dev_err(dev, "No reg property for local_response_region\n"); @@ -198,6 +199,8 @@ static int zynqmp_ipi_probe(struct udevice *dev) }; zynqmp->local_res_regs = devm_ioremap(dev, res.start, (res.start - res.end)); + if (!zynqmp->local_res_regs) + return -EINVAL; if (ofnode_read_resource_byname(node, "remote_request_region", &res)) { dev_err(dev, "No reg property for remote_request_region\n"); @@ -205,6 +208,8 @@ static int zynqmp_ipi_probe(struct udevice *dev) }; zynqmp->remote_req_regs = devm_ioremap(dev, res.start, (res.start - res.end)); + if (!zynqmp->remote_req_regs) + return -EINVAL; if (ofnode_read_resource_byname(node, "remote_response_region", &res)) { dev_err(dev, "No reg property for remote_response_region\n"); @@ -212,25 +217,59 @@ static int zynqmp_ipi_probe(struct udevice *dev) }; zynqmp->remote_res_regs = devm_ioremap(dev, res.start, (res.start - res.end)); + if (!zynqmp->remote_res_regs) + return -EINVAL; return 0; }; -static const struct udevice_id zynqmp_ipi_ids[] = { - { .compatible = "xlnx,zynqmp-ipi-mailbox" }, - { } +static int zynqmp_ipi_probe(struct udevice *dev) +{ + struct udevice *cdev; + ofnode cnode; + int ret; + + debug("%s(dev=%p)\n", __func__, dev); + + dev_for_each_subnode(cnode, dev) { + ret = device_bind_driver_to_node(dev, "zynqmp_ipi_dest", + ofnode_get_name(cnode), + cnode, &cdev); + if (ret) + return ret; + } + + return 0; }; -struct mbox_ops zynqmp_ipi_mbox_ops = { +struct mbox_ops zynqmp_ipi_dest_mbox_ops = { .send = zynqmp_ipi_send, .recv = zynqmp_ipi_recv, }; +static const struct udevice_id zynqmp_ipi_dest_ids[] = { + { .compatible = "xlnx,zynqmp-ipi-dest-mailbox" }, + { } +}; + +U_BOOT_DRIVER(zynqmp_ipi_dest) = { + .name = "zynqmp_ipi_dest", + .id = UCLASS_MAILBOX, + .of_match = zynqmp_ipi_dest_ids, + .probe = zynqmp_ipi_dest_probe, + .priv_auto = sizeof(struct zynqmp_ipi), + .ops = &zynqmp_ipi_dest_mbox_ops, +}; + +static const struct udevice_id zynqmp_ipi_ids[] = { + { .compatible = "xlnx,zynqmp-ipi-mailbox" }, + { } +}; + U_BOOT_DRIVER(zynqmp_ipi) = { .name = "zynqmp_ipi", - .id = UCLASS_MAILBOX, + .id = UCLASS_NOP, .of_match = zynqmp_ipi_ids, .probe = zynqmp_ipi_probe, - .priv_auto = sizeof(struct zynqmp_ipi), - .ops = &zynqmp_ipi_mbox_ops, + .flags = DM_FLAG_PROBE_AFTER_BIND, }; -- cgit v1.3.1 From 622db30860396dda00567b43e7864571ddaa5889 Mon Sep 17 00:00:00 2001 From: Tanmay Shah Date: Mon, 4 Dec 2023 13:56:20 -0800 Subject: dts: zynqmp: add missing destination mailbox compatible The commit in linux kernel 81186dc16101 ("dt-bindings: zynqmp: add destination mailbox compatible") make compatible string for child nodes mandatory that's why add it. Signed-off-by: Tanmay Shah Link: https://lore.kernel.org/r/20231204215620.63334-5-tanmay.shah@amd.com Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 58a56bc1bd8..21be909b1ab 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -148,6 +148,7 @@ ipi_mailbox_pmu1: mailbox@ff9905c0 { bootph-all; + compatible = "xlnx,zynqmp-ipi-dest-mailbox"; reg = <0x0 0xff9905c0 0x0 0x20>, <0x0 0xff9905e0 0x0 0x20>, <0x0 0xff990e80 0x0 0x20>, -- cgit v1.3.1 From 4f340244b974d52c48e01cb845cfe8315f7e5764 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 4 Dec 2023 14:15:15 +0530 Subject: clk: zynqmp: enable topsw_lsbus clock Display port is using topsw_lsbus clock, it is failing while enabling the clock, so enable the topsw_lsbus clock. Signed-off-by: Sreekanth Sunnam Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20231204084515.9488-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- drivers/clk/clk_zynqmp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 1cfe0e25b10..c059b9e8e65 100644 --- a/drivers/clk/clk_zynqmp.c +++ b/drivers/clk/clk_zynqmp.c @@ -844,6 +844,7 @@ static int zynqmp_clk_enable(struct clk *clk) break; case qspi_ref ... can1_ref: case lpd_lsbus: + case topsw_lsbus: clkact_shift = 24; mask = 0x1; break; -- cgit v1.3.1