From 0dc1fc22af86d16993388d9ed9630dbaa2d51826 Mon Sep 17 00:00:00 2001
From: Rafal Jaworowski <raj@semihalf.com>
Date: Tue, 29 Jan 2008 16:57:38 +0100
Subject: API: Convert conditional building to the new scheme.

This fixes a build breakage with CONFIG_API enabled, which appeared after
the recent changes in the U-Boot build system.

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
---
 Makefile | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 0f6cc59aeeb..3e7cffcd342 100644
--- a/Makefile
+++ b/Makefile
@@ -253,9 +253,7 @@ LIBS += $(shell if [ -d post/board/$(BOARDDIR) ]; then echo \
 	"post/board/$(BOARDDIR)/libpost$(BOARD).a"; fi)
 LIBS += common/libcommon.a
 LIBS += libfdt/libfdt.a
-ifeq ($(CONFIG_API),y)
 LIBS += api/libapi.a
-endif
 
 LIBS := $(addprefix $(obj),$(LIBS))
 .PHONY : $(LIBS)
@@ -266,11 +264,8 @@ PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -
 # The "tools" are needed early, so put this first
 # Don't include stuff already done in $(LIBS)
 SUBDIRS	= tools \
-	  examples
-
-ifeq ($(CONFIG_API),y)
-SUBDIRS += api_examples
-endif
+	  examples \
+	  api_examples
 
 .PHONY : $(SUBDIRS)
 
-- 
cgit v1.3.1


From 60fa72d65610c7ef33e1d6db858979d05ff0df58 Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Mon, 4 Feb 2008 19:26:55 -0500
Subject: unify the Blackfin board targets

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 Makefile | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 0f6cc59aeeb..2413ed62943 100644
--- a/Makefile
+++ b/Makefile
@@ -2827,20 +2827,19 @@ xupv2p_config:	unconfig
 	@echo "#define CONFIG_XUPV2P 1" >> $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze xupv2p xilinx
 
-#########################################################################
-## Blackfin
-#########################################################################
-bf533-ezkit_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) blackfin bf533 bf533-ezkit
+#========================================================================
+# Blackfin
+#========================================================================
 
-bf533-stamp_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) blackfin bf533 bf533-stamp
+# Analog Devices boards
+BFIN_BOARDS = bf533-ezkit bf533-stamp bf537-stamp bf561-ezkit
 
-bf537-stamp_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) blackfin bf537 bf537-stamp
+$(BFIN_BOARDS:%=%_config)	: unconfig
+	@$(MKCONFIG) $(@:_config=) blackfin $(firstword $(subst -, ,$@)) $(@:_config=)
 
-bf561-ezkit_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) blackfin bf561 bf561-ezkit
+$(BFIN_BOARDS):
+	$(MAKE) $@_config
+	$(MAKE)
 
 #========================================================================
 # AVR32
-- 
cgit v1.3.1


From 0858b835e7ea501ea084d34cef75932f098342bb Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Mon, 4 Feb 2008 19:26:55 -0500
Subject: add support for Blackfin symbol prefixes to examples

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 Makefile           | 2 +-
 blackfin_config.mk | 2 ++
 examples/Makefile  | 2 +-
 3 files changed, 4 insertions(+), 2 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 2413ed62943..dc023a9bb3b 100644
--- a/Makefile
+++ b/Makefile
@@ -312,7 +312,7 @@ $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
 $(obj)u-boot:		depend $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
-		UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed  -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
+		UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed  -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
 		cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
 			--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
 			-Map u-boot.map -o u-boot
diff --git a/blackfin_config.mk b/blackfin_config.mk
index beb9498e77f..e91318e9b4d 100644
--- a/blackfin_config.mk
+++ b/blackfin_config.mk
@@ -23,3 +23,5 @@
 
 PLATFORM_RELFLAGS += -ffixed-P5
 PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
+
+SYM_PREFIX = _
diff --git a/examples/Makefile b/examples/Makefile
index 79af4b07cd3..d63fa703232 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -162,7 +162,7 @@ $(LIB):	$(obj).depend $(LIBOBJS)
 $(ELF):
 $(obj)%:	$(obj)%.o $(LIB)
 		$(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \
-			-o $@ -e $(notdir $(<:.o=)) $< $(LIB) \
+			-o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
 			-L$(gcclibdir) -lgcc
 
 $(SREC):
-- 
cgit v1.3.1


From cc2977acc3bbbb7850f16645dd1081f95335868d Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Mon, 4 Feb 2008 19:26:57 -0500
Subject: move Blackfin cpu object list to respective cpu directories

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 Makefile           | 12 ------------
 cpu/bf533/Makefile |  4 ++--
 cpu/bf537/Makefile |  4 ++--
 cpu/bf561/Makefile |  4 ++--
 4 files changed, 6 insertions(+), 18 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index dc023a9bb3b..f6c23417031 100644
--- a/Makefile
+++ b/Makefile
@@ -185,18 +185,6 @@ endif
 ifeq ($(CPU),mpc85xx)
 OBJS += cpu/$(CPU)/resetvec.o
 endif
-ifeq ($(CPU),bf533)
-OBJS += cpu/$(CPU)/start1.o	cpu/$(CPU)/interrupt.o	cpu/$(CPU)/cache.o
-OBJS += cpu/$(CPU)/flush.o	cpu/$(CPU)/init_sdram.o
-endif
-ifeq ($(CPU),bf537)
-OBJS += cpu/$(CPU)/start1.o	cpu/$(CPU)/interrupt.o	cpu/$(CPU)/cache.o
-OBJS += cpu/$(CPU)/flush.o	cpu/$(CPU)/init_sdram.o
-endif
-ifeq ($(CPU),bf561)
-OBJS += cpu/$(CPU)/start1.o	cpu/$(CPU)/interrupt.o	cpu/$(CPU)/cache.o
-OBJS += cpu/$(CPU)/flush.o 	cpu/$(CPU)/init_sdram.o
-endif
 
 OBJS := $(addprefix $(obj),$(OBJS))
 
diff --git a/cpu/bf533/Makefile b/cpu/bf533/Makefile
index dd4f299acd0..ad48f1c5c16 100644
--- a/cpu/bf533/Makefile
+++ b/cpu/bf533/Makefile
@@ -28,12 +28,12 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).a
 
-START	= start.o start1.o interrupt.o cache.o flush.o init_sdram.o
+SOBJS	= start.o start1.o interrupt.o cache.o flush.o init_sdram.o
 COBJS	= cpu.o traps.o ints.o serial.o interrupts.o video.o
 
 EXTRA = init_sdram_bootrom_initblock.o
 
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
 START	:= $(addprefix $(obj),$(START))
 
diff --git a/cpu/bf537/Makefile b/cpu/bf537/Makefile
index 8b0f9c0e931..06d1aae4e2e 100644
--- a/cpu/bf537/Makefile
+++ b/cpu/bf537/Makefile
@@ -28,12 +28,12 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).a
 
-START	= start.o start1.o interrupt.o cache.o flush.o init_sdram.o
+SOBJS	= start.o start1.o interrupt.o cache.o flush.o init_sdram.o
 COBJS	= cpu.o traps.o ints.o serial.o interrupts.o video.o i2c.o
 
 EXTRA = init_sdram_bootrom_initblock.o
 
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
 START	:= $(addprefix $(obj),$(START))
 
diff --git a/cpu/bf561/Makefile b/cpu/bf561/Makefile
index 29471694d95..418a4370eba 100644
--- a/cpu/bf561/Makefile
+++ b/cpu/bf561/Makefile
@@ -28,12 +28,12 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).a
 
-START	= start.o start1.o interrupt.o cache.o flush.o init_sdram.o
+SOBJS	= start.o start1.o interrupt.o cache.o flush.o init_sdram.o
 COBJS	= cpu.o traps.o ints.o serial.o interrupts.o video.o
 
 EXTRA = init_sdram_bootrom_initblock.o
 
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
 START	:= $(addprefix $(obj),$(START))
 
-- 
cgit v1.3.1


From 94a91e248b71c3ff951fc27cff6909e82ca37d15 Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Mon, 4 Feb 2008 19:26:57 -0500
Subject: generate u-boot.ldr for Blackfin targets

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 .gitignore         |  4 ++++
 Makefile           | 12 ++++++++++++
 blackfin_config.mk |  5 +++++
 config.mk          |  1 +
 4 files changed, 22 insertions(+)

(limited to 'Makefile')

diff --git a/.gitignore b/.gitignore
index cda275ec73b..e29dce92977 100644
--- a/.gitignore
+++ b/.gitignore
@@ -17,9 +17,13 @@
 
 /System.map
 /u-boot
+/u-boot.hex
 /u-boot.map
 /u-boot.bin
 /u-boot.srec
+/u-boot.ldr
+/u-boot.ldr.hex
+/u-boot.ldr.srec
 
 #
 # Generated files
diff --git a/Makefile b/Makefile
index f6c23417031..b4a39945bf0 100644
--- a/Makefile
+++ b/Makefile
@@ -274,6 +274,9 @@ __LIBS := $(subst $(obj),,$(LIBS))
 #########################################################################
 
 ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND)
+ifeq ($(ARCH),blackfin)
+ALL += $(obj)u-boot.ldr
+endif
 
 all:		$(ALL)
 
@@ -286,6 +289,15 @@ $(obj)u-boot.srec:	$(obj)u-boot
 $(obj)u-boot.bin:	$(obj)u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
 
+$(obj)u-boot.ldr:	$(obj)u-boot
+		$(LDR) -T $(CONFIG_BFIN_CPU) -f -c $@ $< $(LDR_FLAGS)
+
+$(obj)u-boot.ldr.hex:	$(obj)u-boot.ldr
+		$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@ -I binary
+
+$(obj)u-boot.ldr.srec:	$(obj)u-boot.ldr
+		$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
+
 $(obj)u-boot.img:	$(obj)u-boot.bin
 		./tools/mkimage -A $(ARCH) -T firmware -C none \
 		-a $(TEXT_BASE) -e 0 \
diff --git a/blackfin_config.mk b/blackfin_config.mk
index e91318e9b4d..a7513ea4dcf 100644
--- a/blackfin_config.mk
+++ b/blackfin_config.mk
@@ -25,3 +25,8 @@ PLATFORM_RELFLAGS += -ffixed-P5
 PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
 
 SYM_PREFIX = _
+
+LDR_FLAGS += --use-vmas
+ifeq (,$(findstring s,$(MAKEFLAGS)))
+LDR_FLAGS += --quiet
+endif
diff --git a/config.mk b/config.mk
index 79e5a31b72a..f4312ede6a6 100644
--- a/config.mk
+++ b/config.mk
@@ -121,6 +121,7 @@ CC	= $(CROSS_COMPILE)gcc
 CPP	= $(CC) -E
 AR	= $(CROSS_COMPILE)ar
 NM	= $(CROSS_COMPILE)nm
+LDR	= $(CROSS_COMPILE)ldr
 STRIP	= $(CROSS_COMPILE)strip
 OBJCOPY = $(CROSS_COMPILE)objcopy
 OBJDUMP = $(CROSS_COMPILE)objdump
-- 
cgit v1.3.1


From 88f72527f5b89c0905ad5c36cc2ef8d29dd6bbf0 Mon Sep 17 00:00:00 2001
From: Johannes Stezenbach <js@sig21.net>
Date: Tue, 29 Jan 2008 00:11:25 +0100
Subject: Add dependencies to avoid race conditions with parallel make.

Signed-off-by: Johannes Stezenbach <js@sig21.net>
---
 Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 852dca865c1..3b339ad17e6 100644
--- a/Makefile
+++ b/Makefile
@@ -312,13 +312,13 @@ $(obj)u-boot:		depend $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
 			--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
 			-Map u-boot.map -o u-boot
 
-$(OBJS):	$(obj)include/autoconf.mk
+$(OBJS):	depend $(obj)include/autoconf.mk
 		$(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
 
-$(LIBS):	$(obj)include/autoconf.mk
+$(LIBS):	depend $(obj)include/autoconf.mk
 		$(MAKE) -C $(dir $(subst $(obj),,$@))
 
-$(SUBDIRS):	$(obj)include/autoconf.mk
+$(SUBDIRS):	depend $(obj)include/autoconf.mk
 		$(MAKE) -C $@ all
 
 $(NAND_SPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
-- 
cgit v1.3.1


From b7f6193e76651e1fd606e46eb11915b53cb6618b Mon Sep 17 00:00:00 2001
From: Niklaus Giger <niklaus.giger@netstal.com>
Date: Tue, 5 Feb 2008 10:26:42 +0100
Subject: ppc4xx: HCU4/5. Fix make O=../xx

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
---
 Makefile                    |  2 ++
 board/netstal/hcu4/Makefile | 12 ++++--------
 board/netstal/hcu5/Makefile | 10 ++++------
 3 files changed, 10 insertions(+), 14 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 0f6cc59aeeb..b3a1d2ff886 100644
--- a/Makefile
+++ b/Makefile
@@ -1225,9 +1225,11 @@ G2000_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000
 
 hcu4_config:	unconfig
+	@mkdir -p $(obj)board/netstal/common
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal
 
 hcu5_config:	unconfig
+	@mkdir -p $(obj)board/netstal/common
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal
 
 HH405_config:	unconfig
diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile
index b13d9d446fb..3d1d65d35ea 100644
--- a/board/netstal/hcu4/Makefile
+++ b/board/netstal/hcu4/Makefile
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2007 Netstal Maschinen AG
+# (C) Copyright 2007-2008 Netstal Maschinen AG
 # Niklaus Giger (ng@netstal.com)
 #
 # This program is free software; you can redistribute it and/or
@@ -22,18 +22,14 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-vpath fixed_sdram.c ../common
-vpath hcu_flash.c ../common
-vpath nm_bsp.c ../common
-
 # NOBJS : Netstal common objects
-NOBJS	= ../common/fixed_sdram.o ../common/hcu_flash.o ../common/nm_bsp.o
+NOBJS	= fixed_sdram.o hcu_flash.o nm_bsp.o
 COBJS	= $(BOARD).o
 SOBJS	=
 
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix ../common/,$(NOBJS:.o=.c))
 OBJS	:= $(addprefix $(obj),$(COBJS))
-NOBJS	:= $(addprefix $(obj),$(NOBJS))
+NOBJS	:= $(addprefix $(obj)../common/,$(NOBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(OBJS) $(SOBJS) $(NOBJS)
diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile
index 9f248a441d7..349c653e7f3 100644
--- a/board/netstal/hcu5/Makefile
+++ b/board/netstal/hcu5/Makefile
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2007 Netstal Maschinen AG
+# (C) Copyright 2007-2008 Netstal Maschinen AG
 # Niklaus Giger (ng@netstal.com)
 #
 # This program is free software; you can redistribute it and/or
@@ -22,17 +22,15 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-vpath hcu_flash.c ../common
-vpath nm_bsp.c ../common
 
 # NOBJS : Netstal common objects
-NOBJS	= ../common/hcu_flash.o ../common/nm_bsp.o
+NOBJS	= hcu_flash.o nm_bsp.o
 COBJS	= $(BOARD).o sdram.o
 SOBJS	= init.o
 
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c) $(NOBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix ../common/,$(NOBJS:.o=.c))
 OBJS	:= $(addprefix $(obj),$(COBJS))
-NOBJS	:= $(addprefix $(obj),$(NOBJS))
+NOBJS	:= $(addprefix $(obj)../common/,$(NOBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(OBJS) $(SOBJS) $(NOBJS)
-- 
cgit v1.3.1


From f4e7cbfcb0fcbc325a2bcfea7e00e3dd37f93846 Mon Sep 17 00:00:00 2001
From: Peter Pearse <peter.pearse@arm.com>
Date: Fri, 1 Feb 2008 16:49:08 +0000
Subject: Update board NetStar Signed-off-by: Ladislav Michl
 <ladis@linux-mips.org>

---
 Makefile                  | 11 +-----
 board/netstar/nand.c      | 13 +------
 include/configs/netstar.h | 86 +++++++++++++++++++++--------------------------
 3 files changed, 41 insertions(+), 69 deletions(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 3b339ad17e6..df00abe8663 100644
--- a/Makefile
+++ b/Makefile
@@ -2348,17 +2348,8 @@ mx1ads_config	:	unconfig
 mx1fs2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t mx1fs2 NULL imx
 
-netstar_32_config	\
 netstar_config:		unconfig
-	@mkdir -p $(obj)include
-	@if [ "$(findstring _32_,$@)" ] ; then \
-		$(XECHO) "... 32MB SDRAM" ; \
-		echo "#define PHYS_SDRAM_1_SIZE SZ_32M" >>$(obj)include/config.h ; \
-	else \
-		$(XECHO) "... 64MB SDRAM" ; \
-		echo "#define PHYS_SDRAM_1_SIZE SZ_64M" >>$(obj)include/config.h ; \
-	fi
-	@$(MKCONFIG) -a netstar arm arm925t netstar
+	@$(MKCONFIG) $(@:_config=) arm arm925t netstar
 
 omap1510inn_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
diff --git a/board/netstar/nand.c b/board/netstar/nand.c
index d47e1d8e02c..b76d2a3324a 100644
--- a/board/netstar/nand.c
+++ b/board/netstar/nand.c
@@ -45,23 +45,12 @@ static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd)
 	this->IO_ADDR_W = (void *) IO_ADDR_W;
 }
 
-/*
- *	chip R/B detection
- */
-/***
-static int netstar_nand_ready(struct mtd_info *mtd)
-{
-	return (*(volatile ushort *)GPIO_DATA_INPUT_REG) & 0x02;
-}
-***/
-
 int board_nand_init(struct nand_chip *nand)
 {
 	nand->options = NAND_SAMSUNG_LP_OPTIONS;
 	nand->eccmode = NAND_ECC_SOFT;
 	nand->hwcontrol = netstar_nand_hwcontrol;
-/*	nand->dev_ready = netstar_nand_ready; */
-	nand->chip_delay = 18;
+	nand->chip_delay = 400;
 	return 0;
 }
 #endif
diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index 33159d31563..a48893d1eb2 100644
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -48,14 +48,15 @@
 #define CONFIG_SETUP_MEMORY_TAGS	1
 #define CONFIG_INITRD_TAG		1
 
-#define CFG_DEVICE_NULLDEV		1	/* enable null device */
 #define CONFIG_SILENT_CONSOLE		1	/* enable silent startup */
+#define CFG_CONSOLE_INFO_QUIET
 
 /*
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1		0x10000000	/* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE	(64 * 1024 * 1024)
 #define PHYS_FLASH_1		0x00000000	/* Flash Bank #1 */
 
 /*
@@ -63,30 +64,21 @@
  */
 #define CFG_FLASH_BASE		PHYS_FLASH_1
 #define CFG_MAX_FLASH_BANKS	1
-#if (PHYS_SDRAM_1_SIZE == SZ_32M)
-/*#if 1*/
-#define CFG_FLASH_CFI			/* Flash is CFI conformant */
-#define CFG_FLASH_CFI_DRIVER		/* Use the common driver */
-#define CFG_FLASH_EMPTY_INFO
-#define CFG_MAX_FLASH_SECT	128
-#else
-#define PHYS_FLASH_1_SIZE	SZ_1M
+#define PHYS_FLASH_1_SIZE	(1 * 1024 * 1024)
 #define CFG_MAX_FLASH_SECT	19
 #define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* in ticks */
 #define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ)
-#endif
 
 #define CFG_MONITOR_BASE	PHYS_FLASH_1
-#define CFG_MONITOR_LEN		SZ_256K
+#define CFG_MONITOR_LEN		(256 * 1024)
 
 /*
  * Environment settings
  */
 #define CFG_ENV_IS_IN_FLASH
-#define ENV_IS_SOLITARY
 #define CFG_ENV_ADDR		0x4000
-#define CFG_ENV_SIZE		SZ_8K
-#define CFG_ENV_SECT_SIZE	SZ_8K
+#define CFG_ENV_SIZE		(8 * 1024)
+#define CFG_ENV_SECT_SIZE	(8 * 1024)
 #define CFG_ENV_ADDR_REDUND	0x6000
 #define CFG_ENV_SIZE_REDUND	CFG_ENV_SIZE
 #define CONFIG_ENV_OVERWRITE
@@ -95,14 +87,12 @@
  * Size of malloc() pool
  */
 #define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-/* XXX #define CFG_MALLOC_LEN		(SZ_64K - CFG_GBL_DATA_SIZE)*/
-#define CFG_MALLOC_LEN		SZ_4M
+#define CFG_MALLOC_LEN		(4 * 1024 * 1024)
 
 /*
  * The stack size is set up in start.S using the settings below
  */
-/* XXX #define CONFIG_STACKSIZE	SZ_8K	/XXX* regular stack */
-#define CONFIG_STACKSIZE	SZ_1M	/* regular stack */
+#define CONFIG_STACKSIZE	(1 * 1024 * 1024)	/* regular stack */
 
 /*
  * Hardware drivers
@@ -132,13 +122,16 @@
 #define CFG_MAX_NAND_DEVICE	1
 #define NAND_MAX_CHIPS		1
 #define CFG_NAND_BASE	0x04000000 + (2 << 23)
+#define NAND_ALLOW_ERASE_ALL	1
 
 /*
- * JFFS2 partitions (mtdparts command line support)
+ * partitions (mtdparts command line support)
  */
 #define CONFIG_JFFS2_CMDLINE
 #define MTDIDS_DEFAULT		"nor0=omapflash.0,nand0=omapnand.0"
-#define MTDPARTS_DEFAULT	"mtdparts=omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);omapnand.0:48M(rootfs0),48M(rootfs1),-(data)"
+#define MTDPARTS_DEFAULT	"mtdparts=" \
+	"omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
+	"omapnand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
 
 
 /*
@@ -176,36 +169,34 @@
 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* allow to break in always */
 #undef  CONFIG_BOOTARGS		/* the boot command will set bootargs*/
 #define CFG_AUTOLOAD		"n"		/* No autoload */
-#define CONFIG_BOOTCOMMAND	"run nboot"
+#define CONFIG_BOOTCOMMAND	"run fboot"
 #define CONFIG_PREBOOT		"run setup"
-#define	CONFIG_EXTRA_ENV_SETTINGS				\
-	"setup=setenv bootargs console=ttyS0,$baudrate "	\
-		"$mtdparts\0"					\
-	"ospart=0\0"						\
-	"setpart="						\
-	"if test -n $swapos; then "				\
-		"if test $ospart -eq 0; then chpart nand0,1; else chpart nand0,0; fi; "\
-		"setenv swapos; saveenv; "			\
-	"else "							\
-		"chpart nand0,$ospart; "			\
-	"fi\0"							\
-	"nfsargs=setenv bootargs $bootargs "			\
-		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
-		"nfsroot=$rootpath root=/dev/nfs\0"		\
-	"flashargs=run setpart;setenv bootargs $bootargs "	\
-		"root=/dev/mtdblock$partition ro "		\
-		"rootfstype=jffs2\0"				\
-	"initrdargs=setenv bootargs $bootargs "			\
-		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
-	"iboot=bootp;run initrdargs;tftp;bootm\0"		\
-	"fboot=run flashargs;fsload /boot/uImage;bootm\0"	\
-	"nboot=bootp;run nfsargs;tftp;bootm\0"
+#define	CONFIG_EXTRA_ENV_SETTINGS						\
+	"autostart=yes\0"							\
+	"ospart=0\0"								\
+	"setup=setenv bootargs console=ttyS0,$baudrate "			\
+		"$mtdparts\0"							\
+	"setpart="								\
+	"if test -n $swapos; then "						\
+		"setenv swapos; saveenv; "					\
+	"else "									\
+		"if test $ospart -eq 0; then setenv ospart 1;" 			\
+			"else setenv ospart 0; 		fi; "			\
+	"fi\0"									\
+	"nfsargs=setenv bootargs $bootargs "					\
+		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " 	\
+		"nfsroot=$rootpath root=/dev/nfs\0"				\
+	"flashargs=run setpart;setenv bootargs $bootargs "			\
+		"root=mtd:rootfs$ospart ro "					\
+		"rootfstype=jffs2\0"						\
+	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" 		\
+	"fboot=run flashargs;nboot kernel$ospart\0"				\
+	"nboot=bootp;run nfsargs;tftp\0"
 
 #if 0	/* feel free to disable for development */
 #define	CONFIG_AUTOBOOT_KEYED		/* Enable password protection	*/
-#define CONFIG_AUTOBOOT_PROMPT	"\nNetStar PBX - boot in %d sec...\n"
-#define CONFIG_AUTOBOOT_DELAY_STR	"R"	/* 1st "password"	*/
-#define CONFIG_BOOT_RETRY_TIME	30
+#define CONFIG_AUTOBOOT_PROMPT		"\nNetStar PBX - boot in %d secs...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR	"."	/* 1st "password"	*/
 #endif
 
 /*
@@ -223,7 +214,8 @@
 #define CONFIG_AUTO_COMPLETE
 
 #define CFG_MEMTEST_START	PHYS_SDRAM_1
-#define CFG_MEMTEST_END		PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE
+#define CFG_MEMTEST_END		PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
+				(CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE)
 
 #undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
 
-- 
cgit v1.3.1


From 20b197c6f2799af399a68f96a1aff543a75621b8 Mon Sep 17 00:00:00 2001
From: Stelian Pop <stelian@popies.net>
Date: Sun, 20 Jan 2008 19:49:21 +0000
Subject: AT91CAP9 support : build integration

Signed-off-by: Stelian Pop <stelian@popies.net>
---
 CREDITS                 | 4 ++++
 MAKEALL                 | 1 +
 Makefile                | 3 +++
 drivers/mtd/dataflash.c | 5 +++--
 net/eth.c               | 4 ++++
 5 files changed, 15 insertions(+), 2 deletions(-)

(limited to 'Makefile')

diff --git a/CREDITS b/CREDITS
index 57a82d2dc26..350c3327f21 100644
--- a/CREDITS
+++ b/CREDITS
@@ -391,6 +391,10 @@ E: dan.poirot@windriver.com
 D: Support for the Wind River sbc405, sbc8240 board
 W: http://www.windriver.com
 
+N: Stelian Pop
+E: stelian.pop@leadtechdesign.com
+D: Atmel AT91CAP9ADK support
+
 N: Stefan Roese
 E: sr@denx.de
 D: AMCC PPC4xx Support
diff --git a/MAKEALL b/MAKEALL
index d66a5fa1aad..438c926b5e3 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -446,6 +446,7 @@ LIST_ARM7="		\
 #########################################################################
 
 LIST_ARM9="			\
+	at91cap9adk		\
 	at91rm9200dk		\
 	cmc_pu2			\
 	ap920t			\
diff --git a/Makefile b/Makefile
index 3b339ad17e6..b75624a42af 100644
--- a/Makefile
+++ b/Makefile
@@ -2296,6 +2296,9 @@ xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$
 
 xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
 
+at91cap9adk_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk NULL at91cap9
+
 at91rm9200dk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk NULL at91rm9200
 
diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c
index 242140745e1..36c99a04995 100644
--- a/drivers/mtd/dataflash.c
+++ b/drivers/mtd/dataflash.c
@@ -36,7 +36,7 @@ struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
 	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
 	{CFG_DATAFLASH_LOGIC_ADDR_CS1, 1}
 };
-#elif defined(CONFIG_AT91SAM9263EK)
+#elif defined(CONFIG_AT91SAM9263EK) || defined(CONFIG_AT91CAP9ADK)
 struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
 	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
 };
@@ -48,7 +48,8 @@ struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
 #endif
 
 /*define the area offsets*/
-#if defined(CONFIG_AT91SAM9261EK) || defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AT91SAM9263EK)
+#if defined(CONFIG_AT91SAM9261EK) || defined(CONFIG_AT91SAM9260EK) || \
+	defined(CONFIG_AT91SAM9263EK) || defined(CONFIG_AT91CAP9ADK)
 #if	defined(CONFIG_NEW_PARTITION)
 dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
 	{0x00000000,	0x00003FFF, 	FLAG_PROTECT_SET,	0,    		"Bootstrap"},  	/* ROM code */
diff --git a/net/eth.c b/net/eth.c
index 75175ec62b9..62297abba41 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -63,6 +63,7 @@ extern int atstk1000_eth_initialize(bd_t *);
 extern int atngw100_eth_initialize(bd_t *);
 extern int mcffec_initialize(bd_t*);
 extern int mcdmafec_initialize(bd_t*);
+extern int at91cap9_eth_initialize(bd_t *);
 
 #ifdef CONFIG_API
 extern void (*push_packet)(volatile void *, int);
@@ -283,6 +284,9 @@ int eth_initialize(bd_t *bis)
 #if defined(CONFIG_FSLDMAFEC)
 	mcdmafec_initialize(bis);
 #endif
+#if defined(CONFIG_AT91CAP9)
+	at91cap9_eth_initialize(bis);
+#endif
 
 	if (!eth_devices) {
 		puts ("No ethernet found.\n");
-- 
cgit v1.3.1


From 64e8a06af68cda174a8a06d0a61fce5e5bb189d7 Mon Sep 17 00:00:00 2001
From: Stelian Pop <stelian@popies.net>
Date: Thu, 7 Feb 2008 09:42:57 +0000
Subject: AT91CAP9 support : move board files to Atmel vendor directory.

AT91CAP9 support : move at91cap9adk board files to Atmel vendor directory.

Signed-off-by: Stelian Pop <stelian@popies.net>
---
 Makefile                              |   2 +-
 board/at91cap9adk/Makefile            |  50 ------
 board/at91cap9adk/at91cap9adk.c       | 283 ----------------------------------
 board/at91cap9adk/config.mk           |   1 -
 board/at91cap9adk/led.c               |  80 ----------
 board/at91cap9adk/nand.c              |  71 ---------
 board/at91cap9adk/u-boot.lds          |  57 -------
 board/atmel/at91cap9adk/Makefile      |  50 ++++++
 board/atmel/at91cap9adk/at91cap9adk.c | 283 ++++++++++++++++++++++++++++++++++
 board/atmel/at91cap9adk/config.mk     |   1 +
 board/atmel/at91cap9adk/led.c         |  80 ++++++++++
 board/atmel/at91cap9adk/nand.c        |  71 +++++++++
 board/atmel/at91cap9adk/u-boot.lds    |  57 +++++++
 13 files changed, 543 insertions(+), 543 deletions(-)
 delete mode 100644 board/at91cap9adk/Makefile
 delete mode 100644 board/at91cap9adk/at91cap9adk.c
 delete mode 100644 board/at91cap9adk/config.mk
 delete mode 100644 board/at91cap9adk/led.c
 delete mode 100644 board/at91cap9adk/nand.c
 delete mode 100644 board/at91cap9adk/u-boot.lds
 create mode 100644 board/atmel/at91cap9adk/Makefile
 create mode 100644 board/atmel/at91cap9adk/at91cap9adk.c
 create mode 100644 board/atmel/at91cap9adk/config.mk
 create mode 100644 board/atmel/at91cap9adk/led.c
 create mode 100644 board/atmel/at91cap9adk/nand.c
 create mode 100644 board/atmel/at91cap9adk/u-boot.lds

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index b75624a42af..577e9b2dd6d 100644
--- a/Makefile
+++ b/Makefile
@@ -2297,7 +2297,7 @@ xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$
 xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
 
 at91cap9adk_config	:	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk NULL at91cap9
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91cap9
 
 at91rm9200dk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk NULL at91rm9200
diff --git a/board/at91cap9adk/Makefile b/board/at91cap9adk/Makefile
deleted file mode 100644
index 359fdab6002..00000000000
--- a/board/at91cap9adk/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	:= at91cap9adk.o led.o nand.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/at91cap9adk/at91cap9adk.c b/board/at91cap9adk/at91cap9adk.c
deleted file mode 100644
index bde6aa97f64..00000000000
--- a/board/at91cap9adk/at91cap9adk.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91CAP9.h>
-
-#define MP_BLOCK_3_BASE	0xFDF00000
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-static void at91cap9_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA22_TXD0 | AT91C_PA23_RXD0;
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;
-#endif
-
-#ifdef CONFIG_USART1
-	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_TXD1 | AT91C_PD1_RXD1;
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;
-#endif
-
-#ifdef CONFIG_USART2
-	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD2_TXD2 | AT91C_PD3_RXD2;
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	AT91C_BASE_PIOC->PIO_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD;
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS;
-#endif
-
-
-}
-
-static void at91cap9_nor_hw_init(void)
-{
-	/* Ensure EBI supply is 3.3V */
-	AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_SUP_3V3;
-
-	/* Configure SMC CS0 for parallel flash */
-	AT91C_BASE_SMC->SMC_SETUP0 = AT91C_FLASH_NWE_SETUP |
-				     AT91C_FLASH_NCS_WR_SETUP |
-				     AT91C_FLASH_NRD_SETUP |
-				     AT91C_FLASH_NCS_RD_SETUP;
-
-	AT91C_BASE_SMC->SMC_PULSE0 = AT91C_FLASH_NWE_PULSE |
-				     AT91C_FLASH_NCS_WR_PULSE |
-				     AT91C_FLASH_NRD_PULSE |
-				     AT91C_FLASH_NCS_RD_PULSE;
-
-	AT91C_BASE_SMC->SMC_CYCLE0 = AT91C_FLASH_NWE_CYCLE |
-				     AT91C_FLASH_NRD_CYCLE;
-
-	AT91C_BASE_SMC->SMC_CTRL0 =  AT91C_SMC_READMODE |
-				     AT91C_SMC_WRITEMODE |
-				     AT91C_SMC_NWAITM_NWAIT_DISABLE |
-				     AT91C_SMC_BAT_BYTE_WRITE |
-				     AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS |
-				     (AT91C_SMC_TDF & (1 << 16));
-}
-
-#ifdef CONFIG_CMD_NAND
-static void at91cap9_nand_hw_init(void)
-{
-	/* Enable CS3 */
-	AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM | AT91C_EBI_SUP_3V3;
-
-	/* Configure SMC CS3 for NAND/SmartMedia */
-	AT91C_BASE_SMC->SMC_SETUP3 = AT91C_SM_NWE_SETUP |
-				     AT91C_SM_NCS_WR_SETUP |
-				     AT91C_SM_NRD_SETUP |
-				     AT91C_SM_NCS_RD_SETUP;
-
-	AT91C_BASE_SMC->SMC_PULSE3 = AT91C_SM_NWE_PULSE |
-				     AT91C_SM_NCS_WR_PULSE |
-				     AT91C_SM_NRD_PULSE |
-				     AT91C_SM_NCS_RD_PULSE;
-
-	AT91C_BASE_SMC->SMC_CYCLE3 = AT91C_SM_NWE_CYCLE |
-				     AT91C_SM_NRD_CYCLE;
-
-	AT91C_BASE_SMC->SMC_CTRL3 =  AT91C_SMC_READMODE |
-				     AT91C_SMC_WRITEMODE |
-				     AT91C_SMC_NWAITM_NWAIT_DISABLE |
-				     AT91C_SMC_DBW_WIDTH_EIGTH_BITS |
-				     AT91C_SM_TDF;
-
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
-
-	/* RDY/BSY is not connected */
-
-	/* Enable NandFlash */
-	AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15;
-	AT91C_BASE_PIOD->PIO_OER = AT91C_PIO_PD15;
-}
-#endif
-
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91cap9_spi_hw_init(void)
-{
-	AT91C_BASE_PIOD->PIO_BSR = AT91C_PD0_SPI0_NPCS2D |
-				   AT91C_PD1_SPI0_NPCS3D;
-	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_SPI0_NPCS2D |
-				   AT91C_PD1_SPI0_NPCS3D;
-
-	AT91C_BASE_PIOA->PIO_ASR = AT91C_PA28_SPI0_NPCS3A;
-	AT91C_BASE_PIOA->PIO_BSR = AT91C_PA4_SPI0_NPCS2A |
-				   AT91C_PA1_SPI0_MOSI |
-				   AT91C_PA0_SPI0_MISO |
-				   AT91C_PA3_SPI0_NPCS1 |
-				   AT91C_PA5_SPI0_NPCS0 |
-				   AT91C_PA2_SPI0_SPCK;
-	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA28_SPI0_NPCS3A |
-				   AT91C_PA4_SPI0_NPCS2A |
-				   AT91C_PA1_SPI0_MOSI |
-				   AT91C_PA0_SPI0_MISO |
-				   AT91C_PA3_SPI0_NPCS1 |
-				   AT91C_PA5_SPI0_NPCS0 |
-				   AT91C_PA2_SPI0_SPCK;
-
-	/* Enable Clock */
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI0;
-}
-#endif
-
-#ifdef CONFIG_MACB
-static void at91cap9_macb_hw_init(void)
-{
-	unsigned int gpio;
-
-	/* Enable clock */
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_EMAC;
-
-	/*
-	 * Disable pull-up on:
-	 *	RXDV (PB22) => PHY normal mode (not Test mode)
-	 *	ERX0 (PB25) => PHY ADDR0
-	 *	ERX1 (PB26) => PHY ADDR1 => PHYADDR = 0x0
-	 *
-	 * PHY has internal pull-down
-	 */
-	AT91C_BASE_PIOB->PIO_PPUDR = AT91C_PB22_E_RXDV |
-				     AT91C_PB25_E_RX0 |
-				     AT91C_PB26_E_RX1;
-
-	/* Need to reset PHY -> 500ms reset */
-	AT91C_BASE_RSTC->RSTC_RMR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
-				    (AT91C_RSTC_ERSTL & (0x0D << 8)) |
-				    AT91C_RSTC_URSTEN;
-	AT91C_BASE_RSTC->RSTC_RCR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
-				    AT91C_RSTC_EXTRST;
-
-	/* Wait for end hardware reset */
-	while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL));
-
-	/* Re-enable pull-up */
-	AT91C_BASE_PIOB->PIO_PPUER = AT91C_PB22_E_RXDV |
-				     AT91C_PB25_E_RX0 |
-				     AT91C_PB26_E_RX1;
-
-#ifdef CONFIG_RMII
-	gpio =	AT91C_PB30_E_MDIO |
-		AT91C_PB29_E_MDC  |
-		AT91C_PB21_E_TXCK |
-		AT91C_PB27_E_RXER |
-		AT91C_PB25_E_RX0  |
-		AT91C_PB22_E_RXDV |
-		AT91C_PB26_E_RX1  |
-		AT91C_PB28_E_TXEN |
-		AT91C_PB23_E_TX0  |
-		AT91C_PB24_E_TX1;
-	AT91C_BASE_PIOB->PIO_ASR = gpio;
-	AT91C_BASE_PIOB->PIO_BSR = 0;
-	AT91C_BASE_PIOB->PIO_PDR = gpio;
-#else
-#error AT91CAP9A-DK works only in RMII mode
-#endif
-
-	/* Unlock EMAC, 3 0 2 1 sequence */
-#define MP_MAC_KEY0	0x5969cb2a
-#define MP_MAC_KEY1	0xb4a1872e
-#define MP_MAC_KEY2	0x05683fbc
-#define MP_MAC_KEY3	0x3634fba4
-#define UNLOCK_MAC	0x00000008
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_MAC_KEY3;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_MAC_KEY0;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_MAC_KEY2;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_MAC_KEY1;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_MAC;
-}
-#endif
-
-#ifdef CONFIG_USB_OHCI_NEW
-static void at91cap9_uhp_hw_init(void)
-{
-	/* Unlock USB OHCI, 3 2 0 1 sequence */
-#define MP_OHCI_KEY0	0x896c11ca
-#define MP_OHCI_KEY1	0x68ebca21
-#define MP_OHCI_KEY2	0x4823efbc
-#define MP_OHCI_KEY3	0x8651aae4
-#define UNLOCK_OHCI	0x00000010
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_OHCI_KEY3;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_OHCI_KEY2;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_OHCI_KEY0;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_OHCI_KEY1;
-	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_OHCI;
-}
-#endif
-
-int board_init(void)
-{
-	/* Enable Ctrlc */
-	console_init_f();
-
-	/* arch number of AT91CAP9ADK-Board */
-	gd->bd->bi_arch_number = MACH_TYPE_AT91CAP9ADK;
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-	at91cap9_serial_hw_init();
-	at91cap9_nor_hw_init();
-#ifdef CONFIG_CMD_NAND
-	at91cap9_nand_hw_init();
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
-	at91cap9_spi_hw_init();
-#endif
-#ifdef CONFIG_MACB
-	at91cap9_macb_hw_init();
-#endif
-#ifdef CONFIG_USB_OHCI_NEW
-	at91cap9_uhp_hw_init();
-#endif
-
-	return 0;
-}
-
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-	return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
-#ifdef CONFIG_MACB
-	/*
-	 * Initialize ethernet HW addr prior to starting Linux,
-	 * needed for nfsroot
-	 */
-	eth_init(gd->bd);
-#endif
-}
-#endif
diff --git a/board/at91cap9adk/config.mk b/board/at91cap9adk/config.mk
deleted file mode 100644
index e241aeea016..00000000000
--- a/board/at91cap9adk/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x73000000
diff --git a/board/at91cap9adk/led.c b/board/at91cap9adk/led.c
deleted file mode 100644
index 8588a91a13e..00000000000
--- a/board/at91cap9adk/led.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91CAP9.h>
-
-#define	RED_LED		AT91C_PIO_PC29	/* this is the power led */
-#define	GREEN_LED	AT91C_PIO_PA10	/* this is the user1 led */
-#define	YELLOW_LED	AT91C_PIO_PA11	/* this is the user1 led */
-
-void red_LED_on(void)
-{
-	AT91C_BASE_PIOC->PIO_SODR = RED_LED;
-}
-
-void red_LED_off(void)
-{
-	AT91C_BASE_PIOC->PIO_CODR = RED_LED;
-}
-
-void green_LED_on(void)
-{
-	AT91C_BASE_PIOA->PIO_CODR = GREEN_LED;
-}
-
-void green_LED_off(void)
-{
-	AT91C_BASE_PIOA->PIO_SODR = GREEN_LED;
-}
-
-void yellow_LED_on(void)
-{
-	AT91C_BASE_PIOA->PIO_CODR = YELLOW_LED;
-}
-
-void yellow_LED_off(void)
-{
-	AT91C_BASE_PIOA->PIO_SODR = YELLOW_LED;
-}
-
-void coloured_LED_init(void)
-{
-	/* Enable clock */
-	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
-
-	/* Disable peripherals on LEDs */
-	AT91C_BASE_PIOA->PIO_PER = GREEN_LED | YELLOW_LED;
-	/* Enable pins as outputs */
-	AT91C_BASE_PIOA->PIO_OER = GREEN_LED | YELLOW_LED;
-	/* Turn all LEDs OFF */
-	AT91C_BASE_PIOA->PIO_SODR = GREEN_LED | YELLOW_LED;
-
-	/* Disable peripherals on LEDs */
-	AT91C_BASE_PIOC->PIO_PER = RED_LED;
-	/* Enable pins as outputs */
-	AT91C_BASE_PIOC->PIO_OER = RED_LED;
-	/* Turn all LEDs OFF */
-	AT91C_BASE_PIOC->PIO_CODR = RED_LED;
-}
diff --git a/board/at91cap9adk/nand.c b/board/at91cap9adk/nand.c
deleted file mode 100644
index 2f021262784..00000000000
--- a/board/at91cap9adk/nand.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop <at> leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-
-#ifdef CONFIG_CMD_NAND
-
-#include <nand.h>
-
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
-#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
-
-static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
-{
-	struct nand_chip *this = mtd->priv;
-	ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-
-	IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
-	switch (cmd) {
-	case NAND_CTL_SETCLE:
-		IO_ADDR_W |= MASK_CLE;
-		break;
-	case NAND_CTL_SETALE:
-		IO_ADDR_W |= MASK_ALE;
-		break;
-	case NAND_CTL_CLRNCE:
-		AT91C_BASE_PIOD->PIO_SODR = AT91C_PIO_PD15;
-		break;
-	case NAND_CTL_SETNCE:
-		AT91C_BASE_PIOD->PIO_CODR = AT91C_PIO_PD15;
-		break;
-	}
-	this->IO_ADDR_W = (void *) IO_ADDR_W;
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	nand->eccmode = NAND_ECC_SOFT;
-	nand->hwcontrol = at91cap9adk_nand_hwcontrol;
-	nand->chip_delay = 20;
-
-	return 0;
-}
-#endif
diff --git a/board/at91cap9adk/u-boot.lds b/board/at91cap9adk/u-boot.lds
deleted file mode 100644
index 05a6d83d565..00000000000
--- a/board/at91cap9adk/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text :
-	{
-	  cpu/arm926ejs/start.o	(.text)
-	  *(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(.rodata) }
-
-	. = ALIGN(4);
-	.data : { *(.data) }
-
-	. = ALIGN(4);
-	.got : { *(.got) }
-
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.bss : { *(.bss) }
-	_end = .;
-}
diff --git a/board/atmel/at91cap9adk/Makefile b/board/atmel/at91cap9adk/Makefile
new file mode 100644
index 00000000000..359fdab6002
--- /dev/null
+++ b/board/atmel/at91cap9adk/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= at91cap9adk.o led.o nand.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c
new file mode 100644
index 00000000000..bde6aa97f64
--- /dev/null
+++ b/board/atmel/at91cap9adk/at91cap9adk.c
@@ -0,0 +1,283 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91CAP9.h>
+
+#define MP_BLOCK_3_BASE	0xFDF00000
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+static void at91cap9_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA22_TXD0 | AT91C_PA23_RXD0;
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;
+#endif
+
+#ifdef CONFIG_USART1
+	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_TXD1 | AT91C_PD1_RXD1;
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;
+#endif
+
+#ifdef CONFIG_USART2
+	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD2_TXD2 | AT91C_PD3_RXD2;
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	AT91C_BASE_PIOC->PIO_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD;
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS;
+#endif
+
+
+}
+
+static void at91cap9_nor_hw_init(void)
+{
+	/* Ensure EBI supply is 3.3V */
+	AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_SUP_3V3;
+
+	/* Configure SMC CS0 for parallel flash */
+	AT91C_BASE_SMC->SMC_SETUP0 = AT91C_FLASH_NWE_SETUP |
+				     AT91C_FLASH_NCS_WR_SETUP |
+				     AT91C_FLASH_NRD_SETUP |
+				     AT91C_FLASH_NCS_RD_SETUP;
+
+	AT91C_BASE_SMC->SMC_PULSE0 = AT91C_FLASH_NWE_PULSE |
+				     AT91C_FLASH_NCS_WR_PULSE |
+				     AT91C_FLASH_NRD_PULSE |
+				     AT91C_FLASH_NCS_RD_PULSE;
+
+	AT91C_BASE_SMC->SMC_CYCLE0 = AT91C_FLASH_NWE_CYCLE |
+				     AT91C_FLASH_NRD_CYCLE;
+
+	AT91C_BASE_SMC->SMC_CTRL0 =  AT91C_SMC_READMODE |
+				     AT91C_SMC_WRITEMODE |
+				     AT91C_SMC_NWAITM_NWAIT_DISABLE |
+				     AT91C_SMC_BAT_BYTE_WRITE |
+				     AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS |
+				     (AT91C_SMC_TDF & (1 << 16));
+}
+
+#ifdef CONFIG_CMD_NAND
+static void at91cap9_nand_hw_init(void)
+{
+	/* Enable CS3 */
+	AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM | AT91C_EBI_SUP_3V3;
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	AT91C_BASE_SMC->SMC_SETUP3 = AT91C_SM_NWE_SETUP |
+				     AT91C_SM_NCS_WR_SETUP |
+				     AT91C_SM_NRD_SETUP |
+				     AT91C_SM_NCS_RD_SETUP;
+
+	AT91C_BASE_SMC->SMC_PULSE3 = AT91C_SM_NWE_PULSE |
+				     AT91C_SM_NCS_WR_PULSE |
+				     AT91C_SM_NRD_PULSE |
+				     AT91C_SM_NCS_RD_PULSE;
+
+	AT91C_BASE_SMC->SMC_CYCLE3 = AT91C_SM_NWE_CYCLE |
+				     AT91C_SM_NRD_CYCLE;
+
+	AT91C_BASE_SMC->SMC_CTRL3 =  AT91C_SMC_READMODE |
+				     AT91C_SMC_WRITEMODE |
+				     AT91C_SMC_NWAITM_NWAIT_DISABLE |
+				     AT91C_SMC_DBW_WIDTH_EIGTH_BITS |
+				     AT91C_SM_TDF;
+
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
+
+	/* RDY/BSY is not connected */
+
+	/* Enable NandFlash */
+	AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15;
+	AT91C_BASE_PIOD->PIO_OER = AT91C_PIO_PD15;
+}
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+static void at91cap9_spi_hw_init(void)
+{
+	AT91C_BASE_PIOD->PIO_BSR = AT91C_PD0_SPI0_NPCS2D |
+				   AT91C_PD1_SPI0_NPCS3D;
+	AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_SPI0_NPCS2D |
+				   AT91C_PD1_SPI0_NPCS3D;
+
+	AT91C_BASE_PIOA->PIO_ASR = AT91C_PA28_SPI0_NPCS3A;
+	AT91C_BASE_PIOA->PIO_BSR = AT91C_PA4_SPI0_NPCS2A |
+				   AT91C_PA1_SPI0_MOSI |
+				   AT91C_PA0_SPI0_MISO |
+				   AT91C_PA3_SPI0_NPCS1 |
+				   AT91C_PA5_SPI0_NPCS0 |
+				   AT91C_PA2_SPI0_SPCK;
+	AT91C_BASE_PIOA->PIO_PDR = AT91C_PA28_SPI0_NPCS3A |
+				   AT91C_PA4_SPI0_NPCS2A |
+				   AT91C_PA1_SPI0_MOSI |
+				   AT91C_PA0_SPI0_MISO |
+				   AT91C_PA3_SPI0_NPCS1 |
+				   AT91C_PA5_SPI0_NPCS0 |
+				   AT91C_PA2_SPI0_SPCK;
+
+	/* Enable Clock */
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI0;
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void at91cap9_macb_hw_init(void)
+{
+	unsigned int gpio;
+
+	/* Enable clock */
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_EMAC;
+
+	/*
+	 * Disable pull-up on:
+	 *	RXDV (PB22) => PHY normal mode (not Test mode)
+	 *	ERX0 (PB25) => PHY ADDR0
+	 *	ERX1 (PB26) => PHY ADDR1 => PHYADDR = 0x0
+	 *
+	 * PHY has internal pull-down
+	 */
+	AT91C_BASE_PIOB->PIO_PPUDR = AT91C_PB22_E_RXDV |
+				     AT91C_PB25_E_RX0 |
+				     AT91C_PB26_E_RX1;
+
+	/* Need to reset PHY -> 500ms reset */
+	AT91C_BASE_RSTC->RSTC_RMR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
+				    (AT91C_RSTC_ERSTL & (0x0D << 8)) |
+				    AT91C_RSTC_URSTEN;
+	AT91C_BASE_RSTC->RSTC_RCR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
+				    AT91C_RSTC_EXTRST;
+
+	/* Wait for end hardware reset */
+	while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL));
+
+	/* Re-enable pull-up */
+	AT91C_BASE_PIOB->PIO_PPUER = AT91C_PB22_E_RXDV |
+				     AT91C_PB25_E_RX0 |
+				     AT91C_PB26_E_RX1;
+
+#ifdef CONFIG_RMII
+	gpio =	AT91C_PB30_E_MDIO |
+		AT91C_PB29_E_MDC  |
+		AT91C_PB21_E_TXCK |
+		AT91C_PB27_E_RXER |
+		AT91C_PB25_E_RX0  |
+		AT91C_PB22_E_RXDV |
+		AT91C_PB26_E_RX1  |
+		AT91C_PB28_E_TXEN |
+		AT91C_PB23_E_TX0  |
+		AT91C_PB24_E_TX1;
+	AT91C_BASE_PIOB->PIO_ASR = gpio;
+	AT91C_BASE_PIOB->PIO_BSR = 0;
+	AT91C_BASE_PIOB->PIO_PDR = gpio;
+#else
+#error AT91CAP9A-DK works only in RMII mode
+#endif
+
+	/* Unlock EMAC, 3 0 2 1 sequence */
+#define MP_MAC_KEY0	0x5969cb2a
+#define MP_MAC_KEY1	0xb4a1872e
+#define MP_MAC_KEY2	0x05683fbc
+#define MP_MAC_KEY3	0x3634fba4
+#define UNLOCK_MAC	0x00000008
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_MAC_KEY3;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_MAC_KEY0;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_MAC_KEY2;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_MAC_KEY1;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_MAC;
+}
+#endif
+
+#ifdef CONFIG_USB_OHCI_NEW
+static void at91cap9_uhp_hw_init(void)
+{
+	/* Unlock USB OHCI, 3 2 0 1 sequence */
+#define MP_OHCI_KEY0	0x896c11ca
+#define MP_OHCI_KEY1	0x68ebca21
+#define MP_OHCI_KEY2	0x4823efbc
+#define MP_OHCI_KEY3	0x8651aae4
+#define UNLOCK_OHCI	0x00000010
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_OHCI_KEY3;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_OHCI_KEY2;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_OHCI_KEY0;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_OHCI_KEY1;
+	*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_OHCI;
+}
+#endif
+
+int board_init(void)
+{
+	/* Enable Ctrlc */
+	console_init_f();
+
+	/* arch number of AT91CAP9ADK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91CAP9ADK;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	at91cap9_serial_hw_init();
+	at91cap9_nor_hw_init();
+#ifdef CONFIG_CMD_NAND
+	at91cap9_nand_hw_init();
+#endif
+#ifdef CONFIG_HAS_DATAFLASH
+	at91cap9_spi_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	at91cap9_macb_hw_init();
+#endif
+#ifdef CONFIG_USB_OHCI_NEW
+	at91cap9_uhp_hw_init();
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+#ifdef CONFIG_MACB
+	/*
+	 * Initialize ethernet HW addr prior to starting Linux,
+	 * needed for nfsroot
+	 */
+	eth_init(gd->bd);
+#endif
+}
+#endif
diff --git a/board/atmel/at91cap9adk/config.mk b/board/atmel/at91cap9adk/config.mk
new file mode 100644
index 00000000000..e241aeea016
--- /dev/null
+++ b/board/atmel/at91cap9adk/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x73000000
diff --git a/board/atmel/at91cap9adk/led.c b/board/atmel/at91cap9adk/led.c
new file mode 100644
index 00000000000..8588a91a13e
--- /dev/null
+++ b/board/atmel/at91cap9adk/led.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91CAP9.h>
+
+#define	RED_LED		AT91C_PIO_PC29	/* this is the power led */
+#define	GREEN_LED	AT91C_PIO_PA10	/* this is the user1 led */
+#define	YELLOW_LED	AT91C_PIO_PA11	/* this is the user1 led */
+
+void red_LED_on(void)
+{
+	AT91C_BASE_PIOC->PIO_SODR = RED_LED;
+}
+
+void red_LED_off(void)
+{
+	AT91C_BASE_PIOC->PIO_CODR = RED_LED;
+}
+
+void green_LED_on(void)
+{
+	AT91C_BASE_PIOA->PIO_CODR = GREEN_LED;
+}
+
+void green_LED_off(void)
+{
+	AT91C_BASE_PIOA->PIO_SODR = GREEN_LED;
+}
+
+void yellow_LED_on(void)
+{
+	AT91C_BASE_PIOA->PIO_CODR = YELLOW_LED;
+}
+
+void yellow_LED_off(void)
+{
+	AT91C_BASE_PIOA->PIO_SODR = YELLOW_LED;
+}
+
+void coloured_LED_init(void)
+{
+	/* Enable clock */
+	AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
+
+	/* Disable peripherals on LEDs */
+	AT91C_BASE_PIOA->PIO_PER = GREEN_LED | YELLOW_LED;
+	/* Enable pins as outputs */
+	AT91C_BASE_PIOA->PIO_OER = GREEN_LED | YELLOW_LED;
+	/* Turn all LEDs OFF */
+	AT91C_BASE_PIOA->PIO_SODR = GREEN_LED | YELLOW_LED;
+
+	/* Disable peripherals on LEDs */
+	AT91C_BASE_PIOC->PIO_PER = RED_LED;
+	/* Enable pins as outputs */
+	AT91C_BASE_PIOC->PIO_OER = RED_LED;
+	/* Turn all LEDs OFF */
+	AT91C_BASE_PIOC->PIO_CODR = RED_LED;
+}
diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c
new file mode 100644
index 00000000000..2f021262784
--- /dev/null
+++ b/board/atmel/at91cap9adk/nand.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+
+#ifdef CONFIG_CMD_NAND
+
+#include <nand.h>
+
+/*
+ *	hardware specific access to control-lines
+ */
+#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
+#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
+
+static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+	ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+	IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+	switch (cmd) {
+	case NAND_CTL_SETCLE:
+		IO_ADDR_W |= MASK_CLE;
+		break;
+	case NAND_CTL_SETALE:
+		IO_ADDR_W |= MASK_ALE;
+		break;
+	case NAND_CTL_CLRNCE:
+		AT91C_BASE_PIOD->PIO_SODR = AT91C_PIO_PD15;
+		break;
+	case NAND_CTL_SETNCE:
+		AT91C_BASE_PIOD->PIO_CODR = AT91C_PIO_PD15;
+		break;
+	}
+	this->IO_ADDR_W = (void *) IO_ADDR_W;
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+	nand->eccmode = NAND_ECC_SOFT;
+	nand->hwcontrol = at91cap9adk_nand_hwcontrol;
+	nand->chip_delay = 20;
+
+	return 0;
+}
+#endif
diff --git a/board/atmel/at91cap9adk/u-boot.lds b/board/atmel/at91cap9adk/u-boot.lds
new file mode 100644
index 00000000000..05a6d83d565
--- /dev/null
+++ b/board/atmel/at91cap9adk/u-boot.lds
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text :
+	{
+	  cpu/arm926ejs/start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
-- 
cgit v1.3.1


From ea8d989f4ef8203e1c0291e62435a8c62e3cfb29 Mon Sep 17 00:00:00 2001
From: Timo Tuunainen <timo.tuunainen@sysart.fi>
Date: Fri, 1 Feb 2008 10:09:03 +0000
Subject: Support for Artila M-501 starter kit

Kimmo Leppala / Sysart and
Timo Tuunainen / Sysart
---
 CREDITS                  |  16 ++++
 MAKEALL                  |   1 +
 Makefile                 |   2 +
 board/m501sk/Makefile    |  48 ++++++++++++
 board/m501sk/config.mk   |   1 +
 board/m501sk/eeprom.c    | 102 ++++++++++++++++++++++++
 board/m501sk/m501sk.c    | 194 +++++++++++++++++++++++++++++++++++++++++++++
 board/m501sk/m501sk.h    | 167 +++++++++++++++++++++++++++++++++++++++
 board/m501sk/memsetup.S  | 200 +++++++++++++++++++++++++++++++++++++++++++++++
 board/m501sk/u-boot.lds  |  55 +++++++++++++
 include/configs/m501sk.h | 197 ++++++++++++++++++++++++++++++++++++++++++++++
 lib_arm/armlinux.c       |   3 +-
 12 files changed, 985 insertions(+), 1 deletion(-)
 create mode 100644 board/m501sk/Makefile
 create mode 100644 board/m501sk/config.mk
 create mode 100644 board/m501sk/eeprom.c
 create mode 100644 board/m501sk/m501sk.c
 create mode 100644 board/m501sk/m501sk.h
 create mode 100644 board/m501sk/memsetup.S
 create mode 100644 board/m501sk/u-boot.lds
 create mode 100644 include/configs/m501sk.h

(limited to 'Makefile')

diff --git a/CREDITS b/CREDITS
index 57a82d2dc26..b3c55ae8661 100644
--- a/CREDITS
+++ b/CREDITS
@@ -509,3 +509,19 @@ N: Nobuhiro Iwamatsu
 E: iwamatsu@nigauri.org
 D: Support for SuperH, MS7750SE01 and  MS7722SE01 boards.
 W: http://www.nigauri.org/~iwamatsu/
+
+N: Alan Lu
+E: alnalu001@gmail.com
+D: Support for Artila M-501 starter kit
+W: http://www.artila.com/
+
+N: Kimmo Leppala
+E: kimmo.leppala@sysart.fi
+D: Support for Artila M-501 starter kit
+W: http://www.sysart.fi/
+
+N: Timo Tuunainen
+E: timo.tuunainen@sysart.fi
+D: Support for Artila M-501 starter kit
+W: http://www.sysart.fi/
+
diff --git a/MAKEALL b/MAKEALL
index d66a5fa1aad..655e100363d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -459,6 +459,7 @@ LIST_ARM9="			\
 	cp946es			\
 	cp966			\
 	lpd7a400		\
+	m501sk			\
 	mp2usb			\
 	mx1ads			\
 	mx1fs2			\
diff --git a/Makefile b/Makefile
index 3b339ad17e6..1effd6e10b8 100644
--- a/Makefile
+++ b/Makefile
@@ -2308,6 +2308,8 @@ csb637_config	:	unconfig
 mp2usb_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
 
+m501sk_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
 
 ########################################################################
 ## ARM Integrator boards - see doc/README-integrator for more info.
diff --git a/board/m501sk/Makefile b/board/m501sk/Makefile
new file mode 100644
index 00000000000..da7987bb320
--- /dev/null
+++ b/board/m501sk/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = lib$(BOARD).a
+
+OBJS   := m501sk.o eeprom.o
+
+SOBJS  := memsetup.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/m501sk/config.mk b/board/m501sk/config.mk
new file mode 100644
index 00000000000..9ce161e55f0
--- /dev/null
+++ b/board/m501sk/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x21f00000
diff --git a/board/m501sk/eeprom.c b/board/m501sk/eeprom.c
new file mode 100644
index 00000000000..d86392f9391
--- /dev/null
+++ b/board/m501sk/eeprom.c
@@ -0,0 +1,102 @@
+/*
+ * Add by Alan Lu, 07-29-2005
+ * For ATMEL AT24C16 EEPROM
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <i2c.h>
+#ifdef CFG_EEPROM_AT24C16
+#undef DEBUG
+
+void eeprom_init(void)
+{
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+	i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
+#endif
+}
+
+int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer,
+			unsigned cnt)
+{
+	int page, count = 0, i = 0;
+	page = offset / 0x100;
+	i = offset % 0x100;
+
+	while (count < cnt) {
+		if (i2c_read(dev_addr|page, i++, 1, buffer+count++, 1) != 0)
+			return 1;
+		if (i > 0xff) {
+			page++;
+			i = 0;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
+ *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
+ *
+ * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
+ *   0x00000nxx for EEPROM address selectors and page number at n.
+ */
+int eeprom_write(unsigned dev_addr, unsigned offset, uchar *buffer,
+			unsigned cnt)
+{
+	int page, i = 0, count = 0;
+
+	page = offset / 0x100;
+	i = offset % 0x100;
+
+	while (count < cnt) {
+		if (i2c_write(dev_addr|page, i++, 1, buffer+count++, 1) != 0)
+			return 1;
+		if (i > 0xff) {
+			page++;
+			i = 0;
+		}
+	}
+
+#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
+	udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+#endif
+
+	return 0;
+}
+
+#ifndef CONFIG_SPI
+int eeprom_probe(unsigned dev_addr, unsigned offset)
+{
+	unsigned char chip;
+
+	/* Probe the chip address */
+#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+	chip = offset >> 8; /* block number */
+#else
+	chip = offset >> 16; /* block number */
+#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+
+	chip |= dev_addr; /* insert device address */
+	return (i2c_probe(chip));
+}
+#endif
+#endif
diff --git a/board/m501sk/m501sk.c b/board/m501sk/m501sk.c
new file mode 100644
index 00000000000..65a8b2989f8
--- /dev/null
+++ b/board/m501sk/m501sk.c
@@ -0,0 +1,194 @@
+/*
+ * (C) Copyright 2008
+ * Based on modifications by Alan Lu / Artila
+ * Author : Timo Tuunainen / Sysart
+			Kimmo Leppala / Sysart
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <at91rm9200_net.h>
+#include <dm9161.h>
+#include "m501sk.h"
+#include "net.h"
+
+#ifdef CONFIG_M501SK
+
+void m501sk_gpio_init(void)
+{
+	AT91C_BASE_PIOD->PIO_PER = 1 << (M501SK_DEBUG_LED1 - 96) |
+		1 << (M501SK_DEBUG_LED2 - 96) | 1 << (M501SK_DEBUG_LED3 - 96) |
+		1 << (M501SK_DEBUG_LED4 - 96) | 1 << (M501SK_READY_LED - 96);
+
+	AT91C_BASE_PIOD->PIO_OER = 1 << (M501SK_DEBUG_LED1 - 96) |
+		1 << (M501SK_DEBUG_LED2 - 96) | 1 << (M501SK_DEBUG_LED3 - 96) |
+		1 << (M501SK_DEBUG_LED4 - 96) | 1 << (M501SK_READY_LED - 96);
+
+	AT91C_BASE_PIOD->PIO_SODR = 1 << (M501SK_READY_LED - 96);
+	AT91C_BASE_PIOD->PIO_CODR = 1 << (M501SK_DEBUG_LED3 - 96);
+	AT91C_BASE_PIOB->PIO_PER = 1 << (M501SK_BUZZER - 32);
+	AT91C_BASE_PIOB->PIO_OER = 1 << (M501SK_BUZZER - 32);
+	AT91C_BASE_PIOC->PIO_PDR = (1 << 7) | (1 << 8);
+
+	/* Power OFF all USART's LEDs */
+	AT91C_BASE_PIOA->PIO_PER = AT91C_PA5_TXD3 | AT91C_PA6_RXD3 |
+		AT91C_PA17_TXD0 | AT91C_PA18_RXD0 | AT91C_PA22_RXD2 | \
+		AT91C_PA23_TXD2;
+
+	AT91C_BASE_PIOA->PIO_OER = AT91C_PA5_TXD3 | AT91C_PA6_RXD3 |
+		AT91C_PA17_TXD0 | AT91C_PA18_RXD0 | AT91C_PA22_RXD2 | \
+		AT91C_PA23_TXD2;
+
+	AT91C_BASE_PIOA->PIO_SODR = AT91C_PA5_TXD3 | AT91C_PA6_RXD3 |
+		AT91C_PA17_TXD0 | AT91C_PA18_RXD0 | AT91C_PA22_RXD2 | \
+		AT91C_PA23_TXD2;
+
+	AT91C_BASE_PIOB->PIO_PER = AT91C_PB20_RXD1 | AT91C_PB21_TXD1;
+	AT91C_BASE_PIOB->PIO_OER = AT91C_PB20_RXD1 | AT91C_PB21_TXD1;
+	AT91C_BASE_PIOB->PIO_SODR = AT91C_PB20_RXD1 | AT91C_PB21_TXD1;
+}
+
+uchar m501sk_gpio_set(M501SK_PIO io)
+{
+	uchar status = 0xff;
+	switch (io) {
+	case M501SK_DEBUG_LED1:
+	case M501SK_DEBUG_LED2:
+	case M501SK_DEBUG_LED3:
+	case M501SK_DEBUG_LED4:
+	case M501SK_READY_LED:
+		AT91C_BASE_PIOD->PIO_SODR = 1 << (io - 96);
+		status = AT91C_BASE_PIOD->PIO_ODSR & (1 << (io - 96));
+		break;
+	case M501SK_BUZZER:
+		AT91C_BASE_PIOB->PIO_SODR = 1 << (io - 32);
+		status = AT91C_BASE_PIOB->PIO_ODSR & (1 << (io - 32));
+		break;
+	}
+	return status;
+}
+
+uchar m501sk_gpio_clear(M501SK_PIO io)
+{
+	uchar status = 0xff;
+	switch (io) {
+	case M501SK_DEBUG_LED1:
+	case M501SK_DEBUG_LED2:
+	case M501SK_DEBUG_LED3:
+	case M501SK_DEBUG_LED4:
+	case M501SK_READY_LED:
+		AT91C_BASE_PIOD->PIO_CODR = 1 << (io - 96);
+		status = AT91C_BASE_PIOD->PIO_ODSR & (1 << (io - 96));
+		break;
+	case M501SK_BUZZER:
+		AT91C_BASE_PIOB->PIO_CODR = 1 << (io - 32);
+		status = AT91C_BASE_PIOB->PIO_ODSR & (1 << (io - 32));
+		break;
+	}
+	return status;
+}
+
+void load_sernum_ethaddr(void)
+{
+	return;
+}
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	/* Enable Ctrlc */
+	console_init_f();
+
+	/* Correct IRDA resistor problem */
+	/* Set PA23_TXD in Output */
+	((AT91PS_PIO)AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
+
+	/* memory and cpu-speed are setup before relocation */
+	/* so we do _nothing_ here */
+	gd->bd->bi_arch_number = MACH_TYPE_M501;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	m501sk_gpio_init();
+
+	/* Do interrupt init here, because flash needs timers */
+	interrupt_init();
+	flash_init();
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	int i = 0;
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+
+	for (i = 0; i < 500; i++) {
+		m501sk_gpio_clear(M501SK_DEBUG_LED3);
+		m501sk_gpio_clear(M501SK_BUZZER);
+		udelay(250);
+		m501sk_gpio_set(M501SK_DEBUG_LED3);
+		m501sk_gpio_set(M501SK_BUZZER);
+		udelay(80);
+	}
+	m501sk_gpio_clear(M501SK_BUZZER);
+	m501sk_gpio_clear(M501SK_DEBUG_LED3);
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+#if defined(CONFIG_CMD_NET)
+	eth_init(gd->bd);
+	eth_halt();
+#endif
+
+	/* Protect U-Boot, kernel & ramdisk memory addresses */
+	run_command("protect on 10000000 1041ffff", 0);
+	return 0;
+}
+
+#ifdef CONFIG_DRIVER_ETHER
+#if defined(CONFIG_CMD_NET)
+/*
+ * Name:
+ *     at91rm9200_GetPhyInterface
+ * Description:
+ *     Initialise the interface functions to the PHY
+ * Arguments:
+ *     None
+ * Return value:
+ *     None
+ */
+void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
+{
+	p_phyops->Init = dm9161_InitPhy;
+	p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
+	p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
+	p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
+}
+#endif /* CONFIG_CMD_NET */
+#endif /* CONFIG_DRIVER_ETHER */
+#endif /* CONFIG_M501SK */
diff --git a/board/m501sk/m501sk.h b/board/m501sk/m501sk.h
new file mode 100644
index 00000000000..42a67573da2
--- /dev/null
+++ b/board/m501sk/m501sk.h
@@ -0,0 +1,167 @@
+/*
+ * linux/include/asm-arm/arch-at91/hardware.h
+ *
+ *  Copyright (C) 2003 SAN People
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __M501SK_H
+#define __M501SK_H
+
+#ifndef __ASSEMBLY__
+#include <asm-arm/arch-at91rm9200/AT91RM9200.h>
+#else
+#include <asm-arm/arch-at91rm9200/AT91RM9200_inc.h>
+#endif
+
+#define AT91C_PIO_PA22 ((unsigned int) 1 << 22) /* Pin Controlled by PA22 */
+#define AT91C_PA22_RXD2 ((unsigned int) AT91C_PIO_PA22) /* USART 2 RxD */
+#define AT91C_PA5_TXD3 ((unsigned int) 1 <<  5) /* USART 3 TxD */
+#define AT91C_PA6_RXD3 ((unsigned int) 1 << 6) /* USART 3 RxD */
+
+/* ========== Register definition for PIOD peripheral ========== */
+#define AT91C_PIOD_PDSR ((AT91_REG *) 0xFFFFFA3C) /* Pin Data stat Reg */
+#define AT91C_PIOD_CODR ((AT91_REG *) 0xFFFFFA34) /* Clear Output Data Reg */
+#define AT91C_PIOD_OWER ((AT91_REG *) 0xFFFFFAA0) /* Output Write Enable Reg */
+#define AT91C_PIOD_MDER ((AT91_REG *) 0xFFFFFA50) /* Multi-driver Enable Reg */
+#define AT91C_PIOD_IMR  ((AT91_REG *) 0xFFFFFA48) /* Interrupt Mask Reg */
+#define AT91C_PIOD_IER  ((AT91_REG *) 0xFFFFFA40) /* Interrupt Enable Reg */
+#define AT91C_PIOD_ODSR ((AT91_REG *) 0xFFFFFA38) /* Output Data stat Reg */
+#define AT91C_PIOD_SODR ((AT91_REG *) 0xFFFFFA30) /* Set Output Data Reg */
+#define AT91C_PIOD_PER  ((AT91_REG *) 0xFFFFFA00) /* PIO Enable Reg */
+#define AT91C_PIOD_OWDR ((AT91_REG *) 0xFFFFFAA4) /* Output Write Disable Reg */
+#define AT91C_PIOD_PPUER ((AT91_REG *) 0xFFFFFA64) /* Pull-up Enable Reg */
+#define AT91C_PIOD_MDDR ((AT91_REG *) 0xFFFFFA54) /* Multi-driver Disable Reg */
+#define AT91C_PIOD_ISR  ((AT91_REG *) 0xFFFFFA4C) /* Interrupt stat Reg */
+#define AT91C_PIOD_IDR  ((AT91_REG *) 0xFFFFFA44) /* Interrupt Disable Reg */
+#define AT91C_PIOD_PDR  ((AT91_REG *) 0xFFFFFA04) /* PIO Disable Reg */
+#define AT91C_PIOD_ODR  ((AT91_REG *) 0xFFFFFA14) /* Output Disable Regr */
+#define AT91C_PIOD_OWSR ((AT91_REG *) 0xFFFFFAA8) /* Output Write stat Reg */
+#define AT91C_PIOD_ABSR ((AT91_REG *) 0xFFFFFA78) /* AB Select stat Reg */
+#define AT91C_PIOD_ASR  ((AT91_REG *) 0xFFFFFA70) /* Select A Reg */
+#define AT91C_PIOD_PPUSR ((AT91_REG *) 0xFFFFFA68) /* Pad Pull-up stat Reg */
+#define AT91C_PIOD_PPUDR ((AT91_REG *) 0xFFFFFA60) /* Pull-up Disable Reg */
+#define AT91C_PIOD_MDSR ((AT91_REG *) 0xFFFFFA58) /* Multi-driver stat Reg */
+#define AT91C_PIOD_PSR  ((AT91_REG *) 0xFFFFFA08) /* PIO stat Reg */
+#define AT91C_PIOD_OER  ((AT91_REG *) 0xFFFFFA10) /* Output Enable Reg */
+#define AT91C_PIOD_OSR  ((AT91_REG *) 0xFFFFFA18) /* Output stat Reg */
+#define AT91C_PIOD_IFER ((AT91_REG *) 0xFFFFFA20) /* Input Filter Enable Reg */
+#define AT91C_PIOD_BSR  ((AT91_REG *) 0xFFFFFA74) /* Select B Reg */
+#define AT91C_PIOD_IFDR ((AT91_REG *) 0xFFFFFA24) /* Input Filter Disable Reg */
+#define AT91C_PIOD_IFSR ((AT91_REG *) 0xFFFFFA28) /* Input Filter stat Reg */
+
+#define AT91C_PIO_PD0   ((unsigned int) 1 <<  0) /* Pin Controlled by PD0 */
+#define AT91C_PD0_ETX0  ((unsigned int) AT91C_PIO_PD0) /*  Enet MAC Tx Data 0*/
+#define AT91C_PIO_PD1   ((unsigned int) 1 <<  1) /* Pin Controlled by PD1 */
+#define AT91C_PD1_ETX1  ((unsigned int) AT91C_PIO_PD1) /*  Enet MAC Tx Data 1*/
+#define AT91C_PIO_PD10  ((unsigned int) 1 << 10) /* Pin Controlled by PD10 */
+#define AT91C_PD10_PCK3 ((unsigned int) AT91C_PIO_PD10) /* PMC Prog Clk Oput 3*/
+#define AT91C_PD10_TPS1 ((unsigned int) AT91C_PIO_PD10) /* ETMARM9 pl stat1 */
+#define AT91C_PIO_PD11  ((unsigned int) 1 << 11) /* Pin Controlled by PD11 */
+#define AT91C_PD11_     ((unsigned int) AT91C_PIO_PD11) /*   */
+#define AT91C_PD11_TPS2 ((unsigned int) AT91C_PIO_PD11) /* ETMARM9 pl stat2 */
+#define AT91C_PIO_PD12  ((unsigned int) 1 << 12) /* Pin Controlled by PD12 */
+#define AT91C_PD12_     ((unsigned int) AT91C_PIO_PD12) /*   */
+#define AT91C_PD12_TPK0 ((unsigned int) AT91C_PIO_PD12) /* ETM Trace Pkt 0 */
+#define AT91C_PIO_PD13  ((unsigned int) 1 << 13) /* Pin Controlled by PD13 */
+#define AT91C_PD13_     ((unsigned int) AT91C_PIO_PD13) /*   */
+#define AT91C_PD13_TPK1 ((unsigned int) AT91C_PIO_PD13) /* ETM Trace Pkt 1 */
+#define AT91C_PIO_PD14  ((unsigned int) 1 << 14) /* Pin Controlled by PD14 */
+#define AT91C_PD14_     ((unsigned int) AT91C_PIO_PD14) /*   */
+#define AT91C_PD14_TPK2 ((unsigned int) AT91C_PIO_PD14) /* ETM Trace Pkt 2 */
+#define AT91C_PIO_PD15  ((unsigned int) 1 << 15) /* Pin Controlled by PD15 */
+#define AT91C_PD15_TD0  ((unsigned int) AT91C_PIO_PD15) /* SSC TxD */
+#define AT91C_PD15_TPK3 ((unsigned int) AT91C_PIO_PD15) /* ETM Trace Pkt 3 */
+#define AT91C_PIO_PD16  ((unsigned int) 1 << 16) /* Pin Controlled by PD16 */
+#define AT91C_PD16_TD1  ((unsigned int) AT91C_PIO_PD16) /* SSC TxD 1 */
+#define AT91C_PD16_TPK4 ((unsigned int) AT91C_PIO_PD16) /* ETM Trace Pkt 4 */
+#define AT91C_PIO_PD17  ((unsigned int) 1 << 17) /* Pin Controlled by PD17 */
+#define AT91C_PD17_TD2  ((unsigned int) AT91C_PIO_PD17) /* SSC TxD 2 */
+#define AT91C_PD17_TPK5 ((unsigned int) AT91C_PIO_PD17) /* ETM Trace Pkt 5 */
+#define AT91C_PIO_PD18  ((unsigned int) 1 << 18) /* Pin Controlled by PD18 */
+#define AT91C_PD18_NPCS1 ((unsigned int) AT91C_PIO_PD18) /*  SPI Perip CS 1 */
+#define AT91C_PD18_TPK6 ((unsigned int) AT91C_PIO_PD18) /* ETM Trace Pkt 6 */
+#define AT91C_PIO_PD19  ((unsigned int) 1 << 19) /* Pin Controlled by PD19 */
+#define AT91C_PD19_NPCS2 ((unsigned int) AT91C_PIO_PD19) /*  SPI Perip CS 2 */
+#define AT91C_PD19_TPK7 ((unsigned int) AT91C_PIO_PD19) /* ETM Trace Pkt 7 */
+#define AT91C_PIO_PD2   ((unsigned int) 1 <<  2) /* Pin Controlled by PD2 */
+#define AT91C_PD2_ETX2  ((unsigned int) AT91C_PIO_PD2) /*  Ethernet MAC TxD 2 */
+#define AT91C_PIO_PD20  ((unsigned int) 1 << 20) /* Pin Controlled by PD20 */
+#define AT91C_PD20_NPCS3 ((unsigned int) AT91C_PIO_PD20) /* SPI Perip CS 3 */
+#define AT91C_PD20_TPK8 ((unsigned int) AT91C_PIO_PD20) /* ETM Trace Pkt 8 */
+#define AT91C_PIO_PD21  ((unsigned int) 1 << 21) /* Pin Controlled by PD21 */
+#define AT91C_PD21_RTS0 ((unsigned int) AT91C_PIO_PD21) /* Usart 0 RTS */
+#define AT91C_PD21_TPK9 ((unsigned int) AT91C_PIO_PD21) /* ETM Trace Pkt 9 */
+#define AT91C_PIO_PD22  ((unsigned int) 1 << 22) /* Pin Controlled by PD22 */
+#define AT91C_PD22_RTS1 ((unsigned int) AT91C_PIO_PD22) /*  Usart 0 RTS */
+#define AT91C_PD22_TPK10 ((unsigned int) AT91C_PIO_PD22) /* ETM Trace Pkt 10 */
+#define AT91C_PIO_PD23  ((unsigned int) 1 << 23) /* Pin Controlled by PD23 */
+#define AT91C_PD23_RTS2 ((unsigned int) AT91C_PIO_PD23) /* USART 2 RTS */
+#define AT91C_PD23_TPK11 ((unsigned int) AT91C_PIO_PD23) /* ETM Trace Pkt 11 */
+#define AT91C_PIO_PD24  ((unsigned int) 1 << 24) /* Pin Controlled by PD24 */
+#define AT91C_PD24_RTS3 ((unsigned int) AT91C_PIO_PD24) /*  USART 3 RTS */
+#define AT91C_PD24_TPK12 ((unsigned int) AT91C_PIO_PD24) /* ETM Trace Pkt 12 */
+#define AT91C_PIO_PD25  ((unsigned int) 1 << 25) /* Pin Controlled by PD25 */
+#define AT91C_PD25_DTR1 ((unsigned int) AT91C_PIO_PD25) /* USART 1 DTR */
+#define AT91C_PD25_TPK13 ((unsigned int) AT91C_PIO_PD25) /* ETM Trace Pkt 13 */
+#define AT91C_PIO_PD26  ((unsigned int) 1 << 26) /* Pin Controlled by PD26 */
+#define AT91C_PD26_TPK14 ((unsigned int) AT91C_PIO_PD26) /* ETM Trace Pkt 14 */
+#define AT91C_PIO_PD27  ((unsigned int) 1 << 27) /* Pin Controlled by PD27 */
+#define AT91C_PD27_TPK15 ((unsigned int) AT91C_PIO_PD27) /* ETM Trace Pkt 15 */
+#define AT91C_PIO_PD3   ((unsigned int) 1 <<  3) /* Pin Controlled by PD3 */
+#define AT91C_PD3_ETX3  ((unsigned int) AT91C_PIO_PD3) /*  Enet MAC TxD 3 */
+#define AT91C_PIO_PD4   ((unsigned int) 1 <<  4) /* Pin Controlled by PD4 */
+#define AT91C_PD4_ETXEN ((unsigned int) AT91C_PIO_PD4) /* Enet MAC TxEn */
+#define AT91C_PIO_PD5   ((unsigned int) 1 <<  5) /* Pin Controlled by PD5 */
+#define AT91C_PD5_ETXER ((unsigned int) AT91C_PIO_PD5) /*  Enet MAC TxCE */
+#define AT91C_PIO_PD6   ((unsigned int) 1 <<  6) /* Pin Controlled by PD6 */
+#define AT91C_PD6_DTXD  ((unsigned int) AT91C_PIO_PD6) /* DBGU Debug TxD */
+#define AT91C_PIO_PD7   ((unsigned int) 1 <<  7) /* Pin Controlled by PD7 */
+#define AT91C_PD7_PCK0  ((unsigned int) AT91C_PIO_PD7) /* PMC Prog Clk Oput 0*/
+#define AT91C_PD7_TSYNC ((unsigned int) AT91C_PIO_PD7) /* ETM Sync signal */
+#define AT91C_PIO_PD8   ((unsigned int) 1 <<  8) /* Pin Controlled by PD8 */
+#define AT91C_PD8_PCK1  ((unsigned int) AT91C_PIO_PD8) /* PMC Prog Clk Oput 1*/
+#define AT91C_PD8_TCLK  ((unsigned int) AT91C_PIO_PD8) /* ETM Trace Clk sig */
+#define AT91C_PIO_PD9   ((unsigned int) 1 <<  9) /* Pin Controlled by PD9 */
+#define AT91C_PD9_PCK2  ((unsigned int) AT91C_PIO_PD9) /* PMC Prog Clk 2 */
+#define AT91C_PD9_TPS0  ((unsigned int) AT91C_PIO_PD9) /* ETM ARM9 pl stat0 */
+#define AT91C_PIO_PB6   ((unsigned int) 1 <<  6) /* Pin Controlled by PB6 */
+#define AT91C_PIO_PC5   ((unsigned int) 1 <<  5)
+#define AT91C_PIO_PC14  ((unsigned int) 1 <<  14) /* Pin Controlled by PC1 */
+#define AT91C_PIO_PC15  ((unsigned int) 1 <<  15) /* Pin Controlled by PC1 */
+#define AT91C_PIO_PA19  ((unsigned int) 1 <<  19) /* Pin Controlled by PC1 */
+#define AT91C_PIO_PB2   ((unsigned int) 1 <<  2) /* Pin Controlled by PC1 */
+#define AT91C_PIO_PB8   ((unsigned int) 1 <<  8)
+#define AT91C_PIO_PB9   ((unsigned int) 1 <<  9)
+#define AT91C_PIO_PB10  ((unsigned int) 1 <<  10)
+#define AT91C_PIO_PB11  ((unsigned int) 1 <<  11)
+#define AT91C_PIO_PB17  ((unsigned int) 1 <<  17)
+#define AT91C_PIO_PB28  ((unsigned int) 1 <<  28)
+#define AT91C_PIO_PB29  ((unsigned int) 1 <<  29)
+
+typedef enum {
+	M501SK_BUZZER = 38,
+	M501SK_DEBUG_LED1 = 96,
+	M501SK_DEBUG_LED2,
+	M501SK_DEBUG_LED3,
+	M501SK_DEBUG_LED4,
+	M501SK_READY_LED = 102,
+} M501SK_PIO;
+
+void m501sk_gpio_init(void);
+uchar m501sk_gpio_set(M501SK_PIO io);
+uchar m501sk_gpio_clear(M501SK_PIO io);
+
+#endif
diff --git a/board/m501sk/memsetup.S b/board/m501sk/memsetup.S
new file mode 100644
index 00000000000..9e174b5b8fc
--- /dev/null
+++ b/board/m501sk/memsetup.S
@@ -0,0 +1,200 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
+ *	          Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
+ *
+ * Modified for the at91rm9200dk board by
+ * (C) Copyright 2004
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+#ifdef CONFIG_BOOTBINFUNC
+/*
+ * some parameters for the board
+ *
+ * This is based on rm9200dk.cfg for the BDI2000 from ABATRON which in
+ * turn is based on the boot.bin code from ATMEL
+ *
+ */
+
+/* flash */
+#define MC_PUIA 0xFFFFFF10
+#define MC_PUIA_VAL 0x00000000
+#define MC_PUP 0xFFFFFF50
+#define MC_PUP_VAL 0x00000000
+#define MC_PUER 0xFFFFFF54
+#define MC_PUER_VAL 0x00000000
+#define MC_ASR 0xFFFFFF04
+#define MC_ASR_VAL 0x00000000
+#define MC_AASR 0xFFFFFF08
+#define MC_AASR_VAL 0x00000000
+#define EBI_CFGR 0xFFFFFF64
+#define EBI_CFGR_VAL 0x00000000
+#define SMC2_CSR 0xFFFFFF70
+#define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
+
+/* clocks */
+#define PLLAR 0xFFFFFC28
+#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
+#define PLLBR 0xFFFFFC2C
+#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
+#define MCKR 0xFFFFFC30
+/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
+#define MCKR_VAL	0x00000202
+
+/* sdram */
+#define PIOC_ASR 0xFFFFF870
+#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as Perip (D16/D31) */
+#define PIOC_BSR 0xFFFFF874
+#define PIOC_BSR_VAL 0x00000000
+#define PIOC_PDR 0xFFFFF804
+#define PIOC_PDR_VAL 0xFFFF0000
+#define EBI_CSA 0xFFFFFF60
+#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
+#define SDRC_CR 0xFFFFFF98
+#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
+#define SDRAM 0x20000000 /* address of the SDRAM */
+#define SDRAM1 0x20000080 /* address of the SDRAM */
+#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
+#define SDRC_MR 0xFFFFFF90
+#define SDRC_MR_VAL 0x00000002 /* Precharge All */
+#define SDRC_MR_VAL1 0x00000004 /* refresh */
+#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
+#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
+#define SDRC_TR 0xFFFFFF94
+#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+
+_TEXT_BASE:
+	.word   TEXT_BASE
+
+.globl lowlevelinit
+lowlevelinit:
+	/* memory control configuration */
+	/* this isn't very elegant, but  what the heck */
+	ldr     r0, =SMRDATA
+	ldr     r1, _TEXT_BASE
+	sub     r0, r0, r1
+	add     r2, r0, #80
+0:
+	/* the address */
+	ldr     r1, [r0], #4
+	/* the value */
+	ldr     r3, [r0], #4
+	str     r3, [r1]
+	cmp     r2, r0
+	bne     0b
+	/* delay - this is all done by guess */
+	ldr     r0, =0x00010000
+1:
+	subs    r0, r0, #1
+	bhi     1b
+	ldr     r0, =SMRDATA1
+	ldr     r1, _TEXT_BASE
+	sub     r0, r0, r1
+	add     r2, r0, #176
+2:
+	/* the address */
+	ldr     r1, [r0], #4
+	/* the value */
+	ldr     r3, [r0], #4
+	str     r3, [r1]
+	cmp     r2, r0
+	bne     2b
+
+	/* everything is fine now */
+	mov     pc, lr
+
+	.ltorg
+
+SMRDATA:
+	.word MC_PUIA
+	.word MC_PUIA_VAL
+	.word MC_PUP
+	.word MC_PUP_VAL
+	.word MC_PUER
+	.word MC_PUER_VAL
+	.word MC_ASR
+	.word MC_ASR_VAL
+	.word MC_AASR
+	.word MC_AASR_VAL
+	.word EBI_CFGR
+	.word EBI_CFGR_VAL
+	.word SMC2_CSR
+	.word SMC2_CSR_VAL
+	.word PLLAR
+	.word PLLAR_VAL
+	.word PLLBR
+	.word PLLBR_VAL
+	.word MCKR
+	.word MCKR_VAL
+	/* SMRDATA is 80 bytes long */
+	/* here there's a delay of 100 */
+SMRDATA1:
+	.word PIOC_ASR
+	.word PIOC_ASR_VAL
+	.word PIOC_BSR
+	.word PIOC_BSR_VAL
+	.word PIOC_PDR
+	.word PIOC_PDR_VAL
+	.word EBI_CSA
+	.word EBI_CSA_VAL
+	.word SDRC_CR
+	.word SDRC_CR_VAL
+	.word SDRC_MR
+	.word SDRC_MR_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRC_MR
+	.word SDRC_MR_VAL1
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRC_MR
+	.word SDRC_MR_VAL2
+	.word SDRAM1
+	.word SDRAM_VAL
+	.word SDRC_TR
+	.word SDRC_TR_VAL
+	.word SDRAM
+	.word SDRAM_VAL
+	.word SDRC_MR
+	.word SDRC_MR_VAL3
+	.word SDRAM
+	.word SDRAM_VAL
+	/* SMRDATA1 is 176 bytes long */
+#endif /* CONFIG_BOOTBINFUNC */
diff --git a/board/m501sk/u-boot.lds b/board/m501sk/u-boot.lds
new file mode 100644
index 00000000000..99e2ac19962
--- /dev/null
+++ b/board/m501sk/u-boot.lds
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text      :
+	{
+	 cpu/arm920t/start.o   (.text)
+	 *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h
new file mode 100644
index 00000000000..095fdaf5c8b
--- /dev/null
+++ b/include/configs/m501sk.h
@@ -0,0 +1,197 @@
+/*
+ * Based on Modifications by Alan Lu / Artila and
+ * Rick Bronson <rick@efn.org>
+ *
+ * Configuration settings for the Artila M-501 starter kit,
+ * with V02 processor card.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ARM asynchronous clock */
+/* from 18.432 MHz crystal (18432000 / 4 * 39) */
+#define AT91C_MAIN_CLOCK	179712000
+/* Perip clock (AT91C_MASTER_CLOCK / 3) */
+#define AT91C_MASTER_CLOCK	59904000
+#define AT91_SLOW_CLOCK	32768 /* slow clock */
+
+#define CONFIG_AT91RM9200DK	1 /* on an AT91RM9200DK Board    */
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+#define CONFIG_CMDLINE_TAG	1 /* enable passing of ATAGs    */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+
+#undef CONFIG_AUTOBOOT_PROMPT
+#define CONFIG_MENUPROMPT		"."
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE	128	/* Bytes reserved for initial data */
+
+#define CONFIG_BAUDRATE			115200
+
+/* Hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
+#define CFG_AT91C_BRGR_DIVISOR	33
+
+/*
+ * Hardware drivers
+ */
+#define CFG_FLASH_CFI		1
+#define CFG_FLASH_CFI_DRIVER	1
+#define CFG_ENV_SECT_SIZE	0x20000
+#define CFG_FLASH_USE_BUFFER_WRITE
+#define CFG_FLASH_PROTECTION	/*for Intel P30 Flash*/
+#define CONFIG_HARD_I2C
+#define CFG_I2C_SPEED		100
+#define CFG_I2C_SLAVE		0
+#define CFG_CONSOLE_INFO_QUIET
+#undef CFG_ENV_IS_IN_EEPROM
+#define CFG_I2C_EEPROM_ADDR	0x50
+#define CFG_I2C_EEPROM_ADDR_LEN	1
+#define CFG_EEPROM_AT24C16
+#define CFG_I2C_RTC_ADDR		0x32
+#undef CONFIG_RTC_DS1338
+#define CONFIG_RTC_RS5C372A
+#undef CONFIG_POST
+#define CONFIG_M501SK
+#define CONFIG_CMC_PU2
+
+/* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_DBGU
+#undef CONFIG_USART0
+#undef CONFIG_USART1
+
+#undef CONFIG_HWFLOW		/* don't include RTS/CTS flow control support */
+#undef CONFIG_MODEM_SUPPORT	/* disable modem initialization stuff */
+
+#define CONFIG_BOOTARGS	"mem=32M console=ttyS0,115200 "	\
+			"initrd=0x20800000,8192000 ramdisk_size=15360 "	\
+			"root=/dev/ram0 rw mtdparts=phys_mapped_flash:"	\
+			"128k(loader)ro,128k(reserved)ro,1408k(linux)"	\
+			"ro,2560k(ramdisk)ro,-(userdisk)"
+#define CONFIG_BOOTCOMMAND	"bootm 10040000 101a0000"
+#define CONFIG_BOOTDELAY	1
+#define CONFIG_BAUDRATE	115200
+#define CONFIG_IPADDR		192.168.1.100
+#define CONFIG_SERVERIP	192.168.1.1
+#define CONFIG_GATEWAYIP	192.168.1.254
+#define CONFIG_NETMASK		255.255.255.0
+#define CONFIG_BOOTFILE	uImage
+#define CONFIG_ETHADDR		00:13:48:aa:bb:cc
+#define CONFIG_ENV_OVERWRITE	1
+#define BOARD_LATE_INIT
+
+#define	CONFIG_EXTRA_ENV_SETTINGS \
+		"unlock=yes\0"
+
+#define CFG_CMD_JFFS2
+#undef CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_POST
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_ENV
+
+#define CFG_HUSH_PARSER
+#define CONFIG_AUTO_COMPLETE
+#define CFG_PROMPT_HUSH_PS2	    ">>"
+
+#define CFG_MAX_NAND_DEVICE	0 /* Max number of NAND devices */
+#define SECTORSIZE			     512
+
+#define ADDR_COLUMN		1
+#define ADDR_PAGE		2
+#define ADDR_COLUMN_PAGE	3
+
+#define CONFIG_NR_DRAM_BANKS	1
+#define PHYS_SDRAM		0x20000000
+#define PHYS_SDRAM_SIZE	0x2000000 /* 32 megs */
+
+#define CFG_MEMTEST_START	0x21000000 /* PHYS_SDRAM */
+/* CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 */
+#define CFG_MEMTEST_END	0x00100000
+
+#define CONFIG_DRIVER_ETHER
+#define CONFIG_NET_RETRY_COUNT	20
+#define CONFIG_AT91C_USE_RMII
+
+#define PHYS_FLASH_1		0x10000000
+#define PHYS_FLASH_SIZE	0x800000 /* 8 megs main flash */
+#define CFG_FLASH_BASE		PHYS_FLASH_1
+#define CFG_MAX_FLASH_BANKS	1
+#define CFG_MAX_FLASH_SECT	256
+#define CFG_FLASH_ERASE_TOUT	(2*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT	(2*CFG_HZ) /* Timeout for Flash Write */
+
+#ifdef CFG_ENV_IS_IN_DATAFLASH
+#define CFG_ENV_OFFSET		0x20000
+#define CFG_ENV_ADDR		(CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
+#define CFG_ENV_SIZE		0x2000
+#else
+#define CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_ADDR		(PHYS_FLASH_1 + 0x00020000)
+#define CFG_ENV_SIZE		2048
+#endif
+
+#ifdef CFG_ENV_IS_IN_EEPROM
+#define CFG_ENV_OFFSET		1024
+#define CFG_ENV_SIZE		1024
+#endif
+
+#define CFG_LOAD_ADDR		0x21000000 /* default load address */
+
+/* use for protect flash sectors */
+#define CFG_BOOT_SIZE		0x6000 /* 24 KBytes */
+#define CFG_U_BOOT_BASE	(PHYS_FLASH_1 + 0x10000)
+#define CFG_U_BOOT_SIZE	0x10000 /* 64 KBytes */
+
+#define CFG_BAUDRATE_TABLE	{ 115200 , 19200, 38400, 57600, 9600 }
+
+#define CFG_PROMPT		"U-Boot> " /* Monitor Command Prompt */
+#define CFG_CBSIZE		512 /* Console I/O Buffer Size */
+#define CFG_MAXARGS		16 /* max number of command args */
+/* Print Buffer Size */
+#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+
+#define CFG_HZ 1000
+#define CFG_HZ_CLOCK		AT91C_MASTER_CLOCK/2
+
+#define CONFIG_STACKSIZE	(32*1024) /* regular stack */
+
+#ifdef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ not supported
+#endif
+
+#endif
diff --git a/lib_arm/armlinux.c b/lib_arm/armlinux.c
index 6d32a411fde..c1e1d125456 100644
--- a/lib_arm/armlinux.c
+++ b/lib_arm/armlinux.c
@@ -160,7 +160,8 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
 			do_reset (cmdtp, flag, argc, argv);
 		}
 
-#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) || defined(CONFIG_ARMADILLO)
+#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) ||	\
+		defined(CONFIG_ARMADILLO) || defined(CONFIG_M501SK)
 		/*
 		 *we need to copy the ramdisk to SRAM to let Linux boot
 		 */
-- 
cgit v1.3.1


From 65230107025733e89e28fd5e5cfd916d4953c28a Mon Sep 17 00:00:00 2001
From: Haavard Skinnemoen <hskinnemoen at>
Date: Fri, 22 Feb 2008 11:40:50 +0000
Subject: Move AT91RM9200DK board support under board/atmel

We already have a vendor subdir for Atmel, so we should use it.

Signed-off-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
---
 Makefile                                |   2 +-
 board/at91rm9200dk/Makefile             |  50 ----
 board/at91rm9200dk/at91rm9200dk.c       | 142 ---------
 board/at91rm9200dk/config.mk            |   1 -
 board/at91rm9200dk/flash.c              | 502 --------------------------------
 board/at91rm9200dk/led.c                |  80 -----
 board/at91rm9200dk/mux.c                |  37 ---
 board/at91rm9200dk/u-boot.lds           |  57 ----
 board/atmel/at91rm9200dk/Makefile       |  50 ++++
 board/atmel/at91rm9200dk/at91rm9200dk.c | 142 +++++++++
 board/atmel/at91rm9200dk/config.mk      |   1 +
 board/atmel/at91rm9200dk/flash.c        | 502 ++++++++++++++++++++++++++++++++
 board/atmel/at91rm9200dk/led.c          |  80 +++++
 board/atmel/at91rm9200dk/mux.c          |  37 +++
 board/atmel/at91rm9200dk/u-boot.lds     |  57 ++++
 15 files changed, 870 insertions(+), 870 deletions(-)
 delete mode 100755 board/at91rm9200dk/Makefile
 delete mode 100644 board/at91rm9200dk/at91rm9200dk.c
 delete mode 100644 board/at91rm9200dk/config.mk
 delete mode 100644 board/at91rm9200dk/flash.c
 delete mode 100644 board/at91rm9200dk/led.c
 delete mode 100644 board/at91rm9200dk/mux.c
 delete mode 100644 board/at91rm9200dk/u-boot.lds
 create mode 100755 board/atmel/at91rm9200dk/Makefile
 create mode 100644 board/atmel/at91rm9200dk/at91rm9200dk.c
 create mode 100644 board/atmel/at91rm9200dk/config.mk
 create mode 100644 board/atmel/at91rm9200dk/flash.c
 create mode 100644 board/atmel/at91rm9200dk/led.c
 create mode 100644 board/atmel/at91rm9200dk/mux.c
 create mode 100644 board/atmel/at91rm9200dk/u-boot.lds

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index ec8661ad898..1f63b8bc44f 100644
--- a/Makefile
+++ b/Makefile
@@ -2302,7 +2302,7 @@ xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$
 xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
 
 at91rm9200dk_config	:	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk NULL at91rm9200
+	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
 
 cmc_pu2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
diff --git a/board/at91rm9200dk/Makefile b/board/at91rm9200dk/Makefile
deleted file mode 100755
index 01f3bc30a32..00000000000
--- a/board/at91rm9200dk/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	:= at91rm9200dk.o flash.o led.o mux.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/at91rm9200dk/at91rm9200dk.c b/board/at91rm9200dk/at91rm9200dk.c
deleted file mode 100644
index c564f73a532..00000000000
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <dm9161.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
-	/* Enable Ctrlc */
-	console_init_f ();
-
-	/* Correct IRDA resistor problem */
-	/* Set PA23_TXD in Output */
-	((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
-
-	/* memory and cpu-speed are setup before relocation */
-	/* so we do _nothing_ here */
-
-	/* arch number of AT91RM9200DK-Board */
-	gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200;
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-	return 0;
-}
-
-int dram_init (void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-	return 0;
-}
-
-#ifdef CONFIG_DRIVER_ETHER
-#if defined(CONFIG_CMD_NET)
-
-/*
- * Name:
- *	at91rm9200_GetPhyInterface
- * Description:
- *	Initialise the interface functions to the PHY
- * Arguments:
- *	None
- * Return value:
- *	None
- */
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
-	p_phyops->Init = dm9161_InitPhy;
-	p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
-	p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
-	p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
-}
-
-#endif
-#endif	/* CONFIG_DRIVER_ETHER */
-
-/*
- * Disk On Chip (NAND) Millenium initialization.
- * The NAND lives in the CS2* space
- */
-#if defined(CONFIG_CMD_NAND)
-extern ulong nand_probe (ulong physadr);
-
-#define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
-void nand_init (void)
-{
-	/* Setup Smart Media, fitst enable the address range of CS3 */
-	*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
-	/* set the bus interface characteristics based on
-	   tDS Data Set up Time 30 - ns
-	   tDH Data Hold Time 20 - ns
-	   tALS ALE Set up Time 20 - ns
-	   16ns at 60 MHz ~= 3  */
-/*memory mapping structures */
-#define SM_ID_RWH	(5 << 28)
-#define SM_RWH		(1 << 28)
-#define SM_RWS		(0 << 24)
-#define SM_TDF		(1 << 8)
-#define SM_NWS		(3)
-	AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
-		AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
-		SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
-
-	/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
-	*AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
-		AT91C_PC3_BFBAA_SMWE;
-	*AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
-		AT91C_PC3_BFBAA_SMWE;
-
-	/* Configure PC2 as input (signal READY of the SmartMedia) */
-	*AT91C_PIOC_PER = AT91C_PC2_BFAVD;	/* enable direct output enable */
-	*AT91C_PIOC_ODR = AT91C_PC2_BFAVD;	/* disable output */
-
-	/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
-	*AT91C_PIOB_PER = AT91C_PIO_PB1;	/* enable direct output enable */
-	*AT91C_PIOB_ODR = AT91C_PIO_PB1;	/* disable output */
-
-	/* PIOB and PIOC clock enabling */
-	*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
-	*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
-
-	if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
-		printf ("  No SmartMedia card inserted\n");
-#ifdef DEBUG
-	printf ("  SmartMedia card inserted\n");
-
-	printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
-#endif
-	printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
-}
-#endif
diff --git a/board/at91rm9200dk/config.mk b/board/at91rm9200dk/config.mk
deleted file mode 100644
index 9ce161e55f0..00000000000
--- a/board/at91rm9200dk/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x21f00000
diff --git a/board/at91rm9200dk/flash.c b/board/at91rm9200dk/flash.c
deleted file mode 100644
index 0513d61d73f..00000000000
--- a/board/at91rm9200dk/flash.c
+++ /dev/null
@@ -1,502 +0,0 @@
-/*
- * (C) Copyright 2002
- * Lineo, Inc. <www.lineo.com>
- * Bernhard Kuhn <bkuhn@lineo.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush(void);
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef
-{
-	unsigned int sector_number;
-	unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgAT49BV16x4[] =
-{
-	{  8,  8*1024 },	/*   8 *  8 kBytes sectors */
-	{  2, 32*1024 },	/*   2 * 32 kBytes sectors */
-	{ 30, 64*1024 },	/*  30 * 64 kBytes sectors */
-};
-
-OrgDef OrgAT49BV16x4A[] =
-{
-	{  8,  8*1024 },	/*   8 *  8 kBytes sectors */
-	{ 31, 64*1024 },	/*  31 * 64 kBytes sectors */
-};
-
-OrgDef OrgAT49BV6416[] =
-{
-	{   8,  8*1024 },	/*   8 *  8 kBytes sectors */
-	{ 127, 64*1024 },	/* 127 * 64 kBytes sectors */
-};
-
-flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
-
-/* AT49BV1614A Codes */
-#define FLASH_CODE1		0xAA
-#define FLASH_CODE2		0x55
-#define ID_IN_CODE		0x90
-#define ID_OUT_CODE		0xF0
-
-
-#define CMD_READ_ARRAY		0x00F0
-#define CMD_UNLOCK1		0x00AA
-#define CMD_UNLOCK2		0x0055
-#define CMD_ERASE_SETUP		0x0080
-#define CMD_ERASE_CONFIRM	0x0030
-#define CMD_PROGRAM		0x00A0
-#define CMD_UNLOCK_BYPASS	0x0020
-#define CMD_SECTOR_UNLOCK	0x0070
-
-#define MEM_FLASH_ADDR1		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
-#define MEM_FLASH_ADDR2		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
-
-#define BIT_ERASE_DONE		0x0080
-#define BIT_RDY_MASK		0x0080
-#define BIT_PROGRAM_ERROR	0x0020
-#define BIT_TIMEOUT		0x80000000 /* our flag */
-
-#define READY 1
-#define ERR   2
-#define TMO   4
-
-/*-----------------------------------------------------------------------
- */
-void flash_identification (flash_info_t * info)
-{
-	volatile u16 manuf_code, device_code, add_device_code;
-
-	MEM_FLASH_ADDR1 = FLASH_CODE1;
-	MEM_FLASH_ADDR2 = FLASH_CODE2;
-	MEM_FLASH_ADDR1 = ID_IN_CODE;
-
-	manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
-	device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
-	add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
-
-	MEM_FLASH_ADDR1 = FLASH_CODE1;
-	MEM_FLASH_ADDR2 = FLASH_CODE2;
-	MEM_FLASH_ADDR1 = ID_OUT_CODE;
-
-	/* Vendor type */
-	info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
-	printf ("Atmel: ");
-
-	if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
-
-		if ((add_device_code & FLASH_TYPEMASK) ==
-			(ATM_ID_BV1614A & FLASH_TYPEMASK)) {
-			info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
-			printf ("AT49BV1614A (16Mbit)\n");
-		} else {				/* AT49BV1614 Flash */
-			info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
-			printf ("AT49BV1614 (16Mbit)\n");
-		}
-
-	} else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) {
-		info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
-		printf ("AT49BV6416 (64Mbit)\n");
-	}
-}
-
-ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
-{
-	int i, nb_sectors = 0;
-
-	for (i=0; i<nb_blocks; i++){
-		nb_sectors += pOrgDef[i].sector_number;
-	}
-
-	return nb_sectors;
-}
-
-void flash_unlock_sector(flash_info_t * info, unsigned int sector)
-{
-	volatile u16 *addr = (volatile u16 *) (info->start[sector]);
-
-	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-	*addr = CMD_SECTOR_UNLOCK;
-}
-
-
-ulong flash_init (void)
-{
-	int i, j, k;
-	unsigned int flash_nb_blocks, sector;
-	unsigned int start_address;
-	OrgDef *pOrgDef;
-
-	ulong size = 0;
-
-	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
-		ulong flashbase = 0;
-
-		flash_identification (&flash_info[i]);
-
-		if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-			(ATM_ID_BV1614 & FLASH_TYPEMASK)) {
-
-			pOrgDef = OrgAT49BV16x4;
-			flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
-		} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-			(ATM_ID_BV1614A & FLASH_TYPEMASK)){	/* AT49BV1614A Flash */
-
-			pOrgDef = OrgAT49BV16x4A;
-			flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
-		} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-			(ATM_ID_BV6416 & FLASH_TYPEMASK)){	/* AT49BV6416 Flash */
-
-			pOrgDef = OrgAT49BV6416;
-			flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef);
-		} else {
-			flash_nb_blocks = 0;
-			pOrgDef = OrgAT49BV16x4;
-		}
-
-		flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks);
-		memset (flash_info[i].protect, 0, flash_info[i].sector_count);
-
-		if (i == 0)
-			flashbase = PHYS_FLASH_1;
-		else
-			panic ("configured too many flash banks!\n");
-
-		sector = 0;
-		start_address = flashbase;
-		flash_info[i].size = 0;
-
-		for (j = 0; j < flash_nb_blocks; j++) {
-			for (k = 0; k < pOrgDef[j].sector_number; k++) {
-				flash_info[i].start[sector++] = start_address;
-				start_address += pOrgDef[j].sector_size;
-				flash_info[i].size += pOrgDef[j].sector_size;
-			}
-		}
-
-		size += flash_info[i].size;
-
-		if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
-			(ATM_ID_BV6416 & FLASH_TYPEMASK)){	/* AT49BV6416 Flash */
-
-			/* Unlock all sectors at reset */
-			for (j=0; j<flash_info[i].sector_count; j++){
-				flash_unlock_sector(&flash_info[i], j);
-			}
-		}
-	}
-
-	/* Protect binary boot image */
-	flash_protect (FLAG_PROTECT_SET,
-		       CFG_FLASH_BASE,
-		       CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
-
-	/* Protect environment variables */
-	flash_protect (FLAG_PROTECT_SET,
-		       CFG_ENV_ADDR,
-		       CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-
-	/* Protect U-Boot gzipped image */
-	flash_protect (FLAG_PROTECT_SET,
-		       CFG_U_BOOT_BASE,
-		       CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
-
-	return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
-	int i;
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case (ATM_MANUFACT & FLASH_VENDMASK):
-		printf ("Atmel: ");
-		break;
-	default:
-		printf ("Unknown Vendor ");
-		break;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case (ATM_ID_BV1614 & FLASH_TYPEMASK):
-		printf ("AT49BV1614 (16Mbit)\n");
-		break;
-	case (ATM_ID_BV1614A & FLASH_TYPEMASK):
-		printf ("AT49BV1614A (16Mbit)\n");
-		break;
-	case (ATM_ID_BV6416 & FLASH_TYPEMASK):
-		printf ("AT49BV6416 (64Mbit)\n");
-		break;
-	default:
-		printf ("Unknown Chip Type\n");
-		return;
-	}
-
-	printf ("  Size: %ld MB in %d Sectors\n",
-		info->size >> 20, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-	for (i = 0; i < info->sector_count; i++) {
-		if ((i % 5) == 0) {
-			printf ("\n   ");
-		}
-		printf (" %08lX%s", info->start[i],
-			info->protect[i] ? " (RO)" : "     ");
-	}
-	printf ("\n");
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
-	ulong result;
-	int iflag, cflag, prot, sect;
-	int rc = ERR_OK;
-	int chip1;
-
-	/* first look for protection bits */
-
-	if (info->flash_id == FLASH_UNKNOWN)
-		return ERR_UNKNOWN_FLASH_TYPE;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		return ERR_INVAL;
-	}
-
-	if ((info->flash_id & FLASH_VENDMASK) !=
-		(ATM_MANUFACT & FLASH_VENDMASK)) {
-		return ERR_UNKNOWN_FLASH_VENDOR;
-	}
-
-	prot = 0;
-	for (sect = s_first; sect <= s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-	if (prot)
-		return ERR_PROTECTED;
-
-	/*
-	 * Disable interrupts which might cause a timeout
-	 * here. Remember that our exception vectors are
-	 * at address 0 in the flash, and we don't want a
-	 * (ticker) exception to happen while the flash
-	 * chip is in programming mode.
-	 */
-	cflag = icache_status ();
-	icache_disable ();
-	iflag = disable_interrupts ();
-
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
-		printf ("Erasing sector %2d ... ", sect);
-
-		/* arm simple, non interrupt dependent timer */
-		reset_timer_masked ();
-
-		if (info->protect[sect] == 0) {	/* not protected */
-			volatile u16 *addr = (volatile u16 *) (info->start[sect]);
-
-			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-			MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
-			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-			*addr = CMD_ERASE_CONFIRM;
-
-			/* wait until flash is ready */
-			chip1 = 0;
-
-			do {
-				result = *addr;
-
-				/* check timeout */
-				if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
-					MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-					chip1 = TMO;
-					break;
-				}
-
-				if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
-					chip1 = READY;
-
-			} while (!chip1);
-
-			MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
-			if (chip1 == ERR) {
-				rc = ERR_PROG_ERROR;
-				goto outahere;
-			}
-			if (chip1 == TMO) {
-				rc = ERR_TIMOUT;
-				goto outahere;
-			}
-
-			printf ("ok.\n");
-		} else {			/* it was protected */
-			printf ("protected!\n");
-		}
-	}
-
-	if (ctrlc ())
-		printf ("User Interrupt!\n");
-
-outahere:
-	/* allow flash to settle - wait 10 ms */
-	udelay_masked (10000);
-
-	if (iflag)
-		enable_interrupts ();
-
-	if (cflag)
-		icache_enable ();
-
-	return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
-	volatile u16 *addr = (volatile u16 *) dest;
-	ulong result;
-	int rc = ERR_OK;
-	int cflag, iflag;
-	int chip1;
-
-	/*
-	 * Check if Flash is (sufficiently) erased
-	 */
-	result = *addr;
-	if ((result & data) != data)
-		return ERR_NOT_ERASED;
-
-	/*
-	 * Disable interrupts which might cause a timeout
-	 * here. Remember that our exception vectors are
-	 * at address 0 in the flash, and we don't want a
-	 * (ticker) exception to happen while the flash
-	 * chip is in programming mode.
-	 */
-	cflag = icache_status ();
-	icache_disable ();
-	iflag = disable_interrupts ();
-
-	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
-	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
-	MEM_FLASH_ADDR1 = CMD_PROGRAM;
-	*addr = data;
-
-	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked ();
-
-	/* wait until flash is ready */
-	chip1 = 0;
-	do {
-		result = *addr;
-
-		/* check timeout */
-		if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
-			chip1 = ERR | TMO;
-			break;
-		}
-		if (!chip1 && ((result & 0x80) == (data & 0x80)))
-			chip1 = READY;
-
-	} while (!chip1);
-
-	*addr = CMD_READ_ARRAY;
-
-	if (chip1 == ERR || *addr != data)
-		rc = ERR_PROG_ERROR;
-
-	if (iflag)
-		enable_interrupts ();
-
-	if (cflag)
-		icache_enable ();
-
-	return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
-	ulong wp, data;
-	int rc;
-
-	if (addr & 1) {
-		printf ("unaligned destination not supported\n");
-		return ERR_ALIGN;
-	};
-
-	if ((int) src & 1) {
-		printf ("unaligned source not supported\n");
-		return ERR_ALIGN;
-	};
-
-	wp = addr;
-
-	while (cnt >= 2) {
-		data = *((volatile u16 *) src);
-		if ((rc = write_word (info, wp, data)) != 0) {
-			return (rc);
-		}
-		src += 2;
-		wp += 2;
-		cnt -= 2;
-	}
-
-	if (cnt == 1) {
-		data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
-										   8);
-		if ((rc = write_word (info, wp, data)) != 0) {
-			return (rc);
-		}
-		src += 1;
-		wp += 1;
-		cnt -= 1;
-	};
-
-	return ERR_OK;
-}
diff --git a/board/at91rm9200dk/led.c b/board/at91rm9200dk/led.c
deleted file mode 100644
index 47a3bfce68b..00000000000
--- a/board/at91rm9200dk/led.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * (C) Copyright 2006
- * Atmel Nordic AB <www.atmel.com>
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/AT91RM9200.h>
-
-#define	GREEN_LED	AT91C_PIO_PB0
-#define	YELLOW_LED	AT91C_PIO_PB1
-#define	RED_LED	AT91C_PIO_PB2
-
-void	green_LED_on(void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	PIOB->PIO_CODR		= GREEN_LED;
-}
-
-void	 yellow_LED_on(void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	PIOB->PIO_CODR		= YELLOW_LED;
-}
-
-void	 red_LED_on(void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	PIOB->PIO_CODR		= RED_LED;
-}
-
-void	green_LED_off(void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	PIOB->PIO_SODR		= GREEN_LED;
-}
-
-void	yellow_LED_off(void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	PIOB->PIO_SODR		= YELLOW_LED;
-}
-
-void	red_LED_off(void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	PIOB->PIO_SODR		= RED_LED;
-}
-
-
-void coloured_LED_init (void)
-{
-	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
-	AT91PS_PMC	PMC	= AT91C_BASE_PMC;
-	PMC->PMC_PCER		= (1 << AT91C_ID_PIOB);	/* Enable PIOB clock */
-	/* Disable peripherals on LEDs */
-	PIOB->PIO_PER		= AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-	/* Enable pins as outputs */
-	PIOB->PIO_OER		= AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-	/* Turn all LEDs OFF */
-	PIOB->PIO_SODR		= AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
-}
diff --git a/board/at91rm9200dk/mux.c b/board/at91rm9200dk/mux.c
deleted file mode 100644
index 767d28090d1..00000000000
--- a/board/at91rm9200dk/mux.c
+++ /dev/null
@@ -1,37 +0,0 @@
-#include <config.h>
-#include <common.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-int AT91F_GetMuxStatus(void) {
-#ifdef	DATAFLASH_MMC_SELECT
-	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
-	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
-
-
-	if(AT91C_BASE_PIOB->PIO_ODSR & DATAFLASH_MMC_SELECT) {
-		return 1;
-	} else {
-		return 0;
-	}
-#endif
-	return 0;
-}
-
-void AT91F_SelectMMC(void) {
-#ifdef	DATAFLASH_MMC_SELECT
-	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT;	/* Set in PIO mode */
-	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT;	/* Configure in output */
-	/* Set Output */
-	AT91C_BASE_PIOB->PIO_SODR = DATAFLASH_MMC_SELECT;
-#endif
-}
-
-void AT91F_SelectSPI(void) {
-#ifdef	DATAFLASH_MMC_SELECT
-	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT;	/* Set in PIO mode */
-	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT;	/* Configure in output */
-	/* Clear Output */
-	AT91C_BASE_PIOB->PIO_CODR = DATAFLASH_MMC_SELECT;
-#endif
-}
diff --git a/board/at91rm9200dk/u-boot.lds b/board/at91rm9200dk/u-boot.lds
deleted file mode 100644
index 14cd22800bb..00000000000
--- a/board/at91rm9200dk/u-boot.lds
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text      :
-	{
-	  cpu/arm920t/start.o	(.text)
-	  *(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(.rodata) }
-
-	. = ALIGN(4);
-	.data : { *(.data) }
-
-	. = ALIGN(4);
-	.got : { *(.got) }
-
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.bss (NOLOAD) : { *(.bss) }
-	_end = .;
-}
diff --git a/board/atmel/at91rm9200dk/Makefile b/board/atmel/at91rm9200dk/Makefile
new file mode 100755
index 00000000000..01f3bc30a32
--- /dev/null
+++ b/board/atmel/at91rm9200dk/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= at91rm9200dk.o flash.o led.o mux.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/atmel/at91rm9200dk/at91rm9200dk.c b/board/atmel/at91rm9200dk/at91rm9200dk.c
new file mode 100644
index 00000000000..c564f73a532
--- /dev/null
+++ b/board/atmel/at91rm9200dk/at91rm9200dk.c
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+#include <at91rm9200_net.h>
+#include <dm9161.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+	/* Enable Ctrlc */
+	console_init_f ();
+
+	/* Correct IRDA resistor problem */
+	/* Set PA23_TXD in Output */
+	((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
+
+	/* memory and cpu-speed are setup before relocation */
+	/* so we do _nothing_ here */
+
+	/* arch number of AT91RM9200DK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	return 0;
+}
+
+int dram_init (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
+}
+
+#ifdef CONFIG_DRIVER_ETHER
+#if defined(CONFIG_CMD_NET)
+
+/*
+ * Name:
+ *	at91rm9200_GetPhyInterface
+ * Description:
+ *	Initialise the interface functions to the PHY
+ * Arguments:
+ *	None
+ * Return value:
+ *	None
+ */
+void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
+{
+	p_phyops->Init = dm9161_InitPhy;
+	p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
+	p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
+	p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
+}
+
+#endif
+#endif	/* CONFIG_DRIVER_ETHER */
+
+/*
+ * Disk On Chip (NAND) Millenium initialization.
+ * The NAND lives in the CS2* space
+ */
+#if defined(CONFIG_CMD_NAND)
+extern ulong nand_probe (ulong physadr);
+
+#define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
+void nand_init (void)
+{
+	/* Setup Smart Media, fitst enable the address range of CS3 */
+	*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
+	/* set the bus interface characteristics based on
+	   tDS Data Set up Time 30 - ns
+	   tDH Data Hold Time 20 - ns
+	   tALS ALE Set up Time 20 - ns
+	   16ns at 60 MHz ~= 3  */
+/*memory mapping structures */
+#define SM_ID_RWH	(5 << 28)
+#define SM_RWH		(1 << 28)
+#define SM_RWS		(0 << 24)
+#define SM_TDF		(1 << 8)
+#define SM_NWS		(3)
+	AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
+		AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
+		SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
+
+	/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
+	*AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+		AT91C_PC3_BFBAA_SMWE;
+	*AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+		AT91C_PC3_BFBAA_SMWE;
+
+	/* Configure PC2 as input (signal READY of the SmartMedia) */
+	*AT91C_PIOC_PER = AT91C_PC2_BFAVD;	/* enable direct output enable */
+	*AT91C_PIOC_ODR = AT91C_PC2_BFAVD;	/* disable output */
+
+	/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
+	*AT91C_PIOB_PER = AT91C_PIO_PB1;	/* enable direct output enable */
+	*AT91C_PIOB_ODR = AT91C_PIO_PB1;	/* disable output */
+
+	/* PIOB and PIOC clock enabling */
+	*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
+	*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
+
+	if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
+		printf ("  No SmartMedia card inserted\n");
+#ifdef DEBUG
+	printf ("  SmartMedia card inserted\n");
+
+	printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
+#endif
+	printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
+}
+#endif
diff --git a/board/atmel/at91rm9200dk/config.mk b/board/atmel/at91rm9200dk/config.mk
new file mode 100644
index 00000000000..9ce161e55f0
--- /dev/null
+++ b/board/atmel/at91rm9200dk/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x21f00000
diff --git a/board/atmel/at91rm9200dk/flash.c b/board/atmel/at91rm9200dk/flash.c
new file mode 100644
index 00000000000..0513d61d73f
--- /dev/null
+++ b/board/atmel/at91rm9200dk/flash.c
@@ -0,0 +1,502 @@
+/*
+ * (C) Copyright 2002
+ * Lineo, Inc. <www.lineo.com>
+ * Bernhard Kuhn <bkuhn@lineo.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+ulong myflush(void);
+
+
+/* Flash Organization Structure */
+typedef struct OrgDef
+{
+	unsigned int sector_number;
+	unsigned int sector_size;
+} OrgDef;
+
+
+/* Flash Organizations */
+OrgDef OrgAT49BV16x4[] =
+{
+	{  8,  8*1024 },	/*   8 *  8 kBytes sectors */
+	{  2, 32*1024 },	/*   2 * 32 kBytes sectors */
+	{ 30, 64*1024 },	/*  30 * 64 kBytes sectors */
+};
+
+OrgDef OrgAT49BV16x4A[] =
+{
+	{  8,  8*1024 },	/*   8 *  8 kBytes sectors */
+	{ 31, 64*1024 },	/*  31 * 64 kBytes sectors */
+};
+
+OrgDef OrgAT49BV6416[] =
+{
+	{   8,  8*1024 },	/*   8 *  8 kBytes sectors */
+	{ 127, 64*1024 },	/* 127 * 64 kBytes sectors */
+};
+
+flash_info_t    flash_info[CFG_MAX_FLASH_BANKS];
+
+/* AT49BV1614A Codes */
+#define FLASH_CODE1		0xAA
+#define FLASH_CODE2		0x55
+#define ID_IN_CODE		0x90
+#define ID_OUT_CODE		0xF0
+
+
+#define CMD_READ_ARRAY		0x00F0
+#define CMD_UNLOCK1		0x00AA
+#define CMD_UNLOCK2		0x0055
+#define CMD_ERASE_SETUP		0x0080
+#define CMD_ERASE_CONFIRM	0x0030
+#define CMD_PROGRAM		0x00A0
+#define CMD_UNLOCK_BYPASS	0x0020
+#define CMD_SECTOR_UNLOCK	0x0070
+
+#define MEM_FLASH_ADDR1		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
+#define MEM_FLASH_ADDR2		(*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
+
+#define BIT_ERASE_DONE		0x0080
+#define BIT_RDY_MASK		0x0080
+#define BIT_PROGRAM_ERROR	0x0020
+#define BIT_TIMEOUT		0x80000000 /* our flag */
+
+#define READY 1
+#define ERR   2
+#define TMO   4
+
+/*-----------------------------------------------------------------------
+ */
+void flash_identification (flash_info_t * info)
+{
+	volatile u16 manuf_code, device_code, add_device_code;
+
+	MEM_FLASH_ADDR1 = FLASH_CODE1;
+	MEM_FLASH_ADDR2 = FLASH_CODE2;
+	MEM_FLASH_ADDR1 = ID_IN_CODE;
+
+	manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
+	device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
+	add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
+
+	MEM_FLASH_ADDR1 = FLASH_CODE1;
+	MEM_FLASH_ADDR2 = FLASH_CODE2;
+	MEM_FLASH_ADDR1 = ID_OUT_CODE;
+
+	/* Vendor type */
+	info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
+	printf ("Atmel: ");
+
+	if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
+
+		if ((add_device_code & FLASH_TYPEMASK) ==
+			(ATM_ID_BV1614A & FLASH_TYPEMASK)) {
+			info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
+			printf ("AT49BV1614A (16Mbit)\n");
+		} else {				/* AT49BV1614 Flash */
+			info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
+			printf ("AT49BV1614 (16Mbit)\n");
+		}
+
+	} else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) {
+		info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
+		printf ("AT49BV6416 (64Mbit)\n");
+	}
+}
+
+ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
+{
+	int i, nb_sectors = 0;
+
+	for (i=0; i<nb_blocks; i++){
+		nb_sectors += pOrgDef[i].sector_number;
+	}
+
+	return nb_sectors;
+}
+
+void flash_unlock_sector(flash_info_t * info, unsigned int sector)
+{
+	volatile u16 *addr = (volatile u16 *) (info->start[sector]);
+
+	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	*addr = CMD_SECTOR_UNLOCK;
+}
+
+
+ulong flash_init (void)
+{
+	int i, j, k;
+	unsigned int flash_nb_blocks, sector;
+	unsigned int start_address;
+	OrgDef *pOrgDef;
+
+	ulong size = 0;
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		ulong flashbase = 0;
+
+		flash_identification (&flash_info[i]);
+
+		if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+			(ATM_ID_BV1614 & FLASH_TYPEMASK)) {
+
+			pOrgDef = OrgAT49BV16x4;
+			flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
+		} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+			(ATM_ID_BV1614A & FLASH_TYPEMASK)){	/* AT49BV1614A Flash */
+
+			pOrgDef = OrgAT49BV16x4A;
+			flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
+		} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+			(ATM_ID_BV6416 & FLASH_TYPEMASK)){	/* AT49BV6416 Flash */
+
+			pOrgDef = OrgAT49BV6416;
+			flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef);
+		} else {
+			flash_nb_blocks = 0;
+			pOrgDef = OrgAT49BV16x4;
+		}
+
+		flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks);
+		memset (flash_info[i].protect, 0, flash_info[i].sector_count);
+
+		if (i == 0)
+			flashbase = PHYS_FLASH_1;
+		else
+			panic ("configured too many flash banks!\n");
+
+		sector = 0;
+		start_address = flashbase;
+		flash_info[i].size = 0;
+
+		for (j = 0; j < flash_nb_blocks; j++) {
+			for (k = 0; k < pOrgDef[j].sector_number; k++) {
+				flash_info[i].start[sector++] = start_address;
+				start_address += pOrgDef[j].sector_size;
+				flash_info[i].size += pOrgDef[j].sector_size;
+			}
+		}
+
+		size += flash_info[i].size;
+
+		if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
+			(ATM_ID_BV6416 & FLASH_TYPEMASK)){	/* AT49BV6416 Flash */
+
+			/* Unlock all sectors at reset */
+			for (j=0; j<flash_info[i].sector_count; j++){
+				flash_unlock_sector(&flash_info[i], j);
+			}
+		}
+	}
+
+	/* Protect binary boot image */
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_FLASH_BASE,
+		       CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
+
+	/* Protect environment variables */
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_ENV_ADDR,
+		       CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+
+	/* Protect U-Boot gzipped image */
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_U_BOOT_BASE,
+		       CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
+
+	return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case (ATM_MANUFACT & FLASH_VENDMASK):
+		printf ("Atmel: ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case (ATM_ID_BV1614 & FLASH_TYPEMASK):
+		printf ("AT49BV1614 (16Mbit)\n");
+		break;
+	case (ATM_ID_BV1614A & FLASH_TYPEMASK):
+		printf ("AT49BV1614A (16Mbit)\n");
+		break;
+	case (ATM_ID_BV6416 & FLASH_TYPEMASK):
+		printf ("AT49BV6416 (64Mbit)\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		return;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; i++) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+		printf (" %08lX%s", info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	ulong result;
+	int iflag, cflag, prot, sect;
+	int rc = ERR_OK;
+	int chip1;
+
+	/* first look for protection bits */
+
+	if (info->flash_id == FLASH_UNKNOWN)
+		return ERR_UNKNOWN_FLASH_TYPE;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		return ERR_INVAL;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) !=
+		(ATM_MANUFACT & FLASH_VENDMASK)) {
+		return ERR_UNKNOWN_FLASH_VENDOR;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+	if (prot)
+		return ERR_PROTECTED;
+
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
+	cflag = icache_status ();
+	icache_disable ();
+	iflag = disable_interrupts ();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
+		printf ("Erasing sector %2d ... ", sect);
+
+		/* arm simple, non interrupt dependent timer */
+		reset_timer_masked ();
+
+		if (info->protect[sect] == 0) {	/* not protected */
+			volatile u16 *addr = (volatile u16 *) (info->start[sect]);
+
+			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+			MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+			MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+			MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+			*addr = CMD_ERASE_CONFIRM;
+
+			/* wait until flash is ready */
+			chip1 = 0;
+
+			do {
+				result = *addr;
+
+				/* check timeout */
+				if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+					MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+					chip1 = TMO;
+					break;
+				}
+
+				if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
+					chip1 = READY;
+
+			} while (!chip1);
+
+			MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+			if (chip1 == ERR) {
+				rc = ERR_PROG_ERROR;
+				goto outahere;
+			}
+			if (chip1 == TMO) {
+				rc = ERR_TIMOUT;
+				goto outahere;
+			}
+
+			printf ("ok.\n");
+		} else {			/* it was protected */
+			printf ("protected!\n");
+		}
+	}
+
+	if (ctrlc ())
+		printf ("User Interrupt!\n");
+
+outahere:
+	/* allow flash to settle - wait 10 ms */
+	udelay_masked (10000);
+
+	if (iflag)
+		enable_interrupts ();
+
+	if (cflag)
+		icache_enable ();
+
+	return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash
+ */
+
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+	volatile u16 *addr = (volatile u16 *) dest;
+	ulong result;
+	int rc = ERR_OK;
+	int cflag, iflag;
+	int chip1;
+
+	/*
+	 * Check if Flash is (sufficiently) erased
+	 */
+	result = *addr;
+	if ((result & data) != data)
+		return ERR_NOT_ERASED;
+
+	/*
+	 * Disable interrupts which might cause a timeout
+	 * here. Remember that our exception vectors are
+	 * at address 0 in the flash, and we don't want a
+	 * (ticker) exception to happen while the flash
+	 * chip is in programming mode.
+	 */
+	cflag = icache_status ();
+	icache_disable ();
+	iflag = disable_interrupts ();
+
+	MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+	MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+	MEM_FLASH_ADDR1 = CMD_PROGRAM;
+	*addr = data;
+
+	/* arm simple, non interrupt dependent timer */
+	reset_timer_masked ();
+
+	/* wait until flash is ready */
+	chip1 = 0;
+	do {
+		result = *addr;
+
+		/* check timeout */
+		if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+			chip1 = ERR | TMO;
+			break;
+		}
+		if (!chip1 && ((result & 0x80) == (data & 0x80)))
+			chip1 = READY;
+
+	} while (!chip1);
+
+	*addr = CMD_READ_ARRAY;
+
+	if (chip1 == ERR || *addr != data)
+		rc = ERR_PROG_ERROR;
+
+	if (iflag)
+		enable_interrupts ();
+
+	if (cflag)
+		icache_enable ();
+
+	return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash.
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	ulong wp, data;
+	int rc;
+
+	if (addr & 1) {
+		printf ("unaligned destination not supported\n");
+		return ERR_ALIGN;
+	};
+
+	if ((int) src & 1) {
+		printf ("unaligned source not supported\n");
+		return ERR_ALIGN;
+	};
+
+	wp = addr;
+
+	while (cnt >= 2) {
+		data = *((volatile u16 *) src);
+		if ((rc = write_word (info, wp, data)) != 0) {
+			return (rc);
+		}
+		src += 2;
+		wp += 2;
+		cnt -= 2;
+	}
+
+	if (cnt == 1) {
+		data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
+										   8);
+		if ((rc = write_word (info, wp, data)) != 0) {
+			return (rc);
+		}
+		src += 1;
+		wp += 1;
+		cnt -= 1;
+	};
+
+	return ERR_OK;
+}
diff --git a/board/atmel/at91rm9200dk/led.c b/board/atmel/at91rm9200dk/led.c
new file mode 100644
index 00000000000..47a3bfce68b
--- /dev/null
+++ b/board/atmel/at91rm9200dk/led.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2006
+ * Atmel Nordic AB <www.atmel.com>
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+
+#define	GREEN_LED	AT91C_PIO_PB0
+#define	YELLOW_LED	AT91C_PIO_PB1
+#define	RED_LED	AT91C_PIO_PB2
+
+void	green_LED_on(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	PIOB->PIO_CODR		= GREEN_LED;
+}
+
+void	 yellow_LED_on(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	PIOB->PIO_CODR		= YELLOW_LED;
+}
+
+void	 red_LED_on(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	PIOB->PIO_CODR		= RED_LED;
+}
+
+void	green_LED_off(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	PIOB->PIO_SODR		= GREEN_LED;
+}
+
+void	yellow_LED_off(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	PIOB->PIO_SODR		= YELLOW_LED;
+}
+
+void	red_LED_off(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	PIOB->PIO_SODR		= RED_LED;
+}
+
+
+void coloured_LED_init (void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	AT91PS_PMC	PMC	= AT91C_BASE_PMC;
+	PMC->PMC_PCER		= (1 << AT91C_ID_PIOB);	/* Enable PIOB clock */
+	/* Disable peripherals on LEDs */
+	PIOB->PIO_PER		= AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+	/* Enable pins as outputs */
+	PIOB->PIO_OER		= AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+	/* Turn all LEDs OFF */
+	PIOB->PIO_SODR		= AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+}
diff --git a/board/atmel/at91rm9200dk/mux.c b/board/atmel/at91rm9200dk/mux.c
new file mode 100644
index 00000000000..767d28090d1
--- /dev/null
+++ b/board/atmel/at91rm9200dk/mux.c
@@ -0,0 +1,37 @@
+#include <config.h>
+#include <common.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+int AT91F_GetMuxStatus(void) {
+#ifdef	DATAFLASH_MMC_SELECT
+	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+
+
+	if(AT91C_BASE_PIOB->PIO_ODSR & DATAFLASH_MMC_SELECT) {
+		return 1;
+	} else {
+		return 0;
+	}
+#endif
+	return 0;
+}
+
+void AT91F_SelectMMC(void) {
+#ifdef	DATAFLASH_MMC_SELECT
+	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT;	/* Set in PIO mode */
+	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT;	/* Configure in output */
+	/* Set Output */
+	AT91C_BASE_PIOB->PIO_SODR = DATAFLASH_MMC_SELECT;
+#endif
+}
+
+void AT91F_SelectSPI(void) {
+#ifdef	DATAFLASH_MMC_SELECT
+	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT;	/* Set in PIO mode */
+	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT;	/* Configure in output */
+	/* Clear Output */
+	AT91C_BASE_PIOB->PIO_CODR = DATAFLASH_MMC_SELECT;
+#endif
+}
diff --git a/board/atmel/at91rm9200dk/u-boot.lds b/board/atmel/at91rm9200dk/u-boot.lds
new file mode 100644
index 00000000000..14cd22800bb
--- /dev/null
+++ b/board/atmel/at91rm9200dk/u-boot.lds
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text      :
+	{
+	  cpu/arm920t/start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss (NOLOAD) : { *(.bss) }
+	_end = .;
+}
-- 
cgit v1.3.1


From 751b9b5189f3274b03c809172631316d6b002c82 Mon Sep 17 00:00:00 2001
From: Kyungmin Park <kmpark@infradead.org>
Date: Thu, 17 Jan 2008 16:43:25 +0900
Subject: OneNAND Initial Program Loader (IPL) support

This patch enables the OneNAND boot within U-Boot.
Before this work, we used another OneNAND IPL called X-Loader based
on open source. With this work, we can build the oneboot.bin image
without other program.

The build sequence is simple.
First, it compiles the u-boot.bin
Second, it compiles OneNAND IPL
Finally, it becomes the oneboot.bin from OneNAND IPL and u-boot.bin
The mechanism is similar with NAND boot except it boots from itself.

Another thing is that you can only use the OneNAND IPL only to work
other bootloader such as RedBoot and so on.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 Makefile                                     |  18 ++-
 board/apollon/apollon.c                      |   3 +-
 cpu/arm1136/start.S                          |  42 ++++++
 onenand_ipl/board/apollon/Makefile           |  65 +++++++++
 onenand_ipl/board/apollon/apollon.c          |  70 +++++++++
 onenand_ipl/board/apollon/config.mk          |  14 ++
 onenand_ipl/board/apollon/low_levelinit.S    | 205 +++++++++++++++++++++++++++
 onenand_ipl/board/apollon/u-boot.onenand.lds |  53 +++++++
 onenand_ipl/onenand_boot.c                   |  81 +++++++++++
 onenand_ipl/onenand_ipl.h                    |  44 ++++++
 onenand_ipl/onenand_read.c                   | 105 ++++++++++++++
 11 files changed, 698 insertions(+), 2 deletions(-)
 create mode 100644 onenand_ipl/board/apollon/Makefile
 create mode 100644 onenand_ipl/board/apollon/apollon.c
 create mode 100644 onenand_ipl/board/apollon/config.mk
 create mode 100644 onenand_ipl/board/apollon/low_levelinit.S
 create mode 100644 onenand_ipl/board/apollon/u-boot.onenand.lds
 create mode 100644 onenand_ipl/onenand_boot.c
 create mode 100644 onenand_ipl/onenand_ipl.h
 create mode 100644 onenand_ipl/onenand_read.c

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 3b339ad17e6..9225a2d3503 100644
--- a/Makefile
+++ b/Makefile
@@ -274,13 +274,18 @@ NAND_SPL = nand_spl
 U_BOOT_NAND = $(obj)u-boot-nand.bin
 endif
 
+ifeq ($(CONFIG_ONENAND_U_BOOT),y)
+ONENAND_IPL = onenand_ipl
+U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
+endif
+
 __OBJS := $(subst $(obj),,$(OBJS))
 __LIBS := $(subst $(obj),,$(LIBS))
 
 #########################################################################
 #########################################################################
 
-ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND)
+ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
 
 all:		$(ALL)
 
@@ -327,6 +332,12 @@ $(NAND_SPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
 $(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
+$(ONENAND_IPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
+		$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
+
+$(U_BOOT_ONENAND):	$(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
+		cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
+
 $(VERSION_FILE):
 		@( echo -n "#define U_BOOT_VERSION \"U-Boot " ; \
 		echo -n "$(U_BOOT_VERSION)" ; \
@@ -2597,7 +2608,9 @@ omap2420h4_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4
 
 apollon_config		: unconfig
+	@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
 	@$(MKCONFIG) $(@:_config=) arm arm1136 apollon
+	@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
 
 #========================================================================
 # i386
@@ -2898,6 +2911,8 @@ clean:
 	@rm -f $(obj)board/bf537-stamp/u-boot.lds $(obj)board/bf561-ezkit/u-boot.lds
 	@rm -f $(obj)include/bmp_logo.h
 	@rm -f $(obj)nand_spl/u-boot-spl $(obj)nand_spl/u-boot-spl.map
+	@rm -f $(obj)onenand_ipl/onenand-ipl $(obj)onenand_ipl/onenand-ipl.bin \
+		$(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)onenand_ipl/onenand-ipl.map
 	@rm -f $(obj)api_examples/demo $(VERSION_FILE)
 
 clobber:	clean
@@ -2912,6 +2927,7 @@ clobber:	clean
 	@rm -f $(obj)tools/inca-swap-bytes $(obj)cpu/mpc824x/bedbug_603e.c
 	@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
 	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -lname "*" -print | xargs rm -f
+	@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -lname "*" -print | xargs rm -f
 	@[ ! -d $(obj)api_examples ] || find $(obj)api_examples -lname "*" -print | xargs rm -f
 
 ifeq ($(OBJTREE),$(SRCTREE))
diff --git a/board/apollon/apollon.c b/board/apollon/apollon.c
index 064d143ae48..383b0643f87 100644
--- a/board/apollon/apollon.c
+++ b/board/apollon/apollon.c
@@ -440,7 +440,8 @@ void muxSetupTouchScreen(void)
 void muxSetupGPMC(void)
 {
 	/* gpmc_io_dir, MCR */
-	writel(0x4800008C, 0x19000000);
+	volatile unsigned int *MCR = (unsigned int *) 0x4800008C;
+	*MCR = 0x19000000;
 
 	/* NOR FLASH CS0 */
 	/* signal - Gpmc_clk; pin - J4; offset - 0x0088; mode 0; Byte-3 */
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 17c7a834919..8b765f1e806 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -35,6 +35,25 @@
 #endif
 .globl _start
 _start: b	reset
+#ifdef CONFIG_ONENAND_IPL
+	ldr	pc, _hang
+	ldr	pc, _hang
+	ldr	pc, _hang
+	ldr	pc, _hang
+	ldr	pc, _hang
+	ldr	pc, _hang
+	ldr	pc, _hang
+
+_hang:
+	.word	do_hang
+	.word	0x12345678
+	.word	0x12345678
+	.word	0x12345678
+	.word	0x12345678
+	.word	0x12345678
+	.word	0x12345678
+	.word	0x12345678	/* now 16*4=64 */
+#else
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -51,6 +70,7 @@ _not_used:		.word not_used
 _irq:			.word irq
 _fiq:			.word fiq
 _pad:			.word 0x12345678 /* now 16*4=64 */
+#endif	/* CONFIG_ONENAND_IPL */
 .global _end_vect
 _end_vect:
 
@@ -139,7 +159,9 @@ relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
 	cmp	r0, r1			/* don't reloc during debug	    */
+#ifndef CONFIG_ONENAND_IPL
 	beq	stack_setup
+#endif	/* CONFIG_ONENAND_IPL */
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
@@ -156,26 +178,36 @@ copy_loop:
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
+#ifdef CONFIG_ONENAND_IPL
+	sub	sp, r0, #128		/* leave 32 words for abort-stack   */
+#else
 	sub	r0, r0, #CFG_MALLOC_LEN /* malloc area			    */
 	sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo			    */
 #ifdef CONFIG_USE_IRQ
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
 	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
+#endif	/* CONFIG_ONENAND_IPL */
 
 clear_bss:
 	ldr	r0, _bss_start		/* find start of bss segment	    */
 	ldr	r1, _bss_end		/* stop here			    */
 	mov	r2, #0x00000000		/* clear			    */
 
+#ifndef CONFIG_ONENAND_IPL
 clbss_l:str	r2, [r0]		/* clear loop...		    */
 	add	r0, r0, #4
 	cmp	r0, r1
 	bne	clbss_l
+#endif
 
 	ldr	pc, _start_armboot
 
+#ifdef CONFIG_ONENAND_IPL
+_start_armboot: .word start_oneboot
+#else
 _start_armboot: .word start_armboot
+#endif
 
 
 /*
@@ -214,6 +246,8 @@ cpu_init_crit:
 	bl	lowlevel_init	/* go setup pll,mux,memory */
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
+
+#ifndef CONFIG_ONENAND_IPL
 /*
  *************************************************************************
  *
@@ -326,10 +360,17 @@ cpu_init_crit:
 	.macro get_fiq_stack			@ setup FIQ stack
 	ldr	sp, FIQ_STACK_START
 	.endm
+#endif	/* CONFIG_ONENAND_IPL */
 
 /*
  * exception handlers
  */
+#ifdef CONFIG_ONENAND_IPL
+	.align	5
+do_hang:
+	ldr	sp, _TEXT_BASE			/* use 32 words about stack */
+	bl	hang				/* hang and never return */
+#else	/* !CONFIG_ONENAND IPL */
 	.align	5
 undefined_instruction:
 	get_bad_stack
@@ -415,3 +456,4 @@ rstctl:
 	.word	PM_RSTCTRL_WKUP
 
 #endif
+#endif	/* CONFIG_ONENAND_IPL */
diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile
new file mode 100644
index 00000000000..66a0959ee27
--- /dev/null
+++ b/onenand_ipl/board/apollon/Makefile
@@ -0,0 +1,65 @@
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/include/config.mk
+include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds
+LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS	+= -DCONFIG_ONENAND_IPL
+CFLAGS	+= -DCONFIG_ONENAND_IPL
+OBJCLFAGS += --gap-fill=0x00
+
+SOBJS	= start.o low_levelinit.o # _memcpy32.o
+COBJS	= apollon.o onenand_read.o onenand_boot.o
+
+SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(OBJTREE)/onenand_ipl/board/$(BOARDDIR)
+
+onenandobj	:= $(OBJTREE)/onenand_ipl/
+
+ALL	= $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl.bin $(onenandobj)onenand-ipl-2k.bin
+
+all:	$(obj).depend $(ALL)
+
+$(onenandobj)onenand-ipl-2k.bin:	$(onenandobj)onenand-ipl
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=0x800 -O binary $< $@
+
+$(onenandobj)onenand-ipl.bin:	$(onenandobj)onenand-ipl
+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(onenandobj)onenand-ipl:	$(OBJS)
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+		-Map $(onenandobj)onenand-ipl.map \
+		-o $(onenandobj)onenand-ipl
+
+# create symbolic links from common files
+
+# from cpu directory
+$(obj)start.S:
+	rm -f $(obj)start.S
+	ln -s $(SRCTREE)/cpu/$(CPU)/start.S $(obj)start.S
+
+# from onenand_ipl directory
+$(obj)onenand_ipl.h:
+	rm -f $(obj)onenand_ipl.h
+	ln -s $(SRCTREE)/onenand_ipl/onenand_ipl.h $(obj)onenand_ipl.h
+
+$(obj)onenand_boot.c:	$(obj)onenand_ipl.h
+	rm -f $(obj)onenand_boot.c
+	ln -s $(SRCTREE)/onenand_ipl/onenand_boot.c $(obj)onenand_boot.c
+
+$(obj)onenand_read.c:	$(obj)onenand_ipl.h
+	rm -f $(obj)onenand_read.c
+	ln -s $(SRCTREE)/onenand_ipl/onenand_read.c $(obj)onenand_read.c
+
+$(obj)%.o:	$(obj)%.S
+	$(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o:	$(obj)$.c
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/onenand_ipl/board/apollon/apollon.c b/onenand_ipl/board/apollon/apollon.c
new file mode 100644
index 00000000000..acf5c2998f3
--- /dev/null
+++ b/onenand_ipl/board/apollon/apollon.c
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2005-2008 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/arch/mux.h>
+
+#define write_config_reg(reg, value)                                    \
+do {                                                                    \
+	writeb(value, reg);                                             \
+} while (0)
+
+/*****************************************
+ * Routine: board_init
+ * Description: Early hardware init.
+ *****************************************/
+int board_init(void)
+{
+	return 0;
+}
+
+#ifdef CFG_PRINTF
+/* Pin Muxing registers used for UART1 */
+/****************************************
+ * Routine: muxSetupUART1  (ostboot)
+ * Description: Set up uart1 muxing
+ *****************************************/
+static void muxSetupUART1(void)
+{
+	/* UART1_CTS pin configuration, PIN = D21 */
+	write_config_reg(CONTROL_PADCONF_UART1_CTS, 0);
+	/* UART1_RTS pin configuration, PIN = H21 */
+	write_config_reg(CONTROL_PADCONF_UART1_RTS, 0);
+	/* UART1_TX pin configuration, PIN = L20 */
+	write_config_reg(CONTROL_PADCONF_UART1_TX, 0);
+	/* UART1_RX pin configuration, PIN = T21 */
+	write_config_reg(CONTROL_PADCONF_UART1_RX, 0);
+}
+#endif
+
+/**********************************************************
+ * Routine: s_init
+ * Description: Does early system init of muxing and clocks.
+ * - Called at time when only stack is available.
+ **********************************************************/
+int s_init(int skip)
+{
+#ifdef CFG_PRINTF
+	muxSetupUART1();
+#endif
+	return 0;
+}
diff --git a/onenand_ipl/board/apollon/config.mk b/onenand_ipl/board/apollon/config.mk
new file mode 100644
index 00000000000..fd9c506f7e0
--- /dev/null
+++ b/onenand_ipl/board/apollon/config.mk
@@ -0,0 +1,14 @@
+#
+# (C) Copyright 2005-2008 Samsung Electronics
+# Kyungmin Park <kyungmin.park@samsung.com>
+#
+# Samsung Apollon board with OMAP2420 (ARM1136) cpu
+#
+# Apollon has 1 bank of 128MB mDDR-SDRAM on CS0
+# Physical Address:
+# 8000'0000 (bank0)
+# 8800'0000 (bank1)
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+TEXT_BASE = 0x00000000
diff --git a/onenand_ipl/board/apollon/low_levelinit.S b/onenand_ipl/board/apollon/low_levelinit.S
new file mode 100644
index 00000000000..417a5a7e0da
--- /dev/null
+++ b/onenand_ipl/board/apollon/low_levelinit.S
@@ -0,0 +1,205 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2005-2008 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * Derived from board/omap2420h4/platform.S
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/arch/omap2420.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/clocks.h>
+
+#define APOLLON_CS0_BASE	0x00000000
+
+#ifdef PRCM_CONFIG_I
+#define SDRC_ACTIM_CTRLA_0_VAL	0x7BA35907
+#define SDRC_ACTIM_CTRLB_0_VAL	0x00000013
+#define SDRC_RFR_CTRL_0_VAL	0x00044C01
+
+/* GPMC */
+#define APOLLON_GPMC_CONFIG1_0	0xe30d1201
+#define APOLLON_GPMC_CONFIG2_0	0x000c1000
+#define APOLLON_GPMC_CONFIG3_0	0x00030400
+#define APOLLON_GPMC_CONFIG4_0	0x0B841006
+#define APOLLON_GPMC_CONFIG5_0	0x020F0C11
+#define APOLLON_GPMC_CONFIG6_0	0x00000000
+#define APOLLON_GPMC_CONFIG7_0	(0x00000e40 | (APOLLON_CS0_BASE >> 24))
+
+#elif defined(PRCM_CONFIG_II)
+#define SDRC_ACTIM_CTRLA_0_VAL	0x4A59B485
+#define SDRC_ACTIM_CTRLB_0_VAL	0x0000000C
+#define SDRC_RFR_CTRL_0_VAL	0x00030001
+
+/* GPMC */
+#define APOLLON_GPMC_CONFIG1_0	0xe30d1201
+#define APOLLON_GPMC_CONFIG2_0	0x00080E81
+#define APOLLON_GPMC_CONFIG3_0	0x00030400
+#define APOLLON_GPMC_CONFIG4_0	0x08041586
+#define APOLLON_GPMC_CONFIG5_0	0x020C090E
+#define APOLLON_GPMC_CONFIG6_0	0x00000000
+#define APOLLON_GPMC_CONFIG7_0	(0x00000e40 | (APOLLON_CS0_BASE >> 24))
+
+#else
+#error "Please configure PRCM schecm"
+#endif
+
+_TEXT_BASE:
+	.word	TEXT_BASE	/* sdram load addr from config.mk */
+
+.globl lowlevel_init
+lowlevel_init:
+	mov r3, r0     /* save skip information */
+
+	/* Disable watchdog */
+	ldr	r0, =WD2_BASE
+	ldr	r1, =WD_UNLOCK1
+	str	r1, [r0, #WSPR]
+
+	ldr	r1, =WD_UNLOCK2
+	str	r1, [r0, #WSPR]
+
+#ifdef DEBUG_LED
+	/* LED0 OFF */
+	ldr	r0, =0x480000E5		/* ball AA10, mode 3 */
+	mov	r1, #0x0b
+	strb	r1, [r0]
+#endif
+
+	/* Pin muxing for SDRC */
+	mov	r1, #0x00
+	ldr	r0, =0x480000A1		/* ball C12, mode 0 */
+	strb	r1, [r0]
+
+	ldr	r0, =0x48000032		/* ball D11, mode 0 */
+	strb	r1, [r0]
+
+	ldr	r0, =0x480000A3		/* ball B13, mode 0 */
+	strb	r1, [r0]
+
+	/* SDRC setting */
+	ldr	r0, =OMAP2420_SDRC_BASE
+	ldr	r1, =0x00000010
+	str	r1, [r0, #0x10]
+
+	ldr	r1, =0x00000100
+	str	r1, [r0, #0x44]
+
+	/* SDRC CS0 configuration */
+#ifdef CONFIG_APOLLON_PLUS
+	ldr	r1, =0x01702011
+#else
+	ldr	r1, =0x00d04011
+#endif
+	str	r1, [r0, #0x80]
+
+	ldr	r1, =SDRC_ACTIM_CTRLA_0_VAL
+	str	r1, [r0, #0x9C]
+
+	ldr	r1, =SDRC_ACTIM_CTRLB_0_VAL
+	str	r1, [r0, #0xA0]
+
+	ldr	r1, =SDRC_RFR_CTRL_0_VAL
+	str	r1, [r0, #0xA4]
+
+	ldr	r1, =0x00000041
+	str	r1, [r0, #0x70]
+
+	/* Manual command sequence */
+	ldr	r1, =0x00000007
+	str	r1, [r0, #0xA8]
+
+	ldr	r1, =0x00000000
+	str	r1, [r0, #0xA8]
+
+	ldr	r1, =0x00000001
+	str	r1, [r0, #0xA8]
+
+	ldr	r1, =0x00000002
+	str	r1, [r0, #0xA8]
+	str	r1, [r0, #0xA8]
+
+	/*
+	 * CS0 SDRC Mode register
+	 *   Burst length = 4 - DDR memory
+	 *   Serial mode
+	 *   CAS latency = 3
+	 */
+	ldr	r1, =0x00000032
+	str	r1, [r0, #0x84]
+
+	/* Note: You MUST set EMR values */
+	/* EMR1 & EMR2 */
+	ldr	r1, =0x00000000
+	str	r1, [r0, #0x88]
+	str	r1, [r0, #0x8C]
+
+#ifdef OLD_SDRC_DLLA_CTRL
+	/* SDRC_DLLA_CTRL */
+	ldr	r1, =0x00007306
+	str	r1, [r0, #0x60]
+
+	ldr	r1, =0x00007303
+	str	r1, [r0, #0x60]
+#else
+	/* SDRC_DLLA_CTRL */
+	ldr	r1, =0x00000506
+	str	r1, [r0, #0x60]
+
+	ldr	r1, =0x00000503
+	str	r1, [r0, #0x60]
+#endif
+
+#ifdef __BROKEN_FEATURE__
+	/* SDRC_DLLB_CTRL */
+	ldr	r1, =0x00000506
+	str	r1, [r0, #0x68]
+
+	ldr	r1, =0x00000503
+	str	r1, [r0, #0x68]
+#endif
+
+	/* little delay after init */
+	mov	r2, #0x1800
+1:
+	subs	r2, r2, #0x1
+        bne	1b
+
+	ldr	sp, SRAM_STACK
+        str     ip, [sp]	/* stash old link register */
+	mov	ip, lr		/* save link reg across call */
+        mov     r0, r3		/* pass skip info to s_init */
+
+        bl      s_init		/* go setup pll,mux,memory */
+
+        ldr     ip, [sp]	/* restore save ip */
+	mov	lr, ip		/* restore link reg */
+
+	/* back to arch calling code */
+	mov	pc,	lr
+
+	/* the literal pools origin */
+	.ltorg
+
+SRAM_STACK:
+	.word LOW_LEVEL_SRAM_STACK
diff --git a/onenand_ipl/board/apollon/u-boot.onenand.lds b/onenand_ipl/board/apollon/u-boot.onenand.lds
new file mode 100644
index 00000000000..559f9f2bef1
--- /dev/null
+++ b/onenand_ipl/board/apollon/u-boot.onenand.lds
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2005-2008 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * Derived from X-loader
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text      :
+	{
+	  start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c
new file mode 100644
index 00000000000..f30deaeca7d
--- /dev/null
+++ b/onenand_ipl/onenand_boot.c
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2005-2008 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * Derived from x-loader
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <version.h>
+
+#include "onenand_ipl.h"
+
+#ifdef CFG_PRINTF
+int print_info(void)
+{
+	printf(XLOADER_VERSION);
+
+	return 0;
+}
+#endif
+
+typedef int (init_fnc_t)(void);
+
+init_fnc_t *init_sequence[] = {
+	board_init,		/* basic board dependent setup */
+#ifdef CFG_PRINTF
+	serial_init,		/* serial communications setup */
+	print_info,
+#endif
+	NULL,
+};
+
+void start_oneboot(void)
+{
+	init_fnc_t **init_fnc_ptr;
+	uchar *buf;
+
+	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
+		if ((*init_fnc_ptr)() != 0)
+			hang();
+	}
+
+	buf = (uchar *) CFG_LOAD_ADDR;
+
+	if (!onenand_read_block(buf, ONENAND_START_BLOCK))
+		buf += ONENAND_BLOCK_SIZE;
+
+	if (buf == (uchar *)CFG_LOAD_ADDR)
+		hang();
+
+	/* go run U-Boot and never return */
+	printf("Starting OS Bootloader...\n");
+	((init_fnc_t *)CFG_LOAD_ADDR)();
+
+	/* should never come here */
+}
+
+void hang(void)
+{
+	/* if board_hang() returns, hange here */
+	printf("X-Loader hangs\n");
+	for (;;);
+}
diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h
new file mode 100644
index 00000000000..b9c6669a7b3
--- /dev/null
+++ b/onenand_ipl/onenand_ipl.h
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2005-2008 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ONENAND_IPL_H
+#define _ONENAND_IPL_H
+
+#include <linux/mtd/onenand_regs.h>
+
+#define ONENAND_START_BLOCK             0
+#define ONENAND_BLOCK_SIZE              2048
+
+#ifndef CFG_PRINTF
+#define printf(format, args...)
+#endif
+
+#define onenand_readw(a)        readw(a)
+#define onenand_writew(v, a)    writew(v, a)
+
+#define THIS_ONENAND(a)         (CFG_ONENAND_BASE + (a))
+
+#define READ_INTERRUPT()                                                \
+	onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT))
+
+#define ONENAND_PAGE_SIZE                       2048
+
+extern int onenand_read_block(unsigned char *buf, ulong block);
+#endif
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
new file mode 100644
index 00000000000..f5532202376
--- /dev/null
+++ b/onenand_ipl/onenand_read.c
@@ -0,0 +1,105 @@
+/*
+ * (C) Copyright 2005-2008 Samsung Electronis
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#include <asm/io.h>
+#include <asm/string.h>
+
+#include "onenand_ipl.h"
+
+#define onenand_block_address(block)		(block)
+#define onenand_sector_address(page)		(page << 2)
+#define onenand_buffer_address()		((1 << 3) << 8)
+#define onenand_bufferram_address(block)	(0)
+
+/* read a page with ECC */
+static inline int onenand_read_page(ulong block, ulong page, u_char *buf)
+{
+	unsigned long *base;
+
+#ifndef __HAVE_ARCH_MEMCPY32
+	unsigned int offset, value;
+	unsigned long *p;
+#endif
+
+	onenand_writew(onenand_block_address(block),
+		THIS_ONENAND(ONENAND_REG_START_ADDRESS1));
+
+	onenand_writew(onenand_sector_address(page),
+		THIS_ONENAND(ONENAND_REG_START_ADDRESS8));
+
+	onenand_writew(onenand_buffer_address(),
+		THIS_ONENAND(ONENAND_REG_START_BUFFER));
+
+	onenand_writew(onenand_bufferram_address(block),
+		THIS_ONENAND(ONENAND_REG_START_ADDRESS2));
+
+	onenand_writew(ONENAND_INT_CLEAR, THIS_ONENAND(ONENAND_REG_INTERRUPT));
+
+	onenand_writew(ONENAND_CMD_READ, THIS_ONENAND(ONENAND_REG_COMMAND));
+
+#ifndef __HAVE_ARCH_MEMCPY32
+	p = (unsigned long *) buf;
+#endif
+	base = (unsigned long *) (CFG_ONENAND_BASE + ONENAND_DATARAM);
+
+	while (!(READ_INTERRUPT() & ONENAND_INT_READ))
+		continue;
+
+#ifdef __HAVE_ARCH_MEMCPY32
+	/* 32 bytes boundary memory copy */
+	memcpy32(buf, base, ONENAND_PAGE_SIZE);
+#else
+	for (offset = 0; offset < (ONENAND_PAGE_SIZE >> 2); offset++) {
+		value = *(base + offset);
+		*p++ = value;
+	}
+#endif
+
+	return 0;
+}
+
+#define ONENAND_START_PAGE		1
+#define ONENAND_PAGES_PER_BLOCK		64
+
+/**
+ * onenand_read_block - Read a block data to buf
+ * @return 0 on success
+ */
+int onenand_read_block(unsigned char *buf, ulong block)
+{
+	int page, offset = 0;
+
+	/* NOTE: you must read page from page 1 of block 0 */
+	/* read the block page by page*/
+	for (page = ONENAND_START_PAGE;
+	    page < ONENAND_PAGES_PER_BLOCK; page++) {
+
+		onenand_read_page(block, page, buf + offset);
+
+		offset += ONENAND_PAGE_SIZE;
+	}
+
+	return 0;
+}
-- 
cgit v1.3.1


From 0ec7a061fb1c277f6afd73d61dd71bd21e7ef7b2 Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Mon, 4 Feb 2008 17:44:23 -0500
Subject: only update version header as needed

Constantly rebuilding the version header will force useless relinking, so we
simply need to compare the new header with the existing one before updating
it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 9225a2d3503..969ce42ec06 100644
--- a/Makefile
+++ b/Makefile
@@ -343,7 +343,8 @@ $(VERSION_FILE):
 		echo -n "$(U_BOOT_VERSION)" ; \
 		echo -n $(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \
 			 $(TOPDIR)) ; \
-		echo "\"" ) > $(VERSION_FILE)
+		echo "\"" ) > $@.tmp
+		@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
 
 gdbtools:
 		$(MAKE) -C tools/gdb all || exit 1
-- 
cgit v1.3.1


From 67a4389e39ad853d65b72e2b7cad15c7e8291147 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Fri, 15 Feb 2008 00:57:09 +0100
Subject: Prepare v1.3.2-rc1 release candidate

---
 CHANGELOG | 557 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 Makefile  |   4 +-
 2 files changed, 559 insertions(+), 2 deletions(-)

(limited to 'Makefile')

diff --git a/CHANGELOG b/CHANGELOG
index 7bd8615a563..4e07e734b55 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,145 @@
+commit f33e9653c9c09868995d788511d573771c209fe5
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Fri Feb 15 00:13:20 2008 +0100
+
+    Fix compile warning on lib_ppc/board.c
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit e5c6f9f8bec4dff9603419161e3a15cc8ad5d5f4
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Thu Feb 14 18:22:04 2008 +0100
+
+    Add Radeon Mobility 9200 pci device id to the radeon driver
+
+    This patch extends PCI device id table of the
+    radeon driver so that the driver will also support
+    Radeon Mobility 9200 (M9+) based boards.
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 1b8607e1f7143548c6062c28371449ec69588c00
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Thu Feb 14 18:19:50 2008 +0100
+
+    Extend ATI Radeon driver to support more video modes
+
+    Adds ATI Radeon 9200 support for 1280x1024, 1024x768,
+    800x600, 640x480 at 24, 16 and 8 bpp.
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 4124382de029d361162a4b8cecc773eb8f26e2a8
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Sun Feb 10 17:05:20 2008 +0100
+
+    xsengine: fix typo and few coding style
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 6f4abee789b6d9be3ec4b97ad48f509355559e9e
+Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+Date:	Fri Feb 8 21:25:58 2008 +0100
+
+    Fix wrong memory limit calculation in memory-test
+
+    If the length of the memory address range passed to the "mtest" command is
+    not of the form 2^x - 1, not all address lines are tested. This bug is
+    inherited from the original software at
+    http://www.netrino.com/Embedded-Systems/How-To/Memory-Test-Suite-C. Fix
+    this.
+
+    Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+
+commit 7e30f5eac7f07082a7ca77b7d91b944a8d0af6db
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Feb 15 00:11:39 2008 +0100
+
+    Coding STyle cleanup.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f6921e3dc331293c873ec4d109fd5517a42a90b3
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Tue Feb 5 13:30:43 2008 +0900
+
+    sh: Fix register address of SH7722
+
+    The address of SH7722 is wrong by old document.
+    This patch fixes this problem.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 0ec7a061fb1c277f6afd73d61dd71bd21e7ef7b2
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 17:44:23 2008 -0500
+
+    only update version header as needed
+
+    Constantly rebuilding the version header will force useless relinking, so we
+    simply need to compare the new header with the existing one before updating
+    it.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 208447f8e953f347425eb92c8e28d59e6d911363
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Jan 28 05:56:19 2008 -0500
+
+    Do not specify a CROSS_COMPILE default when executing size
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 1f780aa6f17a5d79791d69ec1d2f66d76ac45d8e
+Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+Date:	Wed Feb 13 11:19:19 2008 +0100
+
+    Fix return value of mtest when CFG_ALT_MEMTEST set
+
+    Fix a missing return statement from a non-void function.
+
+    Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+
+commit 943afa229cf5bf70ef917c7eb6bd0db59a1ba602
+Author: Timur Tabi <timur@freescale.com>
+Date:	Wed Jan 9 14:35:26 2008 -0600
+
+    85xx, 86xx: Determine I2C clock frequencies and store in global_data
+
+    Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.
+
+    Update the get_clocks() function in 85xx and 86xx to determine the I2C
+    clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit b931b3a9c3bdfaaeaa71e57a6026eec726005b08
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Feb 14 23:18:01 2008 +0100
+
+    TQM834x: clean up configuration
+
+    Get board name consistent with Linux and elsewhere;
+    get rid of local network definitions etc.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 38cc09c55b1d7f233789052c6fc462e5377669a9
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date:	Thu Feb 14 08:02:12 2008 +0100
+
+    TFTP: fix search of ':' in BootFile
+
+    Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0bc9efada170096c6b273f19165e32936d330d80
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Feb 14 22:46:55 2008 +0100
+
+    Coding style cleanup; update CHANGELOG.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit e7670f6c1e52ae6d2a43ff75a8bcfa7a5c86e47b
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Thu Feb 14 22:43:22 2008 +0100
@@ -94,6 +236,32 @@ Date:	Tue Jan 15 12:52:31 2008 +0100
 
     Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
 
+commit 3f2ac8f928c76cbd2374437b2d079f8b4324aaba
+Author: Jon Loeliger <jdl@jdl.com>
+Date:	Wed Jan 23 15:55:02 2008 -0600
+
+    86xx: Fix compilation warning in sys_eprom.c
+
+    sys_eeprom.c:82:9: warning: unknown escape sequence '\/'
+
+    Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b7f6193e76651e1fd606e46eb11915b53cb6618b
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date:	Tue Feb 5 10:26:42 2008 +0100
+
+    ppc4xx: HCU4/5. Fix make O=../xx
+
+    Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 29e3500cbc43c89eff6e720ca83e375deeecd9b3
+Author: Larry Johnson <lrj@acm.org>
+Date:	Tue Jan 22 08:51:59 2008 -0500
+
+    ppc4xx: Add CONFIG_4xx_DCACHE compile switch to Denali-core SPD code
+
+    Signed-off-by: Larry Johnson <lrj@acm.org>
+
 commit fe891ecf4d187e9d11dde869ed4623af52b54451
 Author: Hiroshi Ito <ito@mlb.co.jp>
 Date:	Thu Jan 31 18:35:04 2008 +0900
@@ -173,6 +341,16 @@ Date:	Wed Feb 13 15:09:58 2008 -0600
 
     Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
 
+commit ccd6e1464e5396bc1a9aebf7077ddf4342eafe03
+Author: Jon Loeliger <jdl@freescale.com>
+Date:	Tue Feb 12 14:53:28 2008 -0600
+
+    Add CFG_MPC86xx_DDR_ADDR and CFG_MPC86xx_DDR2_ADDR symbols
+
+    These replace direct structure references for IMMR sections.
+
+    Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
 commit c62776be8dca4097ca03d4f9415f08d4887b45d0
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Tue Feb 12 00:45:06 2008 +0100
@@ -262,6 +440,264 @@ Date:	Sat Jan 12 23:35:33 2008 -0500
 
     Signed-off-by: Larry Johnson <lrj@acm.org>
 
+commit ed2cf548cac80cd3cf8154dcfe7b2685bef45938
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Thu Jan 17 08:25:45 2008 -0600
+
+    QE: Move FDT support into a common file
+
+    Move the flat device tree setup for QE related devices into
+    a common file shared between 83xx & 85xx platforms that have QE's.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d38da537943cd36356b9d3d9d9b60533554b81d8
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Wed Jan 23 17:20:14 2008 +0100
+
+    AVR32: Make SDRAM refresh rate configurable
+
+    The existing code assumes the SDRAM row refresh period should always
+    be 15.6 us. This is not always true, and indeed on the ATNGW100, the
+    refresh rate should really be 7.81 us.
+
+    Add a refresh_period member to struct sdram_info and initialize it
+    properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
+    panic() until the refresh_period member is updated properly.
+
+    Big thanks to Gerhard Berghofer for pointing out this issue.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 61151cccb660cdb06a07fb283de6089913d7bde0
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Apr 19 10:10:11 2007 +0200
+
+    ATSTK1000: Fix potential flash programming bug
+
+    The (now obsolete) atngw100 flash programming code was having problems
+    programming the onboard at49bv642 chip. The atstk1000 flash
+    programming code may have the same bug, so import fix for this problem
+    from the AVR32 Linux BSP.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit b2e1d5b64469f10dfcce27f7b0afd935684a8e11
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Nov 22 17:04:13 2007 +0100
+
+    ATSTK1004: Fix comment about default load address
+
+    The default load address is SDRAM + 2MB, not SDRAM + 4MB. The latter
+    wouldn't have worked anyway since the board can only access 4MB of
+    SDRAM.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 8269ab53608d8db2aa06969c337ab0b0518211e5
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Nov 22 17:01:24 2007 +0100
+
+    ATSTK1002: Use SDRAM + 4MB as default load address
+
+    Many people run into problems when they compile a big kernel and load
+    the uImage at the default SDRAM + 2MB address as the kernel will
+    overwrite the uImage as it is being unpacked. Increase the default
+    load address so that we can load a 4MB kernel image without any
+    problems.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 2bcacc2d841b77f3d2d3910db722003742727e9f
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date:	Thu Nov 22 16:51:39 2007 +0100
+
+    ATNGW100: Fix default mtest range
+
+    Let mtest cover the whole SDRAM except the last megabyte, which is
+    where u-boot lives.
+
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 9856a6b3104e0bc210b0868dfe691c52bf03c227
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date:	Tue Jan 22 15:31:56 2008 +0900
+
+    sh: Fix register address of SH7722.
+
+    The address of SH7722 is wrong by old document.
+    This patch fixes this problem.
+
+    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 30942b18b66f35f2ceedab39af10e9eccaa943cc
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:57 2008 -0500
+
+    new command for displaying strings at specified memory locations
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b58d8b48e25b0c866d167cc577f118f528cd9e0a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:57 2008 -0500
+
+    rewrite/cleanup Blackfin RTC driver
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 94a91e248b71c3ff951fc27cff6909e82ca37d15
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:57 2008 -0500
+
+    generate u-boot.ldr for Blackfin targets
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b779f7a59530436040f157f7841db7ab796542df
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:57 2008 -0500
+
+    scrub unused symbols
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit cc2977acc3bbbb7850f16645dd1081f95335868d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:57 2008 -0500
+
+    move Blackfin cpu object list to respective cpu directories
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d0b01a246d0a351bc7dce1d0c9cf6aebdf6d7505
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:57 2008 -0500
+
+    interface to Blackfin on-chip One-Time-Programmable memory
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 4c727c77e43872d3a1d1f76a949fcb3f26a38788
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:56 2008 -0500
+
+    add support for memory commands with Blackfin L1 instruction memory
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 6b9097e5e7490aa7b828c6f1a1c7a0e875df8464
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:56 2008 -0500
+
+    use C code rather than inline assembly
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 97c26e006d2fa6d4e1560933ee6f385d8b8908b9
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:56 2008 -0500
+
+    add Blackfin-specific reginfo command
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0858b835e7ea501ea084d34cef75932f098342bb
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:55 2008 -0500
+
+    add support for Blackfin symbol prefixes to examples
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 8dc48d71a4be753ea9f84956cd33600de35fad04
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:55 2008 -0500
+
+    add Blackfin-specific bdinfo command
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0003613e3c7df3b84b2cb92e797d77f46f15a43a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:55 2008 -0500
+
+    move -ffixed-P5 to blackfin_config.mk and drop unused -D__BLACKFIN__
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 60fa72d65610c7ef33e1d6db858979d05ff0df58
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:55 2008 -0500
+
+    unify the Blackfin board targets
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d4d7730853e5d675f76ec666807da3028c91d592
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:55 2008 -0500
+
+    punt Blackfin VDSP headers and import sanitized/auto-generated ones
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 6cfcce67671a3425229d66203386fa3cbd0cc3bd
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:54 2008 -0500
+
+    always pull in asm/blackfin.h for Blackfin ports
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit bf53974c2ddae678d7660f2b5ccfeb0732b6f5dc
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:54 2008 -0500
+
+    add missing __raw versions of Blackfin read/write io functions
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 24e02d0fd3acc50e73e1a3cdd567f0a77946f15d
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:54 2008 -0500
+
+    add the default Blackfin logo used by Blackfin boards with splash screens
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 4c58eb5552220e425c8af6ac8d2839244a2f57b1
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:54 2008 -0500
+
+    add some more Blackfin docs
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 32a9f5f2160a034ea87ea651b233ef7c635e55cf
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:54 2008 -0500
+
+    make smc91111_eeprom managment simpler by depending on the board configuration file rather than a hardcoded list of boards
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 4087bc88cebec75c432a7fe9f6afb545b0919831
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:54 2008 -0500
+
+    fix building on Blackfin as the assembler supports the .set syntax, not the = syntax, for assigning symbols
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b45264ee85cbd92020640a32e02fb434fd557108
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Mon Feb 4 19:26:53 2008 -0500
+
+    add gitignores for Blackfin pieces
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
 commit a93907c43f847f076dd0e34ee3b69b5e8e6d0d29
 Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 Date:	Fri Jan 18 01:14:03 2008 +0100
@@ -274,6 +710,19 @@ Date:	Fri Jan 18 01:14:03 2008 +0100
 
     Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 
+commit e56b4b494cd92def577969f9678395aa22d34c9f
+Author: Timur Tabi <timur@freescale.com>
+Date:	Wed Jan 9 14:35:26 2008 -0600
+
+    85xx,86xx: Determine I2C clock frequencies and store in global_data
+
+    Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.
+
+    Update the get_clocks() function in 85xx and 86xx to determine the I2C
+    clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+
 commit 7ec8bb15ee368ea54d48d64867767a704d9ab4c2
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Thu Dec 27 10:56:54 2007 +0100
@@ -359,6 +808,41 @@ Date:	Tue Dec 18 16:00:54 2007 -0800
 
     Signed-off-by: K R Gururaja Hebbar <gururajakr@sanyo.co.in>
 
+commit ff02f139804f3cb61414f7bbcbfdaa0279e3efae
+Author: Stefan Roese <sr@denx.de>
+Date:	Fri Feb 1 09:38:29 2008 +0100
+
+    ppc4xx: Fix ndfc HW ECC byte order
+
+    The current ndfc HW ECC implementation swaps the first two ECC bytes.
+    But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering,
+    so this swapping in the HW ECC driver is bogus. This patch fixes this
+    problem and now really uses the SMC ECC byte order.
+
+    Thanks to Sean MacLennan for pointing this out.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e1d1429b49b0ee58c80f8c7b29c1ebaf8be7f5f1
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed Jan 30 15:35:50 2008 +0100
+
+    ppc4xx: Fix GPIO configuration for pcs440ep
+
+    The SRD0_PFC0 register was not configured correctly to enable the GPIO's
+    49-63 for GPIO. They have been configured as trace signals. This patch
+    fixes this by clearing the corresponding bit.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 28d77d968bfe0316deb5bf15c17f57d5ff2c8821
+Author: Stefan Roese <sr@denx.de>
+Date:	Wed Jan 30 14:48:28 2008 +0100
+
+    ppc4xx: Fix problem with init-ram bigger than 4k on 440 platforms
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
 commit 4fedfddf97461b88668b9aec774dfb7a0c6dc368
 Author: Ladislav Michl <ladis@linux-mips.org>
 Date:	Fri Dec 7 00:42:32 2007 +0100
@@ -486,6 +970,79 @@ Date:	Fri Jan 25 09:56:17 2008 +0100
 
     Signed-off-by: Wolfgang Denk <wd@denx.de>
 
+commit 4f93f8b1a4d35b6d302842132edba920ef8f62aa
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:06 2008 -0600
+
+    86xx: Add reginfo command
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit ddcebcb638715a6278da93b553d5016f99823816
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:05 2008 -0600
+
+    86xx: Add print_laws function to fsl_law.c
+
+    This can be used for debug, and will be used by board code
+    to help implement reginfo.
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 9cd32426f26a0567bb61f339edd83c6a2ce9bfc3
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:04 2008 -0600
+
+    86xx: Remove old-style law setup code
+
+    This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d.
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 713d8186649dae874613d495b0cecaa039a98b30
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:03 2008 -0600
+
+    86xx: Convert sbc8641d to use new law setup code.
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 031976f6364b93833e989f57e9f1e023e0be8c4c
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:02 2008 -0600
+
+    86xx: Convert mpc8610hpcd to new law setup method.
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 4933b91f8a49e436681f163df3173beb91cac44a
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:01 2008 -0600
+
+    86xx: Support new law setup method and convert mpc8641
+
+    Adds the support code in cpu/mpc86xx for the new law setup code
+    recently created fsl_law.c, and changes the MPC8641HPCN config
+    to use this code.
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
+commit 1a41f7ce9c086e208c0eabf52565a237af2a2bd1
+Author: Becky Bruce <becky.bruce@freescale.com>
+Date:	Wed Jan 23 16:31:00 2008 -0600
+
+    86xx: Rearrange the sequence in start.S
+
+    * split the BAT initialization so that only 2 BATs (for the boot page
+    and stack) are programmed very early on.  The rest are initialized later.
+    * Move other BAT setup,  ccsrbar setup, and law setup later in the code
+    after translation has been enabled.
+
+    These changes will facilitate the moving of law and BAT initialization
+    to C code, and will aid with 36-bit physical addressing support.
+
+    Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
+
 commit 33dac03b1b5d61e4fed7bad445ba40b4c97feba0
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Wed Jan 23 14:41:37 2008 +0100
diff --git a/Makefile b/Makefile
index 38ade501047..9512b71ee5c 100644
--- a/Makefile
+++ b/Makefile
@@ -23,8 +23,8 @@
 
 VERSION = 1
 PATCHLEVEL = 3
-SUBLEVEL = 1
-EXTRAVERSION =
+SUBLEVEL = 2
+EXTRAVERSION = -rc1
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 VERSION_FILE = $(obj)include/version_autogenerated.h
 
-- 
cgit v1.3.1