From 0ce5c8675bb2c61f1d71fb97f0bbe822663fb93d Mon Sep 17 00:00:00 2001 From: Feng Kan Date: Tue, 8 Jul 2008 22:48:42 -0700 Subject: ppc4xx: Initial framework of the AMCC PPC460SX redwood reference board. Add AMCC Redwood reference board that uses the latest PPC 464 CPU processor combined with a rich mix of peripheral controllers. The board will support PCIe, mutiple Gig ethernet ports, advanced hardware RAID assistance and IEEE 1588. Signed-off-by: Feng Kan Signed-off-by: Stefan Roese --- Makefile | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Makefile') diff --git a/Makefile b/Makefile index e557d0d36c0..10a3e06f514 100644 --- a/Makefile +++ b/Makefile @@ -1418,6 +1418,9 @@ rainier_nand_config: unconfig @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk +redwood_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc ppc4xx redwood amcc + sc3_config:unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3 -- cgit v1.3.1 From 11188d55bc16dd907451c00282e00a038f73dd62 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 17 Jul 2008 10:40:51 +0200 Subject: ppc4xx: Fix alphabetical order in 4xx Makefile part (redwood) Signed-off-by: Stefan Roese --- Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 10a3e06f514..933702d9b85 100644 --- a/Makefile +++ b/Makefile @@ -1397,6 +1397,9 @@ PPChameleonEVB_HI_33_config: unconfig quad100hd_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd +redwood_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc ppc4xx redwood amcc + sbc405_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405 @@ -1418,9 +1421,6 @@ rainier_nand_config: unconfig @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk -redwood_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx redwood amcc - sc3_config:unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3 -- cgit v1.3.1 From 086511fc96a8a9bb56e5e19a3d84c40f4dba80cc Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Thu, 17 Jul 2008 12:47:09 +0200 Subject: ppc4xx: ML507 Board Support The Xilinx ML507 Board is a Virtex 5 prototyping board that includes, among others: -Virtex 5 FX FPGA (With a ppc440x5 in it) -256MB of SDRAM2 -32MB of Flash -I2C Eeprom -System ACE chip -Serial ATA connectors -RS232 Level Conversors -Ethernet Transceiver This patch gives support to a standard design produced by EDK for this board: ppc440, uartlite, xilinx_int and flash - Includes Changes propossed by Stefan Roese and Michal Simek Signed-off-by: Ricardo Ribalda Delgado Acked-by: Stefan Roese --- CREDITS | 5 ++ MAINTAINERS | 4 ++ MAKEALL | 1 + Makefile | 3 + board/xilinx/ml507/Makefile | 58 +++++++++++++++++ board/xilinx/ml507/config.mk | 24 ++++++++ board/xilinx/ml507/init.S | 47 ++++++++++++++ board/xilinx/ml507/ml507.c | 46 ++++++++++++++ board/xilinx/ml507/u-boot.lds | 130 +++++++++++++++++++++++++++++++++++++++ board/xilinx/ml507/xparameters.h | 34 ++++++++++ include/configs/ml507.h | 116 ++++++++++++++++++++++++++++++++++ 11 files changed, 468 insertions(+) create mode 100644 board/xilinx/ml507/Makefile create mode 100644 board/xilinx/ml507/config.mk create mode 100644 board/xilinx/ml507/init.S create mode 100644 board/xilinx/ml507/ml507.c create mode 100644 board/xilinx/ml507/u-boot.lds create mode 100644 board/xilinx/ml507/xparameters.h create mode 100644 include/configs/ml507.h (limited to 'Makefile') diff --git a/CREDITS b/CREDITS index 2b0dab7609b..63b16a9ac2e 100644 --- a/CREDITS +++ b/CREDITS @@ -399,6 +399,11 @@ N: Stelian Pop E: stelian.pop@leadtechdesign.com D: Atmel AT91CAP9ADK support +N: Ricardo Ribalda Delgado +E: ricardo.ribalda@uam.es +D: PPC440x5 (Virtex5), ML507 Board, eeprom_simul, adt7460 +W: http://www.ii.uam.es/~rribalda + N: Stefan Roese E: sr@denx.de D: AMCC PPC4xx Support diff --git a/MAINTAINERS b/MAINTAINERS index b170111e851..58e9aa8c283 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -311,6 +311,10 @@ Daniel Poirot sbc8240 MPC8240 sbc405 PPC405GP +Ricardo Ribalda + + ml507 PPC440x5 + Stefan Roese P3M7448 MPC7448 diff --git a/MAKEALL b/MAKEALL index 6307b9b0e3e..221eb076a5b 100755 --- a/MAKEALL +++ b/MAKEALL @@ -209,6 +209,7 @@ LIST_4xx=" \ MIP405T \ ML2 \ ml300 \ + ml507 \ ocotea \ OCRTC \ ORSG \ diff --git a/Makefile b/Makefile index c34cd9c8b32..c1d2ca14f16 100644 --- a/Makefile +++ b/Makefile @@ -1349,6 +1349,9 @@ ML2_config: unconfig ml300_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx +ml507_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml507 xilinx + ocotea_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx ocotea amcc diff --git a/board/xilinx/ml507/Makefile b/board/xilinx/ml507/Makefile new file mode 100644 index 00000000000..72837048a83 --- /dev/null +++ b/board/xilinx/ml507/Makefile @@ -0,0 +1,58 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +endif + +INCS := +CFLAGS += $(INCS) +HOST_CFLAGS += $(INCS) + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o + +SOBJS = init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xilinx/ml507/config.mk b/board/xilinx/ml507/config.mk new file mode 100644 index 00000000000..35c52ad7fd4 --- /dev/null +++ b/board/xilinx/ml507/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0x04000000 diff --git a/board/xilinx/ml507/init.S b/board/xilinx/ml507/init.S new file mode 100644 index 00000000000..f54d92933e7 --- /dev/null +++ b/board/xilinx/ml507/init.S @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#include +#include +#include + +.section .bootpg,"ax" +.globl tlbtab + +tlbtab: +tlbtab_start + /* SDRAM */ +tlbentry(XPAR_DDR2_SDRAM_MEM_BASEADDR, SZ_256M, CFG_SDRAM_BASE, 0, + AC_R | AC_W | AC_X | SA_G | SA_I) + /* UART */ +tlbentry(XPAR_UARTLITE_0_BASEADDR, SZ_64K, XPAR_UARTLITE_0_BASEADDR, 0, + AC_R | AC_W | SA_G | SA_I) + /* PIC */ +tlbentry(XPAR_INTC_0_BASEADDR, SZ_64K, XPAR_INTC_0_BASEADDR, 0, + AC_R | AC_W | SA_G | SA_I) + /* I2C */ +tlbentry(XPAR_IIC_EEPROM_BASEADDR, SZ_64K, XPAR_IIC_EEPROM_BASEADDR, 0, + AC_R | AC_W | SA_G | SA_I) + /* Net */ +tlbentry(XPAR_LLTEMAC_0_BASEADDR, SZ_64K, XPAR_LLTEMAC_0_BASEADDR, 0, + AC_R | AC_W | SA_G | SA_I) + /*Flash*/ +tlbentry(XPAR_FLASH_MEM0_BASEADDR, SZ_256M, XPAR_FLASH_MEM0_BASEADDR, 0, + AC_R | AC_W | SA_G | SA_I) +tlbtab_end diff --git a/board/xilinx/ml507/ml507.c b/board/xilinx/ml507/ml507.c new file mode 100644 index 00000000000..e95d2af657d --- /dev/null +++ b/board/xilinx/ml507/ml507.c @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#include +#include +#include + +int board_pre_init(void) +{ + return 0; +} + +int checkboard(void) +{ + puts ("ML507 Board\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + return CFG_SDRAM_SIZE_MB * 1024 * 1024; +} + +void get_sys_info(sys_info_t * sysInfo) +{ + sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ; + sysInfo->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ; + sysInfo->freqPCI = 0; + + return; +} diff --git a/board/xilinx/ml507/u-boot.lds b/board/xilinx/ml507/u-boot.lds new file mode 100644 index 00000000000..ef2bdc306c9 --- /dev/null +++ b/board/xilinx/ml507/u-boot.lds @@ -0,0 +1,130 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * 2008: + * Modified by: Ricardo Ribalda Delgado ricardo.ribalda@uam.es + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +ENTRY(_start_440) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/xilinx/ml507/xparameters.h b/board/xilinx/ml507/xparameters.h new file mode 100644 index 00000000000..1542e845805 --- /dev/null +++ b/board/xilinx/ml507/xparameters.h @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * based on xparameters-ml507.h by Xilinx + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#ifndef XPARAMETER_H +#define XPARAMETER_H + +#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 +#define XPAR_INTC_0_BASEADDR 0x81800000 +#define XPAR_UARTLITE_0_BASEADDR 0x84000000 +#define XPAR_IIC_EEPROM_BASEADDR 0x81600000 +#define XPAR_LLTEMAC_0_BASEADDR 0x81c00000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFC000000 +#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 +#define XPAR_CORE_CLOCK_FREQ_HZ 400000000 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 + +#endif diff --git a/include/configs/ml507.h b/include/configs/ml507.h new file mode 100644 index 00000000000..94518a46bfe --- /dev/null +++ b/include/configs/ml507.h @@ -0,0 +1,116 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . +*/ + +#ifndef __CONFIG_H +#define __CONFIG_H +/* +#define DEBUG +#define ET_DEBUG +*/ + /*CPU*/ +#define CONFIG_XILINX_ML507 1 +#define CONFIG_XILINX_440 1 +#define CONFIG_440 1 +#define CONFIG_4xx 1 +#include "../board/xilinx/ml507/xparameters.h" + +/*Mem Map*/ +#define CFG_SDRAM_BASE 0x0 +#define CFG_SDRAM_SIZE_MB 256 +#define CFG_MONITOR_BASE 0x04000000 +#define CFG_MONITOR_LEN ( 192 * 1024 ) +#define CFG_MALLOC_LEN ( 128 * 1024 ) +#define CFG_ISRAM_BASE XPAR_XPS_BRAM_IF_CNTLR_1_BASEADDR + +/*Uart*/ +#define CONFIG_XILINX_UARTLITE +#define CONFIG_BAUDRATE 9600 +#define CFG_BAUDRATE_TABLE {9600} +#define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR + +/*Cmd*/ +#include +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_REGINFO +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_DTT +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM +#undef CONFIG_CMD_IMLS + +/*Env*/ +#define CFG_ENV_IS_NOWHERE +#define CFG_ENV_SIZE 0x200 +#define CFG_ENV_OFFSET 0x100 + +/*Misc*/ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "board:/# " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 ) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ +#define CFG_LOAD_ADDR 0x400000 /* default load address */ +#define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_LOOPW /* enable loopw command */ +#define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_VERSION_VARIABLE /* include version env variable */ +#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CFG_HUSH_PARSER /* Use the HUSH parser */ +#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */ +#define CFG_BOOTMAPSZ ( 8 << 20 ) /* Initial Memory map for Linux */ +#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" + +/*Stack*/ +#define CFG_INIT_RAM_ADDR 0x800000 /* Initial RAM address */ +#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ +#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE ) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +/*Speed*/ +#define CONFIG_SYS_CLK_FREQ 400000000 + +/*Flash*/ +#define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR +#define CFG_FLASH_SIZE (32*1024*1024) +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 +#define CFG_FLASH_EMPTY_INFO 1 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT ( CFG_FLASH_SIZE / ( 64 * 1024 ) ) +#define CFG_FLASH_PROTECTION + +#endif /* __CONFIG_H */ -- cgit v1.3.1 From 01a004313c5ec2d128b611df4c208b1b0d3c3fb4 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Mon, 21 Jul 2008 20:30:07 +0200 Subject: ppc4xx: ML507: U-Boot in flash and System ACE This patch allows booting from FLASH the ML507 board by Xilinx. Previously, U-Boot needed to be loaded from JTAG or a Sytem ACE CF Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Stefan Roese --- MAKEALL | 1 + Makefile | 8 +++ board/xilinx/ml507/config.mk | 3 + board/xilinx/ml507/init.S | 8 ++- board/xilinx/ml507/u-boot-ram.lds | 134 +++++++++++++++++++++++++++++++++++ board/xilinx/ml507/u-boot-rom.lds | 144 ++++++++++++++++++++++++++++++++++++++ board/xilinx/ml507/u-boot.lds | 130 ---------------------------------- board/xilinx/ml507/xparameters.h | 7 +- include/configs/ml507.h | 17 +++-- 9 files changed, 309 insertions(+), 143 deletions(-) create mode 100644 board/xilinx/ml507/u-boot-ram.lds create mode 100644 board/xilinx/ml507/u-boot-rom.lds delete mode 100644 board/xilinx/ml507/u-boot.lds (limited to 'Makefile') diff --git a/MAKEALL b/MAKEALL index 221eb076a5b..2948387723a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -210,6 +210,7 @@ LIST_4xx=" \ ML2 \ ml300 \ ml507 \ + ml507_flash \ ocotea \ OCRTC \ ORSG \ diff --git a/Makefile b/Makefile index c1d2ca14f16..8f4fdd09953 100644 --- a/Makefile +++ b/Makefile @@ -1349,7 +1349,15 @@ ML2_config: unconfig ml300_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx +ml507_flash_config: unconfig + @mkdir -p $(obj)include $(obj)board/xilinx/ml507 + @cp $(obj)board/xilinx/ml507/u-boot-rom.lds $(obj)board/xilinx/ml507/u-boot.lds + @echo "TEXT_BASE = 0xFE3E0000" > $(obj)board/xilinx/ml507/config.tmp + @$(MKCONFIG) $(@:_flash_config=) ppc ppc4xx ml507 xilinx + ml507_config: unconfig + @mkdir -p $(obj)include $(obj)board/xilinx/ml507 + @cp $(obj)board/xilinx/ml507/u-boot-ram.lds $(obj)board/xilinx/ml507/u-boot.lds @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml507 xilinx ocotea_config: unconfig diff --git a/board/xilinx/ml507/config.mk b/board/xilinx/ml507/config.mk index 35c52ad7fd4..e827e8a9368 100644 --- a/board/xilinx/ml507/config.mk +++ b/board/xilinx/ml507/config.mk @@ -20,5 +20,8 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp +ifndef TEXT_BASE TEXT_BASE = 0x04000000 +endif diff --git a/board/xilinx/ml507/init.S b/board/xilinx/ml507/init.S index f54d92933e7..3228a65e536 100644 --- a/board/xilinx/ml507/init.S +++ b/board/xilinx/ml507/init.S @@ -35,13 +35,19 @@ tlbentry(XPAR_UARTLITE_0_BASEADDR, SZ_64K, XPAR_UARTLITE_0_BASEADDR, 0, /* PIC */ tlbentry(XPAR_INTC_0_BASEADDR, SZ_64K, XPAR_INTC_0_BASEADDR, 0, AC_R | AC_W | SA_G | SA_I) +#ifdef XPAR_IIC_EEPROM_BASEADDR /* I2C */ tlbentry(XPAR_IIC_EEPROM_BASEADDR, SZ_64K, XPAR_IIC_EEPROM_BASEADDR, 0, AC_R | AC_W | SA_G | SA_I) +#endif +#ifdef XPAR_LLTEMAC_0_BASEADDR /* Net */ tlbentry(XPAR_LLTEMAC_0_BASEADDR, SZ_64K, XPAR_LLTEMAC_0_BASEADDR, 0, AC_R | AC_W | SA_G | SA_I) +#endif +#ifdef XPAR_FLASH_MEM0_BASEADDR /*Flash*/ tlbentry(XPAR_FLASH_MEM0_BASEADDR, SZ_256M, XPAR_FLASH_MEM0_BASEADDR, 0, - AC_R | AC_W | SA_G | SA_I) + AC_R | AC_W | AC_X | SA_G | SA_I) +#endif tlbtab_end diff --git a/board/xilinx/ml507/u-boot-ram.lds b/board/xilinx/ml507/u-boot-ram.lds new file mode 100644 index 00000000000..2c98d278503 --- /dev/null +++ b/board/xilinx/ml507/u-boot-ram.lds @@ -0,0 +1,134 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +ENTRY(_start_440) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified."); + + _end = . ; + PROVIDE (end = .); +} diff --git a/board/xilinx/ml507/u-boot-rom.lds b/board/xilinx/ml507/u-boot-rom.lds new file mode 100644 index 00000000000..d5da018ba54 --- /dev/null +++ b/board/xilinx/ml507/u-boot-rom.lds @@ -0,0 +1,144 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +ENTRY(_start_440) + +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + .bootpg 0xFFFFF000 : + { + cpu/ppc4xx/start.o (.bootpg) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified."); + + _end = . ; + PROVIDE (end = .); +} diff --git a/board/xilinx/ml507/u-boot.lds b/board/xilinx/ml507/u-boot.lds deleted file mode 100644 index ef2bdc306c9..00000000000 --- a/board/xilinx/ml507/u-boot.lds +++ /dev/null @@ -1,130 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * 2008: - * Modified by: Ricardo Ribalda Delgado ricardo.ribalda@uam.es - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -ENTRY(_start_440) -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - *(.rodata.str1.4) - *(.eh_frame) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); -} diff --git a/board/xilinx/ml507/xparameters.h b/board/xilinx/ml507/xparameters.h index 1542e845805..6a8e1831715 100644 --- a/board/xilinx/ml507/xparameters.h +++ b/board/xilinx/ml507/xparameters.h @@ -22,13 +22,14 @@ #define XPARAMETER_H #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 -#define XPAR_INTC_0_BASEADDR 0x81800000 -#define XPAR_UARTLITE_0_BASEADDR 0x84000000 #define XPAR_IIC_EEPROM_BASEADDR 0x81600000 +#define XPAR_INTC_0_BASEADDR 0x81800000 #define XPAR_LLTEMAC_0_BASEADDR 0x81c00000 -#define XPAR_FLASH_MEM0_BASEADDR 0xFC000000 +#define XPAR_UARTLITE_0_BASEADDR 0x84000000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 #define XPAR_PLB_CLOCK_FREQ_HZ 100000000 #define XPAR_CORE_CLOCK_FREQ_HZ 400000000 #define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 +#define XPAR_UARTLITE_0_BAUDRATE 9600 #endif diff --git a/include/configs/ml507.h b/include/configs/ml507.h index 94518a46bfe..a79bc1eb507 100644 --- a/include/configs/ml507.h +++ b/include/configs/ml507.h @@ -31,15 +31,14 @@ /*Mem Map*/ #define CFG_SDRAM_BASE 0x0 #define CFG_SDRAM_SIZE_MB 256 -#define CFG_MONITOR_BASE 0x04000000 +#define CFG_MONITOR_BASE TEXT_BASE #define CFG_MONITOR_LEN ( 192 * 1024 ) #define CFG_MALLOC_LEN ( 128 * 1024 ) -#define CFG_ISRAM_BASE XPAR_XPS_BRAM_IF_CNTLR_1_BASEADDR /*Uart*/ #define CONFIG_XILINX_UARTLITE -#define CONFIG_BAUDRATE 9600 -#define CFG_BAUDRATE_TABLE {9600} +#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE +#define CFG_BAUDRATE_TABLE { XPAR_UARTLITE_0_BAUDRATE } #define CONFIG_SERIAL_BASE XPAR_UARTLITE_0_BASEADDR /*Cmd*/ @@ -75,9 +74,9 @@ #define CFG_PBSIZE ( CFG_CBSIZE + sizeof( CFG_PROMPT ) + 16 ) #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ -#define CFG_LOAD_ADDR 0x400000 /* default load address */ +#define CFG_MEMTEST_START 0x00400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */ +#define CFG_LOAD_ADDR 0x00400000 /* default load address */ #define CFG_EXTBDINFO 1 /* Extended board_into (bd_t) */ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CONFIG_CMDLINE_EDITING /* add command line history */ @@ -101,7 +100,7 @@ #define CFG_GBL_DATA_OFFSET ( CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE ) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET /*Speed*/ -#define CONFIG_SYS_CLK_FREQ 400000000 +#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ /*Flash*/ #define CFG_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR @@ -110,7 +109,7 @@ #define CFG_FLASH_CFI_DRIVER 1 #define CFG_FLASH_EMPTY_INFO 1 #define CFG_MAX_FLASH_BANKS 1 -#define CFG_MAX_FLASH_SECT ( CFG_FLASH_SIZE / ( 64 * 1024 ) ) +#define CFG_MAX_FLASH_SECT 259 #define CFG_FLASH_PROTECTION #endif /* __CONFIG_H */ -- cgit v1.3.1 From 9246f5ecfd353ae297a02ffd5328402acf16c9dd Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Wed, 30 Jul 2008 12:39:28 +0200 Subject: ppc4xx: ML507: Environment in flash and MTD Support - Relocate the location of U-Boot in the flash - Save the environment in one sector of the flash memory - MTD Support Signed-off-by: Ricardo Ribalda Delgado Signed-off-by: Stefan Roese --- Makefile | 2 +- board/xilinx/ml507/xparameters.h | 2 +- include/configs/ml507.h | 15 +++++++++++---- 3 files changed, 13 insertions(+), 6 deletions(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 8f4fdd09953..ea572cf36d3 100644 --- a/Makefile +++ b/Makefile @@ -1352,7 +1352,7 @@ ml300_config: unconfig ml507_flash_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ml507 @cp $(obj)board/xilinx/ml507/u-boot-rom.lds $(obj)board/xilinx/ml507/u-boot.lds - @echo "TEXT_BASE = 0xFE3E0000" > $(obj)board/xilinx/ml507/config.tmp + @echo "TEXT_BASE = 0xFE360000" > $(obj)board/xilinx/ml507/config.tmp @$(MKCONFIG) $(@:_flash_config=) ppc ppc4xx ml507 xilinx ml507_config: unconfig diff --git a/board/xilinx/ml507/xparameters.h b/board/xilinx/ml507/xparameters.h index 6a8e1831715..77d2ddf9bd2 100644 --- a/board/xilinx/ml507/xparameters.h +++ b/board/xilinx/ml507/xparameters.h @@ -24,7 +24,7 @@ #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 #define XPAR_IIC_EEPROM_BASEADDR 0x81600000 #define XPAR_INTC_0_BASEADDR 0x81800000 -#define XPAR_LLTEMAC_0_BASEADDR 0x81c00000 +#define XPAR_LLTEMAC_0_BASEADDR 0x81C00000 #define XPAR_UARTLITE_0_BASEADDR 0x84000000 #define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 #define XPAR_PLB_CLOCK_FREQ_HZ 100000000 diff --git a/include/configs/ml507.h b/include/configs/ml507.h index a79bc1eb507..c653a5105cf 100644 --- a/include/configs/ml507.h +++ b/include/configs/ml507.h @@ -33,7 +33,7 @@ #define CFG_SDRAM_SIZE_MB 256 #define CFG_MONITOR_BASE TEXT_BASE #define CFG_MONITOR_LEN ( 192 * 1024 ) -#define CFG_MALLOC_LEN ( 128 * 1024 ) +#define CFG_MALLOC_LEN ( CFG_ENV_SIZE + 128 * 1024 ) /*Uart*/ #define CONFIG_XILINX_UARTLITE @@ -49,6 +49,8 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_IRQ #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_JFFS2 +#define CONFIG_JFFS2_CMDLINE #undef CONFIG_CMD_I2C #undef CONFIG_CMD_DTT #undef CONFIG_CMD_NET @@ -58,9 +60,11 @@ #undef CONFIG_CMD_IMLS /*Env*/ -#define CFG_ENV_IS_NOWHERE -#define CFG_ENV_SIZE 0x200 -#define CFG_ENV_OFFSET 0x100 +#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_SIZE 0x20000 +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_OFFSET 0x340000 +#define CFG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CFG_ENV_OFFSET) /*Misc*/ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -111,5 +115,8 @@ #define CFG_MAX_FLASH_BANKS 1 #define CFG_MAX_FLASH_SECT 259 #define CFG_FLASH_PROTECTION +#define MTDIDS_DEFAULT "nor0=ml507-flash" +#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" + #endif /* __CONFIG_H */ -- cgit v1.3.1 From f2302d4430e7f3f48308d6a585320fe96af8afbd Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 6 Aug 2008 14:05:38 +0200 Subject: Fix merge problems Signed-off-by: Stefan Roese --- .gitignore | 7 + CHANGELOG | 550 +++++++++++++++++++++++++++ MAKEALL | 1 - Makefile | 9 +- api/api_storage.c | 45 ++- api_examples/demo.c | 78 +++- board/adsvix/Makefile | 51 --- board/adsvix/adsvix.c | 75 ---- board/adsvix/config.mk | 1 - board/adsvix/lowlevel_init.S | 466 ----------------------- board/adsvix/pcmcia.c | 67 ---- board/adsvix/pxavoltage.S | 230 ----------- board/adsvix/u-boot.lds | 56 --- board/atmel/atngw100/atngw100.c | 2 +- board/atmel/atstk1000/atstk1000.c | 2 +- board/atmel/atstk1000/flash.c | 2 +- board/esd/common/flash.c | 2 + board/freescale/m5275evb/Makefile | 2 +- board/freescale/mpc8540ads/u-boot.lds | 37 +- board/freescale/mpc8541cds/u-boot.lds | 38 +- board/freescale/mpc8544ds/u-boot.lds | 37 +- board/freescale/mpc8548cds/u-boot.lds | 37 +- board/freescale/mpc8555cds/u-boot.lds | 38 +- board/freescale/mpc8560ads/u-boot.lds | 42 +- board/freescale/mpc8568mds/u-boot.lds | 40 +- board/idmr/mii.c | 2 +- board/ids8247/ids8247.c | 2 +- board/matrix_vision/mvbc_p/mvbc_p.c | 3 +- board/tqc/tqm85xx/tqm85xx.c | 3 +- board/w7o/post2.c | 6 + common/cmd_bdinfo.c | 2 +- common/cmd_bootm.c | 9 +- common/cmd_flash.c | 4 +- common/cmd_ide.c | 50 ++- common/cmd_mfsl.c | 6 +- common/dlmalloc.c | 21 +- common/lcd.c | 19 +- common/main.c | 4 +- cpu/microblaze/interrupts.c | 2 +- cpu/mips/au1x00_serial.c | 2 +- cpu/mpc8260/speed.c | 47 ++- cpu/nios2/interrupts.c | 1 + cpu/nios2/sysid.c | 2 +- cpu/ppc4xx/44x_spd_ddr2.c | 24 +- cpu/pxa/mmc.c | 5 - doc/README.autoboot | 15 +- doc/README.qemu_mips | 2 +- drivers/i2c/fsl_i2c.c | 18 +- drivers/mmc/atmel_mci.c | 16 +- drivers/mtd/cfi_flash.c | 5 +- drivers/mtd/spi/atmel.c | 6 +- drivers/net/e1000.c | 13 +- drivers/serial/Makefile | 12 +- drivers/serial/atmel_usart.c | 3 - drivers/serial/mcfuart.c | 3 - drivers/serial/s3c4510b_uart.c | 4 - drivers/serial/serial_max3100.c | 4 - drivers/serial/serial_xuartlite.c | 18 +- drivers/serial/usbtty.c | 5 - drivers/usb/usbdcore.c | 2 +- drivers/video/atmel_lcdfb.c | 4 + include/api_public.h | 1 + include/asm-arm/arch-at91rm9200/AT91RM9200.h | 4 +- include/asm-avr32/io.h | 2 + include/asm-avr32/sysreg.h | 6 +- include/asm-nios2/types.h | 3 + include/asm-ppc/fsl_lbc.h | 9 + include/asm-ppc/global_data.h | 3 + include/command.h | 2 + include/configs/ADS860.h | 2 +- include/configs/APC405.h | 3 +- include/configs/Adder.h | 2 +- include/configs/AmigaOneG3SE.h | 3 +- include/configs/CPCI405DT.h | 5 +- include/configs/DU440.h | 5 +- include/configs/FADS860T.h | 2 +- include/configs/GTH.h | 5 +- include/configs/KUP4K.h | 3 +- include/configs/KUP4X.h | 3 +- include/configs/MPC86xADS.h | 2 +- include/configs/MPC885ADS.h | 2 +- include/configs/MVBC_P.h | 6 +- include/configs/MVBLUE.h | 7 +- include/configs/NC650.h | 5 +- include/configs/PLU405.h | 5 +- include/configs/PMC440.h | 3 +- include/configs/RPXlite_DW.h | 3 +- include/configs/SXNI855T.h | 2 +- include/configs/adsvix.h | 365 ------------------ include/configs/apollon.h | 8 - include/configs/at91rm9200dk.h | 12 +- include/configs/atngw100.h | 4 +- include/configs/atstk1002.h | 4 +- include/configs/atstk1003.h | 4 +- include/configs/atstk1004.h | 4 +- include/configs/atstk1006.h | 4 +- include/configs/csb637.h | 13 +- include/configs/gth2.h | 5 +- include/configs/gw8260.h | 3 +- include/configs/hymod.h | 2 +- include/configs/linkstation.h | 3 +- include/configs/lwmon.h | 3 +- include/configs/lwmon5.h | 3 +- include/configs/m501sk.h | 3 +- include/configs/motionpro.h | 2 +- include/configs/mp2usb.h | 3 +- include/configs/netstar.h | 3 +- include/configs/ppmc8260.h | 3 +- include/configs/quantum.h | 3 +- include/configs/rmu.h | 3 +- include/configs/sacsng.h | 2 +- include/configs/sbc8260.h | 3 +- include/configs/sc3.h | 3 +- include/configs/trab.h | 3 +- include/configs/utx8245.h | 2 +- include/ppc4xx.h | 6 + lib_arm/board.c | 17 + lib_arm/bootm.c | 3 - lib_m68k/time.c | 5 + lib_sparc/board.c | 4 +- nand_spl/board/amcc/kilauea/Makefile | 2 +- onenand_ipl/board/apollon/Makefile | 42 +- post/cpu/ppc4xx/spr.c | 2 + post/lib_ppc/b.c | 4 + post/lib_ppc/cmp.c | 4 + post/lib_ppc/cmpi.c | 4 + post/lib_ppc/complex.c | 4 + post/lib_ppc/cr.c | 4 + post/lib_ppc/load.c | 4 + post/lib_ppc/multi.c | 4 + post/lib_ppc/store.c | 4 + post/lib_ppc/string.c | 4 + 132 files changed, 1173 insertions(+), 1771 deletions(-) delete mode 100644 board/adsvix/Makefile delete mode 100644 board/adsvix/adsvix.c delete mode 100644 board/adsvix/config.mk delete mode 100644 board/adsvix/lowlevel_init.S delete mode 100644 board/adsvix/pcmcia.c delete mode 100644 board/adsvix/pxavoltage.S delete mode 100644 board/adsvix/u-boot.lds delete mode 100644 include/configs/adsvix.h (limited to 'Makefile') diff --git a/.gitignore b/.gitignore index 89e96f566d9..96c1b4a7ae6 100644 --- a/.gitignore +++ b/.gitignore @@ -26,6 +26,8 @@ /u-boot.ldr /u-boot.ldr.hex /u-boot.ldr.srec +/u-boot-onenand.bin +/u-boot-flexonenand.bin # # Generated files @@ -46,3 +48,8 @@ series # cscope files cscope.* + +# OneNAND IPL files +/onenand_ipl/onenand-ipl* +/onenand_ipl/board/*/onenand* +/onenand_ipl/board/*/*.S diff --git a/CHANGELOG b/CHANGELOG index 0e317cb1df5..7ff1a8af936 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,553 @@ +commit a48311557db6e7e9473a6163b44bb1e6c6ed64c4 +Author: Mark Jackson +Date: Thu Jul 31 16:09:00 2008 +0100 + + Add gzipped logo support + + The README file states that CONFIG_VIDEO_BMP_GZIP behaves as follows: + + If this option is set, additionally to standard BMP + images, gzipped BMP images can be displayed via the + splashscreen support or the bmp command. + + However, the splashscreen function *only* supports standard BMP images. + + This patch adds the documented gzip support. + + Signed-off-by: Mark Jackson + +commit a5bcb01fbde6b1f1c9863cd86e5c4c369f0121ac +Author: Mark Jackson +Date: Thu Jul 31 15:56:48 2008 +0100 + + Fix Atmel LCD controller endianess for AVR32 processors + + The Atmel lcd controller is used on Atmel's AT91 (little endian) and + AVR32 (big endian) platforms. + + As such, the controller can handle both big and little endian memory. + + This patch fixes the driver for the AVR32 platform. + + Signed-off-by: Mark Jackson + +commit cdb8bd2fd3bcbe65d8e4334a55f5a667845426a1 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu Jul 31 15:56:01 2008 +0200 + + apollon: fix build out of tree + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 2e752be39d3e398d4ab89ffa6634c397df298297 +Author: Guennadi Liakhovetski +Date: Thu Jul 31 12:35:04 2008 +0200 + + Uncompressed images loaded to their start address shall set load_end too + + Signed-off-by: Guennadi Liakhovetski + Acked-by: Bartlomiej Sieka + +commit c37207d7f51e19c17f859966f314e27cc1231801 +Author: Wolfgang Denk +Date: Wed Jul 16 16:38:59 2008 +0200 + + Fix printf() format problems with configurable prompts + + U-Boot allows for configurable prompt strings using the + CONFIG_AUTOBOOT_PROMPT resp. CONFIG_MENUPROMPT definitions. So far, + the assumption was that any such user defined problts would contain + exactly one "%d" format specifier. But some boards did not. + + To allow for flexible boot prompts without adding too complex code we + now allow to specify the whole list of printf() arguments in the user + definition. This is powerful, but requires a responsible user who + really understands what he is doing, as he needs to know for exanple + which variables are available in the respective context. + + Signed-off-by: Wolfgang Denk + +commit 54754120637b6a7f4ff774fb199fc550bcfea1da +Author: Wolfgang Denk +Date: Thu Jul 31 17:02:14 2008 +0200 + + TQM85xx: fix typo introduce by commit ffbb5cb9 + + Signed-off-by: Wolfgang Denk + +commit 0b4951d4cddca9cc800745891c95b291e47cbbd7 +Author: Wolfgang Denk +Date: Thu Jul 31 15:27:01 2008 +0200 + + mvbc_p board: fix most build warnings. + + Signed-off-by: Wolfgang Denk + +commit c4ec6db074051d2f6fc76a66411c60621b22bc02 +Author: Wolfgang Denk +Date: Thu Jul 31 13:57:20 2008 +0200 + + E1000: clean up CONFIG_E1000_FALLBACK_MAC handling + + Avoid "integer constant is too large for 'long' type" warnings. + And simplify the code. + + Signed-off-by: Wolfgang Denk + +commit 9196b44334c330cc13de2464c59181e4db71f549 +Author: Matvejchikov Ilya +Date: Wed Jul 30 23:21:19 2008 +0400 + + 8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI + + Signed-off-by: Matvejchikov Ilya + +commit 6361ad4b596f5a940a01c91ae0297d98f790cbe0 +Author: Matvejchikov Ilya +Date: Wed Jul 30 23:20:32 2008 +0400 + + PPC: Add pci_clk in the global_data for CPM2 processors + + This patch adds pci_clk field to the global_data structure for the + processors which have CPM2 module in case the CONFIG_PCI is defined. + + Signed-off-by: Matvejchikov Ilya + +commit f0ff885ca64655bee6540eb8a25eed90b1152686 +Author: Kumar Gala +Date: Wed Jul 30 14:13:30 2008 -0500 + + mpc85xx: Update linker scripts for Freescale boards + + * Move to using absolute addressing always. Makes the scripts a bit more + portable and common + * Moved .bss after the end of the image. These allows us to have more + room in the resulting binary image for code and data. + * Removed .text object files that aren't really needed + * Make sure _end is 4-byte aligned as the .bss init code expects this. + (Its possible that the end of .bss isn't 4-byte aligned) + + Signed-off-by: Kumar Gala + +commit 57c219ad5d34dd9d49991777a62e3899595f2ec7 +Author: Kumar Gala +Date: Wed Jul 30 08:01:15 2008 -0500 + + Fix compile warnings in dlmalloc + + The origional code was using on odd reference to get to the first + real element in av_[]. The first two elements of the array are + not used for actual bins, but for house keeping. If we are more + explicit about how use the first few elements we can get rid of the + warnings: + + dlmalloc.c: In function 'malloc_extend_top': + dlmalloc.c:1971: warning: dereferencing type-punned pointer will break strict-aliasing rules + dlmalloc.c:1999: warning: dereferencing type-punned pointer will break strict-aliasing rules + dlmalloc.c:2029: warning: dereferencing type-punned pointer will break strict-aliasing rules + ... + + The logic of how this code came to be is: + bin_at(0) = (char*)&(av_[2]) - 2*SIZE_SZ + + SIZE_SZ is the size of pointer, and av_ is arry of pointers so: + bin_at(0) = &(av_[0]) + + Going from there to bin_at(0)->fd or bin_at(0)->size should be straight forward. + + Signed-off-by: Kumar Gala + +commit 3f9ae1a5d43c49a8ecf497470c3d1d80255e44b9 +Author: Stefan Roese +Date: Wed Jul 30 10:21:01 2008 +0200 + + ppc4xx: Fix W7OLMG compile problems by adding missing LM75 defines + + Signed-off-by: Stefan Roese + +commit ebb86c4ecd37a7701358284e497ca4c6483c7cc5 +Author: Stefan Roese +Date: Wed Jul 30 09:59:51 2008 +0200 + + cmd_bootm.c: Fix problem with '#if (CONFIG_CMD_USB)' + + A recent patch used '#if (CONFIG_CMD_USB)' instead of + '#if defined(CONFIG_CMD_USB)'. This patch fixes this problem and makes + common/bootm.c compile again. + + Signed-off-by: Stefan Roese + Acked-by: Markus Klotzbuecher + +commit 2cb9080427fe641dcb71da46cd0634dd406f37ed +Author: Kyungmin Park +Date: Tue Jul 22 08:01:43 2008 +0900 + + Remove unused I2C at apollon board + + There are no I2C devices on this board. + + Signed-off-by: Kyungmin Park + +commit 3c95960e526b3b026da20201db64526f46faf14b +Author: Wolfgang Denk +Date: Thu Jul 31 10:12:09 2008 +0200 + + at91rm9200dk, csb637: fix NAND related build problems + + Tried fixing NAND support for the at91rm9200dk board; untested. + Disabled NAND support in the csb637 board config file. + + Signed-off-by: Wolfgang Denk + +commit 09d318a8bb1444ec92e31cafcdba877eb9409e58 +Author: Kumar Gala +Date: Tue Jul 29 12:23:49 2008 -0500 + + fsl_i2c: Use timebase timer functions instead of get_timer() + + The current implementation of get_timer() is only really useful after we + have relocated u-boot to memory. The i2c code is used before that as part + of the SPD DDR setup. + + We actually have a bug when using the get_timer() code before relocation + because the .bss hasn't been setup and thus we could be reading/writing + a random location (probably in flash). + + Signed-off-by: Kumar Gala + +commit 4fc72a0d6ca85070a5e90d76cc5a853526ac09c4 +Author: Frank Svendsbøe +Date: Tue Jul 29 14:49:31 2008 +0200 + + Adder8xx: Fix CFG_MONITOR_LEN + + Due to increased space usage, U-Boot can no longer be stored in three sectors. + The current U-Boot use just over three flash sectors (197k), and U-Boot will + become corrupt after saving environment variables. This patch adds another 64k + to CFG_MONITOR_LEN. + + Signed-off-by: Frank E. Svendsbøe + +commit a4c59ad4a21140550ada6f97690d2527c4146ce5 +Author: Kyungmin Park +Date: Tue Jul 29 08:47:57 2008 +0900 + + Add OneNAND IPL related files to gitignore + + Signed-off-by: Kyungmin Park + +commit 8d87589e8e874df7120a3d9667f051bc33bac250 +Author: Rafal Jaworowski +Date: Mon Jul 28 20:38:25 2008 +0200 + + API: Teach the storage layer about SATA and MMC options. + + Signed-off-by: Rafal Czubak + Acked-by: Rafal Jaworowski + +commit 6b73b754f782e1ecce5048bf20b22ce56a07a5b8 +Author: Rafal Jaworowski +Date: Mon Jul 28 20:37:48 2008 +0200 + + API: Dump contents of sector 0 in the demo application. + + Signed-off-by: Rafal Czubak + Acked-by: Rafal Jaworowski + +commit 13ca6305f2eba49c175f6370c35286141059c789 +Author: Rafal Jaworowski +Date: Mon Jul 28 20:37:10 2008 +0200 + + API: Correct storage enumeration routine, other minor fixes in API storage area. + + Signed-off-by: Rafal Czubak + Acked-by: Rafal Jaworowski + +commit 05c7fe0f049b1c9eb9a1992f27e5e350d865f4a8 +Author: Rafal Jaworowski +Date: Mon Jul 28 20:36:19 2008 +0200 + + API: Fix compilation warnings in api_examples/demo.c. + + Signed-off-by: Rafal Czubak + +commit c14eefcc48212af2f3314809605698dd8393a90a +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Jul 27 17:09:43 2008 +0200 + + Fix more printf() format warnings + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 936897d4d1365452bbbdf8430db5e7769ef08d38 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Jul 25 15:18:16 2008 +0200 + + Fix remaining CFG_CMD_ define, ifdef and comments + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 5d1d00fb36005482e1803a00ddc46efa11d719af +Author: Stefano Babic +Date: Fri Jul 25 08:57:40 2008 +0200 + + Add include for config.h in command.h. + + Because the cmd_tbl_s structure depends on the configuration file, it + must be assured that config.h is included before the structure is + evaluated by the compiler. If this is not certain, it could happen + that the compiler generates structures of different size, depending + on the fact if the source file includes before or after + . + + The effect is that u-boot crashes when tries to relocate the command + table (for ppc) or try to access to the command table for other + architectures. + + The problem can happen on board-depending commands. All general + commands under /common are unaffected, because they include already + config.h before command.h. + + Signed-off-by: Stefano Babic + +commit 2dacb734bac9dba1db9e704d3e0b200ef521c79a +Author: Scott Wood +Date: Wed Jul 23 13:16:06 2008 -0500 + + NAND: $(obj)-qualify ecc.h in kilauea NAND boot Makefile. + + This fixes building out-of-tree. + + Signed-off-by: Scott Wood + +commit 36d59bd9da9e15d19b867b48449408830f4e2ad5 +Author: Heiko Schocher +Date: Wed Jul 23 07:30:46 2008 +0200 + + Fix warnings if compiling with IDE support. + + cmd_ide.c:827: Warnung: weak declaration of `ide_outb' after first use results in unspecified behavior + cmd_ide.c:839: Warnung: weak declaration of `ide_inb' after first use results in unspecified behavior + + Signed-off-by: Heiko Schocher + +commit 7610db17fd4d59c51d825488526d85ede2f06767 +Author: Adrian Filipi +Date: Tue Jul 22 14:28:11 2008 -0400 + + Removed support for the adsvix board. + + Support for the adsvix was originally provided by Applied Data + Systems (ADS), inc., now EuroTech, Inc. + The board never shipped aside from some sample boards. + + Signed-off-by: Adrian Filipi + +commit f96b44cef897bd372beb86dde1b33637c119d84d +Author: Remy Bohmer +Date: Tue Jul 22 16:22:11 2008 +0200 + + ARM: set GD_FLG_RELOC for boards skipping relocation to RAM + + If CONFIG_SKIP_RELOCATE_UBOOT is set the flag GD_FLG_RELOC is usually + never set, because relocation to RAM is actually never done by U-boot + itself. However, several pieces of code check if this flag is set at + some time. + + So, to make sure this flag is set on boards skipping relocation, this + is added to the initialisation of U-boot at a moment where it is safe + to do so. + + Signed-off-by: Remy Bohmer + +commit e4dafff86f289b5677143a3e41da7b45c6d27fc7 +Author: Timur Tabi +Date: Mon Jul 21 14:26:23 2008 -0500 + + fsl-i2c: fix writes to data segment before relocation + + Prevent i2c_init() in fsl_i2c.c from writing to the data segment before + relocation. Commit d8c82db4 added the ability for i2c_init() to program the + I2C bus speed and save the value in i2c_bus_speed[], which is a global + variable. It is an error to write to the data segment before relocation, + which is what i2c_init() does when it stores the bus speed in i2c_bus_speed[]. + + Signed-off-by: Timur Tabi + +commit dbd32387920e5ad6f9dd58a7b5012bbabe2a6a21 +Author: Wolfgang Ocker +Date: Mon Jul 28 16:56:51 2008 +0200 + + mips: Fix baudrate divisor computation on alchemy cpus + + Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor + on alchemy cpus. + + Signed-off-by: Wolfgang Ocker + Signed-off-by: Shinya Kuribayashi + +commit a229d291f33308ab7761d39f25fa1a53c0fc00a2 +Author: Haavard Skinnemoen +Date: Wed Jul 23 10:55:46 2008 +0200 + + spi flash: Fix printf() format warnings + + Signed-off-by: Haavard Skinnemoen + +commit 252a5e0738bcafaf25f7fbb40f19a59abc2cb13e +Author: Haavard Skinnemoen +Date: Wed Jul 23 10:55:31 2008 +0200 + + atmel_mci: Fix printf() format warnings + + Signed-off-by: Haavard Skinnemoen + +commit 7f4b009f4232d57084ce0ec5aeb3b57bccb08e4c +Author: Haavard Skinnemoen +Date: Wed Jul 23 10:55:15 2008 +0200 + + avr32: Fix printf() format warnings + + Signed-off-by: Haavard Skinnemoen + +commit a79c3e8d9c31db25d5ca3ec8e08a97f323410dd4 +Author: Haavard Skinnemoen +Date: Wed Jul 23 10:52:19 2008 +0200 + + avr32: asm/io.h needs asm/types.h + + map_physmem() takes a phys_addr_t as parameter. This type is defined in + asm/types.h, so we need to include that file. + + Signed-off-by: Haavard Skinnemoen + +commit 1953d128fd07f07d1c3810a28c0863ea64dae1b6 +Author: Michal Simek +Date: Thu Jul 17 12:25:46 2008 +0200 + + microblaze: Fix printf() format issues + + Signed-off-by: Michal Simek + +commit de2a07e534f18b1ca5f9869a4ef0604ca829cff0 +Author: Gururaja Hebbar K R +Date: Thu Jul 17 07:27:51 2008 +0530 + + Remove unused code from lib_arm/bootm.c + + Signed-off-by: Gururaja Hebbar + +commit ffbb5cb942e9856fa24e946977e0a60c64df04ab +Author: Detlev Zundel +Date: Wed Jul 16 18:56:45 2008 +0200 + + tqm85xx: Demystify 'DK: !!!' comment + + Signed-off-by: Detlev Zundel + +commit b2f44ba570f3a01113bbb745daf46f3858d22f53 +Author: Detlev Zundel +Date: Wed Jul 16 18:56:44 2008 +0200 + + 83xx/85xx/86xx: Add LTEDR local bus definitions + + Signed-off-by: Detlev Zundel + +commit f13f64cf42d5abec3e0f920233f6a7a61e7ae494 +Author: Ricardo Ribalda Delgado +Date: Wed Jul 16 16:22:32 2008 +0200 + + serial_xuartlite.c: fix compiler warnings + + Signed-off-by: Ricardo Ribalda Delgado + Acked-by: Grant Likely + +commit 86446d3a5d9d3ca81e85d1ccd3accaaae6f8e3c9 +Author: Stefan Roese +Date: Fri Jul 18 11:03:35 2008 +0200 + + POST: Add disable interrupts in some of the missing CPU POST tests + + Some CPU POST tests did not disable the interrupts while running. This + seems to be necessary to protect this self modifying code. + + Signed-off-by: Stefan Roese + +commit 97a3bf268d096e0e97e54048448c35114edcf557 +Author: Stefan Roese +Date: Fri Jul 18 10:43:24 2008 +0200 + + ide: Use CFG_64BIT_LBA instead of CFG_64BIT_STRTOUL + + This is needed for boards that define CFG_64BIT_STRTOUL but don't define + CFG_64BIT_LBA. + + Signed-off-by: Stefan Roese + +commit 0043ac55024963295fc79b39af85b6dc3b261e17 +Author: Niklaus Giger +Date: Fri Jul 18 11:22:23 2008 +0200 + + POST PPC4xx/spr IVPR only if PPC440 + + The SPR IVPR register is only present (as far as I know) for + processors with a PPC440 core. + + Signed-off-by: Niklaus Giger + Acked-by: Stefan Roese + +commit 1092fbd64748dfa2e979b102611ece9bc5ec1855 +Author: Stefan Roese +Date: Fri Jul 18 10:42:29 2008 +0200 + + ppc4xx: Enable 64bit printf format on 440/460 platforms + + This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all + 440/460 platforms. This may be needed since those platforms support + 36bit physical address space. + + Signed-off-by: Stefan Roese + +commit 66fe183b1dd9c7534605147a8ecfed1c02345ee5 +Author: Stefan Roese +Date: Fri Jul 18 15:57:23 2008 +0200 + + ppc4xx: Fix incorrect MODTx setup for some DIMM configurations + + This patch fixes a problem with incorrect MODTx (On Die Termination) + setup for a configuration with multiple DIMM's and multiple ranks. + Without this change Katmai was unable to boot Linux with DDR2 frequency + >= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux + with DDR2 frequency = 640MHz and mem=4GB. + + Signed-off-by: Stefan Roese + +commit 340ccb260f21516be360745d5c5e3bd0657698df +Author: Sebastian Siewior +Date: Wed Jul 16 20:04:49 2008 +0200 + + cfi_flash: fix flash on BE machines with CFG_WRITE_SWAPPED_DATA + + This got broken by commits 93c56f212c + [cfi_flash: support of long cmd in U-boot.] + + That command needs to be in little endian format on BE machines + with CFG_WRITE_SWAPPED_DATA. Without this patch, the command 0xf0 + gets saved on stack as 0x00 00 00 f0 and 0x00 gets written into + the cmdbuf in case portwidth = chipwidth = 8bit. + + Cc: Alexey Korolev + Cc: Vasiliy Leonenko + Signed-off-by: Sebastian Siewior + +commit 699f05125509249072a0b865c8d35520d97cd501 +Author: Wolfgang Denk +Date: Tue Jul 15 22:22:44 2008 +0200 + + Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile + + Signed-off-by: Wolfgang Denk + commit bcab74baa6b1b1c969038ab6f64a186239180405 Author: Hugo Villeneuve Date: Tue Jul 15 11:23:02 2008 -0400 diff --git a/MAKEALL b/MAKEALL index 2948387723a..ac4195f7d8f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -543,7 +543,6 @@ LIST_at91=" \ ######################################################################### LIST_pxa=" \ - adsvix \ cerf250 \ cradle \ csb226 \ diff --git a/Makefile b/Makefile index ea572cf36d3..92410bad835 100644 --- a/Makefile +++ b/Makefile @@ -24,7 +24,7 @@ VERSION = 1 PATCHLEVEL = 3 SUBLEVEL = 4 -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) VERSION_FILE = $(obj)include/version_autogenerated.h @@ -346,10 +346,9 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin $(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk - $(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all + $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all $(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk - $(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin @@ -2609,9 +2608,6 @@ actux3_config : unconfig actux4_config : unconfig @$(MKCONFIG) $(@:_config=) arm ixp actux4 -adsvix_config : unconfig - @$(MKCONFIG) $(@:_config=) arm pxa adsvix - cerf250_config : unconfig @$(MKCONFIG) $(@:_config=) arm pxa cerf250 @@ -2678,6 +2674,7 @@ zylonite_config : apollon_config : unconfig @mkdir -p $(obj)include + @mkdir -p $(obj)onenand_ipl/board/apollon @echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h @$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx @echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk diff --git a/api/api_storage.c b/api/api_storage.c index 7e6324044d6..74391a59d08 100644 --- a/api/api_storage.c +++ b/api/api_storage.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 Semihalf + * (C) Copyright 2007-2008 Semihalf * * Written by: Rafal Jaworowski * @@ -46,14 +46,15 @@ #define ENUM_USB 1 #define ENUM_SCSI 2 #define ENUM_MMC 3 -#define ENUM_MAX 4 +#define ENUM_SATA 4 +#define ENUM_MAX 5 struct stor_spec { int max_dev; int enum_started; int enum_ended; int type; /* "external" type: DT_STOR_{IDE,USB,etc} */ - char name[4]; + char *name; }; static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, }; @@ -68,12 +69,19 @@ void dev_stor_init(void) specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE; specs[ENUM_IDE].name = "ide"; #endif -#if defined(CONFIG_CMD_USB) - specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV; - specs[ENUM_USB].enum_started = 0; - specs[ENUM_USB].enum_ended = 0; - specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB; - specs[ENUM_USB].name = "usb"; +#if defined(CONFIG_CMD_MMC) + specs[ENUM_MMC].max_dev = CFG_MMC_MAX_DEVICE; + specs[ENUM_MMC].enum_started = 0; + specs[ENUM_MMC].enum_ended = 0; + specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC; + specs[ENUM_MMC].name = "mmc"; +#endif +#if defined(CONFIG_CMD_SATA) + specs[ENUM_SATA].max_dev = CFG_SATA_MAX_DEVICE; + specs[ENUM_SATA].enum_started = 0; + specs[ENUM_SATA].enum_ended = 0; + specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA; + specs[ENUM_SATA].name = "sata"; #endif #if defined(CONFIG_CMD_SCSI) specs[ENUM_SCSI].max_dev = CFG_SCSI_MAX_DEVICE; @@ -82,6 +90,13 @@ void dev_stor_init(void) specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI; specs[ENUM_SCSI].name = "scsi"; #endif +#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE) + specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV; + specs[ENUM_USB].enum_started = 0; + specs[ENUM_USB].enum_ended = 0; + specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB; + specs[ENUM_USB].name = "usb"; +#endif } /* @@ -108,7 +123,10 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di) if (first) { di->cookie = (void *)get_dev(specs[type].name, 0); - found = 1; + if (di->cookie == NULL) + return 0; + else + found = 1; } else { for (i = 0; i < specs[type].max_dev; i++) @@ -123,7 +141,10 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di) } di->cookie = (void *)get_dev(specs[type].name, i); - found = 1; + if (di->cookie == NULL) + return 0; + else + found = 1; /* provide hint if there are more devices in * this group to enumerate */ @@ -360,7 +381,7 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start return 0; if ((dd->block_read) == NULL) { - debugf("no block_read() for device 0x%08x\n"); + debugf("no block_read() for device 0x%08x\n", cookie); return 0; } diff --git a/api_examples/demo.c b/api_examples/demo.c index eae9712b71f..69ac318375a 100644 --- a/api_examples/demo.c +++ b/api_examples/demo.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 Semihalf + * (C) Copyright 2007-2008 Semihalf * * Written by: Rafal Jaworowski * @@ -31,13 +31,15 @@ #define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0) -void test_dump_si(struct sys_info *); +#define BUF_SZ 2048 +#define WAIT_SECS 5 + +void test_dump_buf(void *, int); void test_dump_di(int); +void test_dump_si(struct sys_info *); void test_dump_sig(struct api_signature *); -char buf[2048]; - -#define WAIT_SECS 5 +static char buf[BUF_SZ]; int main(int argc, char *argv[]) { @@ -58,11 +60,12 @@ int main(int argc, char *argv[]) if (sig->version > API_SIG_VERSION) return -3; - printf("API signature found @%x\n", sig); + printf("API signature found @%x\n", (unsigned int)sig); test_dump_sig(sig); printf("\n*** Consumer API test ***\n"); - printf("syscall ptr 0x%08x@%08x\n", syscall_ptr, &syscall_ptr); + printf("syscall ptr 0x%08x@%08x\n", (unsigned int)syscall_ptr, + (unsigned int)&syscall_ptr); /* console activities */ ub_putc('B'); @@ -125,11 +128,17 @@ int main(int argc, char *argv[]) if (i == devs_no) printf("No storage devices available\n"); else { + memset(buf, 0, BUF_SZ); + if ((rv = ub_dev_open(i)) != 0) errf("open device %d error %d\n", i, rv); - else if ((rv = ub_dev_read(i, &buf, 200, 20)) != 0) + + else if ((rv = ub_dev_read(i, buf, 1, 0)) != 0) errf("could not read from device %d, error %d\n", i, rv); + printf("Sector 0 dump (512B):\n"); + test_dump_buf(buf, 512); + ub_dev_close(i); } @@ -180,7 +189,7 @@ void test_dump_sig(struct api_signature *sig) printf("signature:\n"); printf(" version\t= %d\n", sig->version); printf(" checksum\t= 0x%08x\n", sig->checksum); - printf(" sc entry\t= 0x%08x\n", sig->syscall); + printf(" sc entry\t= 0x%08x\n", (unsigned int)sig->syscall); } void test_dump_si(struct sys_info *si) @@ -188,9 +197,9 @@ void test_dump_si(struct sys_info *si) int i; printf("sys info:\n"); - printf(" clkbus\t= 0x%08x\n", si->clk_bus); - printf(" clkcpu\t= 0x%08x\n", si->clk_cpu); - printf(" bar\t\t= 0x%08x\n", si->bar); + printf(" clkbus\t= 0x%08x\n", (unsigned int)si->clk_bus); + printf(" clkcpu\t= 0x%08x\n", (unsigned int)si->clk_cpu); + printf(" bar\t\t= 0x%08x\n", (unsigned int)si->bar); printf("---\n"); for (i = 0; i < si->mr_no; i++) { @@ -217,23 +226,56 @@ void test_dump_si(struct sys_info *si) } } -static char * test_stor_typ(int type) +static char *test_stor_typ(int type) { if (type & DT_STOR_IDE) return "IDE"; + if (type & DT_STOR_MMC) + return "MMC"; + + if (type & DT_STOR_SATA) + return "SATA"; + if (type & DT_STOR_SCSI) return "SCSI"; if (type & DT_STOR_USB) return "USB"; - if (type & DT_STOR_MMC); - return "MMC"; - return "Unknown"; } +void test_dump_buf(void *buf, int len) +{ + int i; + int line_counter = 0; + int sep_flag = 0; + int addr = 0; + + printf("%07x:\t", addr); + + for (i = 0; i < len; i++) { + if (line_counter++ > 15) { + line_counter = 0; + sep_flag = 0; + addr += 16; + i--; + printf("\n%07x:\t", addr); + continue; + } + + if (sep_flag++ > 1) { + sep_flag = 1; + printf(" "); + } + + printf("%02x", *((char *)buf++)); + } + + printf("\n"); +} + void test_dump_di(int handle) { int i; @@ -252,7 +294,7 @@ void test_dump_di(int handle) } else if (di->type & DEV_TYP_STOR) { printf(" type\t\t= %s\n", test_stor_typ(di->type)); - printf(" blk size\t\t= %d\n", di->di_stor.block_size); - printf(" blk count\t\t= %d\n", di->di_stor.block_count); + printf(" blk size\t\t= %d\n", (unsigned int)di->di_stor.block_size); + printf(" blk count\t\t= %d\n", (unsigned int)di->di_stor.block_count); } } diff --git a/board/adsvix/Makefile b/board/adsvix/Makefile deleted file mode 100644 index 05601b48d1d..00000000000 --- a/board/adsvix/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := adsvix.o pcmcia.o -SOBJS := lowlevel_init.o pxavoltage.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/adsvix/adsvix.c b/board/adsvix/adsvix.c deleted file mode 100644 index c430d634e12..00000000000 --- a/board/adsvix/adsvix.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * (C) Copyright 2004 - * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net - * - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - - /* arch number of ADSVIX-Board */ - gd->bd->bi_arch_number = 620; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0xa000003c; - - return 0; -} - -int board_late_init(void) -{ - setenv("stdout", "serial"); - setenv("stderr", "serial"); - return 0; -} - - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; - gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; - gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; - - return 0; -} diff --git a/board/adsvix/config.mk b/board/adsvix/config.mk deleted file mode 100644 index 98be4ebe008..00000000000 --- a/board/adsvix/config.mk +++ /dev/null @@ -1 +0,0 @@ -TEXT_BASE = 0xa1700000 diff --git a/board/adsvix/lowlevel_init.S b/board/adsvix/lowlevel_init.S deleted file mode 100644 index 8dea71c3562..00000000000 --- a/board/adsvix/lowlevel_init.S +++ /dev/null @@ -1,466 +0,0 @@ -/* - * This was originally from the Lubbock u-boot port. - * - * Most of this taken from Redboot hal_platform_setup.h with cleanup - * - * NOTE: I haven't clean this up considerably, just enough to get it - * running. See hal_platform_setup.h for the source. See - * board/cradle/lowlevel_init.S for another PXA250 setup that is - * much cleaner. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -/* wait for coprocessor write complete */ - .macro CPWAIT reg - mrc p15,0,\reg,c2,c0,0 - mov \reg,\reg - sub pc,pc,#4 - .endm - - -/* - * Memory setup - */ - -.globl lowlevel_init -lowlevel_init: - - /* Set up GPIO pins first ----------------------------------------- */ - - ldr r0, =GPSR0 - ldr r1, =CFG_GPSR0_VAL - str r1, [r0] - - ldr r0, =GPSR1 - ldr r1, =CFG_GPSR1_VAL - str r1, [r0] - - ldr r0, =GPSR2 - ldr r1, =CFG_GPSR2_VAL - str r1, [r0] - - ldr r0, =GPSR3 - ldr r1, =CFG_GPSR3_VAL - str r1, [r0] - - ldr r0, =GPCR0 - ldr r1, =CFG_GPCR0_VAL - str r1, [r0] - - ldr r0, =GPCR1 - ldr r1, =CFG_GPCR1_VAL - str r1, [r0] - - ldr r0, =GPCR2 - ldr r1, =CFG_GPCR2_VAL - str r1, [r0] - - ldr r0, =GPCR3 - ldr r1, =CFG_GPCR3_VAL - str r1, [r0] - - ldr r0, =GPDR0 - ldr r1, =CFG_GPDR0_VAL - str r1, [r0] - - ldr r0, =GPDR1 - ldr r1, =CFG_GPDR1_VAL - str r1, [r0] - - ldr r0, =GPDR2 - ldr r1, =CFG_GPDR2_VAL - str r1, [r0] - - ldr r0, =GPDR3 - ldr r1, =CFG_GPDR3_VAL - str r1, [r0] - - ldr r0, =GAFR0_L - ldr r1, =CFG_GAFR0_L_VAL - str r1, [r0] - - ldr r0, =GAFR0_U - ldr r1, =CFG_GAFR0_U_VAL - str r1, [r0] - - ldr r0, =GAFR1_L - ldr r1, =CFG_GAFR1_L_VAL - str r1, [r0] - - ldr r0, =GAFR1_U - ldr r1, =CFG_GAFR1_U_VAL - str r1, [r0] - - ldr r0, =GAFR2_L - ldr r1, =CFG_GAFR2_L_VAL - str r1, [r0] - - ldr r0, =GAFR2_U - ldr r1, =CFG_GAFR2_U_VAL - str r1, [r0] - - ldr r0, =GAFR3_L - ldr r1, =CFG_GAFR3_L_VAL - str r1, [r0] - - ldr r0, =GAFR3_U - ldr r1, =CFG_GAFR3_U_VAL - str r1, [r0] - - ldr r0, =PSSR /* enable GPIO pins */ - ldr r1, =CFG_PSSR_VAL - str r1, [r0] - - /* ---------------------------------------------------------------- */ - /* Enable memory interface */ - /* */ - /* The sequence below is based on the recommended init steps */ - /* detailed in the Intel PXA250 Operating Systems Developers Guide, */ - /* Chapter 10. */ - /* ---------------------------------------------------------------- */ - - /* ---------------------------------------------------------------- */ - /* Step 1: Wait for at least 200 microsedonds to allow internal */ - /* clocks to settle. Only necessary after hard reset... */ - /* FIXME: can be optimized later */ - /* ---------------------------------------------------------------- */ - - ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 - str r2, [r3] - ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ - /* so 0x300 should be plenty */ -1: - ldr r2, [r3] - cmp r4, r2 - bgt 1b - -mem_init: - - ldr r1, =MEMC_BASE /* get memory controller base addr. */ - - /* ---------------------------------------------------------------- */ - /* Step 2a: Initialize Asynchronous static memory controller */ - /* ---------------------------------------------------------------- */ - - /* MSC registers: timing, bus width, mem type */ - - /* MSC0: nCS(0,1) */ - ldr r2, =CFG_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ - /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CFG_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] - - /* MSC2: nCS(4,5) */ - ldr r2, =CFG_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 2b: Initialize Card Interface */ - /* ---------------------------------------------------------------- */ - - /* MECR: Memory Expansion Card Register */ - ldr r2, =CFG_MECR_VAL - str r2, [r1, #MECR_OFFSET] - ldr r2, [r1, #MECR_OFFSET] - - /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CFG_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] - ldr r2, [r1, #MCMEM0_OFFSET] - - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CFG_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] - ldr r2, [r1, #MCMEM1_OFFSET] - - /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CFG_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] - ldr r2, [r1, #MCATT0_OFFSET] - - /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CFG_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] - ldr r2, [r1, #MCATT1_OFFSET] - - /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CFG_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] - ldr r2, [r1, #MCIO0_OFFSET] - - /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CFG_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] - ldr r2, [r1, #MCIO1_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ - ldr r2, =CFG_FLYCNFG_VAL - str r2, [r1, #FLYCNFG_OFFSET] - str r2, [r1, #FLYCNFG_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ - - /* Before accessing MDREFR we need a valid DRI field, so we set */ - /* this to power on defaults + DRI field. */ - - ldr r4, [r1, #MDREFR_OFFSET] - ldr r2, =0xFFF - bic r4, r4, r2 - - ldr r3, =CFG_MDREFR_VAL - and r3, r3, r2 - - orr r4, r4, r3 - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - - orr r4, r4, #MDREFR_K0RUN - orr r4, r4, #MDREFR_K0DB4 - orr r4, r4, #MDREFR_K0FREE - orr r4, r4, #MDREFR_K0DB2 - orr r4, r4, #MDREFR_K1DB2 - bic r4, r4, #MDREFR_K1FREE - bic r4, r4, #MDREFR_K2FREE - - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - /* Note: preserve the mdrefr value in r4 */ - - - /* ---------------------------------------------------------------- */ - /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* ---------------------------------------------------------------- */ - - /* Initialize SXCNFG register. Assert the enable bits */ - - /* Write SXMRS to cause an MRS command to all enabled banks of */ - /* synchronous static memory. Note that SXLCR need not be written */ - /* at this time. */ - - ldr r2, =CFG_SXCNFG_VAL - str r2, [r1, #SXCNFG_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ - - bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE) - - orr r4, r4, #MDREFR_K1RUN - bic r4, r4, #MDREFR_K2DB2 - str r4, [r1, #MDREFR_OFFSET] - ldr r4, [r1, #MDREFR_OFFSET] - - bic r4, r4, #MDREFR_SLFRSH - str r4, [r1, #MDREFR_OFFSET] - ldr r4, [r1, #MDREFR_OFFSET] - - orr r4, r4, #MDREFR_E1PIN - str r4, [r1, #MDREFR_OFFSET] - ldr r4, [r1, #MDREFR_OFFSET] - - nop - nop - - - /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ - /* configure but not enable each SDRAM partition pair. */ - - ldr r4, =CFG_MDCNFG_VAL - bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3) - - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] - - - /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ - /* 100..200 µsec. */ - - ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 - str r2, [r3] - ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ - /* so 0x300 should be plenty */ -1: - ldr r2, [r3] - cmp r4, r2 - bgt 1b - - - /* Step 4f: Trigger a number (usually 8) refresh cycles by */ - /* attempting non-burst read or write accesses to disabled */ - /* SDRAM, as commonly specified in the power up sequence */ - /* documented in SDRAM data sheets. The address(es) used */ - /* for this purpose must not be cacheable. */ - - ldr r3, =CFG_DRAM_BASE - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - - - /* Step 4g: Write MDCNFG with enable bits asserted */ - /* (MDCNFG:DEx set to 1). */ - - ldr r3, [r1, #MDCNFG_OFFSET] - mov r4, r3 - orr r3, r3, #MDCNFG_DE0 - str r3, [r1, #MDCNFG_OFFSET] - mov r0, r3 - - /* Step 4h: Write MDMRS. */ - - ldr r2, =CFG_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] - - /* enable APD */ - ldr r3, [r1, #MDREFR_OFFSET] - orr r3, r3, #MDREFR_APD - str r3, [r1, #MDREFR_OFFSET] - - /* We are finished with Intel's memory controller initialisation */ - -setvoltage: - - mov r10, lr - bl initPXAvoltage /* In case the board is rebooting with a */ - mov lr, r10 /* low voltage raise it up to a good one. */ - -wakeup: - /* Are we waking from sleep? */ - ldr r0, =RCSR - ldr r1, [r0] - and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR) - str r1, [r0] - teq r1, #RCSR_SMR - - bne initirqs - - ldr r0, =PSSR - mov r1, #PSSR_PH - str r1, [r0] - - /* if so, resume at PSPR */ - ldr r0, =PSPR - ldr r1, [r0] - mov pc, r1 - - /* ---------------------------------------------------------------- */ - /* Disable (mask) all interrupts at interrupt controller */ - /* ---------------------------------------------------------------- */ - -initirqs: - - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] - - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] - - /* ---------------------------------------------------------------- */ - /* Clock initialisation */ - /* ---------------------------------------------------------------- */ - -initclks: - - /* Disable the peripheral clocks, and set the core clock frequency */ - - /* Turn Off on-chip peripheral clocks (except for memory) */ - /* for re-configuration. */ - ldr r1, =CKEN - ldr r2, =CFG_CKEN - str r2, [r1] - - /* ... and write the core clock config register */ - ldr r2, =CFG_CCCR - ldr r1, =CCCR - str r2, [r1] - - /* Turn on turbo mode */ - mrc p14, 0, r2, c6, c0, 0 - orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/ - mcr p14, 0, r2, c6, c0, 0 - - /* Re-write MDREFR */ - ldr r1, =MEMC_BASE - ldr r2, [r1, #MDREFR_OFFSET] - str r2, [r1, #MDREFR_OFFSET] -#ifdef RTC - /* enable the 32Khz oscillator for RTC and PowerManager */ - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] - - /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ - /* has settled. */ -60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b -#else -#error "RTC not defined" -#endif - - /* Interrupt init: Mask all interrupts */ - ldr r0, =ICMR /* enable no sources */ - mov r1, #0 - str r1, [r0] - /* FIXME */ - -#ifdef NODEBUG - /*Disable software and data breakpoints */ - mov r0,#0 - mcr p15,0,r0,c14,c8,0 /* ibcr0 */ - mcr p15,0,r0,c14,c9,0 /* ibcr1 */ - mcr p15,0,r0,c14,c4,0 /* dbcon */ - - /*Enable all debug functionality */ - mov r0,#0x80000000 - mcr p14,0,r0,c10,c0,0 /* dcsr */ -#endif - - /* ---------------------------------------------------------------- */ - /* End lowlevel_init */ - /* ---------------------------------------------------------------- */ - -endlowlevel_init: - - mov pc, lr diff --git a/board/adsvix/pcmcia.c b/board/adsvix/pcmcia.c deleted file mode 100644 index ba5be013975..00000000000 --- a/board/adsvix/pcmcia.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * (C) Copyright 2004 - * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -void pcmcia_power_on(void) -{ -#if 0 - if (!(GPLR(20) & GPIO_bit(20))) { /* 3.3V */ - GPCR(81) = GPIO_bit(81); - GPSR(82) = GPIO_bit(82); - } - else if (!(GPLR(21) & GPIO_bit(21))) { /* 5.0V */ - GPCR(81) = GPIO_bit(81); - GPCR(82) = GPIO_bit(82); - } -#else -#warning "Board will only supply 5V, wait for next HW spin for selectable power" - /* 5.0V */ - GPCR(81) = GPIO_bit(81); - GPCR(82) = GPIO_bit(82); -#endif - - udelay(300000); - - /* reset the card */ - GPSR(52) = GPIO_bit(52); - - /* enable PCMCIA */ - GPCR(83) = GPIO_bit(83); - - /* clear reset */ - udelay(10); - GPCR(52) = GPIO_bit(52); - - udelay(20000); -} - -void pcmcia_power_off(void) -{ - /* 0V */ - GPSR(81) = GPIO_bit(81); - GPSR(82) = GPIO_bit(82); - /* disable PCMCIA */ - GPSR(83) = GPIO_bit(83); -} diff --git a/board/adsvix/pxavoltage.S b/board/adsvix/pxavoltage.S deleted file mode 100644 index 2fe1cabd7c7..00000000000 --- a/board/adsvix/pxavoltage.S +++ /dev/null @@ -1,230 +0,0 @@ -/* - * (C) Copyright 2004 - * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -#define LTC1663_ADDR 0x20 - -#define LTC1663_SY 0x01 /* Sync ACK */ -#define LTC1663_SD 0x04 /* shutdown */ -#define LTC1663_BG 0x04 /* Internal Voltage Ref */ - -#define VOLT_1_55 18 /* DAC value for 1.55V */ - - .global initPXAvoltage - -@ Set the voltage to 1.55V early in the boot process so we can run -@ at a high clock speed and boot quickly. Note that this is necessary -@ because the reset button does not reset the CPU voltage, so if the -@ voltage was low (say 0.85V) then the CPU would crash without this -@ routine - -@ This routine clobbers r0-r4 - -initializei2c: - - ldr r2, =CKEN - ldr r3, [r2] - orr r3, r3, #CKEN15_PWRI2C - str r3, [r2] - - ldr r2, =PCFR - ldr r3, [r2] - orr r3, r3, #PCFR_PI2C_EN - str r3, [r2] - - /* delay for about 250msec - */ - ldr r3, =OSCR - mov r2, #0 - str r2, [r3] - ldr r1, =0xC0000 - -1: - ldr r2, [r3] - cmp r1, r2 - bgt 1b - ldr r0, =PWRICR - ldr r1, [r0] - bic r1, r1, #(ICR_MA | ICR_START | ICR_STOP) - str r1, [r0] - - orr r1, r1, #ICR_UR - str r1, [r0] - - ldr r2, =PWRISR - ldr r3, =0x7ff - str r3, [r2] - - bic r1, r1, #ICR_UR - str r1, [r0] - - mov r1, #(ICR_GCD | ICR_SCLE) - str r1, [r0] - - orr r1, r1, #ICR_IUE - str r1, [r0] - - orr r1, r1, #ICR_FM - str r1, [r0] - - /* delay for about 1msec - */ - ldr r3, =OSCR - mov r2, #0 - str r2, [r3] - ldr r1, =0xC00 - -1: - ldr r2, [r3] - cmp r1, r2 - bgt 1b - mov pc, lr - -sendbytei2c: - ldr r3, =PWRIDBR - str r0, [r3] - ldr r3, =PWRICR - ldr r0, [r3] - orr r0, r0, r1 - bic r0, r0, r2 - str r0, [r3] - orr r0, r0, #ICR_TB - str r0, [r3] - - mov r2, #0x100000 - -waitfortxemptyi2c: - - ldr r0, =PWRISR - ldr r1, [r0] - - /* take it from the top if we don't get empty after a while */ - subs r2, r2, #1 - moveq lr, r4 - beq initPXAvoltage - - tst r1, #ISR_ITE - - beq waitfortxemptyi2c - - orr r1, r1, #ISR_ITE - str r1, [r0] - - mov pc, lr - -initPXAvoltage: - - mov r4, lr - - bl setleds - - bl initializei2c - - bl setleds - - /* now send the real message to set the correct voltage */ - ldr r0, =LTC1663_ADDR - mov r0, r0, LSL #1 - mov r1, #ICR_START - ldr r2, =(ICR_STOP | ICR_ALDIE | ICR_ACKNAK) - bl sendbytei2c - - bl setleds - - mov r0, #LTC1663_BG - mov r1, #0 - mov r2, #(ICR_STOP | ICR_START) - bl sendbytei2c - - bl setleds - - ldr r0, =VOLT_1_55 - and r0, r0, #0xff - mov r1, #0 - mov r2, #(ICR_STOP | ICR_START) - bl sendbytei2c - - bl setleds - - ldr r0, =VOLT_1_55 - mov r0, r0, ASR #8 - and r0, r0, #0xff - mov r1, #ICR_STOP - mov r2, #ICR_START - bl sendbytei2c - - bl setleds - - @ delay a little for the volatage to stablize - ldr r3, =OSCR - mov r2, #0 - str r2, [r3] - ldr r1, =0xC0 - -1: - ldr r2, [r3] - cmp r1, r2 - bgt 1b - mov pc, r4 - -setleds: - mov pc, lr - - ldr r5, =0x40e00058 - ldr r3, [r5] - bic r3, r3, #0x3 - str r3, [r5] - ldr r5, =0x40e0000c - ldr r3, [r5] - orr r3, r3, #0x00010000 - str r3, [r5] - - @ inner loop - mov r0, #0x2 -1: - - ldr r5, =0x40e00018 - mov r3, #0x00010000 - str r3, [r5] - - @ outer loop - mov r3, #0x00F00000 -2: - subs r3, r3, #1 - bne 2b - - ldr r5, =0x40e00024 - mov r3, #0x00010000 - str r3, [r5] - - @ outer loop - mov r3, #0x00F00000 -3: - subs r3, r3, #1 - bne 3b - - subs r0, r0, #1 - bne 1b - - mov pc, lr diff --git a/board/adsvix/u-boot.lds b/board/adsvix/u-boot.lds deleted file mode 100644 index 14d264a6861..00000000000 --- a/board/adsvix/u-boot.lds +++ /dev/null @@ -1,56 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - cpu/pxa/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(.rodata) } - - . = ALIGN(4); - .data : { *(.data) } - - . = ALIGN(4); - .got : { *(.got) } - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss (NOLOAD) : { *(.bss) } - _end = .; -} diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index f2c3e797996..4ead5336c65 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -81,7 +81,7 @@ phys_size_t initdram(int board_type) unmap_physmem(sdram_base, EBI_SDRAM_SIZE); if (expected_size != actual_size) - printf("Warning: Only %u of %u MiB SDRAM is working\n", + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", actual_size >> 20, expected_size >> 20); return actual_size; diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 6371e2d4e3a..d284fc1438a 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -104,7 +104,7 @@ phys_size_t initdram(int board_type) unmap_physmem(sdram_base, EBI_SDRAM_SIZE); if (expected_size != actual_size) - printf("Warning: Only %u of %u MiB SDRAM is working\n", + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", actual_size >> 20, expected_size >> 20); return actual_size; diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c index 12537f3142e..e2bfd4aff27 100644 --- a/board/atmel/atstk1000/flash.c +++ b/board/atmel/atstk1000/flash.c @@ -70,7 +70,7 @@ unsigned long flash_init(void) void flash_print_info(flash_info_t *info) { - printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n", + printf("Flash: Vendor ID: 0x%02lx, Product ID: 0x%02lx\n", info->flash_id >> 16, info->flash_id & 0xffff); printf("Size: %ld MB in %d sectors\n", info->size >> 10, info->sector_count); diff --git a/board/esd/common/flash.c b/board/esd/common/flash.c index dca10be1b5a..bda361ead94 100644 --- a/board/esd/common/flash.c +++ b/board/esd/common/flash.c @@ -22,7 +22,9 @@ */ #include +#ifdef __PPC__ #include +#endif #include flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ diff --git a/board/freescale/m5275evb/Makefile b/board/freescale/m5275evb/Makefile index f337a7563c5..74c25286982 100644 --- a/board/freescale/m5275evb/Makefile +++ b/board/freescale/m5275evb/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -OBJS = $(BOARD).o mii.o +COBJS = $(BOARD).o mii.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/freescale/mpc8540ads/u-boot.lds b/board/freescale/mpc8540ads/u-boot.lds index f200810f069..0e4f5a24587 100644 --- a/board/freescale/mpc8540ads/u-boot.lds +++ b/board/freescale/mpc8540ads/u-boot.lds @@ -2,6 +2,8 @@ * (C) Copyright 2002,2003, Motorola,Inc. * Xianghua Xiao, X.Xiao@motorola.com. * + * Copyright 2008 Freescale Semiconductor, Inc. + * * See file CREDITS for list of people who contributed to this * project. * @@ -26,16 +28,6 @@ OUTPUT_ARCH(powerpc) __DYNAMIC = 0; */ SECTIONS { - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -62,17 +54,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - cpu/mpc85xx/speed.o (.text) - cpu/mpc85xx/pci.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) *(.text) *(.fixup) *(.got1) @@ -134,6 +115,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -142,6 +135,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc8541cds/u-boot.lds b/board/freescale/mpc8541cds/u-boot.lds index 5f4dcf021dd..1c583de83f2 100644 --- a/board/freescale/mpc8541cds/u-boot.lds +++ b/board/freescale/mpc8541cds/u-boot.lds @@ -1,5 +1,5 @@ /* - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2008 Freescale Semiconductor. * * See file CREDITS for list of people who contributed to this * project. @@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc) __DYNAMIC = 0; */ SECTIONS { - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -61,18 +51,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - drivers/net/tsec.o (.text) - cpu/mpc85xx/speed.o (.text) - cpu/mpc85xx/pci.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) *(.text) *(.fixup) *(.got1) @@ -134,6 +112,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -142,6 +132,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc8544ds/u-boot.lds b/board/freescale/mpc8544ds/u-boot.lds index c66c69fcbe4..500e6475aaf 100644 --- a/board/freescale/mpc8544ds/u-boot.lds +++ b/board/freescale/mpc8544ds/u-boot.lds @@ -1,5 +1,5 @@ /* - * Copyright 2007 Freescale Semiconductor, Inc. + * Copyright 2007-2008 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc) __DYNAMIC = 0; */ SECTIONS { - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -61,17 +51,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - cpu/mpc85xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - drivers/bios_emulator/atibios.o (.text) *(.text) *(.fixup) *(.got1) @@ -133,6 +112,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -141,6 +132,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc8548cds/u-boot.lds b/board/freescale/mpc8548cds/u-boot.lds index eba7e8a9d31..6b9339511aa 100644 --- a/board/freescale/mpc8548cds/u-boot.lds +++ b/board/freescale/mpc8548cds/u-boot.lds @@ -1,5 +1,5 @@ /* - * Copyright 2004, 2007 Freescale Semiconductor. + * Copyright 2004, 2007-2008 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc) __DYNAMIC = 0; */ SECTIONS { - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -61,17 +51,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - drivers/net/tsec.o (.text) - cpu/mpc85xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) *(.text) *(.fixup) *(.got1) @@ -133,6 +112,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -141,6 +132,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc8555cds/u-boot.lds b/board/freescale/mpc8555cds/u-boot.lds index 5f4dcf021dd..a18b3a7b500 100644 --- a/board/freescale/mpc8555cds/u-boot.lds +++ b/board/freescale/mpc8555cds/u-boot.lds @@ -1,5 +1,5 @@ /* - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2008 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc) __DYNAMIC = 0; */ SECTIONS { - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -61,18 +51,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - drivers/net/tsec.o (.text) - cpu/mpc85xx/speed.o (.text) - cpu/mpc85xx/pci.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) *(.text) *(.fixup) *(.got1) @@ -134,6 +112,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -142,6 +132,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc8560ads/u-boot.lds b/board/freescale/mpc8560ads/u-boot.lds index cb30ea9a291..0e4f5a24587 100644 --- a/board/freescale/mpc8560ads/u-boot.lds +++ b/board/freescale/mpc8560ads/u-boot.lds @@ -1,7 +1,9 @@ /* - * (C) Copyright 2002,2003,Motorola,Inc. + * (C) Copyright 2002,2003, Motorola,Inc. * Xianghua Xiao, X.Xiao@motorola.com. * + * Copyright 2008 Freescale Semiconductor, Inc. + * * See file CREDITS for list of people who contributed to this * project. * @@ -26,16 +28,6 @@ OUTPUT_ARCH(powerpc) __DYNAMIC = 0; */ SECTIONS { - .resetvec 0xFFFFFFFC : - { - *(.resetvec) - } = 0xffff - - .bootpg 0xFFFFF000 : - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -62,20 +54,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/commproc.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/serial_scc.o (.text) - cpu/mpc85xx/ether_fcc.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - cpu/mpc85xx/speed.o (.text) - cpu/mpc85xx/spd_sdram.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) *(.text) *(.fixup) *(.got1) @@ -137,6 +115,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -145,6 +135,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/freescale/mpc8568mds/u-boot.lds b/board/freescale/mpc8568mds/u-boot.lds index 1b83834c868..9d245e4ec60 100644 --- a/board/freescale/mpc8568mds/u-boot.lds +++ b/board/freescale/mpc8568mds/u-boot.lds @@ -1,5 +1,5 @@ /* - * Copyright 2004-2007 Freescale Semiconductor. + * Copyright 2004-2008 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -23,21 +23,8 @@ OUTPUT_ARCH(powerpc) /* Do we need any of these for elf? __DYNAMIC = 0; */ - SECTIONS { - /* ELIOR - From RAM: From FLASH: 0xFFFFFFFC*/ - .resetvec 0xFFFFFFFC: - { - *(.resetvec) - } = 0xffff - - /*(ELIOR - From RAM: From FLASH: 0xFFFFF000*/ - .bootpg 0xFFFFF000: - { - cpu/mpc85xx/start.o (.bootpg) - } = 0xffff - /* Read-only sections, merged into text segment: */ . = + SIZEOF_HEADERS; .interp : { *(.interp) } @@ -64,17 +51,6 @@ SECTIONS .plt : { *(.plt) } .text : { - cpu/mpc85xx/start.o (.text) - cpu/mpc85xx/traps.o (.text) - cpu/mpc85xx/interrupts.o (.text) - cpu/mpc85xx/cpu_init.o (.text) - cpu/mpc85xx/cpu.o (.text) - cpu/mpc85xx/speed.o (.text) - cpu/mpc85xx/pci.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) *(.text) *(.fixup) *(.got1) @@ -136,6 +112,18 @@ SECTIONS . = ALIGN(256); __init_end = .; + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } = 0xffff + + . = ADDR(.text) + 0x80000; + __bss_start = .; .bss (NOLOAD) : { @@ -144,6 +132,8 @@ SECTIONS *(.bss) *(COMMON) } + + . = ALIGN(4); _end = . ; PROVIDE (end = .); } diff --git a/board/idmr/mii.c b/board/idmr/mii.c index f130e6e5368..78a7028bcfa 100644 --- a/board/idmr/mii.c +++ b/board/idmr/mii.c @@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev) } #endif /* CFG_DISCOVER_PHY */ -int mii_init(void) __attribute__((weak,alias("__mii_init"))); +void mii_init(void) __attribute__((weak,alias("__mii_init"))); void __mii_init(void) { diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 44fc79cd58d..065014a11e4 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -321,7 +321,7 @@ nand_init (void) printf ("%4lu MB\n", totlen >>20); } -#endif /* CFG_CMD_NAND */ +#endif /* CONFIG_CMD_NAND */ #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) /* diff --git a/board/matrix_vision/mvbc_p/mvbc_p.c b/board/matrix_vision/mvbc_p/mvbc_p.c index b61e84e3873..5c71dec8221 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.c +++ b/board/matrix_vision/mvbc_p/mvbc_p.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -109,7 +110,7 @@ void mvbc_init_gpio(void) struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO; printf("Ports : 0x%08x\n", gpio->port_config); - printf("PORCFG: 0x%08x\n", *(vu_long*)MPC5XXX_CDM_PORCFG); + printf("PORCFG: 0x%08lx\n", *(vu_long*)MPC5XXX_CDM_PORCFG); out_be32(&gpio->simple_ddr, SIMPLE_DDR); out_be32(&gpio->simple_dvo, SIMPLE_DVO); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index f1c2e58edd0..ae3c2456fbc 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -464,7 +464,8 @@ void local_bus_init (void) if (lbc_mhz < 66) { lbc->lcrr = CFG_LBC_LCRR | LCRR_DBYP; /* DLL Bypass */ - lbc->ltedr = 0xa4c80000; /* DK: !!! */ + lbc->ltedr = LTEDR_BMD | LTEDR_PARD | LTEDR_WPD | LTEDR_WARA | + LTEDR_RAWA | LTEDR_CSD; /* Disable all error checking */ } else if (lbc_mhz >= 133) { lbc->lcrr = CFG_LBC_LCRR & (~LCRR_DBYP); /* DLL Enabled */ diff --git a/board/w7o/post2.c b/board/w7o/post2.c index e590128244e..6ee33eba36e 100644 --- a/board/w7o/post2.c +++ b/board/w7o/post2.c @@ -29,6 +29,12 @@ #include "errors.h" #include "dtt.h" +/* for LM75 DTT POST test */ +#define DTT_READ_TEMP 0x0 +#define DTT_CONFIG 0x1 +#define DTT_TEMP_HYST 0x2 +#define DTT_TEMP_SET 0x3 + #if defined(CONFIG_RTC_M48T35A) void rtctest(void) { diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index caa467d0268..24ff9b9956e 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -205,7 +205,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) puts ("\nip_addr = "); print_IPaddr (bd->bi_ip_addr); #endif - printf ("\nbaudrate = %d bps\n", (ulong)bd->bi_baudrate); + printf ("\nbaudrate = %ld bps\n", (ulong)bd->bi_baudrate); return 0; } diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 1c0a4161d0e..18d71008dad 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -36,7 +36,7 @@ #include #include -#if (CONFIG_COMMANDS & CFG_CMD_USB) +#if defined(CONFIG_CMD_USB) #include #endif @@ -217,7 +217,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ iflag = disable_interrupts(); -#if (CONFIG_COMMANDS & CFG_CMD_USB) +#if defined(CONFIG_CMD_USB) /* * turn off USB to prevent the host controller from writing to the * SDRAM while Linux is booting. This could happen (at least for OHCI @@ -251,10 +251,9 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) memmove_wd ((void *)load_start, (void *)os_data, os_len, CHUNKSZ); - - load_end = load_start + os_len; - puts("OK\n"); } + load_end = load_start + os_len; + puts("OK\n"); break; case IH_COMP_GZIP: printf (" Uncompressing %s ... ", type_name); diff --git a/common/cmd_flash.c b/common/cmd_flash.c index a7f66ddbfad..18d2250f30b 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -342,7 +342,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) puts ("Bad sector specification\n"); return 1; } - printf ("Erase Flash Sectors %d-%d in Bank # %d ", + printf ("Erase Flash Sectors %d-%d in Bank # %zu ", sect_first, sect_last, (info-flash_info)+1); rcode = flash_erase(info, sect_first, sect_last); return rcode; @@ -534,7 +534,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) puts ("Bad sector specification\n"); return 1; } - printf("%sProtect Flash Sectors %d-%d in Bank # %d\n", + printf("%sProtect Flash Sectors %d-%d in Bank # %zu\n", p ? "" : "Un-", sect_first, sect_last, (info-flash_info)+1); for (i = sect_first; i <= sect_last; i++) { diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 97a873d1c96..d6ba79f7040 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -161,8 +161,6 @@ static uchar ide_wait (int dev, ulong t); #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */ -void inline ide_outb(int dev, int port, unsigned char val); -unsigned char inline ide_inb(int dev, int port); static void input_data(int dev, ulong *sect_buf, int words); static void output_data(int dev, ulong *sect_buf, int words); static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len); @@ -298,7 +296,7 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ulong addr = simple_strtoul(argv[2], NULL, 16); ulong cnt = simple_strtoul(argv[4], NULL, 16); ulong n; -#ifdef CFG_64BIT_STRTOUL +#ifdef CFG_64BIT_LBA lbaint_t blk = simple_strtoull(argv[3], NULL, 16); printf ("\nIDE read: device %d block # %qd, count %ld ... ", @@ -327,7 +325,7 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ulong addr = simple_strtoul(argv[2], NULL, 16); ulong cnt = simple_strtoul(argv[4], NULL, 16); ulong n; -#ifdef CFG_64BIT_STRTOUL +#ifdef CFG_64BIT_LBA lbaint_t blk = simple_strtoull(argv[3], NULL, 16); printf ("\nIDE write: device %d block # %qd, count %ld ... ", @@ -523,6 +521,28 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* ------------------------------------------------------------------------- */ +void inline +__ide_outb(int dev, int port, unsigned char val) +{ + debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", + dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); + outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); +} +void inline ide_outb (int dev, int port, unsigned char val) + __attribute__((weak, alias("__ide_outb"))); + +unsigned char inline +__ide_inb(int dev, int port) +{ + uchar val; + val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); + debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", + dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val); + return val; +} +unsigned char inline ide_inb(int dev, int port) + __attribute__((weak, alias("__ide_inb"))); + void ide_init (void) { @@ -817,28 +837,6 @@ set_pcmcia_timing (int pmode) /* ------------------------------------------------------------------------- */ -void inline -__ide_outb(int dev, int port, unsigned char val) -{ - debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n", - dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); - outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); -} -void inline ide_outb (int dev, int port, unsigned char val) - __attribute__((weak, alias("__ide_outb"))); - -unsigned char inline -__ide_inb(int dev, int port) -{ - uchar val; - val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))); - debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n", - dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val); - return val; -} -unsigned char inline ide_inb(int dev, int port) - __attribute__((weak, alias("__ide_inb"))); - #ifdef __PPC__ # ifdef CONFIG_AMIGAONEG3SE static void diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 5982b76e6e9..c2442eed136 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -183,7 +183,7 @@ int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } - printf ("%01x: 0x%08lx - %s %s read\n", fslnum, num, + printf ("%01x: 0x%08x - %s %s read\n", fslnum, num, blocking < 2 ? "non blocking" : "blocking", ((blocking == 1) || (blocking == 3)) ? "control" : "data" ); return 0; @@ -341,7 +341,7 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) return 1; } - printf ("%01x: 0x%08lx - %s %s write\n", fslnum, num, + printf ("%01x: 0x%08x - %s %s write\n", fslnum, num, blocking < 2 ? "non blocking" : "blocking", ((blocking == 1) || (blocking == 3)) ? "control" : "data" ); return 0; @@ -382,7 +382,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("Unsupported register\n"); return 1; } - printf (": 0x%08lx\n", val); + printf (": 0x%08x\n", val); return 0; } diff --git a/common/dlmalloc.c b/common/dlmalloc.c index c51351e9618..4a185620f98 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -1457,7 +1457,7 @@ typedef struct malloc_chunk* mbinptr; indexing, maintain locality, and avoid some initialization tests. */ -#define top (bin_at(0)->fd) /* The topmost chunk */ +#define top (av_[2]) /* The topmost chunk */ #define last_remainder (bin_at(1)) /* remainder from last split */ @@ -1552,13 +1552,14 @@ void malloc_bin_reloc (void) #define BINBLOCKWIDTH 4 /* bins per block */ -#define binblocks (bin_at(0)->size) /* bitvector of nonempty blocks */ +#define binblocks_r ((INTERNAL_SIZE_T)av_[1]) /* bitvector of nonempty blocks */ +#define binblocks_w (av_[1]) /* bin<->block macros */ #define idx2binblock(ix) ((unsigned)1 << (ix / BINBLOCKWIDTH)) -#define mark_binblock(ii) (binblocks |= idx2binblock(ii)) -#define clear_binblock(ii) (binblocks &= ~(idx2binblock(ii))) +#define mark_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r | idx2binblock(ii))) +#define clear_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r & ~(idx2binblock(ii)))) @@ -2250,17 +2251,17 @@ Void_t* mALLOc(bytes) size_t bytes; search for best fitting chunk by scanning bins in blockwidth units. */ - if ( (block = idx2binblock(idx)) <= binblocks) + if ( (block = idx2binblock(idx)) <= binblocks_r) { /* Get to the first marked block */ - if ( (block & binblocks) == 0) + if ( (block & binblocks_r) == 0) { /* force to an even block boundary */ idx = (idx & ~(BINBLOCKWIDTH - 1)) + BINBLOCKWIDTH; block <<= 1; - while ((block & binblocks) == 0) + while ((block & binblocks_r) == 0) { idx += BINBLOCKWIDTH; block <<= 1; @@ -2315,7 +2316,7 @@ Void_t* mALLOc(bytes) size_t bytes; { if ((startidx & (BINBLOCKWIDTH - 1)) == 0) { - binblocks &= ~block; + av_[1] = (mbinptr)(binblocks_r & ~block); break; } --startidx; @@ -2324,9 +2325,9 @@ Void_t* mALLOc(bytes) size_t bytes; /* Get to the next possibly nonempty block */ - if ( (block <<= 1) <= binblocks && (block != 0) ) + if ( (block <<= 1) <= binblocks_r && (block != 0) ) { - while ((block & binblocks) == 0) + while ((block & binblocks_r) == 0) { idx += BINBLOCKWIDTH; block <<= 1; diff --git a/common/lcd.c b/common/lcd.c index eec1f53b0a7..e3347ec93c6 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -678,6 +678,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) /* Set color map */ for (i=0; icolor_table[i]; +#if !defined(CONFIG_ATMEL_LCD) ushort colreg = ( ((cte.red) << 8) & 0xf800) | ( ((cte.green) << 3) & 0x07e0) | @@ -691,6 +692,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) cmap++; #elif defined(CONFIG_MPC823) cmap--; +#endif +#else /* CONFIG_ATMEL_LCD */ + lcd_setcolreg(i, cte.red, cte.green, cte.blue); #endif } } @@ -727,7 +731,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) for (i = 0; i < height; ++i) { WATCHDOG_RESET(); for (j = 0; j < width ; j++) -#if defined(CONFIG_PXA250) +#if defined(CONFIG_PXA250) || defined(CONFIG_ATMEL_LCD) *(fb++) = *(bmap++); #elif defined(CONFIG_MPC823) || defined(CONFIG_MCC200) *(fb++)=255-*(bmap++); @@ -740,6 +744,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) } #endif +#ifdef CONFIG_VIDEO_BMP_GZIP +extern bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp); +#endif static void *lcd_logo (void) { @@ -761,6 +768,16 @@ static void *lcd_logo (void) addr = simple_strtoul(s, NULL, 16); do_splash = 0; +#ifdef CONFIG_VIDEO_BMP_GZIP + bmp_image_t *bmp = (bmp_image_t *)addr; + unsigned long len; + + if (!((bmp->header.signature[0]=='B') && + (bmp->header.signature[1]=='M'))) { + addr = (ulong)gunzip_bmp(addr, &len); + } +#endif + if (lcd_display_bitmap (addr, 0, 0) == 0) { return ((void *)lcd_base); } diff --git a/common/main.c b/common/main.c index 79ad2912a75..187ef8a3a5a 100644 --- a/common/main.c +++ b/common/main.c @@ -116,7 +116,7 @@ static __inline__ int abortboot(int bootdelay) u_int i; # ifdef CONFIG_AUTOBOOT_PROMPT - printf(CONFIG_AUTOBOOT_PROMPT, bootdelay); + printf(CONFIG_AUTOBOOT_PROMPT); # endif # ifdef CONFIG_AUTOBOOT_DELAY_STR @@ -212,7 +212,7 @@ static __inline__ int abortboot(int bootdelay) int abort = 0; #ifdef CONFIG_MENUPROMPT - printf(CONFIG_MENUPROMPT, bootdelay); + printf(CONFIG_MENUPROMPT); #else printf("Hit any key to stop autoboot: %2d ", bootdelay); #endif diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c index 3f04b299838..26e88cb519b 100644 --- a/cpu/microblaze/interrupts.c +++ b/cpu/microblaze/interrupts.c @@ -203,7 +203,7 @@ int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) for (i = 0; i < CFG_INTC_0_NUM; i++) { if (act->handler != (interrupt_handler_t*) def_hdlr) { - printf ("%02d %08lx %08lx %d\n", i, + printf ("%02d %08x %08x %d\n", i, (int)act->handler, (int)act->arg, act->count); } act++; diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c index 63097940acc..e8baab5b1f5 100644 --- a/cpu/mips/au1x00_serial.c +++ b/cpu/mips/au1x00_serial.c @@ -76,7 +76,7 @@ void serial_setbrg (void) sd = (*sys_powerctrl & 0x03) + 2; /* calulate 2x baudrate and round */ - divisorx2 = ((CFG_HZ/(sd * 16 * CONFIG_BAUDRATE))); + divisorx2 = ((CFG_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE))); if (divisorx2 & 0x01) divisorx2 = divisorx2 + 1; diff --git a/cpu/mpc8260/speed.c b/cpu/mpc8260/speed.c index 38cd0d9a70f..8d280fbb7b0 100644 --- a/cpu/mpc8260/speed.c +++ b/cpu/mpc8260/speed.c @@ -162,6 +162,30 @@ int get_clocks (void) gd->cpu_clk = clkin; } +#ifdef CONFIG_PCI + gd->pci_clk = clkin; + + if (sccr & SCCR_PCI_MODE) { + uint pci_div; + uint pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; + + if (sccr & SCCR_PCI_MODCK) { + pci_div = 2; + if (pcidf == 9) { + pci_div *= 5; + } else if (pcidf == 0xB) { + pci_div *= 6; + } else { + pci_div *= (pcidf + 1); + } + } else { + pci_div = pcidf + 1; + } + + gd->pci_clk = (gd->cpm_clk * 2) / pci_div; + } +#endif + return (0); } @@ -220,26 +244,9 @@ int prt_8260_clks (void) printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n", gd->cpu_clk, gd->cpm_clk, gd->bus_clk); - - if (sccr & SCCR_PCI_MODE) { - uint pci_div; - uint pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT; - - if (sccr & SCCR_PCI_MODCK) { - pci_div = 2; - if (pcidf == 9) { - pci_div *= 5; - } else if (pcidf == 0xB) { - pci_div *= 6; - } else { - pci_div *= (pcidf + 1); - } - } else { - pci_div = pcidf + 1; - } - - printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div); - } +#ifdef CONFIG_PCI + printf (" - pci_clk %10ld\n", gd->pci_clk); +#endif putc ('\n'); return (0); diff --git a/cpu/nios2/interrupts.c b/cpu/nios2/interrupts.c index aeb5b65b330..ec5db31b0ff 100644 --- a/cpu/nios2/interrupts.c +++ b/cpu/nios2/interrupts.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include diff --git a/cpu/nios2/sysid.c b/cpu/nios2/sysid.c index b5a29593ea6..697ed03a2cb 100644 --- a/cpu/nios2/sysid.c +++ b/cpu/nios2/sysid.c @@ -40,7 +40,7 @@ void display_sysid (void) stamp = readl (&sysid->timestamp); localtime_r (&stamp, &t); asctime_r (&t, asc); - printf ("SYSID : %08x, %s", readl (&sysid->id), asc); + printf ("SYSID : %08lx, %s", readl (&sysid->id), asc); } diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index ec1765e171c..1c3632428ca 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -1159,50 +1159,50 @@ static void program_codt(unsigned long *dimm_populated, if (dimm_type == SDRAM_DDR2) { codt |= SDRAM_CODT_DQS_1_8_V_DDR2; if ((total_dimm == 1) && (firstSlot == TRUE)) { - if (total_rank == 1) { + if (total_rank == 1) { /* PUUU */ codt |= CALC_ODT_R(0); modt0 = CALC_ODT_W(0); modt1 = 0x00000000; modt2 = 0x00000000; modt3 = 0x00000000; } - if (total_rank == 2) { + if (total_rank == 2) { /* PPUU */ codt |= CALC_ODT_R(0) | CALC_ODT_R(1); - modt0 = CALC_ODT_W(0); - modt1 = CALC_ODT_W(0); + modt0 = CALC_ODT_W(0) | CALC_ODT_W(1); + modt1 = 0x00000000; modt2 = 0x00000000; modt3 = 0x00000000; } } else if ((total_dimm == 1) && (firstSlot != TRUE)) { - if (total_rank == 1) { + if (total_rank == 1) { /* UUPU */ codt |= CALC_ODT_R(2); modt0 = 0x00000000; modt1 = 0x00000000; modt2 = CALC_ODT_W(2); modt3 = 0x00000000; } - if (total_rank == 2) { + if (total_rank == 2) { /* UUPP */ codt |= CALC_ODT_R(2) | CALC_ODT_R(3); modt0 = 0x00000000; modt1 = 0x00000000; - modt2 = CALC_ODT_W(2); - modt3 = CALC_ODT_W(2); + modt2 = CALC_ODT_W(2) | CALC_ODT_W(3); + modt3 = 0x00000000; } } if (total_dimm == 2) { - if (total_rank == 2) { + if (total_rank == 2) { /* PUPU */ codt |= CALC_ODT_R(0) | CALC_ODT_R(2); modt0 = CALC_ODT_RW(2); modt1 = 0x00000000; modt2 = CALC_ODT_RW(0); modt3 = 0x00000000; } - if (total_rank == 4) { + if (total_rank == 4) { /* PPPP */ codt |= CALC_ODT_R(0) | CALC_ODT_R(1) | CALC_ODT_R(2) | CALC_ODT_R(3); - modt0 = CALC_ODT_RW(2); + modt0 = CALC_ODT_RW(2) | CALC_ODT_RW(3); modt1 = 0x00000000; - modt2 = CALC_ODT_RW(0); + modt2 = CALC_ODT_RW(0) | CALC_ODT_RW(1); modt3 = 0x00000000; } } diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 2c86a01a032..121dcbe1329 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -559,11 +559,6 @@ mmc_init(int verbose) set_GPIO_mode(GPIO8_MMCCS0_MD); #endif CKEN |= CKEN12_MMC; /* enable MMC unit clock */ -#if defined(CONFIG_ADSVIX) - /* turn on the power */ - GPCR(114) = GPIO_bit(114); - udelay(1000); -#endif MMC_CLKRT = MMC_CLKRT_0_3125MHZ; MMC_RESTO = MMC_RES_TO_MAX; diff --git a/doc/README.autoboot b/doc/README.autoboot index e4c41867351..2042fe5c406 100644 --- a/doc/README.autoboot +++ b/doc/README.autoboot @@ -114,10 +114,17 @@ What they do CONFIG_AUTOBOOT_PROMPT is displayed before the boot delay selected by CONFIG_BOOTDELAY starts. If it is not defined there is no output indicating that autoboot is in progress. - If "%d" is included, it is replaced by the number of seconds - remaining before autoboot will start, but it does not count - down the seconds. "autoboot in %d seconds\n" is a reasonable - prompt. + + Note that CONFIG_AUTOBOOT_PROMPT is used as the (only) + argument to a printf() call, so it may contain '%' format + specifications, provided that it also includes, sepearated by + commas exactly like in a printf statement, the required + arguments. It is the responsibility of the user to select only + such arguments that are valid in the given context. A + reasonable prompt could be defined as + + #define CONFIG_AUTOBOOT_PROMPT \ + "autoboot in %d seconds\n",bootdelay If CONFIG_AUTOBOOT_DELAY_STR or "bootdelaykey" is specified and this string is received from console input before diff --git a/doc/README.qemu_mips b/doc/README.qemu_mips index 476c5e68992..c9ac3f307de 100644 --- a/doc/README.qemu_mips +++ b/doc/README.qemu_mips @@ -15,4 +15,4 @@ create image: # dd of=flash bs=1k count=4k if=/dev/zero # dd of=flash bs=1k conv=notrunc if=u-boot.bin start it: -# qemu-system-mips -pflash flash -monitor null -nographic +# qemu-system-mips -M mips -pflash flash -monitor null -nographic diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 9f2c1eced4d..3f78e2f5c84 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -143,12 +143,15 @@ void i2c_init(int speed, int slaveadd) { struct fsl_i2c *dev; + unsigned int temp; dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ - i2c_bus_speed[0] = set_i2c_bus_speed(dev, gd->i2c1_clk, speed); + temp = set_i2c_bus_speed(dev, gd->i2c1_clk, speed); + if (gd->flags & GD_FLG_RELOC) + i2c_bus_speed[0] = temp; writeb(slaveadd << 1, &dev->adr); /* write slave address */ writeb(0x0, &dev->sr); /* clear status register */ writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ @@ -158,7 +161,9 @@ i2c_init(int speed, int slaveadd) writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ - i2c_bus_speed[1] = set_i2c_bus_speed(dev, gd->i2c2_clk, speed); + temp = set_i2c_bus_speed(dev, gd->i2c2_clk, speed); + if (gd->flags & GD_FLG_RELOC) + i2c_bus_speed[1] = temp; writeb(slaveadd << 1, &dev->adr); /* write slave address */ writeb(0x0, &dev->sr); /* clear status register */ writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ @@ -168,12 +173,11 @@ i2c_init(int speed, int slaveadd) static __inline__ int i2c_wait4bus(void) { - ulong timeval = get_timer(0); + unsigned long long timeval = get_ticks(); while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) { - if (get_timer(timeval) > I2C_TIMEOUT) { + if ((get_ticks() - timeval) > usec2ticks(I2C_TIMEOUT)) return -1; - } } return 0; @@ -183,7 +187,7 @@ static __inline__ int i2c_wait(int write) { u32 csr; - ulong timeval = get_timer(0); + unsigned long long timeval = get_ticks(); do { csr = readb(&i2c_dev[i2c_bus_num]->sr); @@ -208,7 +212,7 @@ i2c_wait(int write) } return 0; - } while (get_timer (timeval) < I2C_TIMEOUT); + } while ((get_ticks() - timeval) < usec2ticks(I2C_TIMEOUT)); debug("i2c_wait: timed out\n"); return -1; diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c index 61aa1849c24..a151488d125 100644 --- a/drivers/mmc/atmel_mci.c +++ b/drivers/mmc/atmel_mci.c @@ -135,10 +135,10 @@ mmc_cmd(unsigned long cmd, unsigned long arg, status = mmci_readl(SR); } while (!(status & MMCI_BIT(CMDRDY))); - pr_debug("mmc: status 0x%08lx\n", status); + pr_debug("mmc: status 0x%08x\n", status); if (status & error_flags) { - printf("mmc: command %lu failed (status: 0x%08lx)\n", + printf("mmc: command %lu failed (status: 0x%08x)\n", cmd, status); return -EIO; } @@ -245,7 +245,7 @@ out: read_error: mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, R1 | NCR); - printf("mmc: bread failed, status = %08x, card status = %08x\n", + printf("mmc: bread failed, status = %08x, card status = %08lx\n", status, card_status); goto out; } @@ -284,13 +284,13 @@ static void sd_parse_cid(struct mmc_cid *cid, unsigned long *resp) static void mmc_dump_cid(const struct mmc_cid *cid) { - printf("Manufacturer ID: %02lX\n", cid->mid); - printf("OEM/Application ID: %04lX\n", cid->oid); + printf("Manufacturer ID: %02X\n", cid->mid); + printf("OEM/Application ID: %04X\n", cid->oid); printf("Product name: %s\n", cid->pnm); - printf("Product Revision: %lu.%lu\n", + printf("Product Revision: %u.%u\n", cid->prv >> 4, cid->prv & 0x0f); printf("Product Serial Number: %lu\n", cid->psn); - printf("Manufacturing Date: %02lu/%02lu\n", + printf("Manufacturing Date: %02u/%02u\n", cid->mdt >> 4, cid->mdt & 0x0f); } @@ -501,7 +501,7 @@ int mmc_init(int verbose) mmc_blkdev.part_type = PART_TYPE_DOS; mmc_blkdev.block_read = mmc_bread; sprintf((char *)mmc_blkdev.vendor, - "Man %02x%04x Snr %08x", + "Man %02x%04x Snr %08lx", cid.mid, cid.oid, cid.psn); strncpy((char *)mmc_blkdev.product, cid.pnm, sizeof(mmc_blkdev.product)); diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 4340b1b5c7b..12647ef9861 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -306,6 +306,9 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) int i; int cword_offset; int cp_offset; +#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) + u32 cmd_le = cpu_to_le32(cmd); +#endif uchar val; uchar *cp = (uchar *) cmdbuf; @@ -313,7 +316,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) cword_offset = (info->portwidth-i)%info->chipwidth; #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) cp_offset = info->portwidth - i; - val = *((uchar*)&cmd + cword_offset); + val = *((uchar*)&cmd_le + cword_offset); #else cp_offset = i - 1; val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c index fb7a4a939b0..10fcf0cdde8 100644 --- a/drivers/mtd/spi/atmel.c +++ b/drivers/mtd/spi/atmel.c @@ -205,7 +205,7 @@ static int dataflash_write_at45(struct spi_flash *flash, byte_addr = 0; } - debug("SF: AT45: Successfully programmed %u bytes @ 0x%x\n", + debug("SF: AT45: Successfully programmed %zu bytes @ 0x%x\n", len, offset); ret = 0; @@ -268,7 +268,7 @@ int dataflash_erase_at45(struct spi_flash *flash, u32 offset, size_t len) page_addr++; } - debug("SF: AT45: Successfully erased %u bytes @ 0x%x\n", + debug("SF: AT45: Successfully erased %zu bytes @ 0x%x\n", len, offset); ret = 0; @@ -351,7 +351,7 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode) * params->blocks_per_sector * params->nr_sectors; - debug("SF: Detected %s with page size %u, total %u bytes\n", + debug("SF: Detected %s with page size %lu, total %u bytes\n", params->name, page_size, asf->flash.size); return &asf->flash; diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 060b5189968..c8b4e98c669 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -513,9 +513,11 @@ e1000_read_mac_addr(struct eth_device *nic) nic->enetaddr[5] += 1; } #ifdef CONFIG_E1000_FALLBACK_MAC - if ( *(u32*)(nic->enetaddr) == 0 || *(u32*)(nic->enetaddr) == ~0 ) - for ( i=0; i < NODE_ADDRESS_SIZE; i++ ) - nic->enetaddr[i] = (CONFIG_E1000_FALLBACK_MAC >> (8*(5-i))) & 0xff; + if ( *(u32*)(nic->enetaddr) == 0 || *(u32*)(nic->enetaddr) == ~0 ) { + unsigned char fb_mac[NODE_ADDRESS_SIZE] = CONFIG_E1000_FALLBACK_MAC; + + memcpy (nic->enetaddr, fb_mac, NODE_ADDRESS_SIZE); + } #endif #else /* @@ -531,10 +533,9 @@ e1000_read_mac_addr(struct eth_device *nic) DEBUGFUNC(); s = getenv ("ethaddr"); - if (s == NULL){ + if (s == NULL) { return -E1000_ERR_EEPROM; - } - else{ + } else { for(ii = 0; ii < 6; ii++) { nic->enetaddr[ii] = s ? simple_strtoul (s, &e, 16) : 0; if (s){ diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index c9e797e8c0c..de6fbab740c 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -25,18 +25,18 @@ include $(TOPDIR)/config.mk LIB := $(obj)libserial.a -COBJS-y += atmel_usart.o -COBJS-y += mcfuart.o +COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o +COBJS-$(CONFIG_MCFUART) += mcfuart.o COBJS-y += ns9750_serial.o COBJS-y += ns16550.o -COBJS-y += s3c4510b_uart.o +COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-y += serial.o -COBJS-y += serial_max3100.o +COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-y += serial_pl010.o COBJS-y += serial_pl011.o -COBJS-y += serial_xuartlite.o +COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-y += serial_sh.o -COBJS-y += usbtty.o +COBJS-$(CONFIG_USB_TTY) += usbtty.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index f35b99730f7..f3b146c22d7 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -17,7 +17,6 @@ */ #include -#ifdef CONFIG_ATMEL_USART #include #include #include @@ -96,5 +95,3 @@ int serial_tstc(void) { return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0; } - -#endif /* CONFIG_ATMEL_USART */ diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c index 5eb4f458f81..a1fcd057a46 100644 --- a/drivers/serial/mcfuart.c +++ b/drivers/serial/mcfuart.c @@ -29,8 +29,6 @@ #include -#ifdef CONFIG_MCFUART - #include #include @@ -130,4 +128,3 @@ void serial_setbrg(void) uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED; } -#endif /* CONFIG_MCFUART */ diff --git a/drivers/serial/s3c4510b_uart.c b/drivers/serial/s3c4510b_uart.c index ddcd591f84a..aa378e1ac1e 100644 --- a/drivers/serial/s3c4510b_uart.c +++ b/drivers/serial/s3c4510b_uart.c @@ -45,8 +45,6 @@ #include -#ifdef CONFIG_DRIVER_S3C4510_UART - #include #include "s3c4510b_uart.h" @@ -212,5 +210,3 @@ void serial_puts (const char *s) uart->m_ctrl.bf.sendBreak = 0; } - -#endif diff --git a/drivers/serial/serial_max3100.c b/drivers/serial/serial_max3100.c index 0611fc1dd41..4abc27109b4 100644 --- a/drivers/serial/serial_max3100.c +++ b/drivers/serial/serial_max3100.c @@ -26,8 +26,6 @@ #include #include -#ifdef CONFIG_MAX3100_SERIAL - DECLARE_GLOBAL_DATA_PTR; /**************************************************************/ @@ -298,5 +296,3 @@ int serial_tstc(void) void serial_setbrg(void) { } - -#endif diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index 61e68873eb5..ef6371e66ec 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -27,8 +27,6 @@ #include #include -#ifdef CONFIG_XILINX_UARTLITE - #define RX_FIFO_OFFSET 0 /* receive FIFO, read only */ #define TX_FIFO_OFFSET 4 /* transmit FIFO, write only */ #define STATUS_REG_OFFSET 8 /* status register, read only */ @@ -56,8 +54,13 @@ void serial_putc(const char c) { if (c == '\n') serial_putc('\r'); +<<<<<<< .merge_file_kaofiJ while (in_be32((void *)UARTLITE_STATUS) & SR_TX_FIFO_FULL); out_be32((void *)UARTLITE_TX_FIFO, (unsigned char) (c & 0xff)); +======= + while (in_be32((u32 *) UARTLITE_STATUS) & SR_TX_FIFO_FULL); + out_be32((u32 *) UARTLITE_TX_FIFO, (unsigned char) (c & 0xff)); +>>>>>>> .merge_file_zSz9BG } void serial_puts(const char * s) @@ -69,13 +72,20 @@ void serial_puts(const char * s) int serial_getc(void) { +<<<<<<< .merge_file_kaofiJ while (!(in_be32((void *)UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA)); return in_be32((void *)UARTLITE_RX_FIFO) & 0xff; +======= + while (!(in_be32((u32 *) UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA)); + return in_be32((u32 *) UARTLITE_RX_FIFO) & 0xff; +>>>>>>> .merge_file_zSz9BG } int serial_tstc(void) { +<<<<<<< .merge_file_kaofiJ return (in_be32((void *)UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA); +======= + return (in_be32((u32 *) UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA); +>>>>>>> .merge_file_zSz9BG } - -#endif /* CONFIG_MICROBLZE */ diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index 2bc5c3c8387..e738c562714 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -23,8 +23,6 @@ #include -#ifdef CONFIG_USB_TTY - #include #include #include "usbtty.h" @@ -1007,6 +1005,3 @@ void usbtty_poll (void) udc_irq(); } - - -#endif diff --git a/drivers/usb/usbdcore.c b/drivers/usb/usbdcore.c index 808da9faa5c..53ed669e971 100644 --- a/drivers/usb/usbdcore.c +++ b/drivers/usb/usbdcore.c @@ -552,7 +552,7 @@ struct urb *usbd_alloc_urb (struct usb_device_instance *device, struct urb *urb; if (!(urb = (struct urb *) malloc (sizeof (struct urb)))) { - usberr (" F A T A L: malloc(%u) FAILED!!!!", + usberr (" F A T A L: malloc(%zu) FAILED!!!!", sizeof (struct urb)); return NULL; } diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 27df449660c..b332a825e30 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -100,7 +100,11 @@ void lcd_ctrl_init(void *lcdbase) value << ATMEL_LCDC_CLKVAL_OFFSET); /* Initialize control register 2 */ +#ifdef CONFIG_AVR32 + value = ATMEL_LCDC_MEMOR_BIG | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE; +#else value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE; +#endif if (panel_info.vl_tft) value |= ATMEL_LCDC_DISTYPE_TFT; diff --git a/include/api_public.h b/include/api_public.h index 9bc0501334a..5b0c09e3108 100644 --- a/include/api_public.h +++ b/include/api_public.h @@ -126,6 +126,7 @@ typedef unsigned long lbastart_t; #define DT_STOR_SCSI 0x0020 #define DT_STOR_USB 0x0040 #define DT_STOR_MMC 0x0080 +#define DT_STOR_SATA 0x0100 #define DEV_STA_CLOSED 0x0000 /* invalid, closed */ #define DEV_STA_OPEN 0x0001 /* open i.e. active */ diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 2f7f71036bf..95db0177cd4 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -25,6 +25,7 @@ #ifndef AT91RM9200_H #define AT91RM9200_H +#ifndef __ASSEMBLY__ typedef volatile unsigned int AT91_REG; /* Hardware register definition */ /*****************************************************************************/ @@ -780,4 +781,5 @@ typedef struct _AT91S_PDC #define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */ #define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */ -#endif +#endif /* __ASSEMBLY__ */ +#endif /* AT91RM9200_H */ diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h index d030c262a58..06e52b137f5 100644 --- a/include/asm-avr32/io.h +++ b/include/asm-avr32/io.h @@ -22,6 +22,8 @@ #ifndef __ASM_AVR32_IO_H #define __ASM_AVR32_IO_H +#include + #ifdef __KERNEL__ /* diff --git a/include/asm-avr32/sysreg.h b/include/asm-avr32/sysreg.h index 72ad49e5e2d..4f6970448b8 100644 --- a/include/asm-avr32/sysreg.h +++ b/include/asm-avr32/sysreg.h @@ -273,7 +273,9 @@ | SYSREG_BF(name,value)) /* Register access macros */ -#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg) -#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value) +#define sysreg_read(reg) \ + ((unsigned long)__builtin_mfsr(SYSREG_##reg)) +#define sysreg_write(reg, value) \ + __builtin_mtsr(SYSREG_##reg, value) #endif /* __ASM_AVR32_SYSREG_H__ */ diff --git a/include/asm-nios2/types.h b/include/asm-nios2/types.h index f13d8bd4b47..ea859c07741 100644 --- a/include/asm-nios2/types.h +++ b/include/asm-nios2/types.h @@ -52,6 +52,9 @@ typedef unsigned long long u64; /* Dma addresses are 32-bits wide. */ typedef u32 dma_addr_t; + +typedef unsigned long phys_addr_t; +typedef unsigned long phys_size_t; #endif /* __KERNEL__ */ #endif /* __ASM_NIOS2_TYPES_H */ diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index c4af7971b16..ea49ddc515d 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -298,4 +298,13 @@ #define LCRR_CLKDIV_4 0x00000004 #define LCRR_CLKDIV_8 0x00000008 +/* LTEDR - Transfer Error Check Disable Register + */ +#define LTEDR_BMD 0x80000000 /* Bus monitor disable */ +#define LTEDR_PARD 0x20000000 /* Parity error checking disabled */ +#define LTEDR_WPD 0x04000000 /* Write protect error checking diable */ +#define LTEDR_WARA 0x00800000 /* Write-after-read-atomic error checking diable */ +#define LTEDR_RAWA 0x00400000 /* Read-after-write-atomic error checking disable */ +#define LTEDR_CSD 0x00080000 /* Chip select error checking disable */ + #endif /* __ASM_PPC_FSL_LBC_H */ diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index c5ac6584acb..be2ce247782 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -51,6 +51,9 @@ typedef struct global_data { unsigned long cpm_clk; unsigned long scc_clk; unsigned long brg_clk; +#ifdef CONFIG_PCI + unsigned long pci_clk; +#endif #endif unsigned long mem_clk; #if defined(CONFIG_MPC83XX) diff --git a/include/command.h b/include/command.h index c3ef51d8c48..4a27e972476 100644 --- a/include/command.h +++ b/include/command.h @@ -27,6 +27,8 @@ #ifndef __COMMAND_H #define __COMMAND_H +#include + #ifndef NULL #define NULL 0 #endif diff --git a/include/configs/ADS860.h b/include/configs/ADS860.h index 2ee8c61cea4..f677b9c80a1 100644 --- a/include/configs/ADS860.h +++ b/include/configs/ADS860.h @@ -51,7 +51,7 @@ /* This is picked up again in fads.h */ #define FADS_COMMANDS_ALREADY_DEFINED -#include "fads.h" +#include "../../board/fads/fads.h" #define CFG_PC_IDE_RESET ((ushort)0x0008) /* PC 12 */ diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 02f0c76e074..2f266a242ff 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -193,7 +193,8 @@ /* If a long serial cable is connected but */ /* other end is dead, garbage will be read */ #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #undef CONFIG_AUTOBOOT_DELAY_STR #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/Adder.h b/include/configs/Adder.h index 7389c38b9e1..cefdd29602d 100644 --- a/include/configs/Adder.h +++ b/include/configs/Adder.h @@ -131,7 +131,7 @@ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CFG_MONITOR_BASE TEXT_BASE -#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 KB for Monitor */ +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ #ifdef CONFIG_BZIP2 #define CFG_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */ #else diff --git a/include/configs/AmigaOneG3SE.h b/include/configs/AmigaOneG3SE.h index a992498dc08..84efd2fe086 100644 --- a/include/configs/AmigaOneG3SE.h +++ b/include/configs/AmigaOneG3SE.h @@ -371,7 +371,8 @@ #define CONFIG_BOOTDELAY 5 /* Boot automatically after five seconds */ #define CONFIG_PREBOOT "" #define CONFIG_BOOTCOMMAND "fdcboot; diskboot" -#define CONFIG_MENUPROMPT "Press any key to interrupt autoboot: %2d " +#define CONFIG_MENUPROMPT \ + "Press any key to interrupt autoboot: %2d ", bootdelay #define CONFIG_MENUKEY ' ' #define CONFIG_MENUCOMMAND "menu" /* #define CONFIG_AUTOBOOT_KEYED */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 6b585bed5f7..c1735392022 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -152,8 +152,9 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ /* Only interrupt boot if special string is typed */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds\n" +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Autobooting in %d seconds\n", bootdelay #undef CONFIG_AUTOBOOT_DELAY_STR #undef CONFIG_AUTOBOOT_STOP_STR /* defined via environment var */ #define CONFIG_AUTOBOOT_STOP_STR2 "esdesd" /* esd special for esd access*/ diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 0f5f85c22a6..64c9ac076da 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -345,8 +345,9 @@ int du440_phy_addr(int devnum); #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/FADS860T.h b/include/configs/FADS860T.h index 18de6b00e7a..38295c4550b 100644 --- a/include/configs/FADS860T.h +++ b/include/configs/FADS860T.h @@ -38,7 +38,7 @@ #define CONFIG_DRAM_50MHZ 1 #define CONFIG_SDRAM_50MHZ 1 -#include "fads.h" +#include "../../board/fads/fads.h" #ifdef USE_REAL_FLASH_VALUES /* diff --git a/include/configs/GTH.h b/include/configs/GTH.h index 00e09f703cd..461670a1042 100644 --- a/include/configs/GTH.h +++ b/include/configs/GTH.h @@ -62,8 +62,9 @@ /* Only interrupt boot if space is pressed */ /* If a long serial cable is connected but */ /* other end is dead, garbage will be read */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Press space to abort autoboot in %d second\n" +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press space to abort autoboot in %d second\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index f6c31ea8497..e52fbfde0e7 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -488,7 +488,8 @@ #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #if 0 -#define CONFIG_AUTOBOOT_PROMPT "Boote in %d Sekunden - stop mit \"2\"\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Boote in %d Sekunden - stop mit \"2\"\n", bootdelay #endif #define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */ #define CONFIG_SILENT_CONSOLE 1 diff --git a/include/configs/KUP4X.h b/include/configs/KUP4X.h index e558aa481b3..be0c7af8f3e 100644 --- a/include/configs/KUP4X.h +++ b/include/configs/KUP4X.h @@ -454,7 +454,8 @@ #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #if 0 -#define CONFIG_AUTOBOOT_PROMPT "Boote in %d Sekunden - stop mit \"2\"\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Boote in %d Sekunden - stop mit \"2\"\n", bootdelay #endif #define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */ #define CONFIG_SILENT_CONSOLE 1 diff --git a/include/configs/MPC86xADS.h b/include/configs/MPC86xADS.h index e0e85548115..233a8d19fa9 100644 --- a/include/configs/MPC86xADS.h +++ b/include/configs/MPC86xADS.h @@ -41,7 +41,7 @@ #define CONFIG_DRAM_50MHZ 1 #define CONFIG_SDRAM_50MHZ 1 -#include "fads.h" +#include "../../board/fads/fads.h" #define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */ #define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V) diff --git a/include/configs/MPC885ADS.h b/include/configs/MPC885ADS.h index 1867c5bf0a2..f4d18427710 100644 --- a/include/configs/MPC885ADS.h +++ b/include/configs/MPC885ADS.h @@ -27,7 +27,7 @@ #define CONFIG_SDRAM_50MHZ 1 -#include "fads.h" +#include "../../board/fads/fads.h" #define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */ #define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V) diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 04580b7a264..8c8a445c8b3 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -40,7 +40,7 @@ #define CONFIG_MISC_INIT_R 1 #define CFG_CACHELINE_SIZE 32 -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#ifdef (CONFIG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 #endif @@ -255,7 +255,7 @@ #define CONFIG_NET_RETRY_COUNT 5 #define CONFIG_E1000 -#define CONFIG_E1000_FALLBACK_MAC 0xb6b445ebfbc0 +#define CONFIG_E1000_FALLBACK_MAC { 0xb6, 0xb4, 0x45, 0xeb, 0xfb, 0xc0 } #undef CONFIG_MPC5xxx_FEC #undef CONFIG_PHY_ADDR #define CONFIG_NETDEV eth0 @@ -268,7 +268,7 @@ #define CFG_PROMPT_HUSH_PS2 "> " #undef CFG_LONGHELP #define CFG_PROMPT "=> " -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#ifdef (CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 #else #define CFG_CBSIZE 256 diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index d08d79520c9..8e247af63cd 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -59,17 +59,18 @@ #define CONFIG_CLOCKS_IN_MHZ 1 -#define CONFIG_BOARD_TYPES 1 +#define CONFIG_BOARD_TYPES 1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 3 #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 's')...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "autoboot in %d seconds (stop with 's')...\n", bootdelay #define CONFIG_AUTOBOOT_STOP_STR "s" #define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_RESET_TO_RETRY 60 diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 0b094827d76..84c6e9b6179 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -65,9 +65,10 @@ #define CFG_MEASURE_CPUCLK #define CFG_8XX_XIN CONFIG_8xx_OSCLK -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d seconds...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nEnter password - autoboot in %d seconds...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "ids" #define CONFIG_BOOT_RETRY_TIME 900 #define CONFIG_BOOT_RETRY_MIN 30 diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 0bd77c07b65..a3d1c56dc25 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -154,8 +154,9 @@ /* Only interrupt boot if space is pressed */ /* If a long serial cable is connected but */ /* other end is dead, garbage will be read */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #undef CONFIG_AUTOBOOT_DELAY_STR #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index e8b405a8849..42f1d8d0062 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -409,7 +409,8 @@ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #undef CONFIG_AUTOBOOT_DELAY_STR #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index 872765c92f4..faae407da5d 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -68,7 +68,8 @@ #ifdef DEPLOYMENT #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "autoboot in %d seconds (stop with 'st')...\n", bootdelay #define CONFIG_AUTOBOOT_STOP_STR "st" #define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_RESET_TO_RETRY 1 diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index 3aee45c3c7c..aefc7eecbd1 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -465,7 +465,7 @@ #if 1 #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "delayabit" #define CONFIG_AUTOBOOT_STOP_STR " " /* easy to stop for now */ #endif diff --git a/include/configs/adsvix.h b/include/configs/adsvix.h deleted file mode 100644 index 427b5482f5c..00000000000 --- a/include/configs/adsvix.h +++ /dev/null @@ -1,365 +0,0 @@ -/* - * (C) Copyright 2004 - * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net - * - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * Configuation settings for the LUBBOCK board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */ -#define CONFIG_ADSVIX 1 /* on a Adsvix Board */ -#define CONFIG_MMC 1 -#define BOARD_LATE_INIT 1 - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -#define RTC - -/* - * Size of malloc() pool - */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_FFUART 1 /* we use FFUART on ADSVIX */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 38400 - -#define CONFIG_DOS_PARTITION 1 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_FAT -#define CONFIG_CMD_IDE -#define CONFIG_CMD_MMC -#define CONFIG_CMD_PCMCIA - -#undef CONFIG_CMD_NET - - -#undef CONFIG_SHOW_BOOT_PROGRESS - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_SERVERIP 192.168.1.99 -#define CONFIG_BOOTCOMMAND "run boot_flash" -#define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\ - " rw root=/dev/ram initrd=0xa0800000,5m" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "program_boot_cf=" \ - "mw.b 0xa0010000 0xff 0x20000; " \ - "if pinit on && " \ - "ide reset && " \ - "fatload ide 0 0xa0010000 u-boot.bin; " \ - "then " \ - "protect off 0x0 0x1ffff; " \ - "erase 0x0 0x1ffff; " \ - "cp.b 0xa0010000 0x0 0x20000; " \ - "fi\0" \ - "program_uzImage_cf=" \ - "mw.b 0xa0010000 0xff 0x180000; " \ - "if pinit on && " \ - "ide reset && " \ - "fatload ide 0 0xa0010000 uzImage; " \ - "then " \ - "protect off 0x40000 0x1bffff; " \ - "erase 0x40000 0x1bffff; " \ - "cp.b 0xa0010000 0x40000 0x180000; " \ - "fi\0" \ - "program_ramdisk_cf=" \ - "mw.b 0xa0010000 0xff 0x500000; " \ - "if pinit on && " \ - "ide reset && " \ - "fatload ide 0 0xa0010000 ramdisk.gz; " \ - "then " \ - "protect off 0x1c0000 0x6bffff; " \ - "erase 0x1c0000 0x6bffff; " \ - "cp.b 0xa0010000 0x1c0000 0x500000; " \ - "fi\0" \ - "boot_cf=" \ - "if pinit on && " \ - "ide reset && " \ - "fatload ide 0 0xa0030000 uzImage && " \ - "fatload ide 0 0xa0800000 ramdisk.gz; " \ - "then " \ - "bootm 0xa0030000; " \ - "fi\0" \ - "program_boot_mmc=" \ - "mw.b 0xa0010000 0xff 0x20000; " \ - "if mmcinit && " \ - "fatload mmc 0 0xa0010000 u-boot.bin; " \ - "then " \ - "protect off 0x0 0x1ffff; " \ - "erase 0x0 0x1ffff; " \ - "cp.b 0xa0010000 0x0 0x20000; " \ - "fi\0" \ - "program_uzImage_mmc=" \ - "mw.b 0xa0010000 0xff 0x180000; " \ - "if mmcinit && " \ - "fatload mmc 0 0xa0010000 uzImage; " \ - "then " \ - "protect off 0x40000 0x1bffff; " \ - "erase 0x40000 0x1bffff; " \ - "cp.b 0xa0010000 0x40000 0x180000; " \ - "fi\0" \ - "program_ramdisk_mmc=" \ - "mw.b 0xa0010000 0xff 0x500000; " \ - "if mmcinit && " \ - "fatload mmc 0 0xa0010000 ramdisk.gz; " \ - "then " \ - "protect off 0x1c0000 0x6bffff; " \ - "erase 0x1c0000 0x6bffff; " \ - "cp.b 0xa0010000 0x1c0000 0x500000; " \ - "fi\0" \ - "boot_mmc=" \ - "if mmcinit && " \ - "fatload mmc 0 0xa0030000 uzImage && " \ - "fatload mmc 0 0xa0800000 ramdisk.gz; " \ - "then " \ - "bootm 0xa0030000; " \ - "fi\0" \ - "boot_flash=" \ - "cp.b 0x1c0000 0xa0800000 0x500000; " \ - "bootm 0x40000\0" \ - -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -/* #define CONFIG_INITRD_TAG 1 */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CFG_HUSH_PARSER 1 -#define CFG_PROMPT_HUSH_PS2 "> " - -#define CFG_LONGHELP /* undef to save memory */ -#ifdef CFG_HUSH_PARSER -#define CFG_PROMPT "$ " /* Monitor Command Prompt */ -#else -#define CFG_PROMPT "=> " /* Monitor Command Prompt */ -#endif -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_DEVICE_NULLDEV 1 - -#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ - -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ - -#define CFG_LOAD_ADDR 0xa1000000 /* default load address */ - -#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CFG_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */ - - /* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#define CFG_MMC_BASE 0xF0000000 - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ -#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ - -#define CFG_DRAM_BASE 0xa0000000 -#define CFG_DRAM_SIZE 0x04000000 - -#define CFG_FLASH_BASE PHYS_FLASH_1 - -/* - * GPIO settings - */ - -#define CFG_GPSR0_VAL 0x00018004 -#define CFG_GPSR1_VAL 0x004F0080 -#define CFG_GPSR2_VAL 0x13EFC000 -#define CFG_GPSR3_VAL 0x0006E032 -#define CFG_GPCR0_VAL 0x084AFE1A -#define CFG_GPCR1_VAL 0x003003F2 -#define CFG_GPCR2_VAL 0x0C014000 -#define CFG_GPCR3_VAL 0x00000C00 -#define CFG_GPDR0_VAL 0xCBC3BFFC -#define CFG_GPDR1_VAL 0x00FFABF3 -#define CFG_GPDR2_VAL 0x1EEFFC00 -#define CFG_GPDR3_VAL 0x0187EC32 -#define CFG_GAFR0_L_VAL 0x84400000 -#define CFG_GAFR0_U_VAL 0xA51A8010 -#define CFG_GAFR1_L_VAL 0x699A955A -#define CFG_GAFR1_U_VAL 0x0005A0AA -#define CFG_GAFR2_L_VAL 0x40000000 -#define CFG_GAFR2_U_VAL 0x0109A400 -#define CFG_GAFR3_L_VAL 0x54000000 -#define CFG_GAFR3_U_VAL 0x00001409 - -#define CFG_PSSR_VAL 0x20 - -/* - * Clock settings - */ -#define CFG_CKEN 0x00400200 -#define CFG_CCCR 0x02000290 /* 520Mhz */ -/* #define CFG_CCCR 0x02000210 416 Mhz */ - -/* - * Memory settings - */ - -#define CFG_MSC0_VAL 0x23F2B3DB -#define CFG_MSC1_VAL 0x0000CCD1 -#define CFG_MSC2_VAL 0x0000B884 -#define CFG_MDCNFG_VAL 0x08000AC8 -#define CFG_MDREFR_VAL 0x0000001E -#define CFG_MDMRS_VAL 0x00000000 - -#define CFG_FLYCNFG_VAL 0x00010001 -#define CFG_SXCNFG_VAL 0x40044004 - -/* - * PCMCIA and CF Interfaces - */ -#define CFG_MECR_VAL 0x00000002 -#define CFG_MCMEM0_VAL 0x00004204 -#define CFG_MCMEM1_VAL 0x00000000 -#define CFG_MCATT0_VAL 0x00010504 -#define CFG_MCATT1_VAL 0x00000000 -#define CFG_MCIO0_VAL 0x00008407 -#define CFG_MCIO1_VAL 0x00000000 - -#define CONFIG_PXA_PCMCIA 1 -#define CONFIG_PXA_IDE 1 - -#define CONFIG_PCMCIA_SLOT_A 1 -/* just to keep build system happy */ - -#define CFG_PCMCIA_MEM_ADDR 0x28000000 -#define CFG_PCMCIA_MEM_SIZE 0x04000000 - - -#define CFG_IDE_MAXBUS 1 -/* max. 1 IDE bus */ -#define CFG_IDE_MAXDEVICE 1 -/* max. 1 drive per IDE bus */ - -#define CFG_ATA_IDE0_OFFSET 0x0000 - -#define CFG_ATA_BASE_ADDR 0x20000000 - -/* Offset for data I/O */ -#define CFG_ATA_DATA_OFFSET 0x1f0 - -/* Offset for normal register accesses */ -#define CFG_ATA_REG_OFFSET 0x1f0 - -/* Offset for alternate registers */ -#define CFG_ATA_ALT_OFFSET 0x3f0 - -/* - * FLASH and environment organization - */ - -#define CFG_FLASH_CFI -#define CFG_FLASH_CFI_DRIVER 1 - -#define CFG_MONITOR_BASE 0 -#define CFG_MONITOR_LEN 0x20000 - -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */ - -/* write flash less slowly */ -#define CFG_FLASH_USE_BUFFER_WRITE 1 - -/* Flash environment locations */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) /* Addr of Environment Sector */ -#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment */ -#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/apollon.h b/include/configs/apollon.h index 89732968ade..5884611b9ad 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -103,14 +103,6 @@ */ #define CONFIG_SERIAL1 1 /* UART1 on H4 */ - /* - * I2C configuration - */ -#define CONFIG_HARD_I2C -#define CFG_I2C_SPEED 100000 -#define CFG_I2C_SLAVE 1 -#define CONFIG_DRIVER_OMAP24XX_I2C - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 951ce160a45..cd2eae20634 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -112,16 +112,11 @@ */ #include -#define CONFIG_CMD_MII #define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_LOADS - +#define CFG_NAND_LEGACY #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 @@ -137,6 +132,7 @@ #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ +#include /* needed for port definitions */ #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index 84d235ea9d5..f040b863c77 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -82,8 +82,8 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 90910bb98a5..68f0cecf39e 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -110,8 +110,8 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h index 03472a8869c..d3a2f69edea 100644 --- a/include/configs/atstk1003.h +++ b/include/configs/atstk1003.h @@ -110,8 +110,8 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h index 07add821a94..a37ba92416b 100644 --- a/include/configs/atstk1004.h +++ b/include/configs/atstk1004.h @@ -110,8 +110,8 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index f9af67540a0..a6c5b6e24ed 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -110,8 +110,8 @@ #define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT \ - "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/csb637.h b/include/configs/csb637.h index e9c6d8e7aec..735a211e07e 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -114,17 +114,11 @@ */ #include -#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_DHCP +#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_PING -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MISC -#undef CONFIG_CMD_LOADS - +#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 @@ -140,6 +134,7 @@ #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ +#include /* needed for port definitions */ #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) @@ -155,6 +150,8 @@ #define NAND_CTL_CLRCLE(nandptr) #define NAND_CTL_SETCLE(nandptr) +#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */ + #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */ diff --git a/include/configs/gth2.h b/include/configs/gth2.h index c2d6ca70a54..7f7190bcdb4 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -54,8 +54,9 @@ /* Only interrupt boot if space is pressed */ /* If a long serial cable is connected but */ /* other end is dead, garbage will be read */ -#define CONFIG_AUTOBOOT_KEYED 1 -#define CONFIG_AUTOBOOT_PROMPT "Press space to abort autoboot in %d second\n" +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press space to abort autoboot in %d second\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" #define CONFIG_AUTOBOOT_STOP_STR " " diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index 7c2c224060d..d9187825e54 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -279,7 +279,8 @@ * To stop use: " " */ #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, press \" \" to stop\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Autobooting in %d seconds, press \" \" to stop\n", bootdelay #define CONFIG_AUTOBOOT_STOP_STR " " #undef CONFIG_AUTOBOOT_DELAY_STR #define DEBUG_BOOTKEYS 0 diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 01e79701623..264192f2620 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -224,7 +224,7 @@ */ #define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ - "press to stop\n" + "press to stop\n", bootdelay #define CONFIG_AUTOBOOT_STOP_STR " " #undef CONFIG_AUTOBOOT_DELAY_STR #define DEBUG_BOOTKEYS 0 diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h index d3908b9eaf4..bc642941162 100644 --- a/include/configs/linkstation.h +++ b/include/configs/linkstation.h @@ -82,7 +82,8 @@ #undef CONFIG_BOOT_RETRY_TIME #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Boot in %02d seconds ('s' to stop)..." +#define CONFIG_AUTOBOOT_PROMPT \ + "Boot in %02d seconds ('s' to stop)...", bootdelay #define CONFIG_AUTOBOOT_STOP_STR "s" #define CONFIG_CMD_IDE diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h index 8a8270260a3..87abfba14c2 100644 --- a/include/configs/lwmon.h +++ b/include/configs/lwmon.h @@ -252,7 +252,8 @@ #define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */ #if 0 #define CONFIG_AUTOBOOT_KEYED /* Enable "password" protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nEnter password - autoboot in %d sec...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR " " /* "password" */ #endif /*----------------------------------------------------------------------*/ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index cf406c8c0da..2f3a0660628 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -277,7 +277,8 @@ #define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */ #if 0 #define CONFIG_AUTOBOOT_KEYED /* Enable "password" protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nEnter password - autoboot in %d sec...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR " " /* "password" */ #endif diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index 095fdaf5c8b..e4be1ed33fe 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -40,7 +40,6 @@ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 -#undef CONFIG_AUTOBOOT_PROMPT #define CONFIG_MENUPROMPT "." /* @@ -105,7 +104,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "unlock=yes\0" -#define CFG_CMD_JFFS2 +#define CONFIG_CMD_JFFS2 #undef CONFIG_CMD_EEPROM #define CONFIG_CMD_NET #define CONFIG_CMD_RUN diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index b6843af3dc6..3d1eafee696 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -96,7 +96,7 @@ #undef CONFIG_AUTOBOOT_DELAY_STR #undef CONFIG_BOOTARGS #define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ - "press \"\" to stop\n" + "press \"\" to stop\n", bootdelay #define CONFIG_ETHADDR 00:50:C2:40:10:00 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 2eb4af1554d..87264fbb4b5 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -230,7 +230,8 @@ #undef CONFIG_SILENT_CONSOLE /* enable silent startup */ #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_STOP_STR " " #define CONFIG_AUTOBOOT_DELAY_STR "d" diff --git a/include/configs/netstar.h b/include/configs/netstar.h index d4deda407fb..756b7c26717 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -195,7 +195,8 @@ #if 0 /* feel free to disable for development */ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nNetStar PBX - boot in %d secs...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nNetStar PBX - boot in %d secs...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */ #endif diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h index 56b4d92f1a7..dee664361f9 100644 --- a/include/configs/ppmc8260.h +++ b/include/configs/ppmc8260.h @@ -228,7 +228,8 @@ * To stop use: " " */ # define CONFIG_AUTOBOOT_KEYED -# define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, press \" \" to stop\n" +# define CONFIG_AUTOBOOT_PROMPT \ + "Autobooting in %d seconds, press \" \" to stop\n", bootdelay # define CONFIG_AUTOBOOT_STOP_STR " " # undef CONFIG_AUTOBOOT_DELAY_STR # define DEBUG_BOOTKEYS 0 diff --git a/include/configs/quantum.h b/include/configs/quantum.h index f49e2b0716e..cc261c33e10 100644 --- a/include/configs/quantum.h +++ b/include/configs/quantum.h @@ -116,7 +116,8 @@ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nEnter password - autoboot in %d sec...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "system" /* * Miscellaneous configurable options diff --git a/include/configs/rmu.h b/include/configs/rmu.h index 28fb7c3318c..596bf155660 100644 --- a/include/configs/rmu.h +++ b/include/configs/rmu.h @@ -111,7 +111,8 @@ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nEnter password - autoboot in %d sec...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "system" /* diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index 2a398e8c45c..8427752d78e 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -436,7 +436,7 @@ * To stop use: " " */ #define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT "Autobooting...\n" +#define CONFIG_AUTOBOOT_PROMPT "Autobooting...\n" #define CONFIG_AUTOBOOT_STOP_STR " " #undef CONFIG_AUTOBOOT_DELAY_STR #define CONFIG_ZERO_BOOTDELAY_CHECK diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index 79931372113..b92344ccc18 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -306,7 +306,8 @@ */ #undef CONFIG_AUTOBOOT_KEYED #ifdef CONFIG_AUTOBOOT_KEYED -# define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, press \" \" to stop\n" +# define CONFIG_AUTOBOOT_PROMPT \ + "Autobooting in %d seconds, press \" \" to stop\n", bootdelay # define CONFIG_AUTOBOOT_STOP_STR " " # undef CONFIG_AUTOBOOT_DELAY_STR # define DEBUG_BOOTKEYS 0 diff --git a/include/configs/sc3.h b/include/configs/sc3.h index f6e40def518..87311ea6c7a 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -132,7 +132,8 @@ #if 1 /* feel free to disable for development */ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nSC3 - booting... stop with ENTER\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nSC3 - booting... stop with ENTER\n" #define CONFIG_AUTOBOOT_DELAY_STR "\r" /* 1st "password" */ #define CONFIG_AUTOBOOT_DELAY_STR2 "\n" /* 1st "password" */ #endif diff --git a/include/configs/trab.h b/include/configs/trab.h index de36fca11e7..b0615a0e377 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -289,7 +289,8 @@ #if 1 /* feel free to disable for development */ #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ -#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_PROMPT \ + "\nEnter password - autoboot in %d sec...\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */ #endif diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index 287a6187a2d..1675ab752cb 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -58,7 +58,7 @@ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_BOOTDELAY 2 -#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay #define CONFIG_BOOTCOMMAND "run nfsboot" /* autoboot command */ #define CONFIG_BOOTARGS "root=/dev/ram console=ttyS0,57600" /* RAMdisk */ #define CONFIG_ETHADDR 00:AA:00:14:00:05 /* UTX5 */ diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 5a6b8559168..c71da608440 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -47,6 +47,12 @@ #endif #if defined(CONFIG_440) +/* + * Enable long long (%ll ...) printf format on 440 PPC's since most of + * them support 36bit physical addressing + */ +#define CFG_64BIT_VSPRINTF +#define CFG_64BIT_STRTOUL #include #else #include diff --git a/lib_arm/board.c b/lib_arm/board.c index 80b149b534a..a09386046c3 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -233,6 +233,18 @@ static int init_func_i2c (void) } #endif +#ifdef CONFIG_SKIP_RELOCATE_UBOOT +/* + * This routine sets the relocation done flag, because even if + * relocation is skipped, the flag is used by other generic code. + */ +static int reloc_init(void) +{ + gd->flags |= GD_FLG_RELOC; + return 0; +} +#endif + /* * Breathe some life into the board... * @@ -262,6 +274,11 @@ int print_cpuinfo (void); /* test-only */ init_fnc_t *init_sequence[] = { cpu_init, /* basic cpu dependent setup */ +#if defined(CONFIG_SKIP_RELOCATE_UBOOT) + reloc_init, /* Set the relocation done flag, must + do this AFTER cpu_init(), but as soon + as possible */ +#endif board_init, /* basic board dependent setup */ interrupt_init, /* set up exceptions */ env_init, /* initialize environment */ diff --git a/lib_arm/bootm.c b/lib_arm/bootm.c index 6b4a80723ff..b838c374ac6 100644 --- a/lib_arm/bootm.c +++ b/lib_arm/bootm.c @@ -43,9 +43,6 @@ static void setup_memory_tags (bd_t *bd); # endif static void setup_commandline_tag (bd_t *bd, char *commandline); -#if 0 -static void setup_ramdisk_tag (bd_t *bd); -#endif # ifdef CONFIG_INITRD_TAG static void setup_initrd_tag (bd_t *bd, ulong initrd_start, ulong initrd_end); diff --git a/lib_m68k/time.c b/lib_m68k/time.c index 28d371d5e68..6eba784b5c1 100644 --- a/lib_m68k/time.c +++ b/lib_m68k/time.c @@ -199,6 +199,11 @@ unsigned long long get_ticks(void) return get_timer(0); } +unsigned long usec2ticks(unsigned long usec) +{ + return get_timer(usec); +} + /* * This function is derived from PowerPC code (timebase clock frequency). * On M68K it returns the number of timer ticks per second. diff --git a/lib_sparc/board.c b/lib_sparc/board.c index af301c046e1..205a8ca5327 100644 --- a/lib_sparc/board.c +++ b/lib_sparc/board.c @@ -451,7 +451,7 @@ void board_init_f(ulong bootflag) if ((s = getenv("bootfile")) != NULL) { copy_filename(BootFile, s, sizeof(BootFile)); } -#endif /* CFG_CMD_NET */ +#endif /* CONFIG_CMD_NET */ WATCHDOG_RESET(); @@ -483,7 +483,7 @@ void board_init_f(ulong bootflag) WATCHDOG_RESET(); puts("IDE: "); ide_init(); -#endif /* CFG_CMD_IDE */ +#endif /* CONFIG_CMD_IDE */ #ifdef CONFIG_LAST_STAGE_INIT WATCHDOG_RESET(); diff --git a/nand_spl/board/amcc/kilauea/Makefile b/nand_spl/board/amcc/kilauea/Makefile index 0667fc1a54c..cedc8e02e6e 100644 --- a/nand_spl/board/amcc/kilauea/Makefile +++ b/nand_spl/board/amcc/kilauea/Makefile @@ -57,7 +57,7 @@ $(nandobj)u-boot-spl: $(OBJS) # create symbolic links for common files # from cpu directory -$(obj)44x_spd_ddr2.c: ecc.h +$(obj)44x_spd_ddr2.c: $(obj)ecc.h @rm -f $(obj)44x_spd_ddr2.c ln -s $(SRCTREE)/cpu/ppc4xx/44x_spd_ddr2.c $(obj)44x_spd_ddr2.c diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile index f10ed02292a..1f996a40be6 100644 --- a/onenand_ipl/board/apollon/Makefile +++ b/onenand_ipl/board/apollon/Makefile @@ -1,6 +1,5 @@ include $(TOPDIR)/config.mk -include $(TOPDIR)/include/config.mk include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds @@ -9,8 +8,11 @@ AFLAGS += -DCONFIG_ONENAND_IPL CFLAGS += -DCONFIG_ONENAND_IPL OBJCLFAGS += --gap-fill=0x00 -SOBJS = start.o low_levelinit.o -COBJS = apollon.o onenand_read.o onenand_boot.o +SOBJS := low_levelinit.o +SOBJS += start.o +COBJS := apollon.o +COBJS += onenand_read.o +COBJS += onenand_boot.o SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) @@ -34,28 +36,39 @@ $(onenandobj)onenand-ipl.bin: $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl: $(OBJS) cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \ - -Map $(onenandobj)onenand-ipl.map \ - -o $(onenandobj)onenand-ipl + -Map $@.map -o $@ # create symbolic links from common files # from cpu directory $(obj)start.S: - rm -f $(obj)start.S - ln -s $(SRCTREE)/cpu/$(CPU)/start.S $(obj)start.S + @rm -f $@ + ln -s $(SRCTREE)/cpu/$(CPU)/start.S $@ # from onenand_ipl directory $(obj)onenand_ipl.h: - rm -f $(obj)onenand_ipl.h - ln -s $(SRCTREE)/onenand_ipl/onenand_ipl.h $(obj)onenand_ipl.h + @rm -f $@ + ln -s $(SRCTREE)/onenand_ipl/onenand_ipl.h $@ $(obj)onenand_boot.c: $(obj)onenand_ipl.h - rm -f $(obj)onenand_boot.c - ln -s $(SRCTREE)/onenand_ipl/onenand_boot.c $(obj)onenand_boot.c + @rm -f $@ + ln -s $(SRCTREE)/onenand_ipl/onenand_boot.c $@ $(obj)onenand_read.c: $(obj)onenand_ipl.h - rm -f $(obj)onenand_read.c - ln -s $(SRCTREE)/onenand_ipl/onenand_read.c $(obj)onenand_read.c + @rm -f $@ + ln -s $(SRCTREE)/onenand_ipl/onenand_read.c $@ + +ifneq ($(OBJTREE), $(SRCTREE)) +$(obj)apollon.c: + @rm -f $@ + ln -s $(SRCTREE)/onenand_ipl/board/$(BOARDDIR)/apollon.c $@ + +$(obj)low_levelinit.S: + @rm -f $@ + ln -s $(SRCTREE)/onenand_ipl/board/$(BOARDDIR)/low_levelinit.S $@ +endif + +######################################################################### $(obj)%.o: $(obj)%.S $(CC) $(AFLAGS) -c -o $@ $< @@ -63,6 +76,9 @@ $(obj)%.o: $(obj)%.S $(obj)%.o: $(obj)$.c $(CC) $(CFLAGS) -c -o $@ $< +# defines $(obj).depend target include $(SRCTREE)/rules.mk sinclude $(obj).depend + +######################################################################### diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c index 6152eb21a90..110df6e9103 100644 --- a/post/cpu/ppc4xx/spr.c +++ b/post/cpu/ppc4xx/spr.c @@ -76,7 +76,9 @@ static struct { {0x3b, "CSRR1", 0x00000000, 0x00000000}, {0x3d, "DEAR", 0x00000000, 0x00000000}, {0x3e, "ESR", 0x00000000, 0x00000000}, +#ifdef CONFIG_440 {0x3f, "IVPR", 0xffff0000, 0x00000000}, +#endif {0x100, "USPRG0", 0x00000000, 0x00000000}, {0x104, "SPRG4", 0x00000000, 0x00000000}, {0x105, "SPRG5", 0x00000000, 0x00000000}, diff --git a/post/lib_ppc/b.c b/post/lib_ppc/b.c index 45b9ff26e86..7a2583dc747 100644 --- a/post/lib_ppc/b.c +++ b/post/lib_ppc/b.c @@ -95,6 +95,7 @@ int cpu_post_test_b (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); if (ret == 0) { @@ -188,6 +189,9 @@ int cpu_post_test_b (void) } } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/cmp.c b/post/lib_ppc/cmp.c index 8d80f86aafd..13809d417bb 100644 --- a/post/lib_ppc/cmp.c +++ b/post/lib_ppc/cmp.c @@ -102,6 +102,7 @@ int cpu_post_test_cmp (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); for (i = 0; i < cpu_post_cmp_size && ret == 0; i++) { @@ -124,6 +125,9 @@ int cpu_post_test_cmp (void) } } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/cmpi.c b/post/lib_ppc/cmpi.c index 92b4d57b1fd..5ecfe872a4f 100644 --- a/post/lib_ppc/cmpi.c +++ b/post/lib_ppc/cmpi.c @@ -102,6 +102,7 @@ int cpu_post_test_cmpi (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++) { @@ -124,6 +125,9 @@ int cpu_post_test_cmpi (void) } } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/complex.c b/post/lib_ppc/complex.c index 271392a0e8c..4983c51919e 100644 --- a/post/lib_ppc/complex.c +++ b/post/lib_ppc/complex.c @@ -101,6 +101,7 @@ static int cpu_post_test_complex_2 (void) int cpu_post_test_complex (void) { int ret = 0; + int flag = disable_interrupts(); if (ret == 0) { @@ -117,6 +118,9 @@ int cpu_post_test_complex (void) post_log ("Error at complex test !\n"); } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/cr.c b/post/lib_ppc/cr.c index 0bd9e748f2a..2c7976ac311 100644 --- a/post/lib_ppc/cr.c +++ b/post/lib_ppc/cr.c @@ -248,6 +248,7 @@ int cpu_post_test_cr (void) int ret = 0; unsigned int i; unsigned long cr_sav; + int flag = disable_interrupts(); asm ( "mfcr %0" : "=r" (cr_sav) : ); @@ -347,6 +348,9 @@ int cpu_post_test_cr (void) asm ( "mtcr %0" : : "r" (cr_sav)); + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/load.c b/post/lib_ppc/load.c index 86bc2234cf5..eccebb7ca14 100644 --- a/post/lib_ppc/load.c +++ b/post/lib_ppc/load.c @@ -178,6 +178,7 @@ int cpu_post_test_load (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); for (i = 0; i < cpu_post_load_size && ret == 0; i++) { @@ -246,6 +247,9 @@ int cpu_post_test_load (void) } } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/multi.c b/post/lib_ppc/multi.c index 5d3f5842811..47135abd4ca 100644 --- a/post/lib_ppc/multi.c +++ b/post/lib_ppc/multi.c @@ -44,6 +44,7 @@ int cpu_post_test_multi (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); if (ret == 0) { @@ -72,6 +73,9 @@ int cpu_post_test_multi (void) post_log ("Error at multi test !\n"); } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/store.c b/post/lib_ppc/store.c index 09ec48554e2..c96f263e300 100644 --- a/post/lib_ppc/store.c +++ b/post/lib_ppc/store.c @@ -163,6 +163,7 @@ int cpu_post_test_store (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); for (i = 0; i < cpu_post_store_size && ret == 0; i++) { @@ -226,6 +227,9 @@ int cpu_post_test_store (void) } } + if (flag) + enable_interrupts(); + return ret; } diff --git a/post/lib_ppc/string.c b/post/lib_ppc/string.c index b2daa880496..3683ac9956a 100644 --- a/post/lib_ppc/string.c +++ b/post/lib_ppc/string.c @@ -47,6 +47,7 @@ int cpu_post_test_string (void) { int ret = 0; unsigned int i; + int flag = disable_interrupts(); if (ret == 0) { @@ -97,6 +98,9 @@ int cpu_post_test_string (void) post_log ("Error at string test !\n"); } + if (flag) + enable_interrupts(); + return ret; } -- cgit v1.3.1 From cd82919e6c8a73b363a26f34b734923844e52d1c Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 12 Aug 2008 16:08:38 +0200 Subject: Coding style cleanup, update CHANGELOG, prepare release Signed-off-by: Wolfgang Denk --- CHANGELOG | 588 +++++++++++++++++++++++++++++++++++++++++++++ Makefile | 2 +- drivers/usb/r8a66597.h | 4 - include/configs/FPS850L.h | 2 +- include/configs/FPS860L.h | 2 +- include/configs/TQM823L.h | 2 +- include/configs/TQM823M.h | 2 +- include/configs/TQM850L.h | 2 +- include/configs/TQM850M.h | 2 +- include/configs/TQM855L.h | 2 +- include/configs/TQM855M.h | 2 +- include/configs/TQM860L.h | 2 +- include/configs/TQM860M.h | 2 +- include/configs/TQM862L.h | 2 +- include/configs/TQM862M.h | 2 +- include/configs/TQM866M.h | 2 +- include/configs/virtlab2.h | 2 +- 17 files changed, 603 insertions(+), 19 deletions(-) (limited to 'Makefile') diff --git a/CHANGELOG b/CHANGELOG index 7ff1a8af936..aa1bdc31f8d 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,579 @@ +commit 17e900b8c0f38d922da47073246219dce2a847f2 +Author: Wolfgang Denk +Date: Tue Aug 12 14:54:04 2008 +0200 + + MVBC_P: fix compile problem + + Signed-off-by: Wolfgang Denk + +commit 52b047ae48219b59bebe37ba743ab103fd4f8316 +Author: Wolfgang Denk +Date: Tue Aug 12 12:10:11 2008 +0200 + + MPC8272ADS: fix build error: 'bd_t' has no member named 'pci_clk' + + Signed-off-by: Wolfgang Denk + +commit c9c101c660b3d1995045c61c7c6041f52b6cf335 +Author: Wolfgang Denk +Date: Tue Aug 12 00:36:53 2008 +0200 + + ads5121: fix compiler warnings (unused variables) + + Signed-off-by: Wolfgang Denk + +commit 902ca09246039964d59bbcb519b1e1b5aed01308 +Author: Kumar Gala +Date: Mon Aug 11 11:29:28 2008 -0500 + + 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS + + Use CONFIG_NUM_CPUS to match existing define used by 86xx. + + Signed-off-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 3216ca9692ff80d7c638723ef448f3d36301d9e7 +Author: Kumar Gala +Date: Mon Aug 11 09:20:53 2008 -0500 + + Fix fallout from autostart revert + + The autostart revert caused a bit of duplicated code as well as + code that was using images->autostart that needs to get removed so + we can build again. + + Signed-off-by: Kumar Gala + +commit 3cf8a234b8e8c02e4da1f23566043bc288b05220 +Author: Kumar Gala +Date: Mon Aug 11 09:16:25 2008 -0500 + + Fix compile error related to r8a66597-hcd & usb + + When building the 8544DS board we get this error: + + In file included from r8a66597-hcd.c:22: + u-boot/include/usb.h:190:2: error: #error USB Lowlevel not defined + make[1]: *** [r8a66597-hcd.o] Error 1 + + The cleanest fix is to only build r8a66597-hcd.c if CONFIG_USB_R8A66597_HCD + is set. + + Signed-off-by: Kumar Gala + +commit 2d0daa03612338a813e3c9d22680e54eabfea378 +Author: Becky Bruce +Date: Mon Aug 4 14:02:26 2008 -0500 + + POWERPC 86xx: Move BAT setup code to C + + This is needed because we will be possibly be locating + devices at physical addresses above 32bits, and the asm + preprocessing does not appear to deal with ULL constants + properly. We now call write_bat in lib_ppc/bat_rw.c. + + Signed-off-by: Becky Bruce + Acked-by: Jon Loeliger + +commit 9de67149db576c91b9c2a0a182652331e7e44211 +Author: Becky Bruce +Date: Mon Aug 4 14:01:53 2008 -0500 + + POWERPC: Add synchronization to write_bat in lib_ppc/bat_rw.c + + Perform sync/isync as required by the architecture. + + Signed-off-by: Becky Bruce + Acked-by: Jon Loeliger + +commit 23f935c073e7578c6066804fd2f9ee116cae6ffe +Author: Becky Bruce +Date: Mon Aug 4 14:01:16 2008 -0500 + + POWERPC: 86xx - add missing CONFIG_HIGH_BATS to sbc8641d config + + Signed-off-by: Becky Bruce + Acked-by: Jon Loeliger + +commit 5276a3584d26a9533404f0ec00c3b61cf9a97939 +Author: Magnus Lilja +Date: Sun Aug 3 21:44:10 2008 +0200 + + i.MX31: Fix mx31_gpio_mux() function and MUX_-macros. + + Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX + contacts instead of only the first 256 ones as is the case prior to + this patch. + + Add missing MUX_* macros and update board files to use the new macros. + + Signed-off-by: Magnus Lilja + +commit b6b183c5b2fffd4c456b7e3fcb064cceb47fe7ac +Author: Magnus Lilja +Date: Sun Aug 3 21:43:37 2008 +0200 + + i.MX31: Fix IOMUX related typos + + Correct the names of some IOMUX macros. + + Signed-off-by: Magnus Lilja + +commit 4d57b0fb2927d4f50d834884b4ec4a7ca01708b0 +Author: Steve Sakoman +Date: Mon Aug 11 20:26:16 2008 +0200 + + OneNAND: Remove unused parameters to onenand_verify_page + + The block and page parameters of onenand_verify_page() are not used. This causes a compiler error when CONFIG_MTD_ONENAND_VERIFY_WRITE is enabled. + + Signed-off-by: Steve Sakoman + Signed-off-by: Dirk Behme + +commit e84d568fa2a9f4ce7888141e71676368ef6b3f25 +Author: Anatolij Gustschin +Date: Fri Aug 8 18:00:40 2008 +0200 + + video: fix bug in cfb_console code + + FILL_15BIT_555RGB macro extension for pixel swapping + by commit bed53753dd1d7e6bcbea4339be0fb7760214cc35 + introduced a bug in cfb_console: + + Bitmaps with odd-numbered width won't be rendered + correctly and even U-Boot crashes are observed on + some platforms while repeated rendering of such + bitmaps with "bmp display". Also if a bitmap is + rendered to an odd-numbered x starting position, + the same problem occurs. This patch is an attempt + to fix it. + + Signed-off-by: Anatolij Gustschin + +commit d9015f6a50d7258125349ef5c2af836458a0029a +Author: Anatolij Gustschin +Date: Fri Aug 8 18:00:39 2008 +0200 + + video: fix bug in logo_plot + + If logo_plot() should ever be called with x starting + position other than zero and for pixel depths greater + than 8bpp, logo colors distortion will be observed. + This patch fixes the issue. + + Signed-off-by: Anatolij Gustschin + +commit 406819ae94f79f5b59e01d163380ca7d83709251 +Author: Wolfgang Denk +Date: Mon Aug 11 00:17:52 2008 +0200 + + MAINTAINERS: sort entries + + Signed-off-by: Wolfgang Denk + +commit cfc442d7913d4d1c3a9bf494f90c012c2f8c3bdc +Author: Roy Zang +Date: Thu Aug 7 18:19:28 2008 +0800 + + Add mpc7448hpc2 maintainer information + + Signed-off-by: Roy Zang + +commit a9fe0c3e7ca48afa50d6a0db99fa91e7282d73d8 +Author: Gururaja Hebbar K R +Date: Thu Aug 7 13:13:27 2008 +0530 + + common/cmd_load.c - Minor code & Coding Style cleanup + + - os_data_header Variable is a carry over feature + & unused. So removed all instance of this variable + - Minor Code Style Update + + Signed-off-by: Gururaja Hebbar + Acked-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 0d28f34bbe56d0971bd603789dcc6fe7adf11f14 +Author: Magnus Lilja +Date: Wed Aug 6 19:32:33 2008 +0200 + + Update the U-Boot wiki URL. + + Signed-off-by: Magnus Lilja + +commit aa5ffa16d7e4c461b7b77bf8e79d2ef5638cf754 +Author: dirk.behme@googlemail.com +Date: Sun Aug 10 17:56:36 2008 +0200 + + OneNAND: Remove base address offset usage + + While locally preparing some U-Boot patches for ARM based OMAP3 boards, some + using OneNAND and some using NAND, we found some differences in OneNAND and + NAND command address handling. + + As this might confuse users (it already confused us), we like to align OneNAND + and NAND address handling. + + The issue is that cmd_onenand.c subtracts the onenand base address from the + addresses you type into the u-boot command line so, unlike nand, you can't + use addresses relative to the start of the onenand part e.g. this won't work: + + onenand read 82000000 280000 400000 + + you have to use: + + onenand read 82000000 20280000 400000 + + Looking at recent git, the only board currently using OneNAND is Apollon, and + for this the OneNAND base address is 0 (apollon.h) + + #define CFG_ONENAND_BASE 0x00000000 + + so patch below won't break any existing boards and will align OneNAND and NAND + handling on boards where OneNAND base address is != 0. + + Signed-off-by: Steve Sakoman + Signed-off-by: Manikandan Pillai + Signed-off-by: Dirk Behme + +commit c11528083ef6e55e76df742228c26e39d151813d +Author: Kumar Gala +Date: Thu Aug 7 09:28:20 2008 -0500 + + mpc85xx: workaround old binutils bug + + The recent change to move the .bss outside of the image gives older + binutils (ld from eldk4.1/binutils-2.16) some headache: + + ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4) + ppc_85xx-ld: final link failed: Bad value + + We workaround it by being explicit about the program headers and not + assigning the .bss to a program header. + + Signed-off-by: Kumar Gala + +commit 0bf202ec586d4466c900e987720fa635c594d689 +Author: Wolfgang Denk +Date: Sun Aug 10 01:26:26 2008 +0200 + + Revert "[new uImage] Add autostart flag to bootm_headers structure" + + This reverts commit f5614e7926863bf0225ec860d9b319741a9c4004. + + The commit was based on a misunderstanding of the (documented) + meaning of the 'autostart' environment variable. It might cause + boards to hang if 'autostart' was used, with the potential to brick + them. Go back to the documented behaviour. + + Conflicts: + + common/cmd_bootm.c + common/image.c + include/image.h + + Signed-off-by: Wolfgang Denk + +commit 29f8f58ff40c67f7f2e11afd1715173094e52ac2 +Author: Wolfgang Denk +Date: Sat Aug 9 23:17:32 2008 +0200 + + TQM8xx{L,M}: try to normalize config files for TQM8xx? based board + + - enable CFI driver where this was forgotten + - enable mtdparts support + - adjust default environment + etc. + + Signed-off-by: Wolfgang Denk + +commit 41266c9b5a5f873df3ec891bb0907616958b5602 +Author: Peter Tyser +Date: Tue Aug 5 10:51:57 2008 -0500 + + FIT: Fix handling of images without ramdisks + + boot_get_ramdisk() should not treat the case when a FIT image does + not contain a ramdisk as an error. + + Signed-off-by: Peter Tyser + Acked-by: Michal Simek + +commit f77d92a3f56d88e63cc02226a1204b3bdbac6961 +Author: Sergey Lapin +Date: Sat Aug 9 01:39:09 2008 +0400 + + DataFlash: AT45DB021 fix and AT45DB081 support + + Fix for page size of AT45DB021. Also adding bigger AT45DB081 + which comes with some newer boards. + + Signed-off-by: Sergey Lapin + +commit ba9324451b662dd393afa53e5cc36fc5d3d10966 +Author: Nobuhiro Iwamatsu +Date: Fri Aug 8 16:30:23 2008 +0900 + + sh: Update sh7763rdp config + + Add sh_eth support to sh7763rdp. + + Signed-off-by: Nobuhiro Iwamatsu + +commit 21f971ec265f6042ec21636d55d06a6bc0751077 +Author: Wolfgang Denk +Date: Mon Jul 7 01:22:29 2008 +0200 + + TQM823L: re-enable logo support; update LCD_INFO text + + Signed-off-by: Wolfgang Denk + +commit 3b8d17f0f082073346c0df017c9dfd6acdb40d6d +Author: Wolfgang Denk +Date: Fri Aug 8 16:41:56 2008 +0200 + + TQM8xxL: fix support for second flash bank + + When switching the TQM8xxL modules to use the CFI flash driver, + support for the second flash bank was broken because the CFI driver + did not support dynamically sized banks. This gets fixed now. + + Signed-off-by: Wolfgang Denk + +commit 2a112b234d879f6390503a5f4e38246acce9d0b0 +Author: Wolfgang Denk +Date: Fri Aug 8 16:39:54 2008 +0200 + + CFI: allow for dynamically determined flash sizes and addresses + + The CFI driver allowed only for static initializers in the + CFG_FLASH_BANKS_LIST definition, i. e. it did not allow to map + several flash banks contiguously if the bank sizes were not known in + advance, which kind of violates U-Boot's design philosophy. + + (will be used for example by the TQM8xxL boards) + + Signed-off-by: Wolfgang Denk + +commit d9d78ee46d9a396d0a81d00c2b003a9bd32c2e61 +Author: Ben Warren +Date: Thu Aug 7 23:26:35 2008 -0700 + + QE UEC: Fix compiler warnings + + Moved static functions earlier in file so forward declarations are not needed. + + Signed-off-by: Ben Warren + +commit d5d28fe4aad5f4535400647a5617c11039506467 +Author: David Saada +Date: Mon Mar 31 02:37:38 2008 -0700 + + QE UEC: Add MII Commands + + Add MII commands to the UEC driver. Note that once a UEC device is selected, + any device on its MDIO bus can be addressed. + + Signed-off-by: David Saada + Signed-off-by: Ben Warren + +commit fd0f2f3796ff2a7a32d35deb1b7996e485849df7 +Author: Yoshihiro Shimoda +Date: Wed Jul 9 21:07:38 2008 +0900 + + usb: add support for R8A66597 usb controller + + add support for Renesas R8A66597 usb controller. + This patch supports USB Host mode. + + Signed-off-by: Yoshihiro Shimoda + Signed-off-by: Markus Klotzbuecher + +commit 1d10dcd041aaeae9fd7c821005692898a0303382 +Author: Hunter, Jon +Date: Sat Jul 26 18:59:16 2008 -0500 + + Add support for OMAP5912 and OMAP16xx to usbdcore_omap1510.c + + Add support to drivers/usb/usbdcore_omap1510.c for OMAP5912 and OMAP16xx devices. + + Signed-off-by: Jon Hunter + Signed-off-by: Markus Klotzbuecher + +commit eab1007334b93a6209f1ec33615e26ef5311ede7 +Author: Steven A. Falco +Date: Wed Aug 6 15:42:52 2008 -0400 + + ppc4xx: Sequoia has two UARTs in "4-pin" mode. Configure the GPIOs as per schematic. + + The Sequoia board has two UARTs in "4-pin" mode. This patch modifies the GPIO + configuration to match the schematic, and also sets the SDR0_PFC1 register to + select the corresponding mode for the UARTs. + + Signed-off-by: Steven A. Falco + Signed-off-by: Stefan Roese + +commit 6689484ccd43189322aaa5a1c6cd02cdd511ad7d +Author: Kenneth Johansson +Date: Tue Jul 15 12:13:38 2008 +0200 + + mpc5121: Move iopin features from board specific to common files. + + And in the process eliminate some duplicate register defines. + + Signed-off-by: Kenneth Johansson + +commit ef11df6b66ecf5797e94ba322254b8fb7a4e2e12 +Author: John Rigby +Date: Tue Aug 5 17:38:57 2008 -0600 + + mpc5121: squash some fdt fixup errors + + On ADS5121 when booting linux the following errors are seen: + Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND + Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND + Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND + + This is caused by ft_cpu_setup trying to deal with + both old and new soc node naming. This patch + fixes this by being smarter about what to + fixup. + + Also do soc node fixups by compatible instead of by path. + A new board config called OF_SOC_COMPAT defined + to be "fsl,mpc5121-immr" replaces the old + OF_SOC node path that was defined to be "soc@80000000". + + Old device trees still work, but the compatiblity + is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES + which is on by default in include/configs/ads5121.h. + + Signed-off-by: John Rigby + +commit 81091f58f0c58ecd26c5b05de2ae20ca6cdb521c +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Aug 2 23:48:30 2008 +0200 + + drivers/serial: Move conditional compilation to Makefile for CONFIG_* macros + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 4cd7e6528f61ec669755c3754bb4f9779874fab3 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Aug 2 23:48:32 2008 +0200 + + nios2/sysid: fix printf warning + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 66da6fa0e35e7ee56628c85981709afe7180fc8e +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Aug 2 23:48:33 2008 +0200 + + Fix remaining build issues with MPC8xx FADS boards. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 81d3f1fdddafd1eb53bbca8739f488d417eb3dd2 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Aug 2 23:48:31 2008 +0200 + + nios2: fix phys_addr_t and phys_size_t support + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 5fa62000db6d0b46ecdeadbeb50faf5197db49ef +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Aug 2 23:48:34 2008 +0200 + + mvbc_p: Fix problem with '#if (CONFIG_CMD_KGDB)' + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1464eff77e7fdaed609ecf263a2423c9dcf96b1f +Author: Mark Jackson +Date: Fri Aug 1 09:48:29 2008 +0100 + + Fix bitmap display for atmel lcd controller + + The current lcd_display_bitmap() function does not work properly + for the Atmel LCD controller. + + 2 fixes need to be done:- + + (a) when setting the colour map, use the lcd_setcolreg() function + as provided by the Atmel driver + (b) the data is never actually written to the lcd framebuffer !! + + Signed-off-by: Mark Jackson + +commit 2a433c66b1e2770349fe4911be23c375f053ebd8 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Aug 1 08:40:34 2008 +0200 + + qemu_mips: update README to follow qemu update about default machine + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ac169d645f5f0e0b9a232563099209e92a355d8e +Author: TsiChung Liew +Date: Thu Jul 31 19:53:21 2008 -0500 + + ColdFire: Fix compilation issue caused by a missing function + + Implement usec2ticks() which is used by fsl_i2c.c in + lib_m68k/time.c + + Signed-off-by: TsiChung Liew + +commit 01ae85b58b51d2fb1fac5b93095f6042cf48ae7b +Author: TsiChung Liew +Date: Thu Jul 31 19:53:06 2008 -0500 + + Fix compilation error for TASREG + + TASREG is ColdFire platform, the include ppc4xx.h in + board/esd/common/flash.c causes conflict. + + Signed-off-by: TsiChung Liew + +commit 35d3bd3cc35c508a6823dac77e0fd126808e4fc7 +Author: TsiChung Liew +Date: Thu Jul 31 19:52:36 2008 -0500 + + Fix compilation error for MCF5275 + + Rename OBJ to COBJ in board/platform/Makefile + + Signed-off-by: TsiChung Liew + +commit 5c40548f01218360a1f1395198c50ff45f3035b5 +Author: TsiChung Liew +Date: Thu Jul 31 19:52:28 2008 -0500 + + Fix compile error caused by incorrect function return type + + Rename int mii_init(void) to void mii_init(void) for idmr + ColdFire platform + + Signed-off-by: TsiChung Liew + +commit a58c78067c928976c082c758d3987e89ead5b191 +Author: Wolfgang Denk +Date: Fri Aug 1 12:06:22 2008 +0200 + + Fix build issues with MPC8xx FADS boards. + + Signed-off-by: Wolfgang Denk + +commit 4b50cd12a3b3c644153c4cf393f4a4c12289e5aa +Author: Wolfgang Denk +Date: Thu Jul 31 17:54:03 2008 +0200 + + Prepare v1.3.4-rc2: update CHANGELOG + + Signed-off-by: Wolfgang Denk + commit a48311557db6e7e9473a6163b44bb1e6c6ed64c4 Author: Mark Jackson Date: Thu Jul 31 16:09:00 2008 +0100 @@ -5117,6 +5693,18 @@ Date: Mon May 5 14:06:11 2008 +0200 Signed-off-by: Jens Gehrlein Signed-off-by: Ben Warren +commit 6324e5bec8825f7fee3026ffbd394454ae8b53fb +Author: Christian Eggers +Date: Wed May 21 21:29:10 2008 +0200 + + Fix endianess conversion in usb_ohci.c + + Sorry, I forgot this line: + + Signed-off-by: Christian Eggers + + I think this must be swapped (result may be equal). + commit c918261c6d9f265f88baf70f8a73dfe6f0cb9596 Author: Christian Eggers Date: Wed May 21 22:12:00 2008 +0200 diff --git a/Makefile b/Makefile index 3179c6725b9..082b08e2c4c 100644 --- a/Makefile +++ b/Makefile @@ -24,7 +24,7 @@ VERSION = 1 PATCHLEVEL = 3 SUBLEVEL = 4 -EXTRAVERSION = -rc2 +EXTRAVERSION = U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) VERSION_FILE = $(obj)include/version_autogenerated.h diff --git a/drivers/usb/r8a66597.h b/drivers/usb/r8a66597.h index 54a1f26aefc..9af6446c134 100644 --- a/drivers/usb/r8a66597.h +++ b/drivers/usb/r8a66597.h @@ -593,7 +593,6 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port, /* Our Vendor Specific Request */ #define RH_SET_EP 0x2000 - /* Hub port features */ #define RH_PORT_CONNECTION 0x00 #define RH_PORT_ENABLE 0x01 @@ -620,7 +619,6 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port, #define RH_REQ_ERR -1 #define RH_NACK 0x00 - /* OHCI ROOT HUB REGISTER MASKS */ /* roothub.portstatus [i] bits */ @@ -658,6 +656,4 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port, #define RH_A_NOCP (1 << 12) /* no over current protection */ #define RH_A_POTPGT (0xff << 24) /* power on to power good time */ - #endif /* __R8A66597_H__ */ - diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h index 66db2964952..79b71db75a6 100644 --- a/include/configs/FPS850L.h +++ b/include/configs/FPS850L.h @@ -221,7 +221,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h index 84607ccc32d..ec757e2ff65 100644 --- a/include/configs/FPS860L.h +++ b/include/configs/FPS860L.h @@ -221,7 +221,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index f807271ba65..9cc196410c3 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -235,7 +235,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index 431ae8c5a23..5edd37935d5 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -231,7 +231,7 @@ "128k(dtb)," \ "1920k(kernel)," \ "5632(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index 7946c13a1ce..9edf0d8072f 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -220,7 +220,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index 777776d421b..e2c1ce80fad 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -220,7 +220,7 @@ "128k(dtb)," \ "1920k(kernel)," \ "5632(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index 0549cbd94a6..dd19d4e5785 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -225,7 +225,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index bc092b7f211..8a1c350cce3 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -260,7 +260,7 @@ "128k(dtb)," \ "1920k(kernel)," \ "5632(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index 065156fe313..803cdb854c4 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -224,7 +224,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index ff610bfe3ce..071da1e607d 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -225,7 +225,7 @@ "128k(dtb)," \ "1920k(kernel)," \ "5632(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index 33ff8a909aa..d34f6bea649 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -228,7 +228,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index 1ec44319eef..9270e449834 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -229,7 +229,7 @@ "128k(dtb)," \ "1920k(kernel)," \ "5632(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 0cee9f4fe4f..d916d533728 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -269,7 +269,7 @@ "128k(dtb)," \ "1920k(kernel)," \ "5632(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h index 54d9421d717..f1048861d86 100644 --- a/include/configs/virtlab2.h +++ b/include/configs/virtlab2.h @@ -229,7 +229,7 @@ "128k(dtb)," \ "1664k(kernel)," \ "2m(rootfs)," \ - "4m(data)" + "4m(data)" /*----------------------------------------------------------------------- * Hardware Information Block -- cgit v1.3.1 From 90ef117b68387d66763291af0117677644166611 Mon Sep 17 00:00:00 2001 From: William Juul Date: Thu, 15 Nov 2007 12:23:57 +0100 Subject: Incorporate yaffs2 into U-boot To use YAFFS2 define CONFIG_YAFFS2 Signed-off-by: William Juul Signed-off-by: Scott Wood --- Makefile | 3 +- common/Makefile | 1 + common/cmd_yaffs2.c | 215 +++++++++++++++++++++++++++ fs/Makefile | 2 +- fs/yaffs2/devextras.h | 13 +- fs/yaffs2/direct/Makefile | 58 ++++---- fs/yaffs2/direct/dtest.c | 2 + fs/yaffs2/direct/yaffs_fileem.c | 5 +- fs/yaffs2/direct/yaffs_fileem2k.c | 4 +- fs/yaffs2/direct/yaffs_flashif.c | 3 +- fs/yaffs2/direct/yaffs_malloc.h | 5 +- fs/yaffs2/direct/yaffs_ramdisk.c | 5 +- fs/yaffs2/direct/yaffs_ramem2k.c | 3 +- fs/yaffs2/direct/yaffscfg.c | 303 ++++++++++++++++++++++++++++++++++++-- fs/yaffs2/direct/yaffscfg.h | 1 + fs/yaffs2/direct/yaffscfg2k.c | 4 +- fs/yaffs2/direct/yaffsfs.c | 15 +- fs/yaffs2/direct/ydirectenv.h | 8 +- fs/yaffs2/yaffs_checkptrw.c | 7 +- fs/yaffs2/yaffs_ecc.c | 4 +- fs/yaffs2/yaffs_guts.c | 27 +++- fs/yaffs2/yaffs_guts.h | 26 ++-- fs/yaffs2/yaffs_mtdif.c | 7 +- fs/yaffs2/yaffs_mtdif2.c | 5 +- fs/yaffs2/yaffs_nand.c | 6 +- fs/yaffs2/yaffs_packedtags1.c | 3 + fs/yaffs2/yaffs_packedtags2.c | 3 + fs/yaffs2/yaffs_qsort.c | 3 + fs/yaffs2/yaffs_tagscompat.c | 3 + fs/yaffs2/yaffs_tagsvalidity.c | 3 + fs/yaffs2/yportenv.h | 8 +- 31 files changed, 666 insertions(+), 89 deletions(-) create mode 100644 common/cmd_yaffs2.c (limited to 'Makefile') diff --git a/Makefile b/Makefile index 082b08e2c4c..b2048847c6e 100644 --- a/Makefile +++ b/Makefile @@ -210,7 +210,7 @@ LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ - fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a + fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/direct/libyaffs2.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += drivers/bios_emulator/libatibiosemu.a @@ -378,6 +378,7 @@ TAG_SUBDIRS += fs/cramfs TAG_SUBDIRS += fs/fat TAG_SUBDIRS += fs/fdos TAG_SUBDIRS += fs/jffs2 +TAG_SUBDIRS += fs/yaffs2/direct TAG_SUBDIRS += net TAG_SUBDIRS += disk TAG_SUBDIRS += common diff --git a/common/Makefile b/common/Makefile index 42871087a48..ecf755f3f2b 100644 --- a/common/Makefile +++ b/common/Makefile @@ -98,6 +98,7 @@ COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o COBJS-$(CONFIG_CMD_USB) += cmd_usb.o COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o +COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o COBJS-y += cmd_vfd.o COBJS-y += command.o COBJS-y += console.o diff --git a/common/cmd_yaffs2.c b/common/cmd_yaffs2.c new file mode 100644 index 00000000000..ac4a518b397 --- /dev/null +++ b/common/cmd_yaffs2.c @@ -0,0 +1,215 @@ +#include + +#include +#include + +#ifdef YAFFS2_DEBUG +#define PRINTF(fmt,args...) printf (fmt ,##args) +#else +#define PRINTF(fmt,args...) +#endif + +extern void cmd_yaffs_mount(char *mp); +extern void cmd_yaffs_umount(char *mp); +extern void cmd_yaffs_read_file(char *fn); +extern void cmd_yaffs_write_file(char *fn,char bval,int sizeOfFile); +extern void cmd_yaffs_ls(const char *mountpt, int longlist); +extern void cmd_yaffs_mwrite_file(char *fn, char *addr, int size); +extern void cmd_yaffs_mread_file(char *fn, char *addr); +extern void cmd_yaffs_mkdir(const char *dir); +extern void cmd_yaffs_rmdir(const char *dir); +extern void cmd_yaffs_rm(const char *path); +extern void cmd_yaffs_mv(const char *oldPath, const char *newPath); + +extern int yaffs_DumpDevStruct(const char *path); + + +int do_ymount (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *mtpoint = argv[1]; + cmd_yaffs_mount(mtpoint); + + return(0); +} + +int do_yumount (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *mtpoint = argv[1]; + cmd_yaffs_umount(mtpoint); + + return(0); +} + +int do_yls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *dirname = argv[argc-1]; + + cmd_yaffs_ls(dirname, (argc>2)?1:0); + + return(0); +} + +int do_yrd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *filename = argv[1]; + printf ("Reading file %s ", filename); + + cmd_yaffs_read_file(filename); + + printf ("done\n"); + return(0); +} + +int do_ywr (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *filename = argv[1]; + ulong value = simple_strtoul(argv[2], NULL, 16); + ulong numValues = simple_strtoul(argv[3], NULL, 16); + + printf ("Writing value (%x) %x times to %s... ", value, numValues, filename); + + cmd_yaffs_write_file(filename,value,numValues); + + printf ("done\n"); + return(0); +} + +int do_yrdm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *filename = argv[1]; + ulong addr = simple_strtoul(argv[2], NULL, 16); + + cmd_yaffs_mread_file(filename, (char *)addr); + + return(0); +} + +int do_ywrm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *filename = argv[1]; + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong size = simple_strtoul(argv[3], NULL, 16); + + cmd_yaffs_mwrite_file(filename, (char *)addr, size); + + return(0); +} + +int do_ymkdir (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *dirname = argv[1]; + + cmd_yaffs_mkdir(dirname); + + return(0); +} + +int do_yrmdir (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *dirname = argv[1]; + + cmd_yaffs_rmdir(dirname); + + return(0); +} + +int do_yrm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *path = argv[1]; + + cmd_yaffs_rm(path); + + return(0); +} + +int do_ymv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *oldPath = argv[1]; + char *newPath = argv[2]; + + cmd_yaffs_mv(newPath, oldPath); + + return(0); +} + +int do_ydump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + char *dirname = argv[1]; + if (yaffs_DumpDevStruct(dirname) != 0) + printf("yaffs_DumpDevStruct returning error when dumping path: , %s\n", dirname); + return 0; +} + + + +U_BOOT_CMD( + ymount, 3, 0, do_ymount, + "ymount\t- mount yaffs\n", + "\n" +); + +U_BOOT_CMD( + yumount, 3, 0, do_yumount, + "yumount\t- unmount yaffs\n", + "\n" +); + +U_BOOT_CMD( + yls, 4, 0, do_yls, + "yls\t- yaffs ls\n", + "[-l] name\n" +); + +U_BOOT_CMD( + yrd, 2, 0, do_yrd, + "yrd\t- read file from yaffs\n", + "filename\n" +); + +U_BOOT_CMD( + ywr, 4, 0, do_ywr, + "ywr\t- write file to yaffs\n", + "filename value num_vlues\n" +); + +U_BOOT_CMD( + yrdm, 3, 0, do_yrdm, + "yrdm\t- read file to memory from yaffs\n", + "filename offset\n" +); + +U_BOOT_CMD( + ywrm, 4, 0, do_ywrm, + "ywrm\t- write file from memory to yaffs\n", + "filename offset size\n" +); + +U_BOOT_CMD( + ymkdir, 2, 0, do_ymkdir, + "ymkdir\t- YAFFS mkdir\n", + "dirname\n" +); + +U_BOOT_CMD( + yrmdir, 2, 0, do_yrmdir, + "yrmdir\t- YAFFS rmdir\n", + "dirname\n" +); + +U_BOOT_CMD( + yrm, 2, 0, do_yrm, + "yrm\t- YAFFS rm\n", + "path\n" +); + +U_BOOT_CMD( + ymv, 4, 0, do_ymv, + "ymv\t- YAFFS mv\n", + "oldPath newPath\n" +); + +U_BOOT_CMD( + ydump, 2, 0, do_ydump, + "ydump\t- YAFFS device struct\n", + "dirname\n" +); diff --git a/fs/Makefile b/fs/Makefile index 273d90e011b..48cf1d2c3a8 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 +SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 yaffs2/direct $(obj).depend all: @for dir in $(SUBDIRS) ; do \ diff --git a/fs/yaffs2/devextras.h b/fs/yaffs2/devextras.h index 9635c7a7381..9acda79e860 100644 --- a/fs/yaffs2/devextras.h +++ b/fs/yaffs2/devextras.h @@ -28,13 +28,19 @@ #define new newHack #endif -#if !(defined __KERNEL__) || (defined WIN32) +/* XXX U-BOOT XXX */ +#if 1 /* !(defined __KERNEL__) || (defined WIN32) */ /* User space defines */ +/* XXX U-BOOT XXX */ +#if 0 typedef unsigned char __u8; typedef unsigned short __u16; typedef unsigned __u32; +#endif + +#include /* * Simple doubly linked list implementation. @@ -213,7 +219,12 @@ static __inline__ void list_splice(struct list_head *list, #define DT_WHT 14 #ifndef WIN32 +/* XXX U-BOOT XXX */ +#if 0 #include +#else +#include "common.h" +#endif #endif /* diff --git a/fs/yaffs2/direct/Makefile b/fs/yaffs2/direct/Makefile index 6315117cdf2..0ee18e5c8a0 100644 --- a/fs/yaffs2/direct/Makefile +++ b/fs/yaffs2/direct/Makefile @@ -17,50 +17,46 @@ # $Id: Makefile,v 1.15 2007/07/18 19:40:38 charles Exp $ #EXTRA_COMPILE_FLAGS = -DYAFFS_IGNORE_TAGS_ECC +include $(TOPDIR)/config.mk -CFLAGS = -Wall -DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM -DCONFIG_YAFFS_YAFFS2 -g $(EXTRA_COMPILE_FLAGS) -DNO_Y_INLINE -CFLAGS+= -fstack-check -O0 +LIB = $(obj)libyaffs2.a -#CFLAGS+= -Wshadow -Wpointer-arith -Wwrite-strings -Wstrict-prototypes -Wmissing-declarations -#CFLAGS+= -Wmissing-prototypes -Wredundant-decls -Wnested-externs -Winline +COBJS-$(CONFIG_YAFFS2) := \ + yaffscfg.o yaffs_ecc.o yaffsfs.o yaffs_guts.o yaffs_packedtags1.o \ + yaffs_tagscompat.o yaffs_packedtags2.o yaffs_tagsvalidity.o \ + yaffs_nand.o yaffs_checkptrw.o yaffs_qsort.o yaffs_mtdif.o \ + yaffs_mtdif2.o - -DIRECTTESTOBJS = dtest.o yaffscfg2k.o yaffs_ecc.o yaffs_fileem2k.o yaffsfs.o yaffs_guts.o \ - yaffs_packedtags1.o yaffs_ramdisk.o yaffs_ramem2k.o \ - yaffs_tagscompat.o yaffs_packedtags2.o yaffs_tagsvalidity.o yaffs_nand.o \ - yaffs_checkptrw.o yaffs_qsort.o \ -# yaffs_checkptrwtest.o\ - - -BOOTTESTOBJS = bootldtst.o yboot.o yaffs_fileem.o nand_ecc.o - -#ALLOBJS = dtest.o nand_ecc.o yaffscfg.o yaffs_fileem.o yaffsfs.o yaffs_ramdisk.o bootldtst.o yboot.o yaffs_ramem2k.o - -ALLOBJS = $(DIRECTTESTOBJS) $(BOOTTESTOBJS) +SRCS := $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) SYMLINKS = devextras.h yaffs_ecc.c yaffs_ecc.h yaffs_guts.c yaffs_guts.h yaffsinterface.h yportenv.h yaffs_tagscompat.c yaffs_tagscompat.h \ yaffs_packedtags1.c yaffs_packedtags1.h yaffs_packedtags2.c yaffs_packedtags2.h yaffs_nandemul2k.h \ - yaffs_nand.c yaffs_nand.h \ + yaffs_nand.c yaffs_nand.h yaffs_mtdif.c yaffs_mtdif.h \ yaffs_tagsvalidity.c yaffs_tagsvalidity.h yaffs_checkptrw.h yaffs_checkptrw.c \ - yaffs_qsort.c yaffs_qsort.h + yaffs_qsort.c yaffs_qsort.h yaffs_mtdif2.c yaffs_mtdif2.h -#all: directtest2k boottest +# -DCONFIG_YAFFS_NO_YAFFS1 +CFLAGS += -DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM -DCONFIG_YAFFS_YAFFS2 -DNO_Y_INLINE -DLINUX_VERSION_CODE=0x20616 -all: directtest2k +all: $(LIB) -$(ALLOBJS): %.o: %.c - gcc -c $(CFLAGS) $< -o $@ +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) -$(SYMLINKS): - ln -s ../$@ $@ +.PHONY: clean distclean +clean: + rm -f $(OBJS) -directtest2k: $(SYMLINKS) $(DIRECTTESTOBJS) - gcc -o $@ $(DIRECTTESTOBJS) +distclean: clean + rm -f $(LIB) core *.bak .depend +######################################################################### -boottest: $(SYMLINKS) $(BOOTTESTOBJS) - gcc -o $@ $(BOOTTESTOBJS) +# defines $(obj).depend target +include $(SRCTREE)/rules.mk +sinclude $(obj).depend + +######################################################################### -clean: - rm -f $(ALLOBJS) core diff --git a/fs/yaffs2/direct/dtest.c b/fs/yaffs2/direct/dtest.c index be492b47c9a..a9156ca1908 100644 --- a/fs/yaffs2/direct/dtest.c +++ b/fs/yaffs2/direct/dtest.c @@ -15,6 +15,8 @@ * Test code for the "direct" interface. */ +/* XXX U-BOOT XXX */ +#include #include #include diff --git a/fs/yaffs2/direct/yaffs_fileem.c b/fs/yaffs2/direct/yaffs_fileem.c index e3cc30eb8a6..5779d7ebc35 100644 --- a/fs/yaffs2/direct/yaffs_fileem.c +++ b/fs/yaffs2/direct/yaffs_fileem.c @@ -16,6 +16,9 @@ * This is only intended as test code to test persistence etc. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_flashif_c_version = "$Id: yaffs_fileem.c,v 1.3 2007/02/14 01:09:06 wookey Exp $"; @@ -214,5 +217,3 @@ int yflash_InitialiseNAND(yaffs_Device *dev) return YAFFS_OK; } - - diff --git a/fs/yaffs2/direct/yaffs_fileem2k.c b/fs/yaffs2/direct/yaffs_fileem2k.c index 7a3b2999963..34a4e87b3dc 100644 --- a/fs/yaffs2/direct/yaffs_fileem2k.c +++ b/fs/yaffs2/direct/yaffs_fileem2k.c @@ -16,6 +16,9 @@ * This is only intended as test code to test persistence etc. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_flashif_c_version = "$Id: yaffs_fileem2k.c,v 1.12 2007/02/14 01:09:06 wookey Exp $"; @@ -438,4 +441,3 @@ int yflash_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo, yaffs_Blo } return YAFFS_OK; } - diff --git a/fs/yaffs2/direct/yaffs_flashif.c b/fs/yaffs2/direct/yaffs_flashif.c index 5178cb2ac3b..8d51dc6af7f 100644 --- a/fs/yaffs2/direct/yaffs_flashif.c +++ b/fs/yaffs2/direct/yaffs_flashif.c @@ -11,6 +11,8 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include const char *yaffs_flashif_c_version = "$Id: yaffs_flashif.c,v 1.3 2007/02/14 01:09:06 wookey Exp $"; @@ -226,4 +228,3 @@ int yflash_InitialiseNAND(yaffs_Device *dev) { return YAFFS_OK; } - diff --git a/fs/yaffs2/direct/yaffs_malloc.h b/fs/yaffs2/direct/yaffs_malloc.h index 245f9c96340..122fb4c06f8 100644 --- a/fs/yaffs2/direct/yaffs_malloc.h +++ b/fs/yaffs2/direct/yaffs_malloc.h @@ -14,8 +14,11 @@ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. */ +/* XXX U-BOOT XXX */ +#if 0 #include - +#endif + void *yaffs_malloc(size_t size); void yaffs_free(void *ptr); diff --git a/fs/yaffs2/direct/yaffs_ramdisk.c b/fs/yaffs2/direct/yaffs_ramdisk.c index 6afee81f4cb..57f27ce07c0 100644 --- a/fs/yaffs2/direct/yaffs_ramdisk.c +++ b/fs/yaffs2/direct/yaffs_ramdisk.c @@ -18,6 +18,9 @@ * Use this with dev->useNANDECC enabled, then ECC overheads are not required. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_ramdisk_c_version = "$Id: yaffs_ramdisk.c,v 1.4 2007/02/14 01:09:06 wookey Exp $"; @@ -230,5 +233,3 @@ int yramdisk_InitialiseNAND(yaffs_Device *dev) return YAFFS_OK; } - - diff --git a/fs/yaffs2/direct/yaffs_ramem2k.c b/fs/yaffs2/direct/yaffs_ramem2k.c index 1ab053c4673..81617892801 100644 --- a/fs/yaffs2/direct/yaffs_ramem2k.c +++ b/fs/yaffs2/direct/yaffs_ramem2k.c @@ -15,6 +15,8 @@ * yaffs_ramem2k.c: RAM emulation in-kernel for 2K pages (YAFFS2) */ +/* XXX U-BOOT XXX */ +#include const char *yaffs_ramem2k_c_version = "$Id: yaffs_ramem2k.c,v 1.3 2007/02/14 01:09:06 wookey Exp $"; @@ -360,4 +362,3 @@ int nandemul2k_GetNumberOfBlocks(void) {return nandemul2k_CalcNBlocks();} #endif //YAFFS_RAM_ENABLED - diff --git a/fs/yaffs2/direct/yaffscfg.c b/fs/yaffs2/direct/yaffscfg.c index b1d311e5693..a4a0924ef91 100644 --- a/fs/yaffs2/direct/yaffscfg.c +++ b/fs/yaffs2/direct/yaffscfg.c @@ -18,17 +18,34 @@ * There is no need to redistribute this file. */ +/* XXX U-BOOT XXX */ +#include + +#include +#include "nand.h" #include "yaffscfg.h" #include "yaffsfs.h" +#include "yaffs_packedtags2.h" +#include "yaffs_mtdif.h" +#include "yaffs_mtdif2.h" +#if 0 #include +#else +#include "malloc.h" +#endif unsigned yaffs_traceMask = 0xFFFFFFFF; - +static int yaffs_errno = 0; void yaffsfs_SetError(int err) { //Do whatever to set error - errno = err; + yaffs_errno = err; +} + +int yaffsfs_GetError(void) +{ + return yaffs_errno; } void yaffsfs_Lock(void) @@ -71,27 +88,47 @@ void yaffsfs_LocalInitialisation(void) #include "yaffs_ramdisk.h" #include "yaffs_flashif.h" +static int isMounted = 0; +#define MOUNT_POINT "/flash" +extern nand_info_t nand_info[]; + +/* XXX U-BOOT XXX */ +#if 0 static yaffs_Device ramDev; static yaffs_Device bootDev; static yaffs_Device flashDev; +#endif static yaffsfs_DeviceConfiguration yaffsfs_config[] = { - +/* XXX U-BOOT XXX */ +#if 0 { "/ram", &ramDev}, { "/boot", &bootDev}, { "/flash", &flashDev}, +#else + { MOUNT_POINT, 0}, +#endif {(void *)0,(void *)0} }; int yaffs_StartUp(void) { + struct mtd_info *mtd = &nand_info[0]; + int yaffsVersion = 2; + int nBlocks; + + yaffs_Device *flashDev = calloc(1, sizeof(yaffs_Device)); + yaffsfs_config[0].dev = flashDev; + // Stuff to configure YAFFS // Stuff to initialise anything special (eg lock semaphore). yaffsfs_LocalInitialisation(); // Set up devices +/* XXX U-BOOT XXX */ +#if 0 // /ram ramDev.nBytesPerChunk = 512; ramDev.nChunksPerBlock = 32; @@ -119,20 +156,50 @@ int yaffs_StartUp(void) bootDev.readChunkFromNAND = yflash_ReadChunkFromNAND; bootDev.eraseBlockInNAND = yflash_EraseBlockInNAND; bootDev.initialiseNAND = yflash_InitialiseNAND; +#endif // /flash - flashDev.nBytesPerChunk = 512; - flashDev.nChunksPerBlock = 32; - flashDev.nReservedBlocks = 5; - flashDev.startBlock = 128; // First block after 2MB - flashDev.endBlock = 1023; // Last block in 16MB - flashDev.useNANDECC = 0; // use YAFFS's ECC - flashDev.nShortOpCaches = 10; // Use caches - flashDev.genericDevice = (void *) 2; // Used to identify the device in fstat. - flashDev.writeChunkToNAND = yflash_WriteChunkToNAND; - flashDev.readChunkFromNAND = yflash_ReadChunkFromNAND; - flashDev.eraseBlockInNAND = yflash_EraseBlockInNAND; - flashDev.initialiseNAND = yflash_InitialiseNAND; + flashDev->nReservedBlocks = 5; +// flashDev->nShortOpCaches = (options.no_cache) ? 0 : 10; + flashDev->nShortOpCaches = 10; // Use caches + flashDev->useNANDECC = 0; // do not use YAFFS's ECC + + if (yaffsVersion == 2) + { + flashDev->writeChunkWithTagsToNAND = nandmtd2_WriteChunkWithTagsToNAND; + flashDev->readChunkWithTagsFromNAND = nandmtd2_ReadChunkWithTagsFromNAND; + flashDev->markNANDBlockBad = nandmtd2_MarkNANDBlockBad; + flashDev->queryNANDBlock = nandmtd2_QueryNANDBlock; + flashDev->spareBuffer = YMALLOC(mtd->oobsize); + flashDev->isYaffs2 = 1; +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) + flashDev->nDataBytesPerChunk = mtd->writesize; + flashDev->nChunksPerBlock = mtd->erasesize / mtd->writesize; +#else + flashDev->nDataBytesPerChunk = mtd->oobblock; + flashDev->nChunksPerBlock = mtd->erasesize / mtd->oobblock; +#endif + nBlocks = mtd->size / mtd->erasesize; + + flashDev->nCheckpointReservedBlocks = 10; + flashDev->startBlock = 0; + flashDev->endBlock = nBlocks - 1; + } + else + { + flashDev->writeChunkToNAND = nandmtd_WriteChunkToNAND; + flashDev->readChunkFromNAND = nandmtd_ReadChunkFromNAND; + flashDev->isYaffs2 = 0; + nBlocks = mtd->size / (YAFFS_CHUNKS_PER_BLOCK * YAFFS_BYTES_PER_CHUNK); + flashDev->startBlock = 320; + flashDev->endBlock = nBlocks - 1; + flashDev->nChunksPerBlock = YAFFS_CHUNKS_PER_BLOCK; + flashDev->nDataBytesPerChunk = YAFFS_BYTES_PER_CHUNK; + } + + /* ... and common functions */ + flashDev->eraseBlockInNAND = nandmtd_EraseBlockInNAND; + flashDev->initialiseNAND = nandmtd_InitialiseNAND; yaffs_initialise(yaffsfs_config); @@ -140,5 +207,211 @@ int yaffs_StartUp(void) } +void make_a_file(char *yaffsName,char bval,int sizeOfFile) +{ + int outh; + int i; + unsigned char buffer[100]; + + outh = yaffs_open(yaffsName, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); + if (outh < 0) + { + printf("Error opening file: %d\n", outh); + return; + } + + memset(buffer,bval,100); + + do{ + i = sizeOfFile; + if(i > 100) i = 100; + sizeOfFile -= i; + + yaffs_write(outh,buffer,i); + + } while (sizeOfFile > 0); + + + yaffs_close(outh); +} + +void read_a_file(char *fn) +{ + int h; + int i = 0; + unsigned char b; + + h = yaffs_open(fn, O_RDWR,0); + if(h<0) + { + printf("File not found\n"); + return; + } + + while(yaffs_read(h,&b,1)> 0) + { + printf("%02x ",b); + i++; + if(i > 32) + { + printf("\n"); + i = 0;; + } + } + printf("\n"); + yaffs_close(h); +} + +void cmd_yaffs_mount(char *mp) +{ + yaffs_StartUp(); + int retval = yaffs_mount(mp); + if( retval != -1) + isMounted = 1; + else + printf("Error mounting %s, return value: %d\n", mp, yaffsfs_GetError()); +} + +static void checkMount(void) +{ + if( !isMounted ) + { + cmd_yaffs_mount(MOUNT_POINT); + } +} + +void cmd_yaffs_umount(char *mp) +{ + checkMount(); + if( yaffs_unmount(mp) == -1) + printf("Error umounting %s, return value: %d\n", mp, yaffsfs_GetError()); +} + +void cmd_yaffs_write_file(char *yaffsName,char bval,int sizeOfFile) +{ + checkMount(); + make_a_file(yaffsName,bval,sizeOfFile); +} +void cmd_yaffs_read_file(char *fn) +{ + checkMount(); + read_a_file(fn); +} + + +void cmd_yaffs_mread_file(char *fn, char *addr) +{ + int h; + struct yaffs_stat s; + + checkMount(); + + yaffs_stat(fn,&s); + + printf ("Copy %s to 0x%08x... ", fn, addr); + h = yaffs_open(fn, O_RDWR,0); + if(h<0) + { + printf("File not found\n"); + return; + } + + yaffs_read(h,addr,(int)s.st_size); + printf("\t[DONE]\n"); + + yaffs_close(h); +} + + +void cmd_yaffs_mwrite_file(char *fn, char *addr, int size) +{ + int outh; + + checkMount(); + outh = yaffs_open(fn, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); + if (outh < 0) + { + printf("Error opening file: %d\n", outh); + } + + yaffs_write(outh,addr,size); + + yaffs_close(outh); +} + + +void cmd_yaffs_ls(const char *mountpt, int longlist) +{ + int i; + yaffs_DIR *d; + yaffs_dirent *de; + struct yaffs_stat stat; + char tempstr[255]; + + checkMount(); + d = yaffs_opendir(mountpt); + + if(!d) + { + printf("opendir failed\n"); + } + else + { + for(i = 0; (de = yaffs_readdir(d)) != NULL; i++) + { + if (longlist) + { + sprintf(tempstr, "%s/%s", mountpt, de->d_name); + yaffs_stat(tempstr, &stat); + printf("%-25s\t%7d\n",de->d_name, stat.st_size); + } + else + { + printf("%s\n",de->d_name); + } + } + } +} + + +void cmd_yaffs_mkdir(const char *dir) +{ + checkMount(); + + int retval = yaffs_mkdir(dir, 0); + + if ( retval < 0) + printf("yaffs_mkdir returning error: %d\n", retval); +} + +void cmd_yaffs_rmdir(const char *dir) +{ + checkMount(); + + int retval = yaffs_rmdir(dir); + + if ( retval < 0) + printf("yaffs_rmdir returning error: %d\n", retval); +} + +void cmd_yaffs_rm(const char *path) +{ + checkMount(); + + int retval = yaffs_unlink(path); + + if ( retval < 0) + printf("yaffs_unlink returning error: %d\n", retval); +} + +void cmd_yaffs_mv(const char *oldPath, const char *newPath) +{ + checkMount(); + + int retval = yaffs_rename(newPath, oldPath); + + if ( retval < 0) + printf("yaffs_unlink returning error: %d\n", retval); +} diff --git a/fs/yaffs2/direct/yaffscfg.h b/fs/yaffs2/direct/yaffscfg.h index 2a60dc132cb..6ae169612b8 100644 --- a/fs/yaffs2/direct/yaffscfg.h +++ b/fs/yaffs2/direct/yaffscfg.h @@ -40,6 +40,7 @@ void yaffsfs_Unlock(void); __u32 yaffsfs_CurrentTime(void); void yaffsfs_SetError(int err); +int yaffsfs_GetError(void); #endif diff --git a/fs/yaffs2/direct/yaffscfg2k.c b/fs/yaffs2/direct/yaffscfg2k.c index 6d5f542fc4b..1daede181e3 100644 --- a/fs/yaffs2/direct/yaffscfg2k.c +++ b/fs/yaffs2/direct/yaffscfg2k.c @@ -18,6 +18,9 @@ * There is no need to redistribute this file. */ +/* XXX U-BOOT XXX */ +#include + #include "yaffscfg.h" #include "yaffsfs.h" #include "yaffs_fileem2k.h" @@ -226,4 +229,3 @@ void SetCheckpointReservedBlocks(int n) { flashDev.nCheckpointReservedBlocks = n; } - diff --git a/fs/yaffs2/direct/yaffsfs.c b/fs/yaffs2/direct/yaffsfs.c index a8519c28e71..f62c952ddcc 100644 --- a/fs/yaffs2/direct/yaffsfs.c +++ b/fs/yaffs2/direct/yaffsfs.c @@ -11,12 +11,20 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include +#include + #include "yaffsfs.h" #include "yaffs_guts.h" #include "yaffscfg.h" -#include // for memset #include "yportenv.h" +/* XXX U-BOOT XXX */ +#if 0 +#include // for memset +#endif + #define YAFFSFS_MAX_SYMLINK_DEREFERENCES 5 #ifndef NULL @@ -925,7 +933,7 @@ int yaffs_fstat(int fd, struct yaffs_stat *buf) static int yaffsfs_DoChMod(yaffs_Object *obj,mode_t mode) { - int result; + int result = YAFFS_FAIL; if(obj) { @@ -1158,8 +1166,6 @@ void yaffs_initialise(yaffsfs_DeviceConfiguration *cfgList) cfg->dev->removeObjectCallback = yaffsfs_RemoveObjectCallback; cfg++; } - - } @@ -1502,4 +1508,3 @@ int yaffs_DumpDevStruct(const char *path) } return 0; } - diff --git a/fs/yaffs2/direct/ydirectenv.h b/fs/yaffs2/direct/ydirectenv.h index 0c2820579ea..adcc0b54685 100644 --- a/fs/yaffs2/direct/ydirectenv.h +++ b/fs/yaffs2/direct/ydirectenv.h @@ -24,13 +24,19 @@ #include "devextras.h" +/* XXX U-BOOT XXX */ +#if 0 #include "stdlib.h" #include "stdio.h" #include "string.h" +#include "assert.h" +#endif #include "yaffs_malloc.h" -#include "assert.h" +/* XXX U-BOOT XXX */ +#if 0 #define YBUG() assert(1) +#endif #define YCHAR char #define YUCHAR unsigned char diff --git a/fs/yaffs2/yaffs_checkptrw.c b/fs/yaffs2/yaffs_checkptrw.c index d3a811e2774..f97ba4b4272 100644 --- a/fs/yaffs2/yaffs_checkptrw.c +++ b/fs/yaffs2/yaffs_checkptrw.c @@ -11,6 +11,10 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include +#include + const char *yaffs_checkptrw_c_version = "$Id: yaffs_checkptrw.c,v 1.14 2007/05/15 20:07:40 charles Exp $"; @@ -399,6 +403,3 @@ int yaffs_CheckpointInvalidateStream(yaffs_Device *dev) return yaffs_CheckpointErase(dev); } - - - diff --git a/fs/yaffs2/yaffs_ecc.c b/fs/yaffs2/yaffs_ecc.c index d0b405f1eea..a05a6b583b6 100644 --- a/fs/yaffs2/yaffs_ecc.c +++ b/fs/yaffs2/yaffs_ecc.c @@ -28,6 +28,9 @@ * this bytes influence on the line parity. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_ecc_c_version = "$Id: yaffs_ecc.c,v 1.9 2007/02/14 01:09:06 wookey Exp $"; @@ -328,4 +331,3 @@ int yaffs_ECCCorrectOther(unsigned char *data, unsigned nBytes, return -1; } - diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c index 134ed018ad8..7dc62ef4d99 100644 --- a/fs/yaffs2/yaffs_guts.c +++ b/fs/yaffs2/yaffs_guts.c @@ -11,12 +11,17 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_guts_c_version = "$Id: yaffs_guts.c,v 1.52 2007/10/16 00:45:05 charles Exp $"; #include "yportenv.h" +#include "linux/stat.h" #include "yaffsinterface.h" +#include "yaffsfs.h" #include "yaffs_guts.h" #include "yaffs_tagsvalidity.h" @@ -31,6 +36,7 @@ const char *yaffs_guts_c_version = #include "yaffs_nand.h" #include "yaffs_packedtags2.h" +#include "malloc.h" #ifdef CONFIG_YAFFS_WINCE void yfsd_LockYAFFS(BOOL fsLockOnly); @@ -597,7 +603,6 @@ static int yaffs_VerifyTnodeWorker(yaffs_Object * obj, yaffs_Tnode * tn, int i; yaffs_Device *dev = obj->myDev; int ok = 1; - int nTnodeBytes = (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8; if (tn) { if (level > 0) { @@ -646,7 +651,6 @@ static void yaffs_VerifyFile(yaffs_Object *obj) __u32 lastChunk; __u32 x; __u32 i; - int ok; yaffs_Device *dev; yaffs_ExtendedTags tags; yaffs_Tnode *tn; @@ -854,7 +858,10 @@ static void yaffs_VerifyObjects(yaffs_Device *dev) static Y_INLINE int yaffs_HashFunction(int n) { - n = abs(n); +/* XXX U-BOOT XXX */ + /*n = abs(n); */ + if (n < 0) + n = -n; return (n % YAFFS_NOBJECT_BUCKETS); } @@ -1954,6 +1961,8 @@ static void yaffs_FreeObject(yaffs_Object * tn) yaffs_Device *dev = tn->myDev; +/* XXX U-BOOT XXX */ +#if 0 #ifdef __KERNEL__ if (tn->myInode) { /* We're still hooked up to a cached inode. @@ -1963,7 +1972,7 @@ static void yaffs_FreeObject(yaffs_Object * tn) return; } #endif - +#endif yaffs_UnhashObject(tn); /* Link into the free list. */ @@ -1972,6 +1981,8 @@ static void yaffs_FreeObject(yaffs_Object * tn) dev->nFreeObjects++; } +/* XXX U-BOOT XXX */ +#if 0 #ifdef __KERNEL__ void yaffs_HandleDeferedFree(yaffs_Object * obj) @@ -1981,6 +1992,7 @@ void yaffs_HandleDeferedFree(yaffs_Object * obj) } } +#endif #endif static void yaffs_DeinitialiseObjects(yaffs_Device * dev) @@ -2107,12 +2119,14 @@ yaffs_Object *yaffs_FindObjectByNumber(yaffs_Device * dev, __u32 number) if (i) { in = list_entry(i, yaffs_Object, hashLink); if (in->objectId == number) { +/* XXX U-BOOT XXX */ +#if 0 #ifdef __KERNEL__ /* Don't tell the VFS about this one if it is defered free */ if (in->deferedFree) return NULL; #endif - +#endif return in; } } @@ -5085,11 +5099,14 @@ static int yaffs_UnlinkFile(yaffs_Object * in) int immediateDeletion = 0; if (1) { +/* XXX U-BOOT XXX */ +#if 0 #ifdef __KERNEL__ if (!in->myInode) { immediateDeletion = 1; } +#endif #else if (in->inUse <= 0) { immediateDeletion = 1; diff --git a/fs/yaffs2/yaffs_guts.h b/fs/yaffs2/yaffs_guts.h index 87b539b05b7..ecf701f5a08 100644 --- a/fs/yaffs2/yaffs_guts.h +++ b/fs/yaffs2/yaffs_guts.h @@ -446,9 +446,10 @@ struct yaffs_ObjectStruct { YCHAR shortName[YAFFS_SHORT_NAME_LENGTH + 1]; #endif -#ifndef __KERNEL__ +/* XXX U-BOOT XXX */ +/* #ifndef __KERNEL__ */ __u32 inUse; -#endif +/* #endif */ #ifdef CONFIG_YAFFS_WINCE __u32 win_ctime[2]; @@ -464,10 +465,10 @@ struct yaffs_ObjectStruct { __u32 yst_rdev; -#ifdef __KERNEL__ +/* XXX U-BOOT XXX */ +/* #ifndef __KERNEL__ */ struct inode *myInode; - -#endif +/* #endif */ yaffs_ObjectType variantType; @@ -626,15 +627,18 @@ struct yaffs_DeviceStruct { __u32 chunkMask; -#ifdef __KERNEL__ +/* XXX U-BOOT XXX */ +#if 0 +#ifndef __KERNEL__ struct semaphore sem; /* Semaphore for waiting on erasure.*/ struct semaphore grossLock; /* Gross locking semaphore */ + void (*putSuperFunc) (struct super_block * sb); +#endif +#endif __u8 *spareBuffer; /* For mtdif2 use. Don't know the size of the buffer * at compile time so we have to allocate it. */ - void (*putSuperFunc) (struct super_block * sb); -#endif int isMounted; @@ -883,10 +887,12 @@ yaffs_Object *yaffs_LostNFound(yaffs_Device * dev); void yfsd_WinFileTimeNow(__u32 target[2]); #endif -#ifdef __KERNEL__ - +/* XXX U-BOOT XXX */ +#if 0 +#ifndef __KERNEL__ void yaffs_HandleDeferedFree(yaffs_Object * obj); #endif +#endif /* Debug dump */ int yaffs_DumpObject(yaffs_Object * obj); diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c index 031827e45be..407ef2b4e2c 100644 --- a/fs/yaffs2/yaffs_mtdif.c +++ b/fs/yaffs2/yaffs_mtdif.c @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_mtdif_c_version = "$Id: yaffs_mtdif.c,v 1.19 2007/02/14 01:09:06 wookey Exp $"; @@ -224,7 +227,10 @@ int nandmtd_EraseBlockInNAND(yaffs_Device * dev, int blockNumber) /* Todo finish off the ei if required */ +/* XXX U-BOOT XXX */ +#if 0 sema_init(&dev->sem, 0); +#endif retval = mtd->erase(mtd, &ei); @@ -238,4 +244,3 @@ int nandmtd_InitialiseNAND(yaffs_Device * dev) { return YAFFS_OK; } - diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c index 5a18725730c..cd2a2a15c76 100644 --- a/fs/yaffs2/yaffs_mtdif2.c +++ b/fs/yaffs2/yaffs_mtdif2.c @@ -13,6 +13,10 @@ /* mtd interface for YAFFS2 */ +/* XXX U-BOOT XXX */ +#include +#include "asm/errno.h" + const char *yaffs_mtdif2_c_version = "$Id: yaffs_mtdif2.c,v 1.17 2007/02/14 01:09:06 wookey Exp $"; @@ -229,4 +233,3 @@ int nandmtd2_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo, else return YAFFS_FAIL; } - diff --git a/fs/yaffs2/yaffs_nand.c b/fs/yaffs2/yaffs_nand.c index 6a1585da35a..b20165584fe 100644 --- a/fs/yaffs2/yaffs_nand.c +++ b/fs/yaffs2/yaffs_nand.c @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + const char *yaffs_nand_c_version = "$Id: yaffs_nand.c,v 1.7 2007/02/14 01:09:06 wookey Exp $"; @@ -129,6 +132,3 @@ int yaffs_InitialiseNAND(struct yaffs_DeviceStruct *dev) { return dev->initialiseNAND(dev); } - - - diff --git a/fs/yaffs2/yaffs_packedtags1.c b/fs/yaffs2/yaffs_packedtags1.c index f480bf1df11..a149431d4f2 100644 --- a/fs/yaffs2/yaffs_packedtags1.c +++ b/fs/yaffs2/yaffs_packedtags1.c @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + #include "yaffs_packedtags1.h" #include "yportenv.h" diff --git a/fs/yaffs2/yaffs_packedtags2.c b/fs/yaffs2/yaffs_packedtags2.c index 6860876c438..467d5ac1be3 100644 --- a/fs/yaffs2/yaffs_packedtags2.c +++ b/fs/yaffs2/yaffs_packedtags2.c @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + #include "yaffs_packedtags2.h" #include "yportenv.h" #include "yaffs_tagsvalidity.h" diff --git a/fs/yaffs2/yaffs_qsort.c b/fs/yaffs2/yaffs_qsort.c index 0429838de8e..a74709f0eb2 100644 --- a/fs/yaffs2/yaffs_qsort.c +++ b/fs/yaffs2/yaffs_qsort.c @@ -27,6 +27,9 @@ * SUCH DAMAGE. */ +/* XXX U-BOOT XXX */ +#include + #include "yportenv.h" //#include diff --git a/fs/yaffs2/yaffs_tagscompat.c b/fs/yaffs2/yaffs_tagscompat.c index 7622b1af7c0..70a8a8c72a4 100644 --- a/fs/yaffs2/yaffs_tagscompat.c +++ b/fs/yaffs2/yaffs_tagscompat.c @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + #include "yaffs_guts.h" #include "yaffs_tagscompat.h" #include "yaffs_ecc.h" diff --git a/fs/yaffs2/yaffs_tagsvalidity.c b/fs/yaffs2/yaffs_tagsvalidity.c index 9e0bd1cf56b..f588d3aa213 100644 --- a/fs/yaffs2/yaffs_tagsvalidity.c +++ b/fs/yaffs2/yaffs_tagsvalidity.c @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +/* XXX U-BOOT XXX */ +#include + #include "yaffs_tagsvalidity.h" void yaffs_InitialiseTags(yaffs_ExtendedTags * tags) diff --git a/fs/yaffs2/yportenv.h b/fs/yaffs2/yportenv.h index 8b80c6d6889..b316b16d702 100644 --- a/fs/yaffs2/yportenv.h +++ b/fs/yaffs2/yportenv.h @@ -17,11 +17,17 @@ #ifndef __YPORTENV_H__ #define __YPORTENV_H__ +/* XXX U-BOOT XXX */ +#ifndef CONFIG_YAFFS_DIRECT +#define CONFIG_YAFFS_DIRECT +#endif + #if defined CONFIG_YAFFS_WINCE #include "ywinceenv.h" -#elif defined __KERNEL__ +/* XXX U-BOOT XXX */ +#elif 0 /* defined __KERNEL__ */ #include "moduleconfig.h" -- cgit v1.3.1 From 43ea36fb8fdcbc6e26f0caffe808c63633b18838 Mon Sep 17 00:00:00 2001 From: William Juul Date: Mon, 19 Nov 2007 14:46:00 +0100 Subject: moving files from yaffs2/direct/ to yaffs2/ and deleting all symlinks Signed-off-by: William Juul --- Makefile | 4 +- fs/Makefile | 2 +- fs/yaffs2/Makefile | 56 ++ fs/yaffs2/direct/Makefile | 62 -- fs/yaffs2/direct/devextras.h | 1 - fs/yaffs2/direct/yaffs_checkptrw.c | 1 - fs/yaffs2/direct/yaffs_checkptrw.h | 1 - fs/yaffs2/direct/yaffs_ecc.c | 1 - fs/yaffs2/direct/yaffs_ecc.h | 1 - fs/yaffs2/direct/yaffs_flashif.h | 31 - fs/yaffs2/direct/yaffs_guts.c | 1 - fs/yaffs2/direct/yaffs_guts.h | 1 - fs/yaffs2/direct/yaffs_malloc.h | 26 - fs/yaffs2/direct/yaffs_mtdif.c | 1 - fs/yaffs2/direct/yaffs_mtdif.h | 1 - fs/yaffs2/direct/yaffs_mtdif2.c | 1 - fs/yaffs2/direct/yaffs_mtdif2.h | 1 - fs/yaffs2/direct/yaffs_nand.c | 1 - fs/yaffs2/direct/yaffs_nand.h | 1 - fs/yaffs2/direct/yaffs_nandemul2k.h | 1 - fs/yaffs2/direct/yaffs_packedtags1.c | 1 - fs/yaffs2/direct/yaffs_packedtags1.h | 1 - fs/yaffs2/direct/yaffs_packedtags2.c | 1 - fs/yaffs2/direct/yaffs_packedtags2.h | 1 - fs/yaffs2/direct/yaffs_qsort.c | 1 - fs/yaffs2/direct/yaffs_qsort.h | 1 - fs/yaffs2/direct/yaffs_ramdisk.h | 32 - fs/yaffs2/direct/yaffs_tagscompat.c | 1 - fs/yaffs2/direct/yaffs_tagscompat.h | 1 - fs/yaffs2/direct/yaffs_tagsvalidity.c | 1 - fs/yaffs2/direct/yaffs_tagsvalidity.h | 1 - fs/yaffs2/direct/yaffscfg.c | 417 --------- fs/yaffs2/direct/yaffscfg.h | 46 - fs/yaffs2/direct/yaffsfs.c | 1510 --------------------------------- fs/yaffs2/direct/yaffsfs.h | 233 ----- fs/yaffs2/direct/yaffsinterface.h | 1 - fs/yaffs2/direct/ydirectenv.h | 94 -- fs/yaffs2/direct/yportenv.h | 1 - fs/yaffs2/yaffs_flashif.h | 31 + fs/yaffs2/yaffs_malloc.h | 26 + fs/yaffs2/yaffs_ramdisk.h | 32 + fs/yaffs2/yaffscfg.c | 417 +++++++++ fs/yaffs2/yaffscfg.h | 46 + fs/yaffs2/yaffsfs.c | 1510 +++++++++++++++++++++++++++++++++ fs/yaffs2/yaffsfs.h | 233 +++++ fs/yaffs2/ydirectenv.h | 94 ++ 46 files changed, 2448 insertions(+), 2480 deletions(-) create mode 100644 fs/yaffs2/Makefile delete mode 100644 fs/yaffs2/direct/Makefile delete mode 120000 fs/yaffs2/direct/devextras.h delete mode 120000 fs/yaffs2/direct/yaffs_checkptrw.c delete mode 120000 fs/yaffs2/direct/yaffs_checkptrw.h delete mode 120000 fs/yaffs2/direct/yaffs_ecc.c delete mode 120000 fs/yaffs2/direct/yaffs_ecc.h delete mode 100644 fs/yaffs2/direct/yaffs_flashif.h delete mode 120000 fs/yaffs2/direct/yaffs_guts.c delete mode 120000 fs/yaffs2/direct/yaffs_guts.h delete mode 100644 fs/yaffs2/direct/yaffs_malloc.h delete mode 120000 fs/yaffs2/direct/yaffs_mtdif.c delete mode 120000 fs/yaffs2/direct/yaffs_mtdif.h delete mode 120000 fs/yaffs2/direct/yaffs_mtdif2.c delete mode 120000 fs/yaffs2/direct/yaffs_mtdif2.h delete mode 120000 fs/yaffs2/direct/yaffs_nand.c delete mode 120000 fs/yaffs2/direct/yaffs_nand.h delete mode 120000 fs/yaffs2/direct/yaffs_nandemul2k.h delete mode 120000 fs/yaffs2/direct/yaffs_packedtags1.c delete mode 120000 fs/yaffs2/direct/yaffs_packedtags1.h delete mode 120000 fs/yaffs2/direct/yaffs_packedtags2.c delete mode 120000 fs/yaffs2/direct/yaffs_packedtags2.h delete mode 120000 fs/yaffs2/direct/yaffs_qsort.c delete mode 120000 fs/yaffs2/direct/yaffs_qsort.h delete mode 100644 fs/yaffs2/direct/yaffs_ramdisk.h delete mode 120000 fs/yaffs2/direct/yaffs_tagscompat.c delete mode 120000 fs/yaffs2/direct/yaffs_tagscompat.h delete mode 120000 fs/yaffs2/direct/yaffs_tagsvalidity.c delete mode 120000 fs/yaffs2/direct/yaffs_tagsvalidity.h delete mode 100644 fs/yaffs2/direct/yaffscfg.c delete mode 100644 fs/yaffs2/direct/yaffscfg.h delete mode 100644 fs/yaffs2/direct/yaffsfs.c delete mode 100644 fs/yaffs2/direct/yaffsfs.h delete mode 120000 fs/yaffs2/direct/yaffsinterface.h delete mode 100644 fs/yaffs2/direct/ydirectenv.h delete mode 120000 fs/yaffs2/direct/yportenv.h create mode 100644 fs/yaffs2/yaffs_flashif.h create mode 100644 fs/yaffs2/yaffs_malloc.h create mode 100644 fs/yaffs2/yaffs_ramdisk.h create mode 100644 fs/yaffs2/yaffscfg.c create mode 100644 fs/yaffs2/yaffscfg.h create mode 100644 fs/yaffs2/yaffsfs.c create mode 100644 fs/yaffs2/yaffsfs.h create mode 100644 fs/yaffs2/ydirectenv.h (limited to 'Makefile') diff --git a/Makefile b/Makefile index b2048847c6e..f25750fd7ef 100644 --- a/Makefile +++ b/Makefile @@ -210,7 +210,7 @@ LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ - fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/direct/libyaffs2.a + fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += drivers/bios_emulator/libatibiosemu.a @@ -378,7 +378,7 @@ TAG_SUBDIRS += fs/cramfs TAG_SUBDIRS += fs/fat TAG_SUBDIRS += fs/fdos TAG_SUBDIRS += fs/jffs2 -TAG_SUBDIRS += fs/yaffs2/direct +TAG_SUBDIRS += fs/yaffs2 TAG_SUBDIRS += net TAG_SUBDIRS += disk TAG_SUBDIRS += common diff --git a/fs/Makefile b/fs/Makefile index 48cf1d2c3a8..95ac0e93fe2 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 yaffs2/direct +SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 yaffs2 $(obj).depend all: @for dir in $(SUBDIRS) ; do \ diff --git a/fs/yaffs2/Makefile b/fs/yaffs2/Makefile new file mode 100644 index 00000000000..ab8b27f1da9 --- /dev/null +++ b/fs/yaffs2/Makefile @@ -0,0 +1,56 @@ +# Makefile for YAFFS direct test +# +# +# YAFFS: Yet another Flash File System. A NAND-flash specific file system. +# +# Copyright (C) 2003 Aleph One Ltd. +# +# +# Created by Charles Manning +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# NB Warning this Makefile does not include header dependencies. +# +# $Id: Makefile,v 1.15 2007/07/18 19:40:38 charles Exp $ + +#EXTRA_COMPILE_FLAGS = -DYAFFS_IGNORE_TAGS_ECC +include $(TOPDIR)/config.mk + +LIB = $(obj)libyaffs2.a + +COBJS-$(CONFIG_YAFFS2) := \ + yaffscfg.o yaffs_ecc.o yaffsfs.o yaffs_guts.o yaffs_packedtags1.o \ + yaffs_tagscompat.o yaffs_packedtags2.o yaffs_tagsvalidity.o \ + yaffs_nand.o yaffs_checkptrw.o yaffs_qsort.o yaffs_mtdif.o \ + yaffs_mtdif2.o + +SRCS := $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) + +# -DCONFIG_YAFFS_NO_YAFFS1 +CFLAGS += -DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM -DCONFIG_YAFFS_YAFFS2 -DNO_Y_INLINE -DLINUX_VERSION_CODE=0x20622 + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +.PHONY: clean distclean +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### + diff --git a/fs/yaffs2/direct/Makefile b/fs/yaffs2/direct/Makefile deleted file mode 100644 index 0ee18e5c8a0..00000000000 --- a/fs/yaffs2/direct/Makefile +++ /dev/null @@ -1,62 +0,0 @@ -# Makefile for YAFFS direct test -# -# -# YAFFS: Yet another Flash File System. A NAND-flash specific file system. -# -# Copyright (C) 2003 Aleph One Ltd. -# -# -# Created by Charles Manning -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License version 2 as -# published by the Free Software Foundation. -# -# NB Warning this Makefile does not include header dependencies. -# -# $Id: Makefile,v 1.15 2007/07/18 19:40:38 charles Exp $ - -#EXTRA_COMPILE_FLAGS = -DYAFFS_IGNORE_TAGS_ECC -include $(TOPDIR)/config.mk - -LIB = $(obj)libyaffs2.a - -COBJS-$(CONFIG_YAFFS2) := \ - yaffscfg.o yaffs_ecc.o yaffsfs.o yaffs_guts.o yaffs_packedtags1.o \ - yaffs_tagscompat.o yaffs_packedtags2.o yaffs_tagsvalidity.o \ - yaffs_nand.o yaffs_checkptrw.o yaffs_qsort.o yaffs_mtdif.o \ - yaffs_mtdif2.o - -SRCS := $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) - -SYMLINKS = devextras.h yaffs_ecc.c yaffs_ecc.h yaffs_guts.c yaffs_guts.h yaffsinterface.h yportenv.h yaffs_tagscompat.c yaffs_tagscompat.h \ - yaffs_packedtags1.c yaffs_packedtags1.h yaffs_packedtags2.c yaffs_packedtags2.h yaffs_nandemul2k.h \ - yaffs_nand.c yaffs_nand.h yaffs_mtdif.c yaffs_mtdif.h \ - yaffs_tagsvalidity.c yaffs_tagsvalidity.h yaffs_checkptrw.h yaffs_checkptrw.c \ - yaffs_qsort.c yaffs_qsort.h yaffs_mtdif2.c yaffs_mtdif2.h - -# -DCONFIG_YAFFS_NO_YAFFS1 -CFLAGS += -DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM -DCONFIG_YAFFS_YAFFS2 -DNO_Y_INLINE -DLINUX_VERSION_CODE=0x20616 - -all: $(LIB) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -.PHONY: clean distclean -clean: - rm -f $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak .depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### - diff --git a/fs/yaffs2/direct/devextras.h b/fs/yaffs2/direct/devextras.h deleted file mode 120000 index 6c1a6bf5b8e..00000000000 --- a/fs/yaffs2/direct/devextras.h +++ /dev/null @@ -1 +0,0 @@ -../devextras.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_checkptrw.c b/fs/yaffs2/direct/yaffs_checkptrw.c deleted file mode 120000 index a5d3a1591bf..00000000000 --- a/fs/yaffs2/direct/yaffs_checkptrw.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_checkptrw.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_checkptrw.h b/fs/yaffs2/direct/yaffs_checkptrw.h deleted file mode 120000 index 9b099863879..00000000000 --- a/fs/yaffs2/direct/yaffs_checkptrw.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_checkptrw.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_ecc.c b/fs/yaffs2/direct/yaffs_ecc.c deleted file mode 120000 index d20dc825fe0..00000000000 --- a/fs/yaffs2/direct/yaffs_ecc.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_ecc.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_ecc.h b/fs/yaffs2/direct/yaffs_ecc.h deleted file mode 120000 index cb50bb2329a..00000000000 --- a/fs/yaffs2/direct/yaffs_ecc.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_ecc.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_flashif.h b/fs/yaffs2/direct/yaffs_flashif.h deleted file mode 100644 index f7f4e4227db..00000000000 --- a/fs/yaffs2/direct/yaffs_flashif.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_FLASH_H__ -#define __YAFFS_FLASH_H__ - - -#include "yaffs_guts.h" -int yflash_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); -int yflash_WriteChunkToNAND(yaffs_Device *dev,int chunkInNAND,const __u8 *data, const yaffs_Spare *spare); -int yflash_WriteChunkWithTagsToNAND(yaffs_Device *dev,int chunkInNAND,const __u8 *data, yaffs_ExtendedTags *tags); -int yflash_ReadChunkFromNAND(yaffs_Device *dev,int chunkInNAND, __u8 *data, yaffs_Spare *spare); -int yflash_ReadChunkWithTagsFromNAND(yaffs_Device *dev,int chunkInNAND, __u8 *data, yaffs_ExtendedTags *tags); -int yflash_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); -int yflash_InitialiseNAND(yaffs_Device *dev); -int yflash_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo); -int yflash_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo, yaffs_BlockState *state, int *sequenceNumber); - -#endif diff --git a/fs/yaffs2/direct/yaffs_guts.c b/fs/yaffs2/direct/yaffs_guts.c deleted file mode 120000 index 7a118f86d24..00000000000 --- a/fs/yaffs2/direct/yaffs_guts.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_guts.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_guts.h b/fs/yaffs2/direct/yaffs_guts.h deleted file mode 120000 index c10089fbdc6..00000000000 --- a/fs/yaffs2/direct/yaffs_guts.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_guts.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_malloc.h b/fs/yaffs2/direct/yaffs_malloc.h deleted file mode 100644 index 122fb4c06f8..00000000000 --- a/fs/yaffs2/direct/yaffs_malloc.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __YAFFS_MALLOC_H__ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* XXX U-BOOT XXX */ -#if 0 -#include -#endif - -void *yaffs_malloc(size_t size); -void yaffs_free(void *ptr); - -#endif - diff --git a/fs/yaffs2/direct/yaffs_mtdif.c b/fs/yaffs2/direct/yaffs_mtdif.c deleted file mode 120000 index be0612dd4b9..00000000000 --- a/fs/yaffs2/direct/yaffs_mtdif.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_mtdif.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_mtdif.h b/fs/yaffs2/direct/yaffs_mtdif.h deleted file mode 120000 index bcfc59be0aa..00000000000 --- a/fs/yaffs2/direct/yaffs_mtdif.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_mtdif.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_mtdif2.c b/fs/yaffs2/direct/yaffs_mtdif2.c deleted file mode 120000 index a5b1bb9bb22..00000000000 --- a/fs/yaffs2/direct/yaffs_mtdif2.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_mtdif2.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_mtdif2.h b/fs/yaffs2/direct/yaffs_mtdif2.h deleted file mode 120000 index aa1feda6ab1..00000000000 --- a/fs/yaffs2/direct/yaffs_mtdif2.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_mtdif2.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_nand.c b/fs/yaffs2/direct/yaffs_nand.c deleted file mode 120000 index 6dd30c27605..00000000000 --- a/fs/yaffs2/direct/yaffs_nand.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_nand.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_nand.h b/fs/yaffs2/direct/yaffs_nand.h deleted file mode 120000 index 8a539ee1086..00000000000 --- a/fs/yaffs2/direct/yaffs_nand.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_nand.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_nandemul2k.h b/fs/yaffs2/direct/yaffs_nandemul2k.h deleted file mode 120000 index 1c2d0c252b0..00000000000 --- a/fs/yaffs2/direct/yaffs_nandemul2k.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_nandemul2k.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_packedtags1.c b/fs/yaffs2/direct/yaffs_packedtags1.c deleted file mode 120000 index f7c56393403..00000000000 --- a/fs/yaffs2/direct/yaffs_packedtags1.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_packedtags1.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_packedtags1.h b/fs/yaffs2/direct/yaffs_packedtags1.h deleted file mode 120000 index b74537b5326..00000000000 --- a/fs/yaffs2/direct/yaffs_packedtags1.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_packedtags1.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_packedtags2.c b/fs/yaffs2/direct/yaffs_packedtags2.c deleted file mode 120000 index 243d4b619a9..00000000000 --- a/fs/yaffs2/direct/yaffs_packedtags2.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_packedtags2.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_packedtags2.h b/fs/yaffs2/direct/yaffs_packedtags2.h deleted file mode 120000 index bd1b3a30349..00000000000 --- a/fs/yaffs2/direct/yaffs_packedtags2.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_packedtags2.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_qsort.c b/fs/yaffs2/direct/yaffs_qsort.c deleted file mode 120000 index 928ada73230..00000000000 --- a/fs/yaffs2/direct/yaffs_qsort.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_qsort.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_qsort.h b/fs/yaffs2/direct/yaffs_qsort.h deleted file mode 120000 index 1b04c2107dd..00000000000 --- a/fs/yaffs2/direct/yaffs_qsort.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_qsort.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_ramdisk.h b/fs/yaffs2/direct/yaffs_ramdisk.h deleted file mode 100644 index 045ab42db53..00000000000 --- a/fs/yaffs2/direct/yaffs_ramdisk.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * yaffs_ramdisk.h: yaffs ram disk component - */ - -#ifndef __YAFFS_RAMDISK_H__ -#define __YAFFS_RAMDISK_H__ - - -#include "yaffs_guts.h" -int yramdisk_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); -int yramdisk_WriteChunkWithTagsToNAND(yaffs_Device *dev,int chunkInNAND,const __u8 *data, yaffs_ExtendedTags *tags); -int yramdisk_ReadChunkWithTagsFromNAND(yaffs_Device *dev,int chunkInNAND, __u8 *data, yaffs_ExtendedTags *tags); -int yramdisk_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); -int yramdisk_InitialiseNAND(yaffs_Device *dev); -int yramdisk_MarkNANDBlockBad(yaffs_Device *dev,int blockNumber); -int yramdisk_QueryNANDBlock(yaffs_Device *dev, int blockNo, yaffs_BlockState *state, int *sequenceNumber); -#endif diff --git a/fs/yaffs2/direct/yaffs_tagscompat.c b/fs/yaffs2/direct/yaffs_tagscompat.c deleted file mode 120000 index 4819106edb1..00000000000 --- a/fs/yaffs2/direct/yaffs_tagscompat.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_tagscompat.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_tagscompat.h b/fs/yaffs2/direct/yaffs_tagscompat.h deleted file mode 120000 index bff900c11f8..00000000000 --- a/fs/yaffs2/direct/yaffs_tagscompat.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_tagscompat.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_tagsvalidity.c b/fs/yaffs2/direct/yaffs_tagsvalidity.c deleted file mode 120000 index 4e8b83fe2fa..00000000000 --- a/fs/yaffs2/direct/yaffs_tagsvalidity.c +++ /dev/null @@ -1 +0,0 @@ -../yaffs_tagsvalidity.c \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffs_tagsvalidity.h b/fs/yaffs2/direct/yaffs_tagsvalidity.h deleted file mode 120000 index b7bb01434d5..00000000000 --- a/fs/yaffs2/direct/yaffs_tagsvalidity.h +++ /dev/null @@ -1 +0,0 @@ -../yaffs_tagsvalidity.h \ No newline at end of file diff --git a/fs/yaffs2/direct/yaffscfg.c b/fs/yaffs2/direct/yaffscfg.c deleted file mode 100644 index a4a0924ef91..00000000000 --- a/fs/yaffs2/direct/yaffscfg.c +++ /dev/null @@ -1,417 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * yaffscfg.c The configuration for the "direct" use of yaffs. - * - * This file is intended to be modified to your requirements. - * There is no need to redistribute this file. - */ - -/* XXX U-BOOT XXX */ -#include - -#include -#include "nand.h" -#include "yaffscfg.h" -#include "yaffsfs.h" -#include "yaffs_packedtags2.h" -#include "yaffs_mtdif.h" -#include "yaffs_mtdif2.h" -#if 0 -#include -#else -#include "malloc.h" -#endif - -unsigned yaffs_traceMask = 0xFFFFFFFF; -static int yaffs_errno = 0; - -void yaffsfs_SetError(int err) -{ - //Do whatever to set error - yaffs_errno = err; -} - -int yaffsfs_GetError(void) -{ - return yaffs_errno; -} - -void yaffsfs_Lock(void) -{ -} - -void yaffsfs_Unlock(void) -{ -} - -__u32 yaffsfs_CurrentTime(void) -{ - return 0; -} - -void *yaffs_malloc(size_t size) -{ - return malloc(size); -} - -void yaffs_free(void *ptr) -{ - free(ptr); -} - -void yaffsfs_LocalInitialisation(void) -{ - // Define locking semaphore. -} - -// Configuration for: -// /ram 2MB ramdisk -// /boot 2MB boot disk (flash) -// /flash 14MB flash disk (flash) -// NB Though /boot and /flash occupy the same physical device they -// are still disticnt "yaffs_Devices. You may think of these as "partitions" -// using non-overlapping areas in the same device. -// - -#include "yaffs_ramdisk.h" -#include "yaffs_flashif.h" - -static int isMounted = 0; -#define MOUNT_POINT "/flash" -extern nand_info_t nand_info[]; - -/* XXX U-BOOT XXX */ -#if 0 -static yaffs_Device ramDev; -static yaffs_Device bootDev; -static yaffs_Device flashDev; -#endif - -static yaffsfs_DeviceConfiguration yaffsfs_config[] = { -/* XXX U-BOOT XXX */ -#if 0 - { "/ram", &ramDev}, - { "/boot", &bootDev}, - { "/flash", &flashDev}, -#else - { MOUNT_POINT, 0}, -#endif - {(void *)0,(void *)0} -}; - - -int yaffs_StartUp(void) -{ - struct mtd_info *mtd = &nand_info[0]; - int yaffsVersion = 2; - int nBlocks; - - yaffs_Device *flashDev = calloc(1, sizeof(yaffs_Device)); - yaffsfs_config[0].dev = flashDev; - - // Stuff to configure YAFFS - // Stuff to initialise anything special (eg lock semaphore). - yaffsfs_LocalInitialisation(); - - // Set up devices - -/* XXX U-BOOT XXX */ -#if 0 - // /ram - ramDev.nBytesPerChunk = 512; - ramDev.nChunksPerBlock = 32; - ramDev.nReservedBlocks = 2; // Set this smaller for RAM - ramDev.startBlock = 1; // Can't use block 0 - ramDev.endBlock = 127; // Last block in 2MB. - ramDev.useNANDECC = 1; - ramDev.nShortOpCaches = 0; // Disable caching on this device. - ramDev.genericDevice = (void *) 0; // Used to identify the device in fstat. - ramDev.writeChunkWithTagsToNAND = yramdisk_WriteChunkWithTagsToNAND; - ramDev.readChunkWithTagsFromNAND = yramdisk_ReadChunkWithTagsFromNAND; - ramDev.eraseBlockInNAND = yramdisk_EraseBlockInNAND; - ramDev.initialiseNAND = yramdisk_InitialiseNAND; - - // /boot - bootDev.nBytesPerChunk = 612; - bootDev.nChunksPerBlock = 32; - bootDev.nReservedBlocks = 5; - bootDev.startBlock = 1; // Can't use block 0 - bootDev.endBlock = 127; // Last block in 2MB. - bootDev.useNANDECC = 0; // use YAFFS's ECC - bootDev.nShortOpCaches = 10; // Use caches - bootDev.genericDevice = (void *) 1; // Used to identify the device in fstat. - bootDev.writeChunkToNAND = yflash_WriteChunkToNAND; - bootDev.readChunkFromNAND = yflash_ReadChunkFromNAND; - bootDev.eraseBlockInNAND = yflash_EraseBlockInNAND; - bootDev.initialiseNAND = yflash_InitialiseNAND; -#endif - - // /flash - flashDev->nReservedBlocks = 5; -// flashDev->nShortOpCaches = (options.no_cache) ? 0 : 10; - flashDev->nShortOpCaches = 10; // Use caches - flashDev->useNANDECC = 0; // do not use YAFFS's ECC - - if (yaffsVersion == 2) - { - flashDev->writeChunkWithTagsToNAND = nandmtd2_WriteChunkWithTagsToNAND; - flashDev->readChunkWithTagsFromNAND = nandmtd2_ReadChunkWithTagsFromNAND; - flashDev->markNANDBlockBad = nandmtd2_MarkNANDBlockBad; - flashDev->queryNANDBlock = nandmtd2_QueryNANDBlock; - flashDev->spareBuffer = YMALLOC(mtd->oobsize); - flashDev->isYaffs2 = 1; -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) - flashDev->nDataBytesPerChunk = mtd->writesize; - flashDev->nChunksPerBlock = mtd->erasesize / mtd->writesize; -#else - flashDev->nDataBytesPerChunk = mtd->oobblock; - flashDev->nChunksPerBlock = mtd->erasesize / mtd->oobblock; -#endif - nBlocks = mtd->size / mtd->erasesize; - - flashDev->nCheckpointReservedBlocks = 10; - flashDev->startBlock = 0; - flashDev->endBlock = nBlocks - 1; - } - else - { - flashDev->writeChunkToNAND = nandmtd_WriteChunkToNAND; - flashDev->readChunkFromNAND = nandmtd_ReadChunkFromNAND; - flashDev->isYaffs2 = 0; - nBlocks = mtd->size / (YAFFS_CHUNKS_PER_BLOCK * YAFFS_BYTES_PER_CHUNK); - flashDev->startBlock = 320; - flashDev->endBlock = nBlocks - 1; - flashDev->nChunksPerBlock = YAFFS_CHUNKS_PER_BLOCK; - flashDev->nDataBytesPerChunk = YAFFS_BYTES_PER_CHUNK; - } - - /* ... and common functions */ - flashDev->eraseBlockInNAND = nandmtd_EraseBlockInNAND; - flashDev->initialiseNAND = nandmtd_InitialiseNAND; - - yaffs_initialise(yaffsfs_config); - - return 0; -} - - -void make_a_file(char *yaffsName,char bval,int sizeOfFile) -{ - int outh; - int i; - unsigned char buffer[100]; - - outh = yaffs_open(yaffsName, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); - if (outh < 0) - { - printf("Error opening file: %d\n", outh); - return; - } - - memset(buffer,bval,100); - - do{ - i = sizeOfFile; - if(i > 100) i = 100; - sizeOfFile -= i; - - yaffs_write(outh,buffer,i); - - } while (sizeOfFile > 0); - - - yaffs_close(outh); -} - -void read_a_file(char *fn) -{ - int h; - int i = 0; - unsigned char b; - - h = yaffs_open(fn, O_RDWR,0); - if(h<0) - { - printf("File not found\n"); - return; - } - - while(yaffs_read(h,&b,1)> 0) - { - printf("%02x ",b); - i++; - if(i > 32) - { - printf("\n"); - i = 0;; - } - } - printf("\n"); - yaffs_close(h); -} - -void cmd_yaffs_mount(char *mp) -{ - yaffs_StartUp(); - int retval = yaffs_mount(mp); - if( retval != -1) - isMounted = 1; - else - printf("Error mounting %s, return value: %d\n", mp, yaffsfs_GetError()); -} - -static void checkMount(void) -{ - if( !isMounted ) - { - cmd_yaffs_mount(MOUNT_POINT); - } -} - -void cmd_yaffs_umount(char *mp) -{ - checkMount(); - if( yaffs_unmount(mp) == -1) - printf("Error umounting %s, return value: %d\n", mp, yaffsfs_GetError()); -} - -void cmd_yaffs_write_file(char *yaffsName,char bval,int sizeOfFile) -{ - checkMount(); - make_a_file(yaffsName,bval,sizeOfFile); -} - - -void cmd_yaffs_read_file(char *fn) -{ - checkMount(); - read_a_file(fn); -} - - -void cmd_yaffs_mread_file(char *fn, char *addr) -{ - int h; - struct yaffs_stat s; - - checkMount(); - - yaffs_stat(fn,&s); - - printf ("Copy %s to 0x%08x... ", fn, addr); - h = yaffs_open(fn, O_RDWR,0); - if(h<0) - { - printf("File not found\n"); - return; - } - - yaffs_read(h,addr,(int)s.st_size); - printf("\t[DONE]\n"); - - yaffs_close(h); -} - - -void cmd_yaffs_mwrite_file(char *fn, char *addr, int size) -{ - int outh; - - checkMount(); - outh = yaffs_open(fn, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); - if (outh < 0) - { - printf("Error opening file: %d\n", outh); - } - - yaffs_write(outh,addr,size); - - yaffs_close(outh); -} - - -void cmd_yaffs_ls(const char *mountpt, int longlist) -{ - int i; - yaffs_DIR *d; - yaffs_dirent *de; - struct yaffs_stat stat; - char tempstr[255]; - - checkMount(); - d = yaffs_opendir(mountpt); - - if(!d) - { - printf("opendir failed\n"); - } - else - { - for(i = 0; (de = yaffs_readdir(d)) != NULL; i++) - { - if (longlist) - { - sprintf(tempstr, "%s/%s", mountpt, de->d_name); - yaffs_stat(tempstr, &stat); - printf("%-25s\t%7d\n",de->d_name, stat.st_size); - } - else - { - printf("%s\n",de->d_name); - } - } - } -} - - -void cmd_yaffs_mkdir(const char *dir) -{ - checkMount(); - - int retval = yaffs_mkdir(dir, 0); - - if ( retval < 0) - printf("yaffs_mkdir returning error: %d\n", retval); -} - -void cmd_yaffs_rmdir(const char *dir) -{ - checkMount(); - - int retval = yaffs_rmdir(dir); - - if ( retval < 0) - printf("yaffs_rmdir returning error: %d\n", retval); -} - -void cmd_yaffs_rm(const char *path) -{ - checkMount(); - - int retval = yaffs_unlink(path); - - if ( retval < 0) - printf("yaffs_unlink returning error: %d\n", retval); -} - -void cmd_yaffs_mv(const char *oldPath, const char *newPath) -{ - checkMount(); - - int retval = yaffs_rename(newPath, oldPath); - - if ( retval < 0) - printf("yaffs_unlink returning error: %d\n", retval); -} diff --git a/fs/yaffs2/direct/yaffscfg.h b/fs/yaffs2/direct/yaffscfg.h deleted file mode 100644 index 6ae169612b8..00000000000 --- a/fs/yaffs2/direct/yaffscfg.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * Header file for using yaffs in an application via - * a direct interface. - */ - - -#ifndef __YAFFSCFG_H__ -#define __YAFFSCFG_H__ - - -#include "devextras.h" - -#define YAFFSFS_N_HANDLES 200 - - -typedef struct { - const char *prefix; - struct yaffs_DeviceStruct *dev; -} yaffsfs_DeviceConfiguration; - - -void yaffsfs_Lock(void); -void yaffsfs_Unlock(void); - -__u32 yaffsfs_CurrentTime(void); - -void yaffsfs_SetError(int err); -int yaffsfs_GetError(void); - -#endif - diff --git a/fs/yaffs2/direct/yaffsfs.c b/fs/yaffs2/direct/yaffsfs.c deleted file mode 100644 index f62c952ddcc..00000000000 --- a/fs/yaffs2/direct/yaffsfs.c +++ /dev/null @@ -1,1510 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* XXX U-BOOT XXX */ -#include -#include - -#include "yaffsfs.h" -#include "yaffs_guts.h" -#include "yaffscfg.h" -#include "yportenv.h" - -/* XXX U-BOOT XXX */ -#if 0 -#include // for memset -#endif - -#define YAFFSFS_MAX_SYMLINK_DEREFERENCES 5 - -#ifndef NULL -#define NULL ((void *)0) -#endif - - -const char *yaffsfs_c_version="$Id: yaffsfs.c,v 1.18 2007/07/18 19:40:38 charles Exp $"; - -// configurationList is the list of devices that are supported -static yaffsfs_DeviceConfiguration *yaffsfs_configurationList; - - -/* Some forward references */ -static yaffs_Object *yaffsfs_FindObject(yaffs_Object *relativeDirectory, const char *path, int symDepth); -static void yaffsfs_RemoveObjectCallback(yaffs_Object *obj); - - -// Handle management. -// - - -unsigned int yaffs_wr_attempts; - -typedef struct -{ - __u8 inUse:1; // this handle is in use - __u8 readOnly:1; // this handle is read only - __u8 append:1; // append only - __u8 exclusive:1; // exclusive - __u32 position; // current position in file - yaffs_Object *obj; // the object -}yaffsfs_Handle; - - -static yaffsfs_Handle yaffsfs_handle[YAFFSFS_N_HANDLES]; - -// yaffsfs_InitHandle -/// Inilitalise handles on start-up. -// -static int yaffsfs_InitHandles(void) -{ - int i; - for(i = 0; i < YAFFSFS_N_HANDLES; i++) - { - yaffsfs_handle[i].inUse = 0; - yaffsfs_handle[i].obj = NULL; - } - return 0; -} - -yaffsfs_Handle *yaffsfs_GetHandlePointer(int h) -{ - if(h < 0 || h >= YAFFSFS_N_HANDLES) - { - return NULL; - } - - return &yaffsfs_handle[h]; -} - -yaffs_Object *yaffsfs_GetHandleObject(int handle) -{ - yaffsfs_Handle *h = yaffsfs_GetHandlePointer(handle); - - if(h && h->inUse) - { - return h->obj; - } - - return NULL; -} - - -//yaffsfs_GetHandle -// Grab a handle (when opening a file) -// - -static int yaffsfs_GetHandle(void) -{ - int i; - yaffsfs_Handle *h; - - for(i = 0; i < YAFFSFS_N_HANDLES; i++) - { - h = yaffsfs_GetHandlePointer(i); - if(!h) - { - // todo bug: should never happen - } - if(!h->inUse) - { - memset(h,0,sizeof(yaffsfs_Handle)); - h->inUse=1; - return i; - } - } - return -1; -} - -// yaffs_PutHandle -// Let go of a handle (when closing a file) -// -static int yaffsfs_PutHandle(int handle) -{ - yaffsfs_Handle *h = yaffsfs_GetHandlePointer(handle); - - if(h) - { - h->inUse = 0; - h->obj = NULL; - } - return 0; -} - - - -// Stuff to search for a directory from a path - - -int yaffsfs_Match(char a, char b) -{ - // case sensitive - return (a == b); -} - -// yaffsfs_FindDevice -// yaffsfs_FindRoot -// Scan the configuration list to find the root. -// Curveballs: Should match paths that end in '/' too -// Curveball2 Might have "/x/ and "/x/y". Need to return the longest match -static yaffs_Device *yaffsfs_FindDevice(const char *path, char **restOfPath) -{ - yaffsfs_DeviceConfiguration *cfg = yaffsfs_configurationList; - const char *leftOver; - const char *p; - yaffs_Device *retval = NULL; - int thisMatchLength; - int longestMatch = -1; - - // Check all configs, choose the one that: - // 1) Actually matches a prefix (ie /a amd /abc will not match - // 2) Matches the longest. - while(cfg && cfg->prefix && cfg->dev) - { - leftOver = path; - p = cfg->prefix; - thisMatchLength = 0; - - while(*p && //unmatched part of prefix - strcmp(p,"/") && // the rest of the prefix is not / (to catch / at end) - *leftOver && - yaffsfs_Match(*p,*leftOver)) - { - p++; - leftOver++; - thisMatchLength++; - } - if((!*p || strcmp(p,"/") == 0) && // end of prefix - (!*leftOver || *leftOver == '/') && // no more in this path name part - (thisMatchLength > longestMatch)) - { - // Matched prefix - *restOfPath = (char *)leftOver; - retval = cfg->dev; - longestMatch = thisMatchLength; - } - cfg++; - } - return retval; -} - -static yaffs_Object *yaffsfs_FindRoot(const char *path, char **restOfPath) -{ - - yaffs_Device *dev; - - dev= yaffsfs_FindDevice(path,restOfPath); - if(dev && dev->isMounted) - { - return dev->rootDir; - } - return NULL; -} - -static yaffs_Object *yaffsfs_FollowLink(yaffs_Object *obj,int symDepth) -{ - - while(obj && obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) - { - char *alias = obj->variant.symLinkVariant.alias; - - if(*alias == '/') - { - // Starts with a /, need to scan from root up - obj = yaffsfs_FindObject(NULL,alias,symDepth++); - } - else - { - // Relative to here, so use the parent of the symlink as a start - obj = yaffsfs_FindObject(obj->parent,alias,symDepth++); - } - } - return obj; -} - - -// yaffsfs_FindDirectory -// Parse a path to determine the directory and the name within the directory. -// -// eg. "/data/xx/ff" --> puts name="ff" and returns the directory "/data/xx" -static yaffs_Object *yaffsfs_DoFindDirectory(yaffs_Object *startDir,const char *path,char **name,int symDepth) -{ - yaffs_Object *dir; - char *restOfPath; - char str[YAFFS_MAX_NAME_LENGTH+1]; - int i; - - if(symDepth > YAFFSFS_MAX_SYMLINK_DEREFERENCES) - { - return NULL; - } - - if(startDir) - { - dir = startDir; - restOfPath = (char *)path; - } - else - { - dir = yaffsfs_FindRoot(path,&restOfPath); - } - - while(dir) - { - // parse off /. - // curve ball: also throw away surplus '/' - // eg. "/ram/x////ff" gets treated the same as "/ram/x/ff" - while(*restOfPath == '/') - { - restOfPath++; // get rid of '/' - } - - *name = restOfPath; - i = 0; - - while(*restOfPath && *restOfPath != '/') - { - if (i < YAFFS_MAX_NAME_LENGTH) - { - str[i] = *restOfPath; - str[i+1] = '\0'; - i++; - } - restOfPath++; - } - - if(!*restOfPath) - { - // got to the end of the string - return dir; - } - else - { - if(strcmp(str,".") == 0) - { - // Do nothing - } - else if(strcmp(str,"..") == 0) - { - dir = dir->parent; - } - else - { - dir = yaffs_FindObjectByName(dir,str); - - while(dir && dir->variantType == YAFFS_OBJECT_TYPE_SYMLINK) - { - - dir = yaffsfs_FollowLink(dir,symDepth); - - } - - if(dir && dir->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) - { - dir = NULL; - } - } - } - } - // directory did not exist. - return NULL; -} - -static yaffs_Object *yaffsfs_FindDirectory(yaffs_Object *relativeDirectory,const char *path,char **name,int symDepth) -{ - return yaffsfs_DoFindDirectory(relativeDirectory,path,name,symDepth); -} - -// yaffsfs_FindObject turns a path for an existing object into the object -// -static yaffs_Object *yaffsfs_FindObject(yaffs_Object *relativeDirectory, const char *path,int symDepth) -{ - yaffs_Object *dir; - char *name; - - dir = yaffsfs_FindDirectory(relativeDirectory,path,&name,symDepth); - - if(dir && *name) - { - return yaffs_FindObjectByName(dir,name); - } - - return dir; -} - - - -int yaffs_open(const char *path, int oflag, int mode) -{ - yaffs_Object *obj = NULL; - yaffs_Object *dir = NULL; - char *name; - int handle = -1; - yaffsfs_Handle *h = NULL; - int alreadyOpen = 0; - int alreadyExclusive = 0; - int openDenied = 0; - int symDepth = 0; - int errorReported = 0; - - int i; - - - // todo sanity check oflag (eg. can't have O_TRUNC without WRONLY or RDWR - - - yaffsfs_Lock(); - - handle = yaffsfs_GetHandle(); - - if(handle >= 0) - { - - h = yaffsfs_GetHandlePointer(handle); - - - // try to find the exisiting object - obj = yaffsfs_FindObject(NULL,path,0); - - if(obj && obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) - { - - obj = yaffsfs_FollowLink(obj,symDepth++); - } - - if(obj) - { - // Check if the object is already in use - alreadyOpen = alreadyExclusive = 0; - - for(i = 0; i <= YAFFSFS_N_HANDLES; i++) - { - - if(i != handle && - yaffsfs_handle[i].inUse && - obj == yaffsfs_handle[i].obj) - { - alreadyOpen = 1; - if(yaffsfs_handle[i].exclusive) - { - alreadyExclusive = 1; - } - } - } - - if(((oflag & O_EXCL) && alreadyOpen) || alreadyExclusive) - { - openDenied = 1; - } - - // Open should fail if O_CREAT and O_EXCL are specified - if((oflag & O_EXCL) && (oflag & O_CREAT)) - { - openDenied = 1; - yaffsfs_SetError(-EEXIST); - errorReported = 1; - } - - // Check file permissions - if( (oflag & (O_RDWR | O_WRONLY)) == 0 && // ie O_RDONLY - !(obj->yst_mode & S_IREAD)) - { - openDenied = 1; - } - - if( (oflag & O_RDWR) && - !(obj->yst_mode & S_IREAD)) - { - openDenied = 1; - } - - if( (oflag & (O_RDWR | O_WRONLY)) && - !(obj->yst_mode & S_IWRITE)) - { - openDenied = 1; - } - - } - - else if((oflag & O_CREAT)) - { - // Let's see if we can create this file - dir = yaffsfs_FindDirectory(NULL,path,&name,0); - if(dir) - { - obj = yaffs_MknodFile(dir,name,mode,0,0); - } - else - { - yaffsfs_SetError(-ENOTDIR); - } - } - - if(obj && !openDenied) - { - h->obj = obj; - h->inUse = 1; - h->readOnly = (oflag & (O_WRONLY | O_RDWR)) ? 0 : 1; - h->append = (oflag & O_APPEND) ? 1 : 0; - h->exclusive = (oflag & O_EXCL) ? 1 : 0; - h->position = 0; - - obj->inUse++; - if((oflag & O_TRUNC) && !h->readOnly) - { - //todo truncate - yaffs_ResizeFile(obj,0); - } - - } - else - { - yaffsfs_PutHandle(handle); - if(!errorReported) - { - yaffsfs_SetError(-EACCESS); - errorReported = 1; - } - handle = -1; - } - - } - - yaffsfs_Unlock(); - - return handle; -} - -int yaffs_close(int fd) -{ - yaffsfs_Handle *h = NULL; - int retVal = 0; - - yaffsfs_Lock(); - - h = yaffsfs_GetHandlePointer(fd); - - if(h && h->inUse) - { - // clean up - yaffs_FlushFile(h->obj,1); - h->obj->inUse--; - if(h->obj->inUse <= 0 && h->obj->unlinked) - { - yaffs_DeleteFile(h->obj); - } - yaffsfs_PutHandle(fd); - retVal = 0; - } - else - { - // bad handle - yaffsfs_SetError(-EBADF); - retVal = -1; - } - - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_read(int fd, void *buf, unsigned int nbyte) -{ - yaffsfs_Handle *h = NULL; - yaffs_Object *obj = NULL; - int pos = 0; - int nRead = -1; - int maxRead; - - yaffsfs_Lock(); - h = yaffsfs_GetHandlePointer(fd); - obj = yaffsfs_GetHandleObject(fd); - - if(!h || !obj) - { - // bad handle - yaffsfs_SetError(-EBADF); - } - else if( h && obj) - { - pos= h->position; - if(yaffs_GetObjectFileLength(obj) > pos) - { - maxRead = yaffs_GetObjectFileLength(obj) - pos; - } - else - { - maxRead = 0; - } - - if(nbyte > maxRead) - { - nbyte = maxRead; - } - - - if(nbyte > 0) - { - nRead = yaffs_ReadDataFromFile(obj,buf,pos,nbyte); - if(nRead >= 0) - { - h->position = pos + nRead; - } - else - { - //todo error - } - } - else - { - nRead = 0; - } - - } - - yaffsfs_Unlock(); - - - return (nRead >= 0) ? nRead : -1; - -} - -int yaffs_write(int fd, const void *buf, unsigned int nbyte) -{ - yaffsfs_Handle *h = NULL; - yaffs_Object *obj = NULL; - int pos = 0; - int nWritten = -1; - int writeThrough = 0; - - yaffsfs_Lock(); - h = yaffsfs_GetHandlePointer(fd); - obj = yaffsfs_GetHandleObject(fd); - - if(!h || !obj) - { - // bad handle - yaffsfs_SetError(-EBADF); - } - else if( h && obj && h->readOnly) - { - // todo error - } - else if( h && obj) - { - if(h->append) - { - pos = yaffs_GetObjectFileLength(obj); - } - else - { - pos = h->position; - } - - nWritten = yaffs_WriteDataToFile(obj,buf,pos,nbyte,writeThrough); - - if(nWritten >= 0) - { - h->position = pos + nWritten; - } - else - { - //todo error - } - - } - - yaffsfs_Unlock(); - - - return (nWritten >= 0) ? nWritten : -1; - -} - -int yaffs_truncate(int fd, off_t newSize) -{ - yaffsfs_Handle *h = NULL; - yaffs_Object *obj = NULL; - int result = 0; - - yaffsfs_Lock(); - h = yaffsfs_GetHandlePointer(fd); - obj = yaffsfs_GetHandleObject(fd); - - if(!h || !obj) - { - // bad handle - yaffsfs_SetError(-EBADF); - } - else - { - // resize the file - result = yaffs_ResizeFile(obj,newSize); - } - yaffsfs_Unlock(); - - - return (result) ? 0 : -1; - -} - -off_t yaffs_lseek(int fd, off_t offset, int whence) -{ - yaffsfs_Handle *h = NULL; - yaffs_Object *obj = NULL; - int pos = -1; - int fSize = -1; - - yaffsfs_Lock(); - h = yaffsfs_GetHandlePointer(fd); - obj = yaffsfs_GetHandleObject(fd); - - if(!h || !obj) - { - // bad handle - yaffsfs_SetError(-EBADF); - } - else if(whence == SEEK_SET) - { - if(offset >= 0) - { - pos = offset; - } - } - else if(whence == SEEK_CUR) - { - if( (h->position + offset) >= 0) - { - pos = (h->position + offset); - } - } - else if(whence == SEEK_END) - { - fSize = yaffs_GetObjectFileLength(obj); - if(fSize >= 0 && (fSize + offset) >= 0) - { - pos = fSize + offset; - } - } - - if(pos >= 0) - { - h->position = pos; - } - else - { - // todo error - } - - - yaffsfs_Unlock(); - - return pos; -} - - -int yaffsfs_DoUnlink(const char *path,int isDirectory) -{ - yaffs_Object *dir = NULL; - yaffs_Object *obj = NULL; - char *name; - int result = YAFFS_FAIL; - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL,path,0); - dir = yaffsfs_FindDirectory(NULL,path,&name,0); - if(!dir) - { - yaffsfs_SetError(-ENOTDIR); - } - else if(!obj) - { - yaffsfs_SetError(-ENOENT); - } - else if(!isDirectory && obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) - { - yaffsfs_SetError(-EISDIR); - } - else if(isDirectory && obj->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) - { - yaffsfs_SetError(-ENOTDIR); - } - else - { - result = yaffs_Unlink(dir,name); - - if(result == YAFFS_FAIL && isDirectory) - { - yaffsfs_SetError(-ENOTEMPTY); - } - } - - yaffsfs_Unlock(); - - // todo error - - return (result == YAFFS_FAIL) ? -1 : 0; -} -int yaffs_rmdir(const char *path) -{ - return yaffsfs_DoUnlink(path,1); -} - -int yaffs_unlink(const char *path) -{ - return yaffsfs_DoUnlink(path,0); -} - -int yaffs_rename(const char *oldPath, const char *newPath) -{ - yaffs_Object *olddir = NULL; - yaffs_Object *newdir = NULL; - yaffs_Object *obj = NULL; - char *oldname; - char *newname; - int result= YAFFS_FAIL; - int renameAllowed = 1; - - yaffsfs_Lock(); - - olddir = yaffsfs_FindDirectory(NULL,oldPath,&oldname,0); - newdir = yaffsfs_FindDirectory(NULL,newPath,&newname,0); - obj = yaffsfs_FindObject(NULL,oldPath,0); - - if(!olddir || !newdir || !obj) - { - // bad file - yaffsfs_SetError(-EBADF); - renameAllowed = 0; - } - else if(olddir->myDev != newdir->myDev) - { - // oops must be on same device - // todo error - yaffsfs_SetError(-EXDEV); - renameAllowed = 0; - } - else if(obj && obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) - { - // It is a directory, check that it is not being renamed to - // being its own decendent. - // Do this by tracing from the new directory back to the root, checking for obj - - yaffs_Object *xx = newdir; - - while( renameAllowed && xx) - { - if(xx == obj) - { - renameAllowed = 0; - } - xx = xx->parent; - } - if(!renameAllowed) yaffsfs_SetError(-EACCESS); - } - - if(renameAllowed) - { - result = yaffs_RenameObject(olddir,oldname,newdir,newname); - } - - yaffsfs_Unlock(); - - return (result == YAFFS_FAIL) ? -1 : 0; -} - - -static int yaffsfs_DoStat(yaffs_Object *obj,struct yaffs_stat *buf) -{ - int retVal = -1; - - if(obj) - { - obj = yaffs_GetEquivalentObject(obj); - } - - if(obj && buf) - { - buf->st_dev = (int)obj->myDev->genericDevice; - buf->st_ino = obj->objectId; - buf->st_mode = obj->yst_mode & ~S_IFMT; // clear out file type bits - - if(obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) - { - buf->st_mode |= S_IFDIR; - } - else if(obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) - { - buf->st_mode |= S_IFLNK; - } - else if(obj->variantType == YAFFS_OBJECT_TYPE_FILE) - { - buf->st_mode |= S_IFREG; - } - - buf->st_nlink = yaffs_GetObjectLinkCount(obj); - buf->st_uid = 0; - buf->st_gid = 0;; - buf->st_rdev = obj->yst_rdev; - buf->st_size = yaffs_GetObjectFileLength(obj); - buf->st_blksize = obj->myDev->nDataBytesPerChunk; - buf->st_blocks = (buf->st_size + buf->st_blksize -1)/buf->st_blksize; - buf->yst_atime = obj->yst_atime; - buf->yst_ctime = obj->yst_ctime; - buf->yst_mtime = obj->yst_mtime; - retVal = 0; - } - return retVal; -} - -static int yaffsfs_DoStatOrLStat(const char *path, struct yaffs_stat *buf,int doLStat) -{ - yaffs_Object *obj; - - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_FindObject(NULL,path,0); - - if(!doLStat && obj) - { - obj = yaffsfs_FollowLink(obj,0); - } - - if(obj) - { - retVal = yaffsfs_DoStat(obj,buf); - } - else - { - // todo error not found - yaffsfs_SetError(-ENOENT); - } - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_stat(const char *path, struct yaffs_stat *buf) -{ - return yaffsfs_DoStatOrLStat(path,buf,0); -} - -int yaffs_lstat(const char *path, struct yaffs_stat *buf) -{ - return yaffsfs_DoStatOrLStat(path,buf,1); -} - -int yaffs_fstat(int fd, struct yaffs_stat *buf) -{ - yaffs_Object *obj; - - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_GetHandleObject(fd); - - if(obj) - { - retVal = yaffsfs_DoStat(obj,buf); - } - else - { - // bad handle - yaffsfs_SetError(-EBADF); - } - - yaffsfs_Unlock(); - - return retVal; -} - -static int yaffsfs_DoChMod(yaffs_Object *obj,mode_t mode) -{ - int result = YAFFS_FAIL; - - if(obj) - { - obj = yaffs_GetEquivalentObject(obj); - } - - if(obj) - { - obj->yst_mode = mode; - obj->dirty = 1; - result = yaffs_FlushFile(obj,0); - } - - return result == YAFFS_OK ? 0 : -1; -} - - -int yaffs_chmod(const char *path, mode_t mode) -{ - yaffs_Object *obj; - - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_FindObject(NULL,path,0); - - if(obj) - { - retVal = yaffsfs_DoChMod(obj,mode); - } - else - { - // todo error not found - yaffsfs_SetError(-ENOENT); - } - - yaffsfs_Unlock(); - - return retVal; - -} - - -int yaffs_fchmod(int fd, mode_t mode) -{ - yaffs_Object *obj; - - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_GetHandleObject(fd); - - if(obj) - { - retVal = yaffsfs_DoChMod(obj,mode); - } - else - { - // bad handle - yaffsfs_SetError(-EBADF); - } - - yaffsfs_Unlock(); - - return retVal; -} - - -int yaffs_mkdir(const char *path, mode_t mode) -{ - yaffs_Object *parent = NULL; - yaffs_Object *dir = NULL; - char *name; - int retVal= -1; - - yaffsfs_Lock(); - parent = yaffsfs_FindDirectory(NULL,path,&name,0); - if(parent) - dir = yaffs_MknodDirectory(parent,name,mode,0,0); - if(dir) - { - retVal = 0; - } - else - { - yaffsfs_SetError(-ENOSPC); // just assume no space for now - retVal = -1; - } - - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_mount(const char *path) -{ - int retVal=-1; - int result=YAFFS_FAIL; - yaffs_Device *dev=NULL; - char *dummy; - - T(YAFFS_TRACE_ALWAYS,("yaffs: Mounting %s\n",path)); - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path,&dummy); - if(dev) - { - if(!dev->isMounted) - { - result = yaffs_GutsInitialise(dev); - if(result == YAFFS_FAIL) - { - // todo error - mount failed - yaffsfs_SetError(-ENOMEM); - } - retVal = result ? 0 : -1; - - } - else - { - //todo error - already mounted. - yaffsfs_SetError(-EBUSY); - } - } - else - { - // todo error - no device - yaffsfs_SetError(-ENODEV); - } - yaffsfs_Unlock(); - return retVal; - -} - -int yaffs_unmount(const char *path) -{ - int retVal=-1; - yaffs_Device *dev=NULL; - char *dummy; - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path,&dummy); - if(dev) - { - if(dev->isMounted) - { - int i; - int inUse; - - yaffs_FlushEntireDeviceCache(dev); - yaffs_CheckpointSave(dev); - - for(i = inUse = 0; i < YAFFSFS_N_HANDLES && !inUse; i++) - { - if(yaffsfs_handle[i].inUse && yaffsfs_handle[i].obj->myDev == dev) - { - inUse = 1; // the device is in use, can't unmount - } - } - - if(!inUse) - { - yaffs_Deinitialise(dev); - - retVal = 0; - } - else - { - // todo error can't unmount as files are open - yaffsfs_SetError(-EBUSY); - } - - } - else - { - //todo error - not mounted. - yaffsfs_SetError(-EINVAL); - - } - } - else - { - // todo error - no device - yaffsfs_SetError(-ENODEV); - } - yaffsfs_Unlock(); - return retVal; - -} - -loff_t yaffs_freespace(const char *path) -{ - loff_t retVal=-1; - yaffs_Device *dev=NULL; - char *dummy; - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path,&dummy); - if(dev && dev->isMounted) - { - retVal = yaffs_GetNumberOfFreeChunks(dev); - retVal *= dev->nDataBytesPerChunk; - - } - else - { - yaffsfs_SetError(-EINVAL); - } - - yaffsfs_Unlock(); - return retVal; -} - - - -void yaffs_initialise(yaffsfs_DeviceConfiguration *cfgList) -{ - - yaffsfs_DeviceConfiguration *cfg; - - yaffsfs_configurationList = cfgList; - - yaffsfs_InitHandles(); - - cfg = yaffsfs_configurationList; - - while(cfg && cfg->prefix && cfg->dev) - { - cfg->dev->isMounted = 0; - cfg->dev->removeObjectCallback = yaffsfs_RemoveObjectCallback; - cfg++; - } -} - - -// -// Directory search stuff. - -// -// Directory search context -// -// NB this is an opaque structure. - - -typedef struct -{ - __u32 magic; - yaffs_dirent de; /* directory entry being used by this dsc */ - char name[NAME_MAX+1]; /* name of directory being searched */ - yaffs_Object *dirObj; /* ptr to directory being searched */ - yaffs_Object *nextReturn; /* obj to be returned by next readddir */ - int offset; - struct list_head others; -} yaffsfs_DirectorySearchContext; - - - -static struct list_head search_contexts; - - -static void yaffsfs_SetDirRewound(yaffsfs_DirectorySearchContext *dsc) -{ - if(dsc && - dsc->dirObj && - dsc->dirObj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY){ - - dsc->offset = 0; - - if( list_empty(&dsc->dirObj->variant.directoryVariant.children)){ - dsc->nextReturn = NULL; - } else { - dsc->nextReturn = list_entry(dsc->dirObj->variant.directoryVariant.children.next, - yaffs_Object,siblings); - } - } else { - /* Hey someone isn't playing nice! */ - } -} - -static void yaffsfs_DirAdvance(yaffsfs_DirectorySearchContext *dsc) -{ - if(dsc && - dsc->dirObj && - dsc->dirObj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY){ - - if( dsc->nextReturn == NULL || - list_empty(&dsc->dirObj->variant.directoryVariant.children)){ - dsc->nextReturn = NULL; - } else { - struct list_head *next = dsc->nextReturn->siblings.next; - - if( next == &dsc->dirObj->variant.directoryVariant.children) - dsc->nextReturn = NULL; /* end of list */ - else - dsc->nextReturn = list_entry(next,yaffs_Object,siblings); - } - } else { - /* Hey someone isn't playing nice! */ - } -} - -static void yaffsfs_RemoveObjectCallback(yaffs_Object *obj) -{ - - struct list_head *i; - yaffsfs_DirectorySearchContext *dsc; - - /* if search contexts not initilised then skip */ - if(!search_contexts.next) - return; - - /* Iteratethrough the directory search contexts. - * If any are the one being removed, then advance the dsc to - * the next one to prevent a hanging ptr. - */ - list_for_each(i, &search_contexts) { - if (i) { - dsc = list_entry(i, yaffsfs_DirectorySearchContext,others); - if(dsc->nextReturn == obj) - yaffsfs_DirAdvance(dsc); - } - } - -} - -yaffs_DIR *yaffs_opendir(const char *dirname) -{ - yaffs_DIR *dir = NULL; - yaffs_Object *obj = NULL; - yaffsfs_DirectorySearchContext *dsc = NULL; - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL,dirname,0); - - if(obj && obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) - { - - dsc = YMALLOC(sizeof(yaffsfs_DirectorySearchContext)); - dir = (yaffs_DIR *)dsc; - if(dsc) - { - memset(dsc,0,sizeof(yaffsfs_DirectorySearchContext)); - dsc->magic = YAFFS_MAGIC; - dsc->dirObj = obj; - strncpy(dsc->name,dirname,NAME_MAX); - INIT_LIST_HEAD(&dsc->others); - - if(!search_contexts.next) - INIT_LIST_HEAD(&search_contexts); - - list_add(&dsc->others,&search_contexts); - yaffsfs_SetDirRewound(dsc); } - - } - - yaffsfs_Unlock(); - - return dir; -} - -struct yaffs_dirent *yaffs_readdir(yaffs_DIR *dirp) -{ - yaffsfs_DirectorySearchContext *dsc = (yaffsfs_DirectorySearchContext *)dirp; - struct yaffs_dirent *retVal = NULL; - - yaffsfs_Lock(); - - if(dsc && dsc->magic == YAFFS_MAGIC){ - yaffsfs_SetError(0); - if(dsc->nextReturn){ - dsc->de.d_ino = yaffs_GetEquivalentObject(dsc->nextReturn)->objectId; - dsc->de.d_dont_use = (unsigned)dsc->nextReturn; - dsc->de.d_off = dsc->offset++; - yaffs_GetObjectName(dsc->nextReturn,dsc->de.d_name,NAME_MAX); - if(strlen(dsc->de.d_name) == 0) - { - // this should not happen! - strcpy(dsc->de.d_name,"zz"); - } - dsc->de.d_reclen = sizeof(struct yaffs_dirent); - retVal = &dsc->de; - yaffsfs_DirAdvance(dsc); - } else - retVal = NULL; - } - else - { - yaffsfs_SetError(-EBADF); - } - - yaffsfs_Unlock(); - - return retVal; - -} - - -void yaffs_rewinddir(yaffs_DIR *dirp) -{ - yaffsfs_DirectorySearchContext *dsc = (yaffsfs_DirectorySearchContext *)dirp; - - yaffsfs_Lock(); - - yaffsfs_SetDirRewound(dsc); - - yaffsfs_Unlock(); -} - - -int yaffs_closedir(yaffs_DIR *dirp) -{ - yaffsfs_DirectorySearchContext *dsc = (yaffsfs_DirectorySearchContext *)dirp; - - yaffsfs_Lock(); - dsc->magic = 0; - list_del(&dsc->others); /* unhook from list */ - YFREE(dsc); - yaffsfs_Unlock(); - return 0; -} - -// end of directory stuff - - -int yaffs_symlink(const char *oldpath, const char *newpath) -{ - yaffs_Object *parent = NULL; - yaffs_Object *obj; - char *name; - int retVal= -1; - int mode = 0; // ignore for now - - yaffsfs_Lock(); - parent = yaffsfs_FindDirectory(NULL,newpath,&name,0); - obj = yaffs_MknodSymLink(parent,name,mode,0,0,oldpath); - if(obj) - { - retVal = 0; - } - else - { - yaffsfs_SetError(-ENOSPC); // just assume no space for now - retVal = -1; - } - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_readlink(const char *path, char *buf, int bufsiz) -{ - yaffs_Object *obj = NULL; - int retVal; - - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL,path,0); - - if(!obj) - { - yaffsfs_SetError(-ENOENT); - retVal = -1; - } - else if(obj->variantType != YAFFS_OBJECT_TYPE_SYMLINK) - { - yaffsfs_SetError(-EINVAL); - retVal = -1; - } - else - { - char *alias = obj->variant.symLinkVariant.alias; - memset(buf,0,bufsiz); - strncpy(buf,alias,bufsiz - 1); - retVal = 0; - } - yaffsfs_Unlock(); - return retVal; -} - -int yaffs_link(const char *oldpath, const char *newpath) -{ - // Creates a link called newpath to existing oldpath - yaffs_Object *obj = NULL; - yaffs_Object *target = NULL; - int retVal = 0; - - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL,oldpath,0); - target = yaffsfs_FindObject(NULL,newpath,0); - - if(!obj) - { - yaffsfs_SetError(-ENOENT); - retVal = -1; - } - else if(target) - { - yaffsfs_SetError(-EEXIST); - retVal = -1; - } - else - { - yaffs_Object *newdir = NULL; - yaffs_Object *link = NULL; - - char *newname; - - newdir = yaffsfs_FindDirectory(NULL,newpath,&newname,0); - - if(!newdir) - { - yaffsfs_SetError(-ENOTDIR); - retVal = -1; - } - else if(newdir->myDev != obj->myDev) - { - yaffsfs_SetError(-EXDEV); - retVal = -1; - } - if(newdir && strlen(newname) > 0) - { - link = yaffs_Link(newdir,newname,obj); - if(link) - retVal = 0; - else - { - yaffsfs_SetError(-ENOSPC); - retVal = -1; - } - - } - } - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_mknod(const char *pathname, mode_t mode, dev_t dev); - -int yaffs_DumpDevStruct(const char *path) -{ - char *rest; - - yaffs_Object *obj = yaffsfs_FindRoot(path,&rest); - - if(obj) - { - yaffs_Device *dev = obj->myDev; - - printf("\n" - "nPageWrites.......... %d\n" - "nPageReads........... %d\n" - "nBlockErasures....... %d\n" - "nGCCopies............ %d\n" - "garbageCollections... %d\n" - "passiveGarbageColl'ns %d\n" - "\n", - dev->nPageWrites, - dev->nPageReads, - dev->nBlockErasures, - dev->nGCCopies, - dev->garbageCollections, - dev->passiveGarbageCollections - ); - - } - return 0; -} diff --git a/fs/yaffs2/direct/yaffsfs.h b/fs/yaffs2/direct/yaffsfs.h deleted file mode 100644 index 9afe60a1ceb..00000000000 --- a/fs/yaffs2/direct/yaffsfs.h +++ /dev/null @@ -1,233 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * Header file for using yaffs in an application via - * a direct interface. - */ - - -#ifndef __YAFFSFS_H__ -#define __YAFFSFS_H__ - -#include "yaffscfg.h" -#include "yportenv.h" - - -//typedef long off_t; -//typedef long dev_t; -//typedef unsigned long mode_t; - - -#ifndef NAME_MAX -#define NAME_MAX 256 -#endif - -#ifndef O_RDONLY -#define O_RDONLY 00 -#endif - -#ifndef O_WRONLY -#define O_WRONLY 01 -#endif - -#ifndef O_RDWR -#define O_RDWR 02 -#endif - -#ifndef O_CREAT -#define O_CREAT 0100 -#endif - -#ifndef O_EXCL -#define O_EXCL 0200 -#endif - -#ifndef O_TRUNC -#define O_TRUNC 01000 -#endif - -#ifndef O_APPEND -#define O_APPEND 02000 -#endif - -#ifndef SEEK_SET -#define SEEK_SET 0 -#endif - -#ifndef SEEK_CUR -#define SEEK_CUR 1 -#endif - -#ifndef SEEK_END -#define SEEK_END 2 -#endif - -#ifndef EBUSY -#define EBUSY 16 -#endif - -#ifndef ENODEV -#define ENODEV 19 -#endif - -#ifndef EINVAL -#define EINVAL 22 -#endif - -#ifndef EBADF -#define EBADF 9 -#endif - -#ifndef EACCESS -#define EACCESS 13 -#endif - -#ifndef EXDEV -#define EXDEV 18 -#endif - -#ifndef ENOENT -#define ENOENT 2 -#endif - -#ifndef ENOSPC -#define ENOSPC 28 -#endif - -#ifndef ENOTEMPTY -#define ENOTEMPTY 39 -#endif - -#ifndef ENOMEM -#define ENOMEM 12 -#endif - -#ifndef EEXIST -#define EEXIST 17 -#endif - -#ifndef ENOTDIR -#define ENOTDIR 20 -#endif - -#ifndef EISDIR -#define EISDIR 21 -#endif - - -// Mode flags - -#ifndef S_IFMT -#define S_IFMT 0170000 -#endif - -#ifndef S_IFLNK -#define S_IFLNK 0120000 -#endif - -#ifndef S_IFDIR -#define S_IFDIR 0040000 -#endif - -#ifndef S_IFREG -#define S_IFREG 0100000 -#endif - -#ifndef S_IREAD -#define S_IREAD 0000400 -#endif - -#ifndef S_IWRITE -#define S_IWRITE 0000200 -#endif - - - - -struct yaffs_dirent{ - long d_ino; /* inode number */ - off_t d_off; /* offset to this dirent */ - unsigned short d_reclen; /* length of this d_name */ - char d_name [NAME_MAX+1]; /* file name (null-terminated) */ - unsigned d_dont_use; /* debug pointer, not for public consumption */ -}; - -typedef struct yaffs_dirent yaffs_dirent; - - -typedef struct __opaque yaffs_DIR; - - - -struct yaffs_stat{ - int st_dev; /* device */ - int st_ino; /* inode */ - mode_t st_mode; /* protection */ - int st_nlink; /* number of hard links */ - int st_uid; /* user ID of owner */ - int st_gid; /* group ID of owner */ - unsigned st_rdev; /* device type (if inode device) */ - off_t st_size; /* total size, in bytes */ - unsigned long st_blksize; /* blocksize for filesystem I/O */ - unsigned long st_blocks; /* number of blocks allocated */ - unsigned long yst_atime; /* time of last access */ - unsigned long yst_mtime; /* time of last modification */ - unsigned long yst_ctime; /* time of last change */ -}; - -int yaffs_open(const char *path, int oflag, int mode) ; -int yaffs_read(int fd, void *buf, unsigned int nbyte) ; -int yaffs_write(int fd, const void *buf, unsigned int nbyte) ; -int yaffs_close(int fd) ; -off_t yaffs_lseek(int fd, off_t offset, int whence) ; -int yaffs_truncate(int fd, off_t newSize); - -int yaffs_unlink(const char *path) ; -int yaffs_rename(const char *oldPath, const char *newPath) ; - -int yaffs_stat(const char *path, struct yaffs_stat *buf) ; -int yaffs_lstat(const char *path, struct yaffs_stat *buf) ; -int yaffs_fstat(int fd, struct yaffs_stat *buf) ; - -int yaffs_chmod(const char *path, mode_t mode); -int yaffs_fchmod(int fd, mode_t mode); - -int yaffs_mkdir(const char *path, mode_t mode) ; -int yaffs_rmdir(const char *path) ; - -yaffs_DIR *yaffs_opendir(const char *dirname) ; -struct yaffs_dirent *yaffs_readdir(yaffs_DIR *dirp) ; -void yaffs_rewinddir(yaffs_DIR *dirp) ; -int yaffs_closedir(yaffs_DIR *dirp) ; - -int yaffs_mount(const char *path) ; -int yaffs_unmount(const char *path) ; - -int yaffs_symlink(const char *oldpath, const char *newpath); -int yaffs_readlink(const char *path, char *buf, int bufsiz); - -int yaffs_link(const char *oldpath, const char *newpath); -int yaffs_mknod(const char *pathname, mode_t mode, dev_t dev); - -loff_t yaffs_freespace(const char *path); - -void yaffs_initialise(yaffsfs_DeviceConfiguration *configList); - -int yaffs_StartUp(void); - -#endif - - diff --git a/fs/yaffs2/direct/yaffsinterface.h b/fs/yaffs2/direct/yaffsinterface.h deleted file mode 120000 index 0a6c87a216b..00000000000 --- a/fs/yaffs2/direct/yaffsinterface.h +++ /dev/null @@ -1 +0,0 @@ -../yaffsinterface.h \ No newline at end of file diff --git a/fs/yaffs2/direct/ydirectenv.h b/fs/yaffs2/direct/ydirectenv.h deleted file mode 100644 index adcc0b54685..00000000000 --- a/fs/yaffs2/direct/ydirectenv.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * ydirectenv.h: Environment wrappers for YAFFS direct. - */ - -#ifndef __YDIRECTENV_H__ -#define __YDIRECTENV_H__ - -// Direct interface - -#include "devextras.h" - -/* XXX U-BOOT XXX */ -#if 0 -#include "stdlib.h" -#include "stdio.h" -#include "string.h" -#include "assert.h" -#endif -#include "yaffs_malloc.h" - -/* XXX U-BOOT XXX */ -#if 0 -#define YBUG() assert(1) -#endif - -#define YCHAR char -#define YUCHAR unsigned char -#define _Y(x) x -#define yaffs_strcpy(a,b) strcpy(a,b) -#define yaffs_strncpy(a,b,c) strncpy(a,b,c) -#define yaffs_strncmp(a,b,c) strncmp(a,b,c) -#define yaffs_strlen(s) strlen(s) -#define yaffs_sprintf sprintf -#define yaffs_toupper(a) toupper(a) - -#ifdef NO_Y_INLINE -#define Y_INLINE -#else -#define Y_INLINE inline -#endif - -#define YMALLOC(x) yaffs_malloc(x) -#define YFREE(x) free(x) -#define YMALLOC_ALT(x) yaffs_malloc(x) -#define YFREE_ALT(x) free(x) - -#define YMALLOC_DMA(x) yaffs_malloc(x) - -#define YYIELD() do {} while(0) - - - -//#define YINFO(s) YPRINTF(( __FILE__ " %d %s\n",__LINE__,s)) -//#define YALERT(s) YINFO(s) - - -#define TENDSTR "\n" -#define TSTR(x) x -#define TOUT(p) printf p - - -#define YAFFS_LOSTNFOUND_NAME "lost+found" -#define YAFFS_LOSTNFOUND_PREFIX "obj" -//#define YPRINTF(x) printf x - -#include "yaffscfg.h" - -#define Y_CURRENT_TIME yaffsfs_CurrentTime() -#define Y_TIME_CONVERT(x) x - -#define YAFFS_ROOT_MODE 0666 -#define YAFFS_LOSTNFOUND_MODE 0666 - -#define yaffs_SumCompare(x,y) ((x) == (y)) -#define yaffs_strcmp(a,b) strcmp(a,b) - -#endif - - diff --git a/fs/yaffs2/direct/yportenv.h b/fs/yaffs2/direct/yportenv.h deleted file mode 120000 index 205c44b4e4f..00000000000 --- a/fs/yaffs2/direct/yportenv.h +++ /dev/null @@ -1 +0,0 @@ -../yportenv.h \ No newline at end of file diff --git a/fs/yaffs2/yaffs_flashif.h b/fs/yaffs2/yaffs_flashif.h new file mode 100644 index 00000000000..f7f4e4227db --- /dev/null +++ b/fs/yaffs2/yaffs_flashif.h @@ -0,0 +1,31 @@ +/* + * YAFFS: Yet another Flash File System . A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2.1 as + * published by the Free Software Foundation. + * + * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. + */ + +#ifndef __YAFFS_FLASH_H__ +#define __YAFFS_FLASH_H__ + + +#include "yaffs_guts.h" +int yflash_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); +int yflash_WriteChunkToNAND(yaffs_Device *dev,int chunkInNAND,const __u8 *data, const yaffs_Spare *spare); +int yflash_WriteChunkWithTagsToNAND(yaffs_Device *dev,int chunkInNAND,const __u8 *data, yaffs_ExtendedTags *tags); +int yflash_ReadChunkFromNAND(yaffs_Device *dev,int chunkInNAND, __u8 *data, yaffs_Spare *spare); +int yflash_ReadChunkWithTagsFromNAND(yaffs_Device *dev,int chunkInNAND, __u8 *data, yaffs_ExtendedTags *tags); +int yflash_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); +int yflash_InitialiseNAND(yaffs_Device *dev); +int yflash_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo); +int yflash_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo, yaffs_BlockState *state, int *sequenceNumber); + +#endif diff --git a/fs/yaffs2/yaffs_malloc.h b/fs/yaffs2/yaffs_malloc.h new file mode 100644 index 00000000000..122fb4c06f8 --- /dev/null +++ b/fs/yaffs2/yaffs_malloc.h @@ -0,0 +1,26 @@ +#ifndef __YAFFS_MALLOC_H__ +/* + * YAFFS: Yet another Flash File System . A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2.1 as + * published by the Free Software Foundation. + * + * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. + */ + +/* XXX U-BOOT XXX */ +#if 0 +#include +#endif + +void *yaffs_malloc(size_t size); +void yaffs_free(void *ptr); + +#endif + diff --git a/fs/yaffs2/yaffs_ramdisk.h b/fs/yaffs2/yaffs_ramdisk.h new file mode 100644 index 00000000000..045ab42db53 --- /dev/null +++ b/fs/yaffs2/yaffs_ramdisk.h @@ -0,0 +1,32 @@ +/* + * YAFFS: Yet another Flash File System . A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2.1 as + * published by the Free Software Foundation. + * + * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. + */ + +/* + * yaffs_ramdisk.h: yaffs ram disk component + */ + +#ifndef __YAFFS_RAMDISK_H__ +#define __YAFFS_RAMDISK_H__ + + +#include "yaffs_guts.h" +int yramdisk_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); +int yramdisk_WriteChunkWithTagsToNAND(yaffs_Device *dev,int chunkInNAND,const __u8 *data, yaffs_ExtendedTags *tags); +int yramdisk_ReadChunkWithTagsFromNAND(yaffs_Device *dev,int chunkInNAND, __u8 *data, yaffs_ExtendedTags *tags); +int yramdisk_EraseBlockInNAND(yaffs_Device *dev, int blockNumber); +int yramdisk_InitialiseNAND(yaffs_Device *dev); +int yramdisk_MarkNANDBlockBad(yaffs_Device *dev,int blockNumber); +int yramdisk_QueryNANDBlock(yaffs_Device *dev, int blockNo, yaffs_BlockState *state, int *sequenceNumber); +#endif diff --git a/fs/yaffs2/yaffscfg.c b/fs/yaffs2/yaffscfg.c new file mode 100644 index 00000000000..a4a0924ef91 --- /dev/null +++ b/fs/yaffs2/yaffscfg.c @@ -0,0 +1,417 @@ +/* + * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * yaffscfg.c The configuration for the "direct" use of yaffs. + * + * This file is intended to be modified to your requirements. + * There is no need to redistribute this file. + */ + +/* XXX U-BOOT XXX */ +#include + +#include +#include "nand.h" +#include "yaffscfg.h" +#include "yaffsfs.h" +#include "yaffs_packedtags2.h" +#include "yaffs_mtdif.h" +#include "yaffs_mtdif2.h" +#if 0 +#include +#else +#include "malloc.h" +#endif + +unsigned yaffs_traceMask = 0xFFFFFFFF; +static int yaffs_errno = 0; + +void yaffsfs_SetError(int err) +{ + //Do whatever to set error + yaffs_errno = err; +} + +int yaffsfs_GetError(void) +{ + return yaffs_errno; +} + +void yaffsfs_Lock(void) +{ +} + +void yaffsfs_Unlock(void) +{ +} + +__u32 yaffsfs_CurrentTime(void) +{ + return 0; +} + +void *yaffs_malloc(size_t size) +{ + return malloc(size); +} + +void yaffs_free(void *ptr) +{ + free(ptr); +} + +void yaffsfs_LocalInitialisation(void) +{ + // Define locking semaphore. +} + +// Configuration for: +// /ram 2MB ramdisk +// /boot 2MB boot disk (flash) +// /flash 14MB flash disk (flash) +// NB Though /boot and /flash occupy the same physical device they +// are still disticnt "yaffs_Devices. You may think of these as "partitions" +// using non-overlapping areas in the same device. +// + +#include "yaffs_ramdisk.h" +#include "yaffs_flashif.h" + +static int isMounted = 0; +#define MOUNT_POINT "/flash" +extern nand_info_t nand_info[]; + +/* XXX U-BOOT XXX */ +#if 0 +static yaffs_Device ramDev; +static yaffs_Device bootDev; +static yaffs_Device flashDev; +#endif + +static yaffsfs_DeviceConfiguration yaffsfs_config[] = { +/* XXX U-BOOT XXX */ +#if 0 + { "/ram", &ramDev}, + { "/boot", &bootDev}, + { "/flash", &flashDev}, +#else + { MOUNT_POINT, 0}, +#endif + {(void *)0,(void *)0} +}; + + +int yaffs_StartUp(void) +{ + struct mtd_info *mtd = &nand_info[0]; + int yaffsVersion = 2; + int nBlocks; + + yaffs_Device *flashDev = calloc(1, sizeof(yaffs_Device)); + yaffsfs_config[0].dev = flashDev; + + // Stuff to configure YAFFS + // Stuff to initialise anything special (eg lock semaphore). + yaffsfs_LocalInitialisation(); + + // Set up devices + +/* XXX U-BOOT XXX */ +#if 0 + // /ram + ramDev.nBytesPerChunk = 512; + ramDev.nChunksPerBlock = 32; + ramDev.nReservedBlocks = 2; // Set this smaller for RAM + ramDev.startBlock = 1; // Can't use block 0 + ramDev.endBlock = 127; // Last block in 2MB. + ramDev.useNANDECC = 1; + ramDev.nShortOpCaches = 0; // Disable caching on this device. + ramDev.genericDevice = (void *) 0; // Used to identify the device in fstat. + ramDev.writeChunkWithTagsToNAND = yramdisk_WriteChunkWithTagsToNAND; + ramDev.readChunkWithTagsFromNAND = yramdisk_ReadChunkWithTagsFromNAND; + ramDev.eraseBlockInNAND = yramdisk_EraseBlockInNAND; + ramDev.initialiseNAND = yramdisk_InitialiseNAND; + + // /boot + bootDev.nBytesPerChunk = 612; + bootDev.nChunksPerBlock = 32; + bootDev.nReservedBlocks = 5; + bootDev.startBlock = 1; // Can't use block 0 + bootDev.endBlock = 127; // Last block in 2MB. + bootDev.useNANDECC = 0; // use YAFFS's ECC + bootDev.nShortOpCaches = 10; // Use caches + bootDev.genericDevice = (void *) 1; // Used to identify the device in fstat. + bootDev.writeChunkToNAND = yflash_WriteChunkToNAND; + bootDev.readChunkFromNAND = yflash_ReadChunkFromNAND; + bootDev.eraseBlockInNAND = yflash_EraseBlockInNAND; + bootDev.initialiseNAND = yflash_InitialiseNAND; +#endif + + // /flash + flashDev->nReservedBlocks = 5; +// flashDev->nShortOpCaches = (options.no_cache) ? 0 : 10; + flashDev->nShortOpCaches = 10; // Use caches + flashDev->useNANDECC = 0; // do not use YAFFS's ECC + + if (yaffsVersion == 2) + { + flashDev->writeChunkWithTagsToNAND = nandmtd2_WriteChunkWithTagsToNAND; + flashDev->readChunkWithTagsFromNAND = nandmtd2_ReadChunkWithTagsFromNAND; + flashDev->markNANDBlockBad = nandmtd2_MarkNANDBlockBad; + flashDev->queryNANDBlock = nandmtd2_QueryNANDBlock; + flashDev->spareBuffer = YMALLOC(mtd->oobsize); + flashDev->isYaffs2 = 1; +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)) + flashDev->nDataBytesPerChunk = mtd->writesize; + flashDev->nChunksPerBlock = mtd->erasesize / mtd->writesize; +#else + flashDev->nDataBytesPerChunk = mtd->oobblock; + flashDev->nChunksPerBlock = mtd->erasesize / mtd->oobblock; +#endif + nBlocks = mtd->size / mtd->erasesize; + + flashDev->nCheckpointReservedBlocks = 10; + flashDev->startBlock = 0; + flashDev->endBlock = nBlocks - 1; + } + else + { + flashDev->writeChunkToNAND = nandmtd_WriteChunkToNAND; + flashDev->readChunkFromNAND = nandmtd_ReadChunkFromNAND; + flashDev->isYaffs2 = 0; + nBlocks = mtd->size / (YAFFS_CHUNKS_PER_BLOCK * YAFFS_BYTES_PER_CHUNK); + flashDev->startBlock = 320; + flashDev->endBlock = nBlocks - 1; + flashDev->nChunksPerBlock = YAFFS_CHUNKS_PER_BLOCK; + flashDev->nDataBytesPerChunk = YAFFS_BYTES_PER_CHUNK; + } + + /* ... and common functions */ + flashDev->eraseBlockInNAND = nandmtd_EraseBlockInNAND; + flashDev->initialiseNAND = nandmtd_InitialiseNAND; + + yaffs_initialise(yaffsfs_config); + + return 0; +} + + +void make_a_file(char *yaffsName,char bval,int sizeOfFile) +{ + int outh; + int i; + unsigned char buffer[100]; + + outh = yaffs_open(yaffsName, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); + if (outh < 0) + { + printf("Error opening file: %d\n", outh); + return; + } + + memset(buffer,bval,100); + + do{ + i = sizeOfFile; + if(i > 100) i = 100; + sizeOfFile -= i; + + yaffs_write(outh,buffer,i); + + } while (sizeOfFile > 0); + + + yaffs_close(outh); +} + +void read_a_file(char *fn) +{ + int h; + int i = 0; + unsigned char b; + + h = yaffs_open(fn, O_RDWR,0); + if(h<0) + { + printf("File not found\n"); + return; + } + + while(yaffs_read(h,&b,1)> 0) + { + printf("%02x ",b); + i++; + if(i > 32) + { + printf("\n"); + i = 0;; + } + } + printf("\n"); + yaffs_close(h); +} + +void cmd_yaffs_mount(char *mp) +{ + yaffs_StartUp(); + int retval = yaffs_mount(mp); + if( retval != -1) + isMounted = 1; + else + printf("Error mounting %s, return value: %d\n", mp, yaffsfs_GetError()); +} + +static void checkMount(void) +{ + if( !isMounted ) + { + cmd_yaffs_mount(MOUNT_POINT); + } +} + +void cmd_yaffs_umount(char *mp) +{ + checkMount(); + if( yaffs_unmount(mp) == -1) + printf("Error umounting %s, return value: %d\n", mp, yaffsfs_GetError()); +} + +void cmd_yaffs_write_file(char *yaffsName,char bval,int sizeOfFile) +{ + checkMount(); + make_a_file(yaffsName,bval,sizeOfFile); +} + + +void cmd_yaffs_read_file(char *fn) +{ + checkMount(); + read_a_file(fn); +} + + +void cmd_yaffs_mread_file(char *fn, char *addr) +{ + int h; + struct yaffs_stat s; + + checkMount(); + + yaffs_stat(fn,&s); + + printf ("Copy %s to 0x%08x... ", fn, addr); + h = yaffs_open(fn, O_RDWR,0); + if(h<0) + { + printf("File not found\n"); + return; + } + + yaffs_read(h,addr,(int)s.st_size); + printf("\t[DONE]\n"); + + yaffs_close(h); +} + + +void cmd_yaffs_mwrite_file(char *fn, char *addr, int size) +{ + int outh; + + checkMount(); + outh = yaffs_open(fn, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); + if (outh < 0) + { + printf("Error opening file: %d\n", outh); + } + + yaffs_write(outh,addr,size); + + yaffs_close(outh); +} + + +void cmd_yaffs_ls(const char *mountpt, int longlist) +{ + int i; + yaffs_DIR *d; + yaffs_dirent *de; + struct yaffs_stat stat; + char tempstr[255]; + + checkMount(); + d = yaffs_opendir(mountpt); + + if(!d) + { + printf("opendir failed\n"); + } + else + { + for(i = 0; (de = yaffs_readdir(d)) != NULL; i++) + { + if (longlist) + { + sprintf(tempstr, "%s/%s", mountpt, de->d_name); + yaffs_stat(tempstr, &stat); + printf("%-25s\t%7d\n",de->d_name, stat.st_size); + } + else + { + printf("%s\n",de->d_name); + } + } + } +} + + +void cmd_yaffs_mkdir(const char *dir) +{ + checkMount(); + + int retval = yaffs_mkdir(dir, 0); + + if ( retval < 0) + printf("yaffs_mkdir returning error: %d\n", retval); +} + +void cmd_yaffs_rmdir(const char *dir) +{ + checkMount(); + + int retval = yaffs_rmdir(dir); + + if ( retval < 0) + printf("yaffs_rmdir returning error: %d\n", retval); +} + +void cmd_yaffs_rm(const char *path) +{ + checkMount(); + + int retval = yaffs_unlink(path); + + if ( retval < 0) + printf("yaffs_unlink returning error: %d\n", retval); +} + +void cmd_yaffs_mv(const char *oldPath, const char *newPath) +{ + checkMount(); + + int retval = yaffs_rename(newPath, oldPath); + + if ( retval < 0) + printf("yaffs_unlink returning error: %d\n", retval); +} diff --git a/fs/yaffs2/yaffscfg.h b/fs/yaffs2/yaffscfg.h new file mode 100644 index 00000000000..6ae169612b8 --- /dev/null +++ b/fs/yaffs2/yaffscfg.h @@ -0,0 +1,46 @@ +/* + * YAFFS: Yet another Flash File System . A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2.1 as + * published by the Free Software Foundation. + * + * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. + */ + +/* + * Header file for using yaffs in an application via + * a direct interface. + */ + + +#ifndef __YAFFSCFG_H__ +#define __YAFFSCFG_H__ + + +#include "devextras.h" + +#define YAFFSFS_N_HANDLES 200 + + +typedef struct { + const char *prefix; + struct yaffs_DeviceStruct *dev; +} yaffsfs_DeviceConfiguration; + + +void yaffsfs_Lock(void); +void yaffsfs_Unlock(void); + +__u32 yaffsfs_CurrentTime(void); + +void yaffsfs_SetError(int err); +int yaffsfs_GetError(void); + +#endif + diff --git a/fs/yaffs2/yaffsfs.c b/fs/yaffs2/yaffsfs.c new file mode 100644 index 00000000000..f62c952ddcc --- /dev/null +++ b/fs/yaffs2/yaffsfs.c @@ -0,0 +1,1510 @@ +/* + * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* XXX U-BOOT XXX */ +#include +#include + +#include "yaffsfs.h" +#include "yaffs_guts.h" +#include "yaffscfg.h" +#include "yportenv.h" + +/* XXX U-BOOT XXX */ +#if 0 +#include // for memset +#endif + +#define YAFFSFS_MAX_SYMLINK_DEREFERENCES 5 + +#ifndef NULL +#define NULL ((void *)0) +#endif + + +const char *yaffsfs_c_version="$Id: yaffsfs.c,v 1.18 2007/07/18 19:40:38 charles Exp $"; + +// configurationList is the list of devices that are supported +static yaffsfs_DeviceConfiguration *yaffsfs_configurationList; + + +/* Some forward references */ +static yaffs_Object *yaffsfs_FindObject(yaffs_Object *relativeDirectory, const char *path, int symDepth); +static void yaffsfs_RemoveObjectCallback(yaffs_Object *obj); + + +// Handle management. +// + + +unsigned int yaffs_wr_attempts; + +typedef struct +{ + __u8 inUse:1; // this handle is in use + __u8 readOnly:1; // this handle is read only + __u8 append:1; // append only + __u8 exclusive:1; // exclusive + __u32 position; // current position in file + yaffs_Object *obj; // the object +}yaffsfs_Handle; + + +static yaffsfs_Handle yaffsfs_handle[YAFFSFS_N_HANDLES]; + +// yaffsfs_InitHandle +/// Inilitalise handles on start-up. +// +static int yaffsfs_InitHandles(void) +{ + int i; + for(i = 0; i < YAFFSFS_N_HANDLES; i++) + { + yaffsfs_handle[i].inUse = 0; + yaffsfs_handle[i].obj = NULL; + } + return 0; +} + +yaffsfs_Handle *yaffsfs_GetHandlePointer(int h) +{ + if(h < 0 || h >= YAFFSFS_N_HANDLES) + { + return NULL; + } + + return &yaffsfs_handle[h]; +} + +yaffs_Object *yaffsfs_GetHandleObject(int handle) +{ + yaffsfs_Handle *h = yaffsfs_GetHandlePointer(handle); + + if(h && h->inUse) + { + return h->obj; + } + + return NULL; +} + + +//yaffsfs_GetHandle +// Grab a handle (when opening a file) +// + +static int yaffsfs_GetHandle(void) +{ + int i; + yaffsfs_Handle *h; + + for(i = 0; i < YAFFSFS_N_HANDLES; i++) + { + h = yaffsfs_GetHandlePointer(i); + if(!h) + { + // todo bug: should never happen + } + if(!h->inUse) + { + memset(h,0,sizeof(yaffsfs_Handle)); + h->inUse=1; + return i; + } + } + return -1; +} + +// yaffs_PutHandle +// Let go of a handle (when closing a file) +// +static int yaffsfs_PutHandle(int handle) +{ + yaffsfs_Handle *h = yaffsfs_GetHandlePointer(handle); + + if(h) + { + h->inUse = 0; + h->obj = NULL; + } + return 0; +} + + + +// Stuff to search for a directory from a path + + +int yaffsfs_Match(char a, char b) +{ + // case sensitive + return (a == b); +} + +// yaffsfs_FindDevice +// yaffsfs_FindRoot +// Scan the configuration list to find the root. +// Curveballs: Should match paths that end in '/' too +// Curveball2 Might have "/x/ and "/x/y". Need to return the longest match +static yaffs_Device *yaffsfs_FindDevice(const char *path, char **restOfPath) +{ + yaffsfs_DeviceConfiguration *cfg = yaffsfs_configurationList; + const char *leftOver; + const char *p; + yaffs_Device *retval = NULL; + int thisMatchLength; + int longestMatch = -1; + + // Check all configs, choose the one that: + // 1) Actually matches a prefix (ie /a amd /abc will not match + // 2) Matches the longest. + while(cfg && cfg->prefix && cfg->dev) + { + leftOver = path; + p = cfg->prefix; + thisMatchLength = 0; + + while(*p && //unmatched part of prefix + strcmp(p,"/") && // the rest of the prefix is not / (to catch / at end) + *leftOver && + yaffsfs_Match(*p,*leftOver)) + { + p++; + leftOver++; + thisMatchLength++; + } + if((!*p || strcmp(p,"/") == 0) && // end of prefix + (!*leftOver || *leftOver == '/') && // no more in this path name part + (thisMatchLength > longestMatch)) + { + // Matched prefix + *restOfPath = (char *)leftOver; + retval = cfg->dev; + longestMatch = thisMatchLength; + } + cfg++; + } + return retval; +} + +static yaffs_Object *yaffsfs_FindRoot(const char *path, char **restOfPath) +{ + + yaffs_Device *dev; + + dev= yaffsfs_FindDevice(path,restOfPath); + if(dev && dev->isMounted) + { + return dev->rootDir; + } + return NULL; +} + +static yaffs_Object *yaffsfs_FollowLink(yaffs_Object *obj,int symDepth) +{ + + while(obj && obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) + { + char *alias = obj->variant.symLinkVariant.alias; + + if(*alias == '/') + { + // Starts with a /, need to scan from root up + obj = yaffsfs_FindObject(NULL,alias,symDepth++); + } + else + { + // Relative to here, so use the parent of the symlink as a start + obj = yaffsfs_FindObject(obj->parent,alias,symDepth++); + } + } + return obj; +} + + +// yaffsfs_FindDirectory +// Parse a path to determine the directory and the name within the directory. +// +// eg. "/data/xx/ff" --> puts name="ff" and returns the directory "/data/xx" +static yaffs_Object *yaffsfs_DoFindDirectory(yaffs_Object *startDir,const char *path,char **name,int symDepth) +{ + yaffs_Object *dir; + char *restOfPath; + char str[YAFFS_MAX_NAME_LENGTH+1]; + int i; + + if(symDepth > YAFFSFS_MAX_SYMLINK_DEREFERENCES) + { + return NULL; + } + + if(startDir) + { + dir = startDir; + restOfPath = (char *)path; + } + else + { + dir = yaffsfs_FindRoot(path,&restOfPath); + } + + while(dir) + { + // parse off /. + // curve ball: also throw away surplus '/' + // eg. "/ram/x////ff" gets treated the same as "/ram/x/ff" + while(*restOfPath == '/') + { + restOfPath++; // get rid of '/' + } + + *name = restOfPath; + i = 0; + + while(*restOfPath && *restOfPath != '/') + { + if (i < YAFFS_MAX_NAME_LENGTH) + { + str[i] = *restOfPath; + str[i+1] = '\0'; + i++; + } + restOfPath++; + } + + if(!*restOfPath) + { + // got to the end of the string + return dir; + } + else + { + if(strcmp(str,".") == 0) + { + // Do nothing + } + else if(strcmp(str,"..") == 0) + { + dir = dir->parent; + } + else + { + dir = yaffs_FindObjectByName(dir,str); + + while(dir && dir->variantType == YAFFS_OBJECT_TYPE_SYMLINK) + { + + dir = yaffsfs_FollowLink(dir,symDepth); + + } + + if(dir && dir->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) + { + dir = NULL; + } + } + } + } + // directory did not exist. + return NULL; +} + +static yaffs_Object *yaffsfs_FindDirectory(yaffs_Object *relativeDirectory,const char *path,char **name,int symDepth) +{ + return yaffsfs_DoFindDirectory(relativeDirectory,path,name,symDepth); +} + +// yaffsfs_FindObject turns a path for an existing object into the object +// +static yaffs_Object *yaffsfs_FindObject(yaffs_Object *relativeDirectory, const char *path,int symDepth) +{ + yaffs_Object *dir; + char *name; + + dir = yaffsfs_FindDirectory(relativeDirectory,path,&name,symDepth); + + if(dir && *name) + { + return yaffs_FindObjectByName(dir,name); + } + + return dir; +} + + + +int yaffs_open(const char *path, int oflag, int mode) +{ + yaffs_Object *obj = NULL; + yaffs_Object *dir = NULL; + char *name; + int handle = -1; + yaffsfs_Handle *h = NULL; + int alreadyOpen = 0; + int alreadyExclusive = 0; + int openDenied = 0; + int symDepth = 0; + int errorReported = 0; + + int i; + + + // todo sanity check oflag (eg. can't have O_TRUNC without WRONLY or RDWR + + + yaffsfs_Lock(); + + handle = yaffsfs_GetHandle(); + + if(handle >= 0) + { + + h = yaffsfs_GetHandlePointer(handle); + + + // try to find the exisiting object + obj = yaffsfs_FindObject(NULL,path,0); + + if(obj && obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) + { + + obj = yaffsfs_FollowLink(obj,symDepth++); + } + + if(obj) + { + // Check if the object is already in use + alreadyOpen = alreadyExclusive = 0; + + for(i = 0; i <= YAFFSFS_N_HANDLES; i++) + { + + if(i != handle && + yaffsfs_handle[i].inUse && + obj == yaffsfs_handle[i].obj) + { + alreadyOpen = 1; + if(yaffsfs_handle[i].exclusive) + { + alreadyExclusive = 1; + } + } + } + + if(((oflag & O_EXCL) && alreadyOpen) || alreadyExclusive) + { + openDenied = 1; + } + + // Open should fail if O_CREAT and O_EXCL are specified + if((oflag & O_EXCL) && (oflag & O_CREAT)) + { + openDenied = 1; + yaffsfs_SetError(-EEXIST); + errorReported = 1; + } + + // Check file permissions + if( (oflag & (O_RDWR | O_WRONLY)) == 0 && // ie O_RDONLY + !(obj->yst_mode & S_IREAD)) + { + openDenied = 1; + } + + if( (oflag & O_RDWR) && + !(obj->yst_mode & S_IREAD)) + { + openDenied = 1; + } + + if( (oflag & (O_RDWR | O_WRONLY)) && + !(obj->yst_mode & S_IWRITE)) + { + openDenied = 1; + } + + } + + else if((oflag & O_CREAT)) + { + // Let's see if we can create this file + dir = yaffsfs_FindDirectory(NULL,path,&name,0); + if(dir) + { + obj = yaffs_MknodFile(dir,name,mode,0,0); + } + else + { + yaffsfs_SetError(-ENOTDIR); + } + } + + if(obj && !openDenied) + { + h->obj = obj; + h->inUse = 1; + h->readOnly = (oflag & (O_WRONLY | O_RDWR)) ? 0 : 1; + h->append = (oflag & O_APPEND) ? 1 : 0; + h->exclusive = (oflag & O_EXCL) ? 1 : 0; + h->position = 0; + + obj->inUse++; + if((oflag & O_TRUNC) && !h->readOnly) + { + //todo truncate + yaffs_ResizeFile(obj,0); + } + + } + else + { + yaffsfs_PutHandle(handle); + if(!errorReported) + { + yaffsfs_SetError(-EACCESS); + errorReported = 1; + } + handle = -1; + } + + } + + yaffsfs_Unlock(); + + return handle; +} + +int yaffs_close(int fd) +{ + yaffsfs_Handle *h = NULL; + int retVal = 0; + + yaffsfs_Lock(); + + h = yaffsfs_GetHandlePointer(fd); + + if(h && h->inUse) + { + // clean up + yaffs_FlushFile(h->obj,1); + h->obj->inUse--; + if(h->obj->inUse <= 0 && h->obj->unlinked) + { + yaffs_DeleteFile(h->obj); + } + yaffsfs_PutHandle(fd); + retVal = 0; + } + else + { + // bad handle + yaffsfs_SetError(-EBADF); + retVal = -1; + } + + yaffsfs_Unlock(); + + return retVal; +} + +int yaffs_read(int fd, void *buf, unsigned int nbyte) +{ + yaffsfs_Handle *h = NULL; + yaffs_Object *obj = NULL; + int pos = 0; + int nRead = -1; + int maxRead; + + yaffsfs_Lock(); + h = yaffsfs_GetHandlePointer(fd); + obj = yaffsfs_GetHandleObject(fd); + + if(!h || !obj) + { + // bad handle + yaffsfs_SetError(-EBADF); + } + else if( h && obj) + { + pos= h->position; + if(yaffs_GetObjectFileLength(obj) > pos) + { + maxRead = yaffs_GetObjectFileLength(obj) - pos; + } + else + { + maxRead = 0; + } + + if(nbyte > maxRead) + { + nbyte = maxRead; + } + + + if(nbyte > 0) + { + nRead = yaffs_ReadDataFromFile(obj,buf,pos,nbyte); + if(nRead >= 0) + { + h->position = pos + nRead; + } + else + { + //todo error + } + } + else + { + nRead = 0; + } + + } + + yaffsfs_Unlock(); + + + return (nRead >= 0) ? nRead : -1; + +} + +int yaffs_write(int fd, const void *buf, unsigned int nbyte) +{ + yaffsfs_Handle *h = NULL; + yaffs_Object *obj = NULL; + int pos = 0; + int nWritten = -1; + int writeThrough = 0; + + yaffsfs_Lock(); + h = yaffsfs_GetHandlePointer(fd); + obj = yaffsfs_GetHandleObject(fd); + + if(!h || !obj) + { + // bad handle + yaffsfs_SetError(-EBADF); + } + else if( h && obj && h->readOnly) + { + // todo error + } + else if( h && obj) + { + if(h->append) + { + pos = yaffs_GetObjectFileLength(obj); + } + else + { + pos = h->position; + } + + nWritten = yaffs_WriteDataToFile(obj,buf,pos,nbyte,writeThrough); + + if(nWritten >= 0) + { + h->position = pos + nWritten; + } + else + { + //todo error + } + + } + + yaffsfs_Unlock(); + + + return (nWritten >= 0) ? nWritten : -1; + +} + +int yaffs_truncate(int fd, off_t newSize) +{ + yaffsfs_Handle *h = NULL; + yaffs_Object *obj = NULL; + int result = 0; + + yaffsfs_Lock(); + h = yaffsfs_GetHandlePointer(fd); + obj = yaffsfs_GetHandleObject(fd); + + if(!h || !obj) + { + // bad handle + yaffsfs_SetError(-EBADF); + } + else + { + // resize the file + result = yaffs_ResizeFile(obj,newSize); + } + yaffsfs_Unlock(); + + + return (result) ? 0 : -1; + +} + +off_t yaffs_lseek(int fd, off_t offset, int whence) +{ + yaffsfs_Handle *h = NULL; + yaffs_Object *obj = NULL; + int pos = -1; + int fSize = -1; + + yaffsfs_Lock(); + h = yaffsfs_GetHandlePointer(fd); + obj = yaffsfs_GetHandleObject(fd); + + if(!h || !obj) + { + // bad handle + yaffsfs_SetError(-EBADF); + } + else if(whence == SEEK_SET) + { + if(offset >= 0) + { + pos = offset; + } + } + else if(whence == SEEK_CUR) + { + if( (h->position + offset) >= 0) + { + pos = (h->position + offset); + } + } + else if(whence == SEEK_END) + { + fSize = yaffs_GetObjectFileLength(obj); + if(fSize >= 0 && (fSize + offset) >= 0) + { + pos = fSize + offset; + } + } + + if(pos >= 0) + { + h->position = pos; + } + else + { + // todo error + } + + + yaffsfs_Unlock(); + + return pos; +} + + +int yaffsfs_DoUnlink(const char *path,int isDirectory) +{ + yaffs_Object *dir = NULL; + yaffs_Object *obj = NULL; + char *name; + int result = YAFFS_FAIL; + + yaffsfs_Lock(); + + obj = yaffsfs_FindObject(NULL,path,0); + dir = yaffsfs_FindDirectory(NULL,path,&name,0); + if(!dir) + { + yaffsfs_SetError(-ENOTDIR); + } + else if(!obj) + { + yaffsfs_SetError(-ENOENT); + } + else if(!isDirectory && obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) + { + yaffsfs_SetError(-EISDIR); + } + else if(isDirectory && obj->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) + { + yaffsfs_SetError(-ENOTDIR); + } + else + { + result = yaffs_Unlink(dir,name); + + if(result == YAFFS_FAIL && isDirectory) + { + yaffsfs_SetError(-ENOTEMPTY); + } + } + + yaffsfs_Unlock(); + + // todo error + + return (result == YAFFS_FAIL) ? -1 : 0; +} +int yaffs_rmdir(const char *path) +{ + return yaffsfs_DoUnlink(path,1); +} + +int yaffs_unlink(const char *path) +{ + return yaffsfs_DoUnlink(path,0); +} + +int yaffs_rename(const char *oldPath, const char *newPath) +{ + yaffs_Object *olddir = NULL; + yaffs_Object *newdir = NULL; + yaffs_Object *obj = NULL; + char *oldname; + char *newname; + int result= YAFFS_FAIL; + int renameAllowed = 1; + + yaffsfs_Lock(); + + olddir = yaffsfs_FindDirectory(NULL,oldPath,&oldname,0); + newdir = yaffsfs_FindDirectory(NULL,newPath,&newname,0); + obj = yaffsfs_FindObject(NULL,oldPath,0); + + if(!olddir || !newdir || !obj) + { + // bad file + yaffsfs_SetError(-EBADF); + renameAllowed = 0; + } + else if(olddir->myDev != newdir->myDev) + { + // oops must be on same device + // todo error + yaffsfs_SetError(-EXDEV); + renameAllowed = 0; + } + else if(obj && obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) + { + // It is a directory, check that it is not being renamed to + // being its own decendent. + // Do this by tracing from the new directory back to the root, checking for obj + + yaffs_Object *xx = newdir; + + while( renameAllowed && xx) + { + if(xx == obj) + { + renameAllowed = 0; + } + xx = xx->parent; + } + if(!renameAllowed) yaffsfs_SetError(-EACCESS); + } + + if(renameAllowed) + { + result = yaffs_RenameObject(olddir,oldname,newdir,newname); + } + + yaffsfs_Unlock(); + + return (result == YAFFS_FAIL) ? -1 : 0; +} + + +static int yaffsfs_DoStat(yaffs_Object *obj,struct yaffs_stat *buf) +{ + int retVal = -1; + + if(obj) + { + obj = yaffs_GetEquivalentObject(obj); + } + + if(obj && buf) + { + buf->st_dev = (int)obj->myDev->genericDevice; + buf->st_ino = obj->objectId; + buf->st_mode = obj->yst_mode & ~S_IFMT; // clear out file type bits + + if(obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) + { + buf->st_mode |= S_IFDIR; + } + else if(obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) + { + buf->st_mode |= S_IFLNK; + } + else if(obj->variantType == YAFFS_OBJECT_TYPE_FILE) + { + buf->st_mode |= S_IFREG; + } + + buf->st_nlink = yaffs_GetObjectLinkCount(obj); + buf->st_uid = 0; + buf->st_gid = 0;; + buf->st_rdev = obj->yst_rdev; + buf->st_size = yaffs_GetObjectFileLength(obj); + buf->st_blksize = obj->myDev->nDataBytesPerChunk; + buf->st_blocks = (buf->st_size + buf->st_blksize -1)/buf->st_blksize; + buf->yst_atime = obj->yst_atime; + buf->yst_ctime = obj->yst_ctime; + buf->yst_mtime = obj->yst_mtime; + retVal = 0; + } + return retVal; +} + +static int yaffsfs_DoStatOrLStat(const char *path, struct yaffs_stat *buf,int doLStat) +{ + yaffs_Object *obj; + + int retVal = -1; + + yaffsfs_Lock(); + obj = yaffsfs_FindObject(NULL,path,0); + + if(!doLStat && obj) + { + obj = yaffsfs_FollowLink(obj,0); + } + + if(obj) + { + retVal = yaffsfs_DoStat(obj,buf); + } + else + { + // todo error not found + yaffsfs_SetError(-ENOENT); + } + + yaffsfs_Unlock(); + + return retVal; + +} + +int yaffs_stat(const char *path, struct yaffs_stat *buf) +{ + return yaffsfs_DoStatOrLStat(path,buf,0); +} + +int yaffs_lstat(const char *path, struct yaffs_stat *buf) +{ + return yaffsfs_DoStatOrLStat(path,buf,1); +} + +int yaffs_fstat(int fd, struct yaffs_stat *buf) +{ + yaffs_Object *obj; + + int retVal = -1; + + yaffsfs_Lock(); + obj = yaffsfs_GetHandleObject(fd); + + if(obj) + { + retVal = yaffsfs_DoStat(obj,buf); + } + else + { + // bad handle + yaffsfs_SetError(-EBADF); + } + + yaffsfs_Unlock(); + + return retVal; +} + +static int yaffsfs_DoChMod(yaffs_Object *obj,mode_t mode) +{ + int result = YAFFS_FAIL; + + if(obj) + { + obj = yaffs_GetEquivalentObject(obj); + } + + if(obj) + { + obj->yst_mode = mode; + obj->dirty = 1; + result = yaffs_FlushFile(obj,0); + } + + return result == YAFFS_OK ? 0 : -1; +} + + +int yaffs_chmod(const char *path, mode_t mode) +{ + yaffs_Object *obj; + + int retVal = -1; + + yaffsfs_Lock(); + obj = yaffsfs_FindObject(NULL,path,0); + + if(obj) + { + retVal = yaffsfs_DoChMod(obj,mode); + } + else + { + // todo error not found + yaffsfs_SetError(-ENOENT); + } + + yaffsfs_Unlock(); + + return retVal; + +} + + +int yaffs_fchmod(int fd, mode_t mode) +{ + yaffs_Object *obj; + + int retVal = -1; + + yaffsfs_Lock(); + obj = yaffsfs_GetHandleObject(fd); + + if(obj) + { + retVal = yaffsfs_DoChMod(obj,mode); + } + else + { + // bad handle + yaffsfs_SetError(-EBADF); + } + + yaffsfs_Unlock(); + + return retVal; +} + + +int yaffs_mkdir(const char *path, mode_t mode) +{ + yaffs_Object *parent = NULL; + yaffs_Object *dir = NULL; + char *name; + int retVal= -1; + + yaffsfs_Lock(); + parent = yaffsfs_FindDirectory(NULL,path,&name,0); + if(parent) + dir = yaffs_MknodDirectory(parent,name,mode,0,0); + if(dir) + { + retVal = 0; + } + else + { + yaffsfs_SetError(-ENOSPC); // just assume no space for now + retVal = -1; + } + + yaffsfs_Unlock(); + + return retVal; +} + +int yaffs_mount(const char *path) +{ + int retVal=-1; + int result=YAFFS_FAIL; + yaffs_Device *dev=NULL; + char *dummy; + + T(YAFFS_TRACE_ALWAYS,("yaffs: Mounting %s\n",path)); + + yaffsfs_Lock(); + dev = yaffsfs_FindDevice(path,&dummy); + if(dev) + { + if(!dev->isMounted) + { + result = yaffs_GutsInitialise(dev); + if(result == YAFFS_FAIL) + { + // todo error - mount failed + yaffsfs_SetError(-ENOMEM); + } + retVal = result ? 0 : -1; + + } + else + { + //todo error - already mounted. + yaffsfs_SetError(-EBUSY); + } + } + else + { + // todo error - no device + yaffsfs_SetError(-ENODEV); + } + yaffsfs_Unlock(); + return retVal; + +} + +int yaffs_unmount(const char *path) +{ + int retVal=-1; + yaffs_Device *dev=NULL; + char *dummy; + + yaffsfs_Lock(); + dev = yaffsfs_FindDevice(path,&dummy); + if(dev) + { + if(dev->isMounted) + { + int i; + int inUse; + + yaffs_FlushEntireDeviceCache(dev); + yaffs_CheckpointSave(dev); + + for(i = inUse = 0; i < YAFFSFS_N_HANDLES && !inUse; i++) + { + if(yaffsfs_handle[i].inUse && yaffsfs_handle[i].obj->myDev == dev) + { + inUse = 1; // the device is in use, can't unmount + } + } + + if(!inUse) + { + yaffs_Deinitialise(dev); + + retVal = 0; + } + else + { + // todo error can't unmount as files are open + yaffsfs_SetError(-EBUSY); + } + + } + else + { + //todo error - not mounted. + yaffsfs_SetError(-EINVAL); + + } + } + else + { + // todo error - no device + yaffsfs_SetError(-ENODEV); + } + yaffsfs_Unlock(); + return retVal; + +} + +loff_t yaffs_freespace(const char *path) +{ + loff_t retVal=-1; + yaffs_Device *dev=NULL; + char *dummy; + + yaffsfs_Lock(); + dev = yaffsfs_FindDevice(path,&dummy); + if(dev && dev->isMounted) + { + retVal = yaffs_GetNumberOfFreeChunks(dev); + retVal *= dev->nDataBytesPerChunk; + + } + else + { + yaffsfs_SetError(-EINVAL); + } + + yaffsfs_Unlock(); + return retVal; +} + + + +void yaffs_initialise(yaffsfs_DeviceConfiguration *cfgList) +{ + + yaffsfs_DeviceConfiguration *cfg; + + yaffsfs_configurationList = cfgList; + + yaffsfs_InitHandles(); + + cfg = yaffsfs_configurationList; + + while(cfg && cfg->prefix && cfg->dev) + { + cfg->dev->isMounted = 0; + cfg->dev->removeObjectCallback = yaffsfs_RemoveObjectCallback; + cfg++; + } +} + + +// +// Directory search stuff. + +// +// Directory search context +// +// NB this is an opaque structure. + + +typedef struct +{ + __u32 magic; + yaffs_dirent de; /* directory entry being used by this dsc */ + char name[NAME_MAX+1]; /* name of directory being searched */ + yaffs_Object *dirObj; /* ptr to directory being searched */ + yaffs_Object *nextReturn; /* obj to be returned by next readddir */ + int offset; + struct list_head others; +} yaffsfs_DirectorySearchContext; + + + +static struct list_head search_contexts; + + +static void yaffsfs_SetDirRewound(yaffsfs_DirectorySearchContext *dsc) +{ + if(dsc && + dsc->dirObj && + dsc->dirObj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY){ + + dsc->offset = 0; + + if( list_empty(&dsc->dirObj->variant.directoryVariant.children)){ + dsc->nextReturn = NULL; + } else { + dsc->nextReturn = list_entry(dsc->dirObj->variant.directoryVariant.children.next, + yaffs_Object,siblings); + } + } else { + /* Hey someone isn't playing nice! */ + } +} + +static void yaffsfs_DirAdvance(yaffsfs_DirectorySearchContext *dsc) +{ + if(dsc && + dsc->dirObj && + dsc->dirObj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY){ + + if( dsc->nextReturn == NULL || + list_empty(&dsc->dirObj->variant.directoryVariant.children)){ + dsc->nextReturn = NULL; + } else { + struct list_head *next = dsc->nextReturn->siblings.next; + + if( next == &dsc->dirObj->variant.directoryVariant.children) + dsc->nextReturn = NULL; /* end of list */ + else + dsc->nextReturn = list_entry(next,yaffs_Object,siblings); + } + } else { + /* Hey someone isn't playing nice! */ + } +} + +static void yaffsfs_RemoveObjectCallback(yaffs_Object *obj) +{ + + struct list_head *i; + yaffsfs_DirectorySearchContext *dsc; + + /* if search contexts not initilised then skip */ + if(!search_contexts.next) + return; + + /* Iteratethrough the directory search contexts. + * If any are the one being removed, then advance the dsc to + * the next one to prevent a hanging ptr. + */ + list_for_each(i, &search_contexts) { + if (i) { + dsc = list_entry(i, yaffsfs_DirectorySearchContext,others); + if(dsc->nextReturn == obj) + yaffsfs_DirAdvance(dsc); + } + } + +} + +yaffs_DIR *yaffs_opendir(const char *dirname) +{ + yaffs_DIR *dir = NULL; + yaffs_Object *obj = NULL; + yaffsfs_DirectorySearchContext *dsc = NULL; + + yaffsfs_Lock(); + + obj = yaffsfs_FindObject(NULL,dirname,0); + + if(obj && obj->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) + { + + dsc = YMALLOC(sizeof(yaffsfs_DirectorySearchContext)); + dir = (yaffs_DIR *)dsc; + if(dsc) + { + memset(dsc,0,sizeof(yaffsfs_DirectorySearchContext)); + dsc->magic = YAFFS_MAGIC; + dsc->dirObj = obj; + strncpy(dsc->name,dirname,NAME_MAX); + INIT_LIST_HEAD(&dsc->others); + + if(!search_contexts.next) + INIT_LIST_HEAD(&search_contexts); + + list_add(&dsc->others,&search_contexts); + yaffsfs_SetDirRewound(dsc); } + + } + + yaffsfs_Unlock(); + + return dir; +} + +struct yaffs_dirent *yaffs_readdir(yaffs_DIR *dirp) +{ + yaffsfs_DirectorySearchContext *dsc = (yaffsfs_DirectorySearchContext *)dirp; + struct yaffs_dirent *retVal = NULL; + + yaffsfs_Lock(); + + if(dsc && dsc->magic == YAFFS_MAGIC){ + yaffsfs_SetError(0); + if(dsc->nextReturn){ + dsc->de.d_ino = yaffs_GetEquivalentObject(dsc->nextReturn)->objectId; + dsc->de.d_dont_use = (unsigned)dsc->nextReturn; + dsc->de.d_off = dsc->offset++; + yaffs_GetObjectName(dsc->nextReturn,dsc->de.d_name,NAME_MAX); + if(strlen(dsc->de.d_name) == 0) + { + // this should not happen! + strcpy(dsc->de.d_name,"zz"); + } + dsc->de.d_reclen = sizeof(struct yaffs_dirent); + retVal = &dsc->de; + yaffsfs_DirAdvance(dsc); + } else + retVal = NULL; + } + else + { + yaffsfs_SetError(-EBADF); + } + + yaffsfs_Unlock(); + + return retVal; + +} + + +void yaffs_rewinddir(yaffs_DIR *dirp) +{ + yaffsfs_DirectorySearchContext *dsc = (yaffsfs_DirectorySearchContext *)dirp; + + yaffsfs_Lock(); + + yaffsfs_SetDirRewound(dsc); + + yaffsfs_Unlock(); +} + + +int yaffs_closedir(yaffs_DIR *dirp) +{ + yaffsfs_DirectorySearchContext *dsc = (yaffsfs_DirectorySearchContext *)dirp; + + yaffsfs_Lock(); + dsc->magic = 0; + list_del(&dsc->others); /* unhook from list */ + YFREE(dsc); + yaffsfs_Unlock(); + return 0; +} + +// end of directory stuff + + +int yaffs_symlink(const char *oldpath, const char *newpath) +{ + yaffs_Object *parent = NULL; + yaffs_Object *obj; + char *name; + int retVal= -1; + int mode = 0; // ignore for now + + yaffsfs_Lock(); + parent = yaffsfs_FindDirectory(NULL,newpath,&name,0); + obj = yaffs_MknodSymLink(parent,name,mode,0,0,oldpath); + if(obj) + { + retVal = 0; + } + else + { + yaffsfs_SetError(-ENOSPC); // just assume no space for now + retVal = -1; + } + + yaffsfs_Unlock(); + + return retVal; + +} + +int yaffs_readlink(const char *path, char *buf, int bufsiz) +{ + yaffs_Object *obj = NULL; + int retVal; + + + yaffsfs_Lock(); + + obj = yaffsfs_FindObject(NULL,path,0); + + if(!obj) + { + yaffsfs_SetError(-ENOENT); + retVal = -1; + } + else if(obj->variantType != YAFFS_OBJECT_TYPE_SYMLINK) + { + yaffsfs_SetError(-EINVAL); + retVal = -1; + } + else + { + char *alias = obj->variant.symLinkVariant.alias; + memset(buf,0,bufsiz); + strncpy(buf,alias,bufsiz - 1); + retVal = 0; + } + yaffsfs_Unlock(); + return retVal; +} + +int yaffs_link(const char *oldpath, const char *newpath) +{ + // Creates a link called newpath to existing oldpath + yaffs_Object *obj = NULL; + yaffs_Object *target = NULL; + int retVal = 0; + + + yaffsfs_Lock(); + + obj = yaffsfs_FindObject(NULL,oldpath,0); + target = yaffsfs_FindObject(NULL,newpath,0); + + if(!obj) + { + yaffsfs_SetError(-ENOENT); + retVal = -1; + } + else if(target) + { + yaffsfs_SetError(-EEXIST); + retVal = -1; + } + else + { + yaffs_Object *newdir = NULL; + yaffs_Object *link = NULL; + + char *newname; + + newdir = yaffsfs_FindDirectory(NULL,newpath,&newname,0); + + if(!newdir) + { + yaffsfs_SetError(-ENOTDIR); + retVal = -1; + } + else if(newdir->myDev != obj->myDev) + { + yaffsfs_SetError(-EXDEV); + retVal = -1; + } + if(newdir && strlen(newname) > 0) + { + link = yaffs_Link(newdir,newname,obj); + if(link) + retVal = 0; + else + { + yaffsfs_SetError(-ENOSPC); + retVal = -1; + } + + } + } + yaffsfs_Unlock(); + + return retVal; +} + +int yaffs_mknod(const char *pathname, mode_t mode, dev_t dev); + +int yaffs_DumpDevStruct(const char *path) +{ + char *rest; + + yaffs_Object *obj = yaffsfs_FindRoot(path,&rest); + + if(obj) + { + yaffs_Device *dev = obj->myDev; + + printf("\n" + "nPageWrites.......... %d\n" + "nPageReads........... %d\n" + "nBlockErasures....... %d\n" + "nGCCopies............ %d\n" + "garbageCollections... %d\n" + "passiveGarbageColl'ns %d\n" + "\n", + dev->nPageWrites, + dev->nPageReads, + dev->nBlockErasures, + dev->nGCCopies, + dev->garbageCollections, + dev->passiveGarbageCollections + ); + + } + return 0; +} diff --git a/fs/yaffs2/yaffsfs.h b/fs/yaffs2/yaffsfs.h new file mode 100644 index 00000000000..9afe60a1ceb --- /dev/null +++ b/fs/yaffs2/yaffsfs.h @@ -0,0 +1,233 @@ +/* + * YAFFS: Yet another Flash File System . A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2.1 as + * published by the Free Software Foundation. + * + * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. + */ + +/* + * Header file for using yaffs in an application via + * a direct interface. + */ + + +#ifndef __YAFFSFS_H__ +#define __YAFFSFS_H__ + +#include "yaffscfg.h" +#include "yportenv.h" + + +//typedef long off_t; +//typedef long dev_t; +//typedef unsigned long mode_t; + + +#ifndef NAME_MAX +#define NAME_MAX 256 +#endif + +#ifndef O_RDONLY +#define O_RDONLY 00 +#endif + +#ifndef O_WRONLY +#define O_WRONLY 01 +#endif + +#ifndef O_RDWR +#define O_RDWR 02 +#endif + +#ifndef O_CREAT +#define O_CREAT 0100 +#endif + +#ifndef O_EXCL +#define O_EXCL 0200 +#endif + +#ifndef O_TRUNC +#define O_TRUNC 01000 +#endif + +#ifndef O_APPEND +#define O_APPEND 02000 +#endif + +#ifndef SEEK_SET +#define SEEK_SET 0 +#endif + +#ifndef SEEK_CUR +#define SEEK_CUR 1 +#endif + +#ifndef SEEK_END +#define SEEK_END 2 +#endif + +#ifndef EBUSY +#define EBUSY 16 +#endif + +#ifndef ENODEV +#define ENODEV 19 +#endif + +#ifndef EINVAL +#define EINVAL 22 +#endif + +#ifndef EBADF +#define EBADF 9 +#endif + +#ifndef EACCESS +#define EACCESS 13 +#endif + +#ifndef EXDEV +#define EXDEV 18 +#endif + +#ifndef ENOENT +#define ENOENT 2 +#endif + +#ifndef ENOSPC +#define ENOSPC 28 +#endif + +#ifndef ENOTEMPTY +#define ENOTEMPTY 39 +#endif + +#ifndef ENOMEM +#define ENOMEM 12 +#endif + +#ifndef EEXIST +#define EEXIST 17 +#endif + +#ifndef ENOTDIR +#define ENOTDIR 20 +#endif + +#ifndef EISDIR +#define EISDIR 21 +#endif + + +// Mode flags + +#ifndef S_IFMT +#define S_IFMT 0170000 +#endif + +#ifndef S_IFLNK +#define S_IFLNK 0120000 +#endif + +#ifndef S_IFDIR +#define S_IFDIR 0040000 +#endif + +#ifndef S_IFREG +#define S_IFREG 0100000 +#endif + +#ifndef S_IREAD +#define S_IREAD 0000400 +#endif + +#ifndef S_IWRITE +#define S_IWRITE 0000200 +#endif + + + + +struct yaffs_dirent{ + long d_ino; /* inode number */ + off_t d_off; /* offset to this dirent */ + unsigned short d_reclen; /* length of this d_name */ + char d_name [NAME_MAX+1]; /* file name (null-terminated) */ + unsigned d_dont_use; /* debug pointer, not for public consumption */ +}; + +typedef struct yaffs_dirent yaffs_dirent; + + +typedef struct __opaque yaffs_DIR; + + + +struct yaffs_stat{ + int st_dev; /* device */ + int st_ino; /* inode */ + mode_t st_mode; /* protection */ + int st_nlink; /* number of hard links */ + int st_uid; /* user ID of owner */ + int st_gid; /* group ID of owner */ + unsigned st_rdev; /* device type (if inode device) */ + off_t st_size; /* total size, in bytes */ + unsigned long st_blksize; /* blocksize for filesystem I/O */ + unsigned long st_blocks; /* number of blocks allocated */ + unsigned long yst_atime; /* time of last access */ + unsigned long yst_mtime; /* time of last modification */ + unsigned long yst_ctime; /* time of last change */ +}; + +int yaffs_open(const char *path, int oflag, int mode) ; +int yaffs_read(int fd, void *buf, unsigned int nbyte) ; +int yaffs_write(int fd, const void *buf, unsigned int nbyte) ; +int yaffs_close(int fd) ; +off_t yaffs_lseek(int fd, off_t offset, int whence) ; +int yaffs_truncate(int fd, off_t newSize); + +int yaffs_unlink(const char *path) ; +int yaffs_rename(const char *oldPath, const char *newPath) ; + +int yaffs_stat(const char *path, struct yaffs_stat *buf) ; +int yaffs_lstat(const char *path, struct yaffs_stat *buf) ; +int yaffs_fstat(int fd, struct yaffs_stat *buf) ; + +int yaffs_chmod(const char *path, mode_t mode); +int yaffs_fchmod(int fd, mode_t mode); + +int yaffs_mkdir(const char *path, mode_t mode) ; +int yaffs_rmdir(const char *path) ; + +yaffs_DIR *yaffs_opendir(const char *dirname) ; +struct yaffs_dirent *yaffs_readdir(yaffs_DIR *dirp) ; +void yaffs_rewinddir(yaffs_DIR *dirp) ; +int yaffs_closedir(yaffs_DIR *dirp) ; + +int yaffs_mount(const char *path) ; +int yaffs_unmount(const char *path) ; + +int yaffs_symlink(const char *oldpath, const char *newpath); +int yaffs_readlink(const char *path, char *buf, int bufsiz); + +int yaffs_link(const char *oldpath, const char *newpath); +int yaffs_mknod(const char *pathname, mode_t mode, dev_t dev); + +loff_t yaffs_freespace(const char *path); + +void yaffs_initialise(yaffsfs_DeviceConfiguration *configList); + +int yaffs_StartUp(void); + +#endif + + diff --git a/fs/yaffs2/ydirectenv.h b/fs/yaffs2/ydirectenv.h new file mode 100644 index 00000000000..adcc0b54685 --- /dev/null +++ b/fs/yaffs2/ydirectenv.h @@ -0,0 +1,94 @@ +/* + * YAFFS: Yet another Flash File System . A NAND-flash specific file system. + * + * Copyright (C) 2002-2007 Aleph One Ltd. + * for Toby Churchill Ltd and Brightstar Engineering + * + * Created by Charles Manning + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License version 2.1 as + * published by the Free Software Foundation. + * + * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. + */ + +/* + * ydirectenv.h: Environment wrappers for YAFFS direct. + */ + +#ifndef __YDIRECTENV_H__ +#define __YDIRECTENV_H__ + +// Direct interface + +#include "devextras.h" + +/* XXX U-BOOT XXX */ +#if 0 +#include "stdlib.h" +#include "stdio.h" +#include "string.h" +#include "assert.h" +#endif +#include "yaffs_malloc.h" + +/* XXX U-BOOT XXX */ +#if 0 +#define YBUG() assert(1) +#endif + +#define YCHAR char +#define YUCHAR unsigned char +#define _Y(x) x +#define yaffs_strcpy(a,b) strcpy(a,b) +#define yaffs_strncpy(a,b,c) strncpy(a,b,c) +#define yaffs_strncmp(a,b,c) strncmp(a,b,c) +#define yaffs_strlen(s) strlen(s) +#define yaffs_sprintf sprintf +#define yaffs_toupper(a) toupper(a) + +#ifdef NO_Y_INLINE +#define Y_INLINE +#else +#define Y_INLINE inline +#endif + +#define YMALLOC(x) yaffs_malloc(x) +#define YFREE(x) free(x) +#define YMALLOC_ALT(x) yaffs_malloc(x) +#define YFREE_ALT(x) free(x) + +#define YMALLOC_DMA(x) yaffs_malloc(x) + +#define YYIELD() do {} while(0) + + + +//#define YINFO(s) YPRINTF(( __FILE__ " %d %s\n",__LINE__,s)) +//#define YALERT(s) YINFO(s) + + +#define TENDSTR "\n" +#define TSTR(x) x +#define TOUT(p) printf p + + +#define YAFFS_LOSTNFOUND_NAME "lost+found" +#define YAFFS_LOSTNFOUND_PREFIX "obj" +//#define YPRINTF(x) printf x + +#include "yaffscfg.h" + +#define Y_CURRENT_TIME yaffsfs_CurrentTime() +#define Y_TIME_CONVERT(x) x + +#define YAFFS_ROOT_MODE 0666 +#define YAFFS_LOSTNFOUND_MODE 0666 + +#define yaffs_SumCompare(x,y) ((x) == (y)) +#define yaffs_strcmp(a,b) strcmp(a,b) + +#endif + + -- cgit v1.3.1 From e4c09508545d1c45617ba45391c03c03cbc360b9 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Mon, 30 Jun 2008 14:13:28 -0500 Subject: NAND boot: MPC8313ERDB support Note that with older board revisions, NAND boot may only work after a power-on reset, and not after a warm reset. I don't have a newer board to test on; if you have a board with a 33MHz crystal, please let me know if it works after a warm reset. Signed-off-by: Scott Wood --- Makefile | 10 +- board/freescale/mpc8313erdb/config.mk | 6 + board/freescale/mpc8313erdb/mpc8313erdb.c | 32 +++++ board/freescale/mpc8313erdb/sdram.c | 5 +- cpu/mpc83xx/nand_init.c | 112 +++++++++++++++++ cpu/mpc83xx/start.S | 152 +++++++----------------- include/configs/MPC8313ERDB.h | 82 ++++++++++--- include/mpc83xx.h | 2 + include/nand.h | 2 + lib_ppc/time.c | 4 +- nand_spl/board/freescale/mpc8313erdb/Makefile | 101 ++++++++++++++++ nand_spl/board/freescale/mpc8313erdb/u-boot.lds | 52 ++++++++ nand_spl/nand_boot.c | 4 +- nand_spl/nand_boot_fsl_elbc.c | 150 +++++++++++++++++++++++ 14 files changed, 585 insertions(+), 129 deletions(-) create mode 100644 cpu/mpc83xx/nand_init.c create mode 100644 nand_spl/board/freescale/mpc8313erdb/Makefile create mode 100644 nand_spl/board/freescale/mpc8313erdb/u-boot.lds create mode 100644 nand_spl/nand_boot_fsl_elbc.c (limited to 'Makefile') diff --git a/Makefile b/Makefile index f25750fd7ef..ffdd726d3a4 100644 --- a/Makefile +++ b/Makefile @@ -1997,8 +1997,11 @@ TASREG_config : unconfig ######################################################################### MPC8313ERDB_33_config \ -MPC8313ERDB_66_config: unconfig +MPC8313ERDB_66_config \ +MPC8313ERDB_NAND_33_config \ +MPC8313ERDB_NAND_66_config: unconfig @mkdir -p $(obj)include + @mkdir -p $(obj)board/freescale/mpc8313erdb @if [ "$(findstring _33_,$@)" ] ; then \ $(XECHO) -n "...33M ..." ; \ echo "#define CFG_33MHZ" >>$(obj)include/config.h ; \ @@ -2006,6 +2009,11 @@ MPC8313ERDB_66_config: unconfig if [ "$(findstring _66_,$@)" ] ; then \ $(XECHO) -n "...66M..." ; \ echo "#define CFG_66MHZ" >>$(obj)include/config.h ; \ + fi ; \ + if [ "$(findstring _NAND_,$@)" ] ; then \ + $(XECHO) -n "...NAND..." ; \ + echo "TEXT_BASE = 0x00100000" > $(obj)/board/freescale/mpc8313erdb/config.tmp ; \ + echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \ fi ; @$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb freescale diff --git a/board/freescale/mpc8313erdb/config.mk b/board/freescale/mpc8313erdb/config.mk index f76826495ef..fd72a1402a7 100644 --- a/board/freescale/mpc8313erdb/config.mk +++ b/board/freescale/mpc8313erdb/config.mk @@ -1 +1,7 @@ +ifndef NAND_SPL +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp +endif + +ifndef TEXT_BASE TEXT_BASE = 0xFE000000 +endif diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 7cbdb7bf315..ebb703d3ec2 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -29,6 +29,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -50,6 +52,7 @@ int checkboard(void) return 0; } +#ifndef CONFIG_NAND_SPL static struct pci_region pci_regions[] = { { bus_start: CFG_PCI1_MEM_BASE, @@ -128,3 +131,32 @@ void ft_board_setup(void *blob, bd_t *bd) #endif } #endif +#else /* CONFIG_NAND_SPL */ +void board_init_f(ulong bootflag) +{ + board_early_init_f(); + NS16550_init((NS16550_t)(CFG_IMMR + 0x4500), + CFG_NS16550_CLK / 16 / CONFIG_BAUDRATE); + puts("NAND boot... "); + init_timebase(); + initdram(0); + relocate_code(CFG_NAND_U_BOOT_RELOC + 0x10000, (gd_t *)gd, + CFG_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (gd->flags & GD_FLG_SILENT) + return; + + if (c == '\n') + NS16550_putc((NS16550_t)(CFG_IMMR + 0x4500), '\r'); + + NS16550_putc((NS16550_t)(CFG_IMMR + 0x4500), c); +} +#endif diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index afd8b9d5ed4..3a6347fe1a5 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -58,8 +58,10 @@ static void resume_from_sleep(void) */ static long fixed_sdram(void) { - volatile immap_t *im = (volatile immap_t *)CFG_IMMR; u32 msize = CFG_DDR_SIZE * 1024 * 1024; + +#ifndef CFG_RAMBOOT + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; u32 msize_log2 = __ilog2(msize); im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; @@ -100,6 +102,7 @@ static long fixed_sdram(void) /* enable DDR controller */ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; +#endif return msize; } diff --git a/cpu/mpc83xx/nand_init.c b/cpu/mpc83xx/nand_init.c new file mode 100644 index 00000000000..e92f23023aa --- /dev/null +++ b/cpu/mpc83xx/nand_init.c @@ -0,0 +1,112 @@ +/* + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Breathe some life into the CPU... + * + * Set up the memory map, + * initialize a bunch of registers, + * initialize the UPM's + */ +void cpu_init_f (volatile immap_t * im) +{ + int i; + + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); + + /* Clear initial global data */ + for (i = 0; i < sizeof(gd_t); i++) + ((char *)gd)[i] = 0; + + /* system performance tweaking */ + +#ifdef CFG_ACR_PIPE_DEP + /* Arbiter pipeline depth */ + im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | + (CFG_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT); +#endif + +#ifdef CFG_ACR_RPTCNT + /* Arbiter repeat count */ + im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) | + (CFG_ACR_RPTCNT << ACR_RPTCNT_SHIFT); +#endif + +#ifdef CFG_SPCR_OPT + /* Optimize transactions between CSB and other devices */ + im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) | + (CFG_SPCR_OPT << SPCR_OPT_SHIFT); +#endif + + /* Enable Time Base & Decrimenter (so we will have udelay()) */ + im->sysconf.spcr |= SPCR_TBEN; + + /* DDR control driver register */ +#ifdef CFG_DDRCDR + im->sysconf.ddrcdr = CFG_DDRCDR; +#endif + /* Output buffer impedance register */ +#ifdef CFG_OBIR + im->sysconf.obir = CFG_OBIR; +#endif + + /* + * Memory Controller: + */ + + /* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary + * addresses - these have to be modified later when FLASH size + * has been determined + */ + +#if defined(CFG_NAND_BR_PRELIM) \ + && defined(CFG_NAND_OR_PRELIM) \ + && defined(CFG_NAND_LBLAWBAR_PRELIM) \ + && defined(CFG_NAND_LBLAWAR_PRELIM) + im->lbus.bank[0].br = CFG_NAND_BR_PRELIM; + im->lbus.bank[0].or = CFG_NAND_OR_PRELIM; + im->sysconf.lblaw[0].bar = CFG_NAND_LBLAWBAR_PRELIM; + im->sysconf.lblaw[0].ar = CFG_NAND_LBLAWAR_PRELIM; +#else +#error CFG_NAND_BR_PRELIM, CFG_NAND_OR_PRELIM, CFG_NAND_LBLAWBAR_PRELIM & CFG_NAND_LBLAWAR_PRELIM must be defined +#endif +} + +/* + * Get timebase clock frequency (like cpu_clk in Hz) + */ +unsigned long get_tbclk(void) +{ + return (gd->bus_clk + 3L) / 4L; +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index c1821747917..16ed494f815 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -2,7 +2,7 @@ * Copyright (C) 1998 Dan Malek * Copyright (C) 1999 Magnus Damm * Copyright (C) 2000, 2001,2002 Wolfgang Denk - * Copyright Freescale Semiconductor, Inc. 2004, 2006. All rights reserved. + * Copyright Freescale Semiconductor, Inc. 2004, 2006, 2008. * * See file CREDITS for list of people who contributed to this * project. @@ -57,6 +57,10 @@ #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI) #endif +#if !defined(CONFIG_NAND_SPL) && !defined(CFG_RAMBOOT) +#define CFG_FLASHBOOT +#endif + /* * Set up GOT: Global Offset Table * @@ -64,16 +68,16 @@ */ START_GOT GOT_ENTRY(_GOT2_TABLE_) - GOT_ENTRY(_FIXUP_TABLE_) + GOT_ENTRY(__bss_start) + GOT_ENTRY(_end) +#ifndef CONFIG_NAND_SPL + GOT_ENTRY(_FIXUP_TABLE_) GOT_ENTRY(_start) GOT_ENTRY(_start_of_vectors) GOT_ENTRY(_end_of_vectors) GOT_ENTRY(transfer_to_handler) - - GOT_ENTRY(__init_end) - GOT_ENTRY(_end) - GOT_ENTRY(__bss_start) +#endif END_GOT /* @@ -165,7 +169,7 @@ boot_warm: /* time t 5 */ bl init_e300_core -#ifndef CFG_RAMBOOT +#ifdef CFG_FLASHBOOT /* Inflate flash location so it appears everywhere, calculate */ /* the absolute address in final location of the FLASH, jump */ @@ -181,7 +185,7 @@ in_flash: #if 1 /* Remapping flash with LAW0. */ bl remap_flash_by_law0 #endif -#endif /* CFG_RAMBOOT */ +#endif /* CFG_FLASHBOOT */ /* setup the bats */ bl setup_bats @@ -239,6 +243,7 @@ in_flash: /* run 1st part of board init code (in Flash)*/ bl board_init_f +#ifndef CONFIG_NAND_SPL /* * Vector Table */ @@ -428,6 +433,7 @@ int_return: lwz r1,GPR1(r1) SYNC rfi +#endif /* !CONFIG_NAND_SPL */ /* * This code initialises the E300 processor core @@ -496,88 +502,10 @@ init_e300_core: /* time t 10 */ SYNC mtspr HID2, r3 - /* clear all BAT's */ - /*----------------------------------*/ - - xor r0, r0, r0 - mtspr DBAT0U, r0 - mtspr DBAT0L, r0 - mtspr DBAT1U, r0 - mtspr DBAT1L, r0 - mtspr DBAT2U, r0 - mtspr DBAT2L, r0 - mtspr DBAT3U, r0 - mtspr DBAT3L, r0 - mtspr IBAT0U, r0 - mtspr IBAT0L, r0 - mtspr IBAT1U, r0 - mtspr IBAT1L, r0 - mtspr IBAT2U, r0 - mtspr IBAT2L, r0 - mtspr IBAT3U, r0 - mtspr IBAT3L, r0 - SYNC - - /* invalidate all tlb's - * - * From the 603e User Manual: "The 603e provides the ability to - * invalidate a TLB entry. The TLB Invalidate Entry (tlbie) - * instruction invalidates the TLB entry indexed by the EA, and - * operates on both the instruction and data TLBs simultaneously - * invalidating four TLB entries (both sets in each TLB). The - * index corresponds to bits 15-19 of the EA. To invalidate all - * entries within both TLBs, 32 tlbie instructions should be - * issued, incrementing this field by one each time." - * - * "Note that the tlbia instruction is not implemented on the - * 603e." - * - * bits 15-19 correspond to addresses 0x00000000 to 0x0001F000 - * incrementing by 0x1000 each time. The code below is sort of - * based on code in "flush_tlbs" from arch/ppc/kernel/head.S - * - */ - - li r3, 32 - mtctr r3 - li r3, 0 -1: tlbie r3 - addi r3, r3, 0x1000 - bdnz 1b - SYNC - /* Done! */ /*------------------------------*/ blr - .globl invalidate_bats -invalidate_bats: - /* invalidate BATs */ - mtspr IBAT0U, r0 - mtspr IBAT1U, r0 - mtspr IBAT2U, r0 - mtspr IBAT3U, r0 -#ifdef CONFIG_HIGH_BATS - mtspr IBAT4U, r0 - mtspr IBAT5U, r0 - mtspr IBAT6U, r0 - mtspr IBAT7U, r0 -#endif - isync - mtspr DBAT0U, r0 - mtspr DBAT1U, r0 - mtspr DBAT2U, r0 - mtspr DBAT3U, r0 -#ifdef CONFIG_HIGH_BATS - mtspr DBAT4U, r0 - mtspr DBAT5U, r0 - mtspr DBAT6U, r0 - mtspr DBAT7U, r0 -#endif - isync - sync - blr - /* setup_bats - set them up to some initial state */ .globl setup_bats setup_bats: @@ -590,7 +518,6 @@ setup_bats: ori r3, r3, CFG_IBAT0U@l mtspr IBAT0L, r4 mtspr IBAT0U, r3 - isync /* DBAT 0 */ addis r4, r0, CFG_DBAT0L@h @@ -599,7 +526,6 @@ setup_bats: ori r3, r3, CFG_DBAT0U@l mtspr DBAT0L, r4 mtspr DBAT0U, r3 - isync /* IBAT 1 */ addis r4, r0, CFG_IBAT1L@h @@ -608,7 +534,6 @@ setup_bats: ori r3, r3, CFG_IBAT1U@l mtspr IBAT1L, r4 mtspr IBAT1U, r3 - isync /* DBAT 1 */ addis r4, r0, CFG_DBAT1L@h @@ -617,7 +542,6 @@ setup_bats: ori r3, r3, CFG_DBAT1U@l mtspr DBAT1L, r4 mtspr DBAT1U, r3 - isync /* IBAT 2 */ addis r4, r0, CFG_IBAT2L@h @@ -626,7 +550,6 @@ setup_bats: ori r3, r3, CFG_IBAT2U@l mtspr IBAT2L, r4 mtspr IBAT2U, r3 - isync /* DBAT 2 */ addis r4, r0, CFG_DBAT2L@h @@ -635,7 +558,6 @@ setup_bats: ori r3, r3, CFG_DBAT2U@l mtspr DBAT2L, r4 mtspr DBAT2U, r3 - isync /* IBAT 3 */ addis r4, r0, CFG_IBAT3L@h @@ -644,7 +566,6 @@ setup_bats: ori r3, r3, CFG_IBAT3U@l mtspr IBAT3L, r4 mtspr IBAT3U, r3 - isync /* DBAT 3 */ addis r4, r0, CFG_DBAT3L@h @@ -653,7 +574,6 @@ setup_bats: ori r3, r3, CFG_DBAT3U@l mtspr DBAT3L, r4 mtspr DBAT3U, r3 - isync #ifdef CONFIG_HIGH_BATS /* IBAT 4 */ @@ -663,7 +583,6 @@ setup_bats: ori r3, r3, CFG_IBAT4U@l mtspr IBAT4L, r4 mtspr IBAT4U, r3 - isync /* DBAT 4 */ addis r4, r0, CFG_DBAT4L@h @@ -672,7 +591,6 @@ setup_bats: ori r3, r3, CFG_DBAT4U@l mtspr DBAT4L, r4 mtspr DBAT4U, r3 - isync /* IBAT 5 */ addis r4, r0, CFG_IBAT5L@h @@ -681,7 +599,6 @@ setup_bats: ori r3, r3, CFG_IBAT5U@l mtspr IBAT5L, r4 mtspr IBAT5U, r3 - isync /* DBAT 5 */ addis r4, r0, CFG_DBAT5L@h @@ -690,7 +607,6 @@ setup_bats: ori r3, r3, CFG_DBAT5U@l mtspr DBAT5L, r4 mtspr DBAT5U, r3 - isync /* IBAT 6 */ addis r4, r0, CFG_IBAT6L@h @@ -699,7 +615,6 @@ setup_bats: ori r3, r3, CFG_IBAT6U@l mtspr IBAT6L, r4 mtspr IBAT6U, r3 - isync /* DBAT 6 */ addis r4, r0, CFG_DBAT6L@h @@ -708,7 +623,6 @@ setup_bats: ori r3, r3, CFG_DBAT6U@l mtspr DBAT6L, r4 mtspr DBAT6U, r3 - isync /* IBAT 7 */ addis r4, r0, CFG_IBAT7L@h @@ -717,7 +631,6 @@ setup_bats: ori r3, r3, CFG_IBAT7U@l mtspr IBAT7L, r4 mtspr IBAT7U, r3 - isync /* DBAT 7 */ addis r4, r0, CFG_DBAT7L@h @@ -726,12 +639,28 @@ setup_bats: ori r3, r3, CFG_DBAT7U@l mtspr DBAT7L, r4 mtspr DBAT7U, r3 - isync #endif - /* Invalidate TLBs. - * -> for (val = 0; val < 0x20000; val+=0x1000) - * -> tlbie(val); + isync + + /* invalidate all tlb's + * + * From the 603e User Manual: "The 603e provides the ability to + * invalidate a TLB entry. The TLB Invalidate Entry (tlbie) + * instruction invalidates the TLB entry indexed by the EA, and + * operates on both the instruction and data TLBs simultaneously + * invalidating four TLB entries (both sets in each TLB). The + * index corresponds to bits 15-19 of the EA. To invalidate all + * entries within both TLBs, 32 tlbie instructions should be + * issued, incrementing this field by one each time." + * + * "Note that the tlbia instruction is not implemented on the + * 603e." + * + * bits 15-19 correspond to addresses 0x00000000 to 0x0001F000 + * incrementing by 0x1000 each time. The code below is sort of + * based on code in "flush_tlbs" from arch/ppc/kernel/head.S + * */ lis r3, 0 lis r5, 2 @@ -874,7 +803,7 @@ relocate_code: mr r3, r5 /* Destination Address */ lis r4, CFG_MONITOR_BASE@h /* Source Address */ ori r4, r4, CFG_MONITOR_BASE@l - lwz r5, GOT(__init_end) + lwz r5, GOT(__bss_start) sub r5, r5, r4 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */ @@ -987,6 +916,7 @@ in_ram: stw r0,0(r3) bdnz 1b +#ifndef CONFIG_NAND_SPL /* * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. @@ -1004,6 +934,8 @@ in_ram: stw r0,0(r4) bdnz 3b 4: +#endif + clear_bss: /* * Now clear BSS segment @@ -1037,6 +969,7 @@ clear_bss: mr r4, r10 /* Destination Address */ bl board_init_r +#ifndef CONFIG_NAND_SPL /* * Copy exception vector code to low memory * @@ -1119,6 +1052,7 @@ trap_reloc: stw r0, 4(r7) blr +#endif /* !CONFIG_NAND_SPL */ #ifdef CFG_INIT_RAM_LOCK lock_ram_in_cache: @@ -1142,6 +1076,7 @@ lock_ram_in_cache: sync blr +#ifndef CONFIG_NAND_SPL .globl unlock_ram_in_cache unlock_ram_in_cache: /* invalidate the INIT_RAM section */ @@ -1165,8 +1100,10 @@ unlock_ram_in_cache: mtspr HID0, r3 /* no invalidate, unlock */ sync blr -#endif +#endif /* !CONFIG_NAND_SPL */ +#endif /* CFG_INIT_RAM_LOCK */ +#ifdef CFG_FLASHBOOT map_flash_by_law1: /* When booting from ROM (Flash or EPROM), clear the */ /* Address Mask in OR0 so ROM appears everywhere */ @@ -1245,3 +1182,4 @@ remap_flash_by_law0: stw r4, LBLAWBAR1(r3) stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */ blr +#endif /* CFG_FLASHBOOT */ diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 3a644d34899..37f8cffd3d7 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -63,6 +63,10 @@ #define CFG_IMMR 0xE0000000 +#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#define CONFIG_DEFAULT_IMMR CFG_IMMR +#endif + #define CFG_MEMTEST_START 0x00001000 #define CFG_MEMTEST_END 0x07f00000 @@ -173,10 +177,10 @@ #define CFG_FLASH_EMPTY_INFO /* display empty sectors */ #define CFG_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ -#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \ +#define CFG_NOR_BR_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \ (2 << BR_PS_SHIFT) | /* 16 bit port size */ \ BR_V) /* valid */ -#define CFG_OR0_PRELIM ( 0xFF000000 /* 16 MByte */ \ +#define CFG_NOR_OR_PRELIM ( 0xFF800000 /* 8 MByte */ \ | OR_GPCM_XACS \ | OR_GPCM_SCY_9 \ | OR_GPCM_EHTR \ @@ -193,7 +197,7 @@ #define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ -#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) && !defined(CONFIG_NAND_SPL) #define CFG_RAMBOOT #endif @@ -220,19 +224,31 @@ #define CFG_LBC_MRTPR 0x20000000 /*TODO */ /* LB refresh timer prescal, 266MHz/32 */ /* drivers/mtd/nand/nand.c */ -#define CFG_NAND_BASE 0xE2800000 /* 0xF0000000 */ +#ifdef CONFIG_NAND_SPL +#define CFG_NAND_BASE 0xFFF00000 +#else +#define CFG_NAND_BASE 0xE2800000 +#endif + #define CFG_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 +#define CFG_NAND_BLOCK_SIZE 16384 + +#define CFG_NAND_U_BOOT_SIZE (512 << 10) +#define CFG_NAND_U_BOOT_DST 0x00100000 +#define CFG_NAND_U_BOOT_START 0x00100100 +#define CFG_NAND_U_BOOT_OFFS 16384 +#define CFG_NAND_U_BOOT_RELOC 0x00010000 -#define CFG_BR1_PRELIM ( CFG_NAND_BASE \ +#define CFG_NAND_BR_PRELIM ( CFG_NAND_BASE \ | (2<> 2; + } + + . = ALIGN(8); + __bss_start = .; + .bss (NOLOAD) : { *(.*bss) } + _end = .; +} +ENTRY(_start) +ASSERT(_end <= 0xfff01000, "NAND bootstrap too big"); diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 5914d040343..0f56ba52020 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -235,7 +235,7 @@ void nand_boot(void) struct nand_chip nand_chip; nand_info_t nand_info; int ret; - void (*uboot)(void); + __attribute__((noreturn)) void (*uboot)(void); /* * Init board specific nand support @@ -254,6 +254,6 @@ void nand_boot(void) /* * Jump to U-Boot image */ - uboot = (void (*)(void))CFG_NAND_U_BOOT_START; + uboot = (void *)CFG_NAND_U_BOOT_START; (*uboot)(); } diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c new file mode 100644 index 00000000000..0d2378ee894 --- /dev/null +++ b/nand_spl/nand_boot_fsl_elbc.c @@ -0,0 +1,150 @@ +/* + * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine + * + * (C) Copyright 2006-2008 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * Copyright (c) 2008 Freescale Semiconductor, Inc. + * Author: Scott Wood + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include + +#define WINDOW_SIZE 8192 + +static void nand_wait(void) +{ + lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000); + + for (;;) { + uint32_t status = in_be32(®s->ltesr); + + if (status == 1) + return; + + if (status & 1) { + puts("read failed (ltesr)\n"); + for (;;); + } + } +} + +static void nand_load(unsigned int offs, int uboot_size, uchar *dst) +{ + lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000); + uchar *buf = (uchar *)CFG_NAND_BASE; + int large = in_be32(®s->bank[0].or) & OR_FCM_PGS; + int block_shift = large ? 17 : 14; + int block_size = 1 << block_shift; + int page_size = large ? 2048 : 512; + int bad_marker = large ? page_size + 0 : page_size + 5; + int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2; + int pos = 0; + + if (offs & (block_size - 1)) { + puts("bad offset\n"); + for (;;); + } + + if (large) { + fmr |= FMR_ECCM; + out_be32(®s->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | + (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); + out_be32(®s->fir, + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_CW1 << FIR_OP3_SHIFT) | + (FIR_OP_RBW << FIR_OP4_SHIFT)); + } else { + out_be32(®s->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); + out_be32(®s->fir, + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_RBW << FIR_OP3_SHIFT)); + } + + out_be32(®s->fbcr, 0); + clrsetbits_be32(®s->bank[0].br, BR_DECC, BR_DECC_CHK_GEN); + + while (pos < uboot_size) { + int i = 0; + out_be32(®s->fbar, offs >> block_shift); + + do { + int j; + unsigned int page_offs = (offs & (block_size - 1)) << 1; + + out_be32(®s->ltesr, ~0); + out_be32(®s->lteatr, 0); + out_be32(®s->fpar, page_offs); + out_be32(®s->fmr, fmr); + out_be32(®s->lsor, 0); + nand_wait(); + + page_offs %= WINDOW_SIZE; + + /* + * If either of the first two pages are marked bad, + * continue to the next block. + */ + if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) { + puts("skipping\n"); + offs = (offs + block_size) & ~(block_size - 1); + pos &= ~(block_size - 1); + break; + } + + for (j = 0; j < page_size; j++) + dst[pos + j] = buf[page_offs + j]; + + pos += page_size; + offs += page_size; + } while (offs & (block_size - 1)); + } +} + +/* + * The main entry for NAND booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from NAND into SDRAM and starts it from there. + */ +void nand_boot(void) +{ + __attribute__((noreturn)) void (*uboot)(void); + + udelay(1000000); + + /* + * Load U-Boot image from NAND into RAM + */ + nand_load(CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE, + (uchar *)CFG_NAND_U_BOOT_DST); + + /* + * Jump to U-Boot image + */ + puts("transfering control\n"); + uboot = (void *)CFG_NAND_U_BOOT_START; + uboot(); +} -- cgit v1.3.1 From 8ed2f5f950e2581214d20b011a8f27a6396d65d2 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 5 Jul 2008 23:11:11 +0200 Subject: at91: move arch-at91sam9 to arch-at91 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- Makefile | 10 +- cpu/arm926ejs/at91/Makefile | 49 +++ cpu/arm926ejs/at91/config.mk | 3 + cpu/arm926ejs/at91/ether.c | 35 ++ cpu/arm926ejs/at91/lowlevel_init.S | 43 +++ cpu/arm926ejs/at91/spi.c | 157 +++++++++ cpu/arm926ejs/at91/timer.c | 149 +++++++++ cpu/arm926ejs/at91/u-boot.lds | 57 ++++ cpu/arm926ejs/at91/usb.c | 62 ++++ cpu/arm926ejs/at91sam9/Makefile | 49 --- cpu/arm926ejs/at91sam9/config.mk | 3 - cpu/arm926ejs/at91sam9/ether.c | 35 -- cpu/arm926ejs/at91sam9/lowlevel_init.S | 43 --- cpu/arm926ejs/at91sam9/spi.c | 157 --------- cpu/arm926ejs/at91sam9/timer.c | 149 --------- cpu/arm926ejs/at91sam9/u-boot.lds | 57 ---- cpu/arm926ejs/at91sam9/usb.c | 62 ---- include/asm-arm/arch-at91/at91_pio.h | 49 +++ include/asm-arm/arch-at91/at91_pit.h | 32 ++ include/asm-arm/arch-at91/at91_pmc.h | 104 ++++++ include/asm-arm/arch-at91/at91_rstc.h | 41 +++ include/asm-arm/arch-at91/at91_spi.h | 105 ++++++ include/asm-arm/arch-at91/at91cap9.h | 137 ++++++++ include/asm-arm/arch-at91/at91cap9_matrix.h | 132 ++++++++ include/asm-arm/arch-at91/at91sam9260.h | 124 +++++++ include/asm-arm/arch-at91/at91sam9260_matrix.h | 80 +++++ include/asm-arm/arch-at91/at91sam9261.h | 105 ++++++ include/asm-arm/arch-at91/at91sam9261_matrix.h | 64 ++++ include/asm-arm/arch-at91/at91sam9263.h | 127 +++++++ include/asm-arm/arch-at91/at91sam9263_matrix.h | 129 ++++++++ include/asm-arm/arch-at91/at91sam9_smc.h | 76 +++++ include/asm-arm/arch-at91/at91sam9rl.h | 115 +++++++ include/asm-arm/arch-at91/at91sam9rl_matrix.h | 96 ++++++ include/asm-arm/arch-at91/clk.h | 45 +++ include/asm-arm/arch-at91/gpio.h | 366 +++++++++++++++++++++ include/asm-arm/arch-at91/hardware.h | 54 +++ include/asm-arm/arch-at91/io.h | 40 +++ include/asm-arm/arch-at91/memory-map.h | 34 ++ include/asm-arm/arch-at91sam9/at91_pio.h | 49 --- include/asm-arm/arch-at91sam9/at91_pit.h | 32 -- include/asm-arm/arch-at91sam9/at91_pmc.h | 104 ------ include/asm-arm/arch-at91sam9/at91_rstc.h | 41 --- include/asm-arm/arch-at91sam9/at91_spi.h | 105 ------ include/asm-arm/arch-at91sam9/at91cap9.h | 137 -------- include/asm-arm/arch-at91sam9/at91cap9_matrix.h | 132 -------- include/asm-arm/arch-at91sam9/at91sam9260.h | 124 ------- include/asm-arm/arch-at91sam9/at91sam9260_matrix.h | 80 ----- include/asm-arm/arch-at91sam9/at91sam9261.h | 105 ------ include/asm-arm/arch-at91sam9/at91sam9261_matrix.h | 64 ---- include/asm-arm/arch-at91sam9/at91sam9263.h | 127 ------- include/asm-arm/arch-at91sam9/at91sam9263_matrix.h | 129 -------- include/asm-arm/arch-at91sam9/at91sam9_smc.h | 76 ----- include/asm-arm/arch-at91sam9/at91sam9rl.h | 115 ------- include/asm-arm/arch-at91sam9/at91sam9rl_matrix.h | 96 ------ include/asm-arm/arch-at91sam9/clk.h | 45 --- include/asm-arm/arch-at91sam9/gpio.h | 366 --------------------- include/asm-arm/arch-at91sam9/hardware.h | 54 --- include/asm-arm/arch-at91sam9/io.h | 40 --- include/asm-arm/arch-at91sam9/memory-map.h | 34 -- 59 files changed, 2615 insertions(+), 2615 deletions(-) create mode 100644 cpu/arm926ejs/at91/Makefile create mode 100644 cpu/arm926ejs/at91/config.mk create mode 100644 cpu/arm926ejs/at91/ether.c create mode 100644 cpu/arm926ejs/at91/lowlevel_init.S create mode 100644 cpu/arm926ejs/at91/spi.c create mode 100644 cpu/arm926ejs/at91/timer.c create mode 100644 cpu/arm926ejs/at91/u-boot.lds create mode 100644 cpu/arm926ejs/at91/usb.c delete mode 100644 cpu/arm926ejs/at91sam9/Makefile delete mode 100644 cpu/arm926ejs/at91sam9/config.mk delete mode 100644 cpu/arm926ejs/at91sam9/ether.c delete mode 100644 cpu/arm926ejs/at91sam9/lowlevel_init.S delete mode 100644 cpu/arm926ejs/at91sam9/spi.c delete mode 100644 cpu/arm926ejs/at91sam9/timer.c delete mode 100644 cpu/arm926ejs/at91sam9/u-boot.lds delete mode 100644 cpu/arm926ejs/at91sam9/usb.c create mode 100644 include/asm-arm/arch-at91/at91_pio.h create mode 100644 include/asm-arm/arch-at91/at91_pit.h create mode 100644 include/asm-arm/arch-at91/at91_pmc.h create mode 100644 include/asm-arm/arch-at91/at91_rstc.h create mode 100644 include/asm-arm/arch-at91/at91_spi.h create mode 100644 include/asm-arm/arch-at91/at91cap9.h create mode 100644 include/asm-arm/arch-at91/at91cap9_matrix.h create mode 100644 include/asm-arm/arch-at91/at91sam9260.h create mode 100644 include/asm-arm/arch-at91/at91sam9260_matrix.h create mode 100644 include/asm-arm/arch-at91/at91sam9261.h create mode 100644 include/asm-arm/arch-at91/at91sam9261_matrix.h create mode 100644 include/asm-arm/arch-at91/at91sam9263.h create mode 100644 include/asm-arm/arch-at91/at91sam9263_matrix.h create mode 100644 include/asm-arm/arch-at91/at91sam9_smc.h create mode 100644 include/asm-arm/arch-at91/at91sam9rl.h create mode 100644 include/asm-arm/arch-at91/at91sam9rl_matrix.h create mode 100644 include/asm-arm/arch-at91/clk.h create mode 100644 include/asm-arm/arch-at91/gpio.h create mode 100644 include/asm-arm/arch-at91/hardware.h create mode 100644 include/asm-arm/arch-at91/io.h create mode 100644 include/asm-arm/arch-at91/memory-map.h delete mode 100644 include/asm-arm/arch-at91sam9/at91_pio.h delete mode 100644 include/asm-arm/arch-at91sam9/at91_pit.h delete mode 100644 include/asm-arm/arch-at91sam9/at91_pmc.h delete mode 100644 include/asm-arm/arch-at91sam9/at91_rstc.h delete mode 100644 include/asm-arm/arch-at91sam9/at91_spi.h delete mode 100644 include/asm-arm/arch-at91sam9/at91cap9.h delete mode 100644 include/asm-arm/arch-at91sam9/at91cap9_matrix.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9260.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9260_matrix.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9261.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9261_matrix.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9263.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9263_matrix.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9_smc.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9rl.h delete mode 100644 include/asm-arm/arch-at91sam9/at91sam9rl_matrix.h delete mode 100644 include/asm-arm/arch-at91sam9/clk.h delete mode 100644 include/asm-arm/arch-at91sam9/gpio.h delete mode 100644 include/asm-arm/arch-at91sam9/hardware.h delete mode 100644 include/asm-arm/arch-at91sam9/io.h delete mode 100644 include/asm-arm/arch-at91sam9/memory-map.h (limited to 'Makefile') diff --git a/Makefile b/Makefile index 082b08e2c4c..c291b72c18b 100644 --- a/Makefile +++ b/Makefile @@ -2354,13 +2354,13 @@ at91rm9200dk_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200 at91sam9261ek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91sam9 + @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91 at91sam9263ek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91sam9 + @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91 at91sam9rlek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91sam9 + @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91 cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200 @@ -2382,10 +2382,10 @@ mp2usb_config : unconfig ######################################################################### at91cap9adk_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91sam9 + @$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91 at91sam9260ek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91sam9 + @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91 ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile new file mode 100644 index 00000000000..44cde1a9c31 --- /dev/null +++ b/cpu/arm926ejs/at91/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS-y += ether.o +COBJS-y += timer.o +COBJS-$(CONFIG_HAS_DATAFLASH) +=spi.o +COBJS-y += usb.o +SOBJS = lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm926ejs/at91/config.mk b/cpu/arm926ejs/at91/config.mk new file mode 100644 index 00000000000..31491a843a9 --- /dev/null +++ b/cpu/arm926ejs/at91/config.mk @@ -0,0 +1,3 @@ +PLATFORM_CPPFLAGS += -march=armv5te +PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) +LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/at91/u-boot.lds diff --git a/cpu/arm926ejs/at91/ether.c b/cpu/arm926ejs/at91/ether.c new file mode 100644 index 00000000000..7e11fe4d8eb --- /dev/null +++ b/cpu/arm926ejs/at91/ether.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) +void at91sam9_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); +} +#endif diff --git a/cpu/arm926ejs/at91/lowlevel_init.S b/cpu/arm926ejs/at91/lowlevel_init.S new file mode 100644 index 00000000000..ec6ad5da18c --- /dev/null +++ b/cpu/arm926ejs/at91/lowlevel_init.S @@ -0,0 +1,43 @@ +/* + * AT91CAP9/SAM9 setup stuff + * + * (C) Copyright 2007-2008 + * Stelian Pop + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + +.globl lowlevel_init +lowlevel_init: + + /* + * Clocks/SDRAM initialization is handled by at91bootstrap, + * no need to do it here... + */ + mov pc, lr + + .ltorg + +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/cpu/arm926ejs/at91/spi.c b/cpu/arm926ejs/at91/spi.c new file mode 100644 index 00000000000..c9fe6d8a3fc --- /dev/null +++ b/cpu/arm926ejs/at91/spi.c @@ -0,0 +1,157 @@ +/* + * Driver for ATMEL DataFlash support + * Author : Hamid Ikdoumi (Atmel) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include + +#include + +#define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ +#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */ +#define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ + +void AT91F_SpiInit(void) +{ + /* Reset the SPI */ + writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR); + + /* Configure SPI in Master Mode with No CS selected !!! */ + writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS, + AT91_BASE_SPI + AT91_SPI_MR); + + /* Configure CS0 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(0)); + +#ifdef CFG_DATAFLASH_LOGIC_ADDR_CS1 + /* Configure CS1 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(1)); +#endif + +#ifdef CFG_DATAFLASH_LOGIC_ADDR_CS3 + /* Configure CS3 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(3)); +#endif + + /* SPI_Enable */ + writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR); + + while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS)); + + /* + * Add tempo to get SPI in a safe state. + * Should not be needed for new silicon (Rev B) + */ + udelay(500000); + readl(AT91_BASE_SPI + AT91_SPI_SR); + readl(AT91_BASE_SPI + AT91_SPI_RDR); + +} + +void AT91F_SpiEnable(int cs) +{ + unsigned long mode; + + switch (cs) { + case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); + break; + case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */ + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); + break; + case 3: + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); + break; + } + + /* SPI_Enable */ + writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR); +} + +unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc); + +unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) +{ + unsigned int timeout; + + pDesc->state = BUSY; + + writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); + + /* Initialize the Transmit and Receive Pointer */ + writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR); + writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR); + + /* Intialize the Transmit and Receive Counters */ + writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR); + writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR); + + if (pDesc->tx_data_size != 0) { + /* Initialize the Next Transmit and Next Receive Pointer */ + writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR); + writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR); + + /* Intialize the Next Transmit and Next Receive Counters */ + writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR); + writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR); + } + + /* arm simple, non interrupt dependent timer */ + reset_timer_masked(); + timeout = 0; + + writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR); + while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) && + ((timeout = get_timer_masked()) < CFG_SPI_WRITE_TOUT)); + writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); + pDesc->state = IDLE; + + if (timeout >= CFG_SPI_WRITE_TOUT) { + printf("Error Timeout\n\r"); + return DATAFLASH_ERROR; + } + + return DATAFLASH_OK; +} diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c new file mode 100644 index 00000000000..c79ec7e7ae1 --- /dev/null +++ b/cpu/arm926ejs/at91/timer.c @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include + +/* + * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by + * setting the 20 bit counter period to its maximum (0xfffff). + */ +#define TIMER_LOAD_VAL 0xfffff +#define READ_RESET_TIMER at91_sys_read(AT91_PIT_PIVR) +#define READ_TIMER at91_sys_read(AT91_PIT_PIIR) +#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4) +#define TICKS_TO_USEC(ticks) ((ticks) / 6) + +ulong get_timer_masked(void); +ulong resettime; + +/* nothing really to do with interrupts, just starts up a counter. */ +int timer_init(void) +{ + /* + * Enable PITC Clock + * The clock is already enabled for system controller in boot + */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); + + /* Enable PITC */ + at91_sys_write(AT91_PIT_MR, TIMER_LOAD_VAL | AT91_PIT_PITEN); + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ + +static inline ulong get_timer_raw(void) +{ + ulong now = READ_TIMER; + + if (now >= resettime) + return now - resettime; + else + return 0xFFFFFFFFUL - (resettime - now) ; +} + +void reset_timer_masked(void) +{ + resettime = READ_TIMER; +} + +ulong get_timer_masked(void) +{ + return TICKS_TO_USEC(get_timer_raw()); + +} + +void udelay_masked(unsigned long usec) +{ + ulong tmp; + + tmp = get_timer(0); + while (get_timer(tmp) < usec) /* our timer works in usecs */ + ; /* NOP */ +} + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + ulong now = get_timer_masked(); + + if (now >= base) + return now - base; + else + return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ; +} + +void udelay(unsigned long usec) +{ + udelay_masked(usec); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + ulong tbclk; + + tbclk = CFG_HZ; + return tbclk; +} + +/* + * Reset the cpu by setting up the watchdog timer and let him time out. + */ +void reset_cpu(ulong ignored) +{ + /* this is the way Linux does it */ + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | + AT91_RSTC_PROCRST | + AT91_RSTC_PERRST); + + while (1); + /* Never reached */ +} diff --git a/cpu/arm926ejs/at91/u-boot.lds b/cpu/arm926ejs/at91/u-boot.lds new file mode 100644 index 00000000000..996f401f0b9 --- /dev/null +++ b/cpu/arm926ejs/at91/u-boot.lds @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm926ejs/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c new file mode 100644 index 00000000000..2a92f734ddc --- /dev/null +++ b/cpu/arm926ejs/at91/usb.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2006 + * DENX Software Engineering + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) + +#include +#include +#include + +int usb_cpu_init(void) +{ + /* Enable USB host clock. */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); +#ifdef CONFIG_AT91SAM9261 + at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0); +#else + at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP); +#endif + + return 0; +} + +int usb_cpu_stop(void) +{ + /* Disable USB host clock. */ + at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP); +#ifdef CONFIG_AT91SAM9261 + at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0); +#else + at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); +#endif + return 0; +} + +int usb_cpu_init_fail(void) +{ + return usb_cpu_stop(); +} + +#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */ diff --git a/cpu/arm926ejs/at91sam9/Makefile b/cpu/arm926ejs/at91sam9/Makefile deleted file mode 100644 index 44cde1a9c31..00000000000 --- a/cpu/arm926ejs/at91sam9/Makefile +++ /dev/null @@ -1,49 +0,0 @@ -# -# (C) Copyright 2000-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(SOC).a - -COBJS-y += ether.o -COBJS-y += timer.o -COBJS-$(CONFIG_HAS_DATAFLASH) +=spi.o -COBJS-y += usb.o -SOBJS = lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) - -all: $(obj).depend $(LIB) - -$(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/cpu/arm926ejs/at91sam9/config.mk b/cpu/arm926ejs/at91sam9/config.mk deleted file mode 100644 index 83040ebe737..00000000000 --- a/cpu/arm926ejs/at91sam9/config.mk +++ /dev/null @@ -1,3 +0,0 @@ -PLATFORM_CPPFLAGS += -march=armv5te -PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,) -LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/at91sam9/u-boot.lds diff --git a/cpu/arm926ejs/at91sam9/ether.c b/cpu/arm926ejs/at91sam9/ether.c deleted file mode 100644 index 7e11fe4d8eb..00000000000 --- a/cpu/arm926ejs/at91sam9/ether.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); - -#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET) -void at91sam9_eth_initialize(bd_t *bi) -{ - macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00); -} -#endif diff --git a/cpu/arm926ejs/at91sam9/lowlevel_init.S b/cpu/arm926ejs/at91sam9/lowlevel_init.S deleted file mode 100644 index ec6ad5da18c..00000000000 --- a/cpu/arm926ejs/at91sam9/lowlevel_init.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - * AT91CAP9/SAM9 setup stuff - * - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - -.globl lowlevel_init -lowlevel_init: - - /* - * Clocks/SDRAM initialization is handled by at91bootstrap, - * no need to do it here... - */ - mov pc, lr - - .ltorg - -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/cpu/arm926ejs/at91sam9/spi.c b/cpu/arm926ejs/at91sam9/spi.c deleted file mode 100644 index c9fe6d8a3fc..00000000000 --- a/cpu/arm926ejs/at91sam9/spi.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Driver for ATMEL DataFlash support - * Author : Hamid Ikdoumi (Atmel) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include -#include -#include -#include -#include -#include - -#include - -#define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ -#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */ -#define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ - -void AT91F_SpiInit(void) -{ - /* Reset the SPI */ - writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR); - - /* Configure SPI in Master Mode with No CS selected !!! */ - writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS, - AT91_BASE_SPI + AT91_SPI_MR); - - /* Configure CS0 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), - AT91_BASE_SPI + AT91_SPI_CSR(0)); - -#ifdef CFG_DATAFLASH_LOGIC_ADDR_CS1 - /* Configure CS1 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), - AT91_BASE_SPI + AT91_SPI_CSR(1)); -#endif - -#ifdef CFG_DATAFLASH_LOGIC_ADDR_CS3 - /* Configure CS3 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((AT91_MASTER_CLOCK / AT91_SPI_CLK) << 8), - AT91_BASE_SPI + AT91_SPI_CSR(3)); -#endif - - /* SPI_Enable */ - writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR); - - while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS)); - - /* - * Add tempo to get SPI in a safe state. - * Should not be needed for new silicon (Rev B) - */ - udelay(500000); - readl(AT91_BASE_SPI + AT91_SPI_SR); - readl(AT91_BASE_SPI + AT91_SPI_RDR); - -} - -void AT91F_SpiEnable(int cs) -{ - unsigned long mode; - - switch (cs) { - case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ - mode = readl(AT91_BASE_SPI + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - AT91_BASE_SPI + AT91_SPI_MR); - break; - case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */ - mode = readl(AT91_BASE_SPI + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - AT91_BASE_SPI + AT91_SPI_MR); - break; - case 3: - mode = readl(AT91_BASE_SPI + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - AT91_BASE_SPI + AT91_SPI_MR); - break; - } - - /* SPI_Enable */ - writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR); -} - -unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc); - -unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) -{ - unsigned int timeout; - - pDesc->state = BUSY; - - writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); - - /* Initialize the Transmit and Receive Pointer */ - writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR); - writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR); - - /* Intialize the Transmit and Receive Counters */ - writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR); - writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR); - - if (pDesc->tx_data_size != 0) { - /* Initialize the Next Transmit and Next Receive Pointer */ - writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR); - writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR); - - /* Intialize the Next Transmit and Next Receive Counters */ - writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR); - writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR); - } - - /* arm simple, non interrupt dependent timer */ - reset_timer_masked(); - timeout = 0; - - writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR); - while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) && - ((timeout = get_timer_masked()) < CFG_SPI_WRITE_TOUT)); - writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); - pDesc->state = IDLE; - - if (timeout >= CFG_SPI_WRITE_TOUT) { - printf("Error Timeout\n\r"); - return DATAFLASH_ERROR; - } - - return DATAFLASH_OK; -} diff --git a/cpu/arm926ejs/at91sam9/timer.c b/cpu/arm926ejs/at91sam9/timer.c deleted file mode 100644 index c79ec7e7ae1..00000000000 --- a/cpu/arm926ejs/at91sam9/timer.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include - -/* - * We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by - * setting the 20 bit counter period to its maximum (0xfffff). - */ -#define TIMER_LOAD_VAL 0xfffff -#define READ_RESET_TIMER at91_sys_read(AT91_PIT_PIVR) -#define READ_TIMER at91_sys_read(AT91_PIT_PIIR) -#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4) -#define TICKS_TO_USEC(ticks) ((ticks) / 6) - -ulong get_timer_masked(void); -ulong resettime; - -/* nothing really to do with interrupts, just starts up a counter. */ -int timer_init(void) -{ - /* - * Enable PITC Clock - * The clock is already enabled for system controller in boot - */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); - - /* Enable PITC */ - at91_sys_write(AT91_PIT_MR, TIMER_LOAD_VAL | AT91_PIT_PITEN); - - reset_timer_masked(); - - return 0; -} - -/* - * timer without interrupts - */ - -static inline ulong get_timer_raw(void) -{ - ulong now = READ_TIMER; - - if (now >= resettime) - return now - resettime; - else - return 0xFFFFFFFFUL - (resettime - now) ; -} - -void reset_timer_masked(void) -{ - resettime = READ_TIMER; -} - -ulong get_timer_masked(void) -{ - return TICKS_TO_USEC(get_timer_raw()); - -} - -void udelay_masked(unsigned long usec) -{ - ulong tmp; - - tmp = get_timer(0); - while (get_timer(tmp) < usec) /* our timer works in usecs */ - ; /* NOP */ -} - -void reset_timer(void) -{ - reset_timer_masked(); -} - -ulong get_timer(ulong base) -{ - ulong now = get_timer_masked(); - - if (now >= base) - return now - base; - else - return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ; -} - -void udelay(unsigned long usec) -{ - udelay_masked(usec); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - ulong tbclk; - - tbclk = CFG_HZ; - return tbclk; -} - -/* - * Reset the cpu by setting up the watchdog timer and let him time out. - */ -void reset_cpu(ulong ignored) -{ - /* this is the way Linux does it */ - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | - AT91_RSTC_PROCRST | - AT91_RSTC_PERRST); - - while (1); - /* Never reached */ -} diff --git a/cpu/arm926ejs/at91sam9/u-boot.lds b/cpu/arm926ejs/at91sam9/u-boot.lds deleted file mode 100644 index 996f401f0b9..00000000000 --- a/cpu/arm926ejs/at91sam9/u-boot.lds +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - cpu/arm926ejs/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(.rodata) } - - . = ALIGN(4); - .data : { *(.data) } - - . = ALIGN(4); - .got : { *(.got) } - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; -} diff --git a/cpu/arm926ejs/at91sam9/usb.c b/cpu/arm926ejs/at91sam9/usb.c deleted file mode 100644 index 2a92f734ddc..00000000000 --- a/cpu/arm926ejs/at91sam9/usb.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * (C) Copyright 2006 - * DENX Software Engineering - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) - -#include -#include -#include - -int usb_cpu_init(void) -{ - /* Enable USB host clock. */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); -#ifdef CONFIG_AT91SAM9261 - at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0); -#else - at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP); -#endif - - return 0; -} - -int usb_cpu_stop(void) -{ - /* Disable USB host clock. */ - at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP); -#ifdef CONFIG_AT91SAM9261 - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0); -#else - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); -#endif - return 0; -} - -int usb_cpu_init_fail(void) -{ - return usb_cpu_stop(); -} - -#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */ diff --git a/include/asm-arm/arch-at91/at91_pio.h b/include/asm-arm/arch-at91/at91_pio.h new file mode 100644 index 00000000000..f6ce1f924ef --- /dev/null +++ b/include/asm-arm/arch-at91/at91_pio.h @@ -0,0 +1,49 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h] + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Parallel I/O Controller (PIO) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PIO_H +#define AT91_PIO_H + +#define PIO_PER 0x00 /* Enable Register */ +#define PIO_PDR 0x04 /* Disable Register */ +#define PIO_PSR 0x08 /* Status Register */ +#define PIO_OER 0x10 /* Output Enable Register */ +#define PIO_ODR 0x14 /* Output Disable Register */ +#define PIO_OSR 0x18 /* Output Status Register */ +#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ +#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ +#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ +#define PIO_SODR 0x30 /* Set Output Data Register */ +#define PIO_CODR 0x34 /* Clear Output Data Register */ +#define PIO_ODSR 0x38 /* Output Data Status Register */ +#define PIO_PDSR 0x3c /* Pin Data Status Register */ +#define PIO_IER 0x40 /* Interrupt Enable Register */ +#define PIO_IDR 0x44 /* Interrupt Disable Register */ +#define PIO_IMR 0x48 /* Interrupt Mask Register */ +#define PIO_ISR 0x4c /* Interrupt Status Register */ +#define PIO_MDER 0x50 /* Multi-driver Enable Register */ +#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ +#define PIO_MDSR 0x58 /* Multi-driver Status Register */ +#define PIO_PUDR 0x60 /* Pull-up Disable Register */ +#define PIO_PUER 0x64 /* Pull-up Enable Register */ +#define PIO_PUSR 0x68 /* Pull-up Status Register */ +#define PIO_ASR 0x70 /* Peripheral A Select Register */ +#define PIO_BSR 0x74 /* Peripheral B Select Register */ +#define PIO_ABSR 0x78 /* AB Status Register */ +#define PIO_OWER 0xa0 /* Output Write Enable Register */ +#define PIO_OWDR 0xa4 /* Output Write Disable Register */ +#define PIO_OWSR 0xa8 /* Output Write Status Register */ + +#endif diff --git a/include/asm-arm/arch-at91/at91_pit.h b/include/asm-arm/arch-at91/at91_pit.h new file mode 100644 index 00000000000..94dd242a5fb --- /dev/null +++ b/include/asm-arm/arch-at91/at91_pit.h @@ -0,0 +1,32 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91_pit.h] + * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * + * Periodic Interval Timer (PIT) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PIT_H +#define AT91_PIT_H + +#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ +#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ +#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ +#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ + +#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ +#define AT91_PIT_PITS (1 << 0) /* Timer Status */ + +#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ +#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ +#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ +#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ + +#endif diff --git a/include/asm-arm/arch-at91/at91_pmc.h b/include/asm-arm/arch-at91/at91_pmc.h new file mode 100644 index 00000000000..b57875d798e --- /dev/null +++ b/include/asm-arm/arch-at91/at91_pmc.h @@ -0,0 +1,104 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h] + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Power Management Controller (PMC) - System peripherals registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_PMC_H +#define AT91_PMC_H + +#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ +#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ + +#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ +#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ +#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ +#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ +#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ +#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ +#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ +#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ +#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ +#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ +#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ +#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ +#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ +#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ + +#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ +#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ +#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ + +#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */ + +#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ +#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ +#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ +#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ + +#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ +#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ +#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ + +#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ +#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ +#define AT91_PMC_DIV (0xff << 0) /* Divider */ +#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ +#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ +#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ +#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ +#define AT91_PMC_USBDIV_1 (0 << 28) +#define AT91_PMC_USBDIV_2 (1 << 28) +#define AT91_PMC_USBDIV_4 (2 << 28) +#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ + +#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ +#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ +#define AT91_PMC_CSS_SLOW (0 << 0) +#define AT91_PMC_CSS_MAIN (1 << 0) +#define AT91_PMC_CSS_PLLA (2 << 0) +#define AT91_PMC_CSS_PLLB (3 << 0) +#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ +#define AT91_PMC_PRES_1 (0 << 2) +#define AT91_PMC_PRES_2 (1 << 2) +#define AT91_PMC_PRES_4 (2 << 2) +#define AT91_PMC_PRES_8 (3 << 2) +#define AT91_PMC_PRES_16 (4 << 2) +#define AT91_PMC_PRES_32 (5 << 2) +#define AT91_PMC_PRES_64 (6 << 2) +#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ +#define AT91_PMC_MDIV_1 (0 << 8) +#define AT91_PMC_MDIV_2 (1 << 8) +#define AT91_PMC_MDIV_3 (2 << 8) +#define AT91_PMC_MDIV_4 (3 << 8) + +#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ + +#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ +#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ +#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ +#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ +#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ +#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ +#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ +#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ +#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ +#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ +#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ +#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ + +#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ +#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ + +#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ + +#endif diff --git a/include/asm-arm/arch-at91/at91_rstc.h b/include/asm-arm/arch-at91/at91_rstc.h new file mode 100644 index 00000000000..e49caef9218 --- /dev/null +++ b/include/asm-arm/arch-at91/at91_rstc.h @@ -0,0 +1,41 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h] + * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * + * Reset Controller (RSTC) - System peripherals regsters. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_RSTC_H +#define AT91_RSTC_H + +#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ +#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ +#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ +#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ +#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */ + +#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ +#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ +#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ +#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) +#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8) +#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8) +#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8) +#define AT91_RSTC_RSTTYP_USER (4 << 8) +#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ +#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ + +#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ +#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ +#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ +#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ + +#endif diff --git a/include/asm-arm/arch-at91/at91_spi.h b/include/asm-arm/arch-at91/at91_spi.h new file mode 100644 index 00000000000..30643c60920 --- /dev/null +++ b/include/asm-arm/arch-at91/at91_spi.h @@ -0,0 +1,105 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h] + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Serial Peripheral Interface (SPI) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_SPI_H +#define AT91_SPI_H + +#define AT91_SPI_CR 0x00 /* Control Register */ +#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ +#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ +#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ +#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ + +#define AT91_SPI_MR 0x04 /* Mode Register */ +#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ +#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ +#define AT91_SPI_PS_FIXED (0 << 1) +#define AT91_SPI_PS_VARIABLE (1 << 1) +#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ +#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ +#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ +#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ +#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ + +#define AT91_SPI_RDR 0x08 /* Receive Data Register */ +#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ + +#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ +#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ +#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ + +#define AT91_SPI_SR 0x10 /* Status Register */ +#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ +#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ +#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ +#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ +#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ +#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ +#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ +#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ +#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ +#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ +#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ + +#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ +#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ +#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ + +#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ +#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ +#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ +#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ +#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ +#define AT91_SPI_BITS_8 (0 << 4) +#define AT91_SPI_BITS_9 (1 << 4) +#define AT91_SPI_BITS_10 (2 << 4) +#define AT91_SPI_BITS_11 (3 << 4) +#define AT91_SPI_BITS_12 (4 << 4) +#define AT91_SPI_BITS_13 (5 << 4) +#define AT91_SPI_BITS_14 (6 << 4) +#define AT91_SPI_BITS_15 (7 << 4) +#define AT91_SPI_BITS_16 (8 << 4) +#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ +#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ +#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ + +#define AT91_SPI_RPR 0x0100 /* Receive Pointer Register */ + +#define AT91_SPI_RCR 0x0104 /* Receive Counter Register */ + +#define AT91_SPI_TPR 0x0108 /* Transmit Pointer Register */ + +#define AT91_SPI_TCR 0x010c /* Transmit Counter Register */ + +#define AT91_SPI_RNPR 0x0110 /* Receive Next Pointer Register */ + +#define AT91_SPI_RNCR 0x0114 /* Receive Next Counter Register */ + +#define AT91_SPI_TNPR 0x0118 /* Transmit Next Pointer Register */ + +#define AT91_SPI_TNCR 0x011c /* Transmit Next Counter Register */ + +#define AT91_SPI_PTCR 0x0120 /* PDC Transfer Control Register */ +#define AT91_SPI_RXTEN (0x1 << 0) /* Receiver Transfer Enable */ +#define AT91_SPI_RXTDIS (0x1 << 1) /* Receiver Transfer Disable */ +#define AT91_SPI_TXTEN (0x1 << 8) /* Transmitter Transfer Enable */ +#define AT91_SPI_TXTDIS (0x1 << 9) /* Transmitter Transfer Disable */ + +#define AT91_SPI_PTSR 0x0124 /* PDC Transfer Status Register */ + +#endif diff --git a/include/asm-arm/arch-at91/at91cap9.h b/include/asm-arm/arch-at91/at91cap9.h new file mode 100644 index 00000000000..0b522281386 --- /dev/null +++ b/include/asm-arm/arch-at91/at91cap9.h @@ -0,0 +1,137 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9.h] + * + * Copyright (C) 2007 Stelian Pop + * Copyright (C) 2007 Lead Tech Design + * Copyright (C) 2007 Atmel Corporation. + * + * Common definitions. + * Based on AT91CAP9 datasheet revision B (Preliminary). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91CAP9_H +#define AT91CAP9_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ +#define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ +#define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ +#define AT91CAP9_ID_MPB2 5 /* MP Block Peripheral 2 */ +#define AT91CAP9_ID_MPB3 6 /* MP Block Peripheral 3 */ +#define AT91CAP9_ID_MPB4 7 /* MP Block Peripheral 4 */ +#define AT91CAP9_ID_US0 8 /* USART 0 */ +#define AT91CAP9_ID_US1 9 /* USART 1 */ +#define AT91CAP9_ID_US2 10 /* USART 2 */ +#define AT91CAP9_ID_MCI0 11 /* Multimedia Card Interface 0 */ +#define AT91CAP9_ID_MCI1 12 /* Multimedia Card Interface 1 */ +#define AT91CAP9_ID_CAN 13 /* CAN */ +#define AT91CAP9_ID_TWI 14 /* Two-Wire Interface */ +#define AT91CAP9_ID_SPI0 15 /* Serial Peripheral Interface 0 */ +#define AT91CAP9_ID_SPI1 16 /* Serial Peripheral Interface 0 */ +#define AT91CAP9_ID_SSC0 17 /* Serial Synchronous Controller 0 */ +#define AT91CAP9_ID_SSC1 18 /* Serial Synchronous Controller 1 */ +#define AT91CAP9_ID_AC97C 19 /* AC97 Controller */ +#define AT91CAP9_ID_TCB 20 /* Timer Counter 0, 1 and 2 */ +#define AT91CAP9_ID_PWMC 21 /* Pulse Width Modulation Controller */ +#define AT91CAP9_ID_EMAC 22 /* Ethernet */ +#define AT91CAP9_ID_AESTDES 23 /* Advanced Encryption Standard, Triple DES */ +#define AT91CAP9_ID_ADC 24 /* Analog-to-Digital Converter */ +#define AT91CAP9_ID_ISI 25 /* Image Sensor Interface */ +#define AT91CAP9_ID_LCDC 26 /* LCD Controller */ +#define AT91CAP9_ID_DMA 27 /* DMA Controller */ +#define AT91CAP9_ID_UDPHS 28 /* USB High Speed Device Port */ +#define AT91CAP9_ID_UHP 29 /* USB Host Port */ +#define AT91CAP9_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ +#define AT91CAP9_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ + +/* + * User Peripheral physical base addresses. + */ +#define AT91CAP9_BASE_UDPHS 0xfff78000 +#define AT91CAP9_BASE_TCB0 0xfff7c000 +#define AT91CAP9_BASE_TC0 0xfff7c000 +#define AT91CAP9_BASE_TC1 0xfff7c040 +#define AT91CAP9_BASE_TC2 0xfff7c080 +#define AT91CAP9_BASE_MCI0 0xfff80000 +#define AT91CAP9_BASE_MCI1 0xfff84000 +#define AT91CAP9_BASE_TWI 0xfff88000 +#define AT91CAP9_BASE_US0 0xfff8c000 +#define AT91CAP9_BASE_US1 0xfff90000 +#define AT91CAP9_BASE_US2 0xfff94000 +#define AT91CAP9_BASE_SSC0 0xfff98000 +#define AT91CAP9_BASE_SSC1 0xfff9c000 +#define AT91CAP9_BASE_AC97C 0xfffa0000 +#define AT91CAP9_BASE_SPI0 0xfffa4000 +#define AT91CAP9_BASE_SPI1 0xfffa8000 +#define AT91CAP9_BASE_CAN 0xfffac000 +#define AT91CAP9_BASE_PWMC 0xfffb8000 +#define AT91CAP9_BASE_EMAC 0xfffbc000 +#define AT91CAP9_BASE_ADC 0xfffc0000 +#define AT91CAP9_BASE_ISI 0xfffc4000 +#define AT91_BASE_SYS 0xffffe200 + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) +#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) +#define AT91_DDRSDRC (0xffffe600 - AT91_BASE_SYS) +#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) +#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) +#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) +#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) +#define AT91_GPBR_REVB (0xfffffd50 - AT91_BASE_SYS) +#define AT91_GPBR_REVC (0xfffffd60 - AT91_BASE_SYS) + +#define AT91_USART0 AT91CAP9_BASE_US0 +#define AT91_USART1 AT91CAP9_BASE_US1 +#define AT91_USART2 AT91CAP9_BASE_US2 + +/* + * SCKCR flags + */ +#define AT91CAP9_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */ +#define AT91CAP9_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */ +#define AT91CAP9_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */ +#define AT91CAP9_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */ +#define AT91CAP9_SCKCR_OSCSEL_RC (0 << 3) +#define AT91CAP9_SCKCR_OSCSEL_32 (1 << 3) + +/* + * Internal Memory. + */ +#define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ +#define AT91CAP9_SRAM_SIZE (32 * SZ_1K) /* Internal SRAM size (32Kb) */ + +#define AT91CAP9_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */ + +#define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */ +#define AT91CAP9_UDPHS_BASE 0x00600000 /* USB High Speed Device Port */ +#define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ + +#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 + +#endif diff --git a/include/asm-arm/arch-at91/at91cap9_matrix.h b/include/asm-arm/arch-at91/at91cap9_matrix.h new file mode 100644 index 00000000000..22b7e9b8f4b --- /dev/null +++ b/include/asm-arm/arch-at91/at91cap9_matrix.h @@ -0,0 +1,132 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9_matrix.h] + * + * Copyright (C) 2007 Stelian Pop + * Copyright (C) 2007 Lead Tech Design + * Copyright (C) 2006 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91CAP9 datasheet revision B (Preliminary). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91CAP9_MATRIX_H +#define AT91CAP9_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ +#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ +#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ +#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ +#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ +#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ +#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ +#define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ +#define AT91_MATRIX_SCFG9 (AT91_MATRIX + 0x64) /* Slave Configuration Register 9 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ +#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ +#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ +#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ +#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ +#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ +#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ +#define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ +#define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ +#define AT91_MATRIX_PRAS9 (AT91_MATRIX + 0xC8) /* Priority Register A for Slave 9 */ +#define AT91_MATRIX_PRBS9 (AT91_MATRIX + 0xCC) /* Priority Register B for Slave 9 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ +#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ +#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ +#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ +#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ +#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ +#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ + +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_RCB2 (1 << 2) +#define AT91_MATRIX_RCB3 (1 << 3) +#define AT91_MATRIX_RCB4 (1 << 4) +#define AT91_MATRIX_RCB5 (1 << 5) +#define AT91_MATRIX_RCB6 (1 << 6) +#define AT91_MATRIX_RCB7 (1 << 7) +#define AT91_MATRIX_RCB8 (1 << 8) +#define AT91_MATRIX_RCB9 (1 << 9) +#define AT91_MATRIX_RCB10 (1 << 10) +#define AT91_MATRIX_RCB11 (1 << 11) + +#define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */ +#define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */ + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) +#define AT91_MATRIX_EBI_CS1A_BCRAMC (1 << 1) +#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) +#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) +#define AT91_MATRIX_EBI_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) +#define AT91_MATRIX_EBI_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_EBI_DQSPDC (1 << 9) /* Data Qualifier Strobe Pull-Down Configuration */ +#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) + +#define AT91_MPBS2_SFR (AT91_MATRIX + 0x12C) /* MPBlock Slave 2 Special Function Register */ +#define AT91_MPBS3_SFR (AT91_MATRIX + 0x130) /* MPBlock Slave 3 Special Function Register */ +#define AT91_APB_SFR (AT91_MATRIX + 0x134) /* APB Bridge Special Function Register */ + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h new file mode 100644 index 00000000000..920a7f3c9ff --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9260.h @@ -0,0 +1,124 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260.h] + * + * (C) 2006 Andrew Victor + * + * Common definitions. + * Based on AT91SAM9260 datasheet revision A (Preliminary). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9260_H +#define AT91SAM9260_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ +#define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ +#define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ +#define AT91SAM9260_ID_ADC 5 /* Analog-to-Digital Converter */ +#define AT91SAM9260_ID_US0 6 /* USART 0 */ +#define AT91SAM9260_ID_US1 7 /* USART 1 */ +#define AT91SAM9260_ID_US2 8 /* USART 2 */ +#define AT91SAM9260_ID_MCI 9 /* Multimedia Card Interface */ +#define AT91SAM9260_ID_UDP 10 /* USB Device Port */ +#define AT91SAM9260_ID_TWI 11 /* Two-Wire Interface */ +#define AT91SAM9260_ID_SPI0 12 /* Serial Peripheral Interface 0 */ +#define AT91SAM9260_ID_SPI1 13 /* Serial Peripheral Interface 1 */ +#define AT91SAM9260_ID_SSC 14 /* Serial Synchronous Controller */ +#define AT91SAM9260_ID_TC0 17 /* Timer Counter 0 */ +#define AT91SAM9260_ID_TC1 18 /* Timer Counter 1 */ +#define AT91SAM9260_ID_TC2 19 /* Timer Counter 2 */ +#define AT91SAM9260_ID_UHP 20 /* USB Host port */ +#define AT91SAM9260_ID_EMAC 21 /* Ethernet */ +#define AT91SAM9260_ID_ISI 22 /* Image Sensor Interface */ +#define AT91SAM9260_ID_US3 23 /* USART 3 */ +#define AT91SAM9260_ID_US4 24 /* USART 4 */ +#define AT91SAM9260_ID_US5 25 /* USART 5 */ +#define AT91SAM9260_ID_TC3 26 /* Timer Counter 3 */ +#define AT91SAM9260_ID_TC4 27 /* Timer Counter 4 */ +#define AT91SAM9260_ID_TC5 28 /* Timer Counter 5 */ +#define AT91SAM9260_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ +#define AT91SAM9260_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ +#define AT91SAM9260_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9260_BASE_TCB0 0xfffa0000 +#define AT91SAM9260_BASE_TC0 0xfffa0000 +#define AT91SAM9260_BASE_TC1 0xfffa0040 +#define AT91SAM9260_BASE_TC2 0xfffa0080 +#define AT91SAM9260_BASE_UDP 0xfffa4000 +#define AT91SAM9260_BASE_MCI 0xfffa8000 +#define AT91SAM9260_BASE_TWI 0xfffac000 +#define AT91SAM9260_BASE_US0 0xfffb0000 +#define AT91SAM9260_BASE_US1 0xfffb4000 +#define AT91SAM9260_BASE_US2 0xfffb8000 +#define AT91SAM9260_BASE_SSC 0xfffbc000 +#define AT91SAM9260_BASE_ISI 0xfffc0000 +#define AT91SAM9260_BASE_EMAC 0xfffc4000 +#define AT91SAM9260_BASE_SPI0 0xfffc8000 +#define AT91SAM9260_BASE_SPI1 0xfffcc000 +#define AT91SAM9260_BASE_US3 0xfffd0000 +#define AT91SAM9260_BASE_US4 0xfffd4000 +#define AT91SAM9260_BASE_US5 0xfffd8000 +#define AT91SAM9260_BASE_TCB1 0xfffdc000 +#define AT91SAM9260_BASE_TC3 0xfffdc000 +#define AT91SAM9260_BASE_TC4 0xfffdc040 +#define AT91SAM9260_BASE_TC5 0xfffdc080 +#define AT91SAM9260_BASE_ADC 0xfffe0000 +#define AT91_BASE_SYS 0xffffe800 + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) +#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) + +#define AT91_USART0 AT91SAM9260_BASE_US0 +#define AT91_USART1 AT91SAM9260_BASE_US1 +#define AT91_USART2 AT91SAM9260_BASE_US2 +#define AT91_USART3 AT91SAM9260_BASE_US3 +#define AT91_USART4 AT91SAM9260_BASE_US4 +#define AT91_USART5 AT91SAM9260_BASE_US5 + +/* + * Internal Memory. + */ +#define AT91SAM9260_ROM_BASE 0x00100000 /* Internal ROM base address */ +#define AT91SAM9260_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ + +#define AT91SAM9260_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ +#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ +#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ +#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ + +#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ + +#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */ +#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */ + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9260_matrix.h b/include/asm-arm/arch-at91/at91sam9260_matrix.h new file mode 100644 index 00000000000..f8b023d9327 --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9260_matrix.h @@ -0,0 +1,80 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h] + * + * Copyright (C) 2007 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9260 datasheet revision B. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9260_MATRIX_H +#define AT91SAM9260_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ +#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ + +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_CS1A_SMC (0 << 1) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_CS3A_SMC (0 << 3) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_CS4A_SMC (0 << 4) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_CS5A_SMC (0 << 5) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h new file mode 100644 index 00000000000..752d81dfe3f --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9261.h @@ -0,0 +1,105 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261.h] + * + * Copyright (C) SAN People + * + * Common definitions. + * Based on AT91SAM9261 datasheet revision E. (Preliminary) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9261_H +#define AT91SAM9261_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ +#define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ +#define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ +#define AT91SAM9261_ID_US0 6 /* USART 0 */ +#define AT91SAM9261_ID_US1 7 /* USART 1 */ +#define AT91SAM9261_ID_US2 8 /* USART 2 */ +#define AT91SAM9261_ID_MCI 9 /* Multimedia Card Interface */ +#define AT91SAM9261_ID_UDP 10 /* USB Device Port */ +#define AT91SAM9261_ID_TWI 11 /* Two-Wire Interface */ +#define AT91SAM9261_ID_SPI0 12 /* Serial Peripheral Interface 0 */ +#define AT91SAM9261_ID_SPI1 13 /* Serial Peripheral Interface 1 */ +#define AT91SAM9261_ID_SSC0 14 /* Serial Synchronous Controller 0 */ +#define AT91SAM9261_ID_SSC1 15 /* Serial Synchronous Controller 1 */ +#define AT91SAM9261_ID_SSC2 16 /* Serial Synchronous Controller 2 */ +#define AT91SAM9261_ID_TC0 17 /* Timer Counter 0 */ +#define AT91SAM9261_ID_TC1 18 /* Timer Counter 1 */ +#define AT91SAM9261_ID_TC2 19 /* Timer Counter 2 */ +#define AT91SAM9261_ID_UHP 20 /* USB Host port */ +#define AT91SAM9261_ID_LCDC 21 /* LDC Controller */ +#define AT91SAM9261_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ +#define AT91SAM9261_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ +#define AT91SAM9261_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ + + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9261_BASE_TCB0 0xfffa0000 +#define AT91SAM9261_BASE_TC0 0xfffa0000 +#define AT91SAM9261_BASE_TC1 0xfffa0040 +#define AT91SAM9261_BASE_TC2 0xfffa0080 +#define AT91SAM9261_BASE_UDP 0xfffa4000 +#define AT91SAM9261_BASE_MCI 0xfffa8000 +#define AT91SAM9261_BASE_TWI 0xfffac000 +#define AT91SAM9261_BASE_US0 0xfffb0000 +#define AT91SAM9261_BASE_US1 0xfffb4000 +#define AT91SAM9261_BASE_US2 0xfffb8000 +#define AT91SAM9261_BASE_SSC0 0xfffbc000 +#define AT91SAM9261_BASE_SSC1 0xfffc0000 +#define AT91SAM9261_BASE_SSC2 0xfffc4000 +#define AT91SAM9261_BASE_SPI0 0xfffc8000 +#define AT91SAM9261_BASE_SPI1 0xfffcc000 +#define AT91_BASE_SYS 0xffffea00 + + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) + +#define AT91_USART0 AT91SAM9261_BASE_US0 +#define AT91_USART1 AT91SAM9261_BASE_US1 +#define AT91_USART2 AT91SAM9261_BASE_US2 + + +/* + * Internal Memory. + */ +#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */ +#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */ + +#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ + +#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ +#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ + + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9261_matrix.h b/include/asm-arm/arch-at91/at91sam9261_matrix.h new file mode 100644 index 00000000000..e2bfc4b0c9b --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9261_matrix.h @@ -0,0 +1,64 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h] + * + * Copyright (C) 2007 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9261_MATRIX_H +#define AT91SAM9261_MATRIX_H + +#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ + +#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ +#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ +#define AT91_MATRIX_ITCM_0 (0 << 0) +#define AT91_MATRIX_ITCM_16 (5 << 0) +#define AT91_MATRIX_ITCM_32 (6 << 0) +#define AT91_MATRIX_ITCM_64 (7 << 0) +#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ +#define AT91_MATRIX_DTCM_0 (0 << 4) +#define AT91_MATRIX_DTCM_16 (5 << 4) +#define AT91_MATRIX_DTCM_32 (6 << 4) +#define AT91_MATRIX_DTCM_64 (7 << 4) + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_CS1A_SMC (0 << 1) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_CS3A_SMC (0 << 3) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_CS4A_SMC (0 << 4) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_CS5A_SMC (0 << 5) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ + +#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ +#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h new file mode 100644 index 00000000000..98251cbeee1 --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9263.h @@ -0,0 +1,127 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h] + * + * (C) 2007 Atmel Corporation. + * + * Common definitions. + * Based on AT91SAM9263 datasheet revision B (Preliminary). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9263_H +#define AT91SAM9263_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define AT91SAM9263_ID_PIOA 2 /* Parallel IO Controller A */ +#define AT91SAM9263_ID_PIOB 3 /* Parallel IO Controller B */ +#define AT91SAM9263_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ +#define AT91SAM9263_ID_US0 7 /* USART 0 */ +#define AT91SAM9263_ID_US1 8 /* USART 1 */ +#define AT91SAM9263_ID_US2 9 /* USART 2 */ +#define AT91SAM9263_ID_MCI0 10 /* Multimedia Card Interface 0 */ +#define AT91SAM9263_ID_MCI1 11 /* Multimedia Card Interface 1 */ +#define AT91SAM9263_ID_CAN 12 /* CAN */ +#define AT91SAM9263_ID_TWI 13 /* Two-Wire Interface */ +#define AT91SAM9263_ID_SPI0 14 /* Serial Peripheral Interface 0 */ +#define AT91SAM9263_ID_SPI1 15 /* Serial Peripheral Interface 1 */ +#define AT91SAM9263_ID_SSC0 16 /* Serial Synchronous Controller 0 */ +#define AT91SAM9263_ID_SSC1 17 /* Serial Synchronous Controller 1 */ +#define AT91SAM9263_ID_AC97C 18 /* AC97 Controller */ +#define AT91SAM9263_ID_TCB 19 /* Timer Counter 0, 1 and 2 */ +#define AT91SAM9263_ID_PWMC 20 /* Pulse Width Modulation Controller */ +#define AT91SAM9263_ID_EMAC 21 /* Ethernet */ +#define AT91SAM9263_ID_2DGE 23 /* 2D Graphic Engine */ +#define AT91SAM9263_ID_UDP 24 /* USB Device Port */ +#define AT91SAM9263_ID_ISI 25 /* Image Sensor Interface */ +#define AT91SAM9263_ID_LCDC 26 /* LCD Controller */ +#define AT91SAM9263_ID_DMA 27 /* DMA Controller */ +#define AT91SAM9263_ID_UHP 29 /* USB Host port */ +#define AT91SAM9263_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ +#define AT91SAM9263_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ + + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9263_BASE_UDP 0xfff78000 +#define AT91SAM9263_BASE_TCB0 0xfff7c000 +#define AT91SAM9263_BASE_TC0 0xfff7c000 +#define AT91SAM9263_BASE_TC1 0xfff7c040 +#define AT91SAM9263_BASE_TC2 0xfff7c080 +#define AT91SAM9263_BASE_MCI0 0xfff80000 +#define AT91SAM9263_BASE_MCI1 0xfff84000 +#define AT91SAM9263_BASE_TWI 0xfff88000 +#define AT91SAM9263_BASE_US0 0xfff8c000 +#define AT91SAM9263_BASE_US1 0xfff90000 +#define AT91SAM9263_BASE_US2 0xfff94000 +#define AT91SAM9263_BASE_SSC0 0xfff98000 +#define AT91SAM9263_BASE_SSC1 0xfff9c000 +#define AT91SAM9263_BASE_AC97C 0xfffa0000 +#define AT91SAM9263_BASE_SPI0 0xfffa4000 +#define AT91SAM9263_BASE_SPI1 0xfffa8000 +#define AT91SAM9263_BASE_CAN 0xfffac000 +#define AT91SAM9263_BASE_PWMC 0xfffb8000 +#define AT91SAM9263_BASE_EMAC 0xfffbc000 +#define AT91SAM9263_BASE_ISI 0xfffc4000 +#define AT91SAM9263_BASE_2DGE 0xfffc8000 +#define AT91_BASE_SYS 0xffffe000 + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) +#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) +#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) +#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) +#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) +#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) +#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) +#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) +#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) + +#define AT91_USART0 AT91SAM9263_BASE_US0 +#define AT91_USART1 AT91SAM9263_BASE_US1 +#define AT91_USART2 AT91SAM9263_BASE_US2 + +#define AT91_SMC AT91_SMC0 + +/* + * Internal Memory. + */ +#define AT91SAM9263_SRAM0_BASE 0x00300000 /* Internal SRAM 0 base address */ +#define AT91SAM9263_SRAM0_SIZE (80 * SZ_1K) /* Internal SRAM 0 size (80Kb) */ + +#define AT91SAM9263_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91SAM9263_ROM_SIZE SZ_128K /* Internal ROM size (128Kb) */ + +#define AT91SAM9263_SRAM1_BASE 0x00500000 /* Internal SRAM 1 base address */ +#define AT91SAM9263_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ + +#define AT91SAM9263_LCDC_BASE 0x00700000 /* LCD Controller */ +#define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */ +#define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */ + + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9263_matrix.h b/include/asm-arm/arch-at91/at91sam9263_matrix.h new file mode 100644 index 00000000000..83aaaab7731 --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9263_matrix.h @@ -0,0 +1,129 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263_matrix.h] + * + * Copyright (C) 2006 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9263 datasheet revision B (Preliminary). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9263_MATRIX_H +#define AT91SAM9263_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ +#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ +#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ +#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ +#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ +#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ +#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ +#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ +#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ +#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ +#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ +#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ +#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ + +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_RCB2 (1 << 2) +#define AT91_MATRIX_RCB3 (1 << 3) +#define AT91_MATRIX_RCB4 (1 << 4) +#define AT91_MATRIX_RCB5 (1 << 5) +#define AT91_MATRIX_RCB6 (1 << 6) +#define AT91_MATRIX_RCB7 (1 << 7) +#define AT91_MATRIX_RCB8 (1 << 8) + +#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ +#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ +#define AT91_MATRIX_ITCM_0 (0 << 0) +#define AT91_MATRIX_ITCM_16 (5 << 0) +#define AT91_MATRIX_ITCM_32 (6 << 0) +#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ +#define AT91_MATRIX_DTCM_0 (0 << 4) +#define AT91_MATRIX_DTCM_16 (5 << 4) +#define AT91_MATRIX_DTCM_32 (6 << 4) + +#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ +#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) +#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3) +#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4) +#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5) +#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) + +#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */ +#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) +#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3) +#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16) + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9_smc.h b/include/asm-arm/arch-at91/at91sam9_smc.h new file mode 100644 index 00000000000..d64511b36dd --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9_smc.h @@ -0,0 +1,76 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h] + * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * + * Static Memory Controllers (SMC) - System peripherals registers. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9_SMC_H +#define AT91SAM9_SMC_H + +#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ +#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ +#define AT91_SMC_NWESETUP_(x) ((x) << 0) +#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ +#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) +#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ +#define AT91_SMC_NRDSETUP_(x) ((x) << 16) +#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ +#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) + +#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ +#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ +#define AT91_SMC_NWEPULSE_(x) ((x) << 0) +#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ +#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) +#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ +#define AT91_SMC_NRDPULSE_(x) ((x) << 16) +#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ +#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) + +#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ +#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ +#define AT91_SMC_NWECYCLE_(x) ((x) << 0) +#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ +#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) + +#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ +#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ +#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ +#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ +#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) +#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) +#define AT91_SMC_EXNWMODE_READY (3 << 4) +#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ +#define AT91_SMC_BAT_SELECT (0 << 8) +#define AT91_SMC_BAT_WRITE (1 << 8) +#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ +#define AT91_SMC_DBW_8 (0 << 12) +#define AT91_SMC_DBW_16 (1 << 12) +#define AT91_SMC_DBW_32 (2 << 12) +#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ +#define AT91_SMC_TDF_(x) ((x) << 16) +#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ +#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ +#define AT91_SMC_PS (3 << 28) /* Page Size */ +#define AT91_SMC_PS_4 (0 << 28) +#define AT91_SMC_PS_8 (1 << 28) +#define AT91_SMC_PS_16 (2 << 28) +#define AT91_SMC_PS_32 (3 << 28) + +#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ +#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ +#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ +#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ +#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ +#endif + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h new file mode 100644 index 00000000000..215bbc8d6a7 --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9rl.h @@ -0,0 +1,115 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl.h] + * + * Copyright (C) 2007 Atmel Corporation + * + * Common definitions. + * Based on AT91SAM9RL datasheet revision A. (Preliminary) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#ifndef AT91SAM9RL_H +#define AT91SAM9RL_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Controller */ +#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ +#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ +#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ +#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */ +#define AT91SAM9RL_ID_US0 6 /* USART 0 */ +#define AT91SAM9RL_ID_US1 7 /* USART 1 */ +#define AT91SAM9RL_ID_US2 8 /* USART 2 */ +#define AT91SAM9RL_ID_US3 9 /* USART 3 */ +#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */ +#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */ +#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */ +#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */ +#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ +#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ +#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */ +#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */ +#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */ +#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */ +#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */ +#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */ +#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */ +#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */ +#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */ +#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ + + +/* + * User Peripheral physical base addresses. + */ +#define AT91SAM9RL_BASE_TCB0 0xfffa0000 +#define AT91SAM9RL_BASE_TC0 0xfffa0000 +#define AT91SAM9RL_BASE_TC1 0xfffa0040 +#define AT91SAM9RL_BASE_TC2 0xfffa0080 +#define AT91SAM9RL_BASE_MCI 0xfffa4000 +#define AT91SAM9RL_BASE_TWI0 0xfffa8000 +#define AT91SAM9RL_BASE_TWI1 0xfffac000 +#define AT91SAM9RL_BASE_US0 0xfffb0000 +#define AT91SAM9RL_BASE_US1 0xfffb4000 +#define AT91SAM9RL_BASE_US2 0xfffb8000 +#define AT91SAM9RL_BASE_US3 0xfffbc000 +#define AT91SAM9RL_BASE_SSC0 0xfffc0000 +#define AT91SAM9RL_BASE_SSC1 0xfffc4000 +#define AT91SAM9RL_BASE_PWMC 0xfffc8000 +#define AT91SAM9RL_BASE_SPI 0xfffcc000 +#define AT91SAM9RL_BASE_TSC 0xfffd0000 +#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 +#define AT91SAM9RL_BASE_AC97C 0xfffd8000 +#define AT91_BASE_SYS 0xffffc000 + + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) +#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) +#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) +#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) +#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) +#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) +#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) +#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) +#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) + +#define AT91_USART0 AT91SAM9RL_BASE_US0 +#define AT91_USART1 AT91SAM9RL_BASE_US1 +#define AT91_USART2 AT91SAM9RL_BASE_US2 +#define AT91_USART3 AT91SAM9RL_BASE_US3 + + +/* + * Internal Memory. + */ +#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */ +#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ + +#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */ +#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */ + +#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ +#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */ + +#endif diff --git a/include/asm-arm/arch-at91/at91sam9rl_matrix.h b/include/asm-arm/arch-at91/at91sam9rl_matrix.h new file mode 100644 index 00000000000..af8d914acc4 --- /dev/null +++ b/include/asm-arm/arch-at91/at91sam9rl_matrix.h @@ -0,0 +1,96 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl_matrix.h] + * + * Copyright (C) 2007 Atmel Corporation + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + * Based on AT91SAM9RL datasheet revision A. (Preliminary) + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#ifndef AT91SAM9RL_MATRIX_H +#define AT91SAM9RL_MATRIX_H + +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ +#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ +#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ +#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ + +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_RCB2 (1 << 2) +#define AT91_MATRIX_RCB3 (1 << 3) +#define AT91_MATRIX_RCB4 (1 << 4) +#define AT91_MATRIX_RCB5 (1 << 5) + +#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ +#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ +#define AT91_MATRIX_ITCM_0 (0 << 0) +#define AT91_MATRIX_ITCM_16 (5 << 0) +#define AT91_MATRIX_ITCM_32 (6 << 0) +#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ +#define AT91_MATRIX_DTCM_0 (0 << 4) +#define AT91_MATRIX_DTCM_16 (5 << 4) +#define AT91_MATRIX_DTCM_32 (6 << 4) + +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ +#define AT91_MATRIX_CS1A_SMC (0 << 1) +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ +#define AT91_MATRIX_CS3A_SMC (0 << 3) +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) +#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ +#define AT91_MATRIX_CS4A_SMC (0 << 4) +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) +#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ +#define AT91_MATRIX_CS5A_SMC (0 << 5) +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ +#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ +#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) + + +#endif diff --git a/include/asm-arm/arch-at91/clk.h b/include/asm-arm/arch-at91/clk.h new file mode 100644 index 00000000000..1b502c822cd --- /dev/null +++ b/include/asm-arm/arch-at91/clk.h @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2007 + * Stelian Pop + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_CLK_H__ +#define __ASM_ARM_ARCH_CLK_H__ + +#include + +static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) +{ + return AT91_MASTER_CLOCK; +} + +static inline unsigned long get_usart_clk_rate(unsigned int dev_id) +{ + return AT91_MASTER_CLOCK; +} + +static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) +{ + return AT91_MASTER_CLOCK; +} + + +#endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h new file mode 100644 index 00000000000..c4d7b971beb --- /dev/null +++ b/include/asm-arm/arch-at91/gpio.h @@ -0,0 +1,366 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h] + * + * Copyright (C) 2005 HP Labs + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_ARCH_AT91_GPIO_H +#define __ASM_ARCH_AT91_GPIO_H + +#include +#include +#include + +#define PIN_BASE 32 + +#define MAX_GPIO_BANKS 5 + +/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ + +#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) +#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) +#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) +#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) +#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) +#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) +#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) +#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) +#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) +#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) +#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) +#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) +#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) +#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) +#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) +#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) +#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) +#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) +#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) +#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) +#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) +#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) +#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) +#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) +#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) +#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) +#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) +#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) +#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) +#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) +#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) +#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) + +#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) +#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) +#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) +#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) +#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) +#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) +#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) +#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) +#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) +#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) +#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) +#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) +#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) +#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) +#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) +#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) +#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) +#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) +#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) +#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) +#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) +#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) +#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) +#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) +#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) +#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) +#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) +#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) +#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) +#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) +#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) +#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) + +#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) +#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) +#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) +#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) +#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) +#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) +#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) +#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) +#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) +#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) +#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) +#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) +#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) +#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) +#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) +#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) +#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) +#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) +#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) +#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) +#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) +#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) +#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) +#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) +#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) +#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) +#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) +#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) +#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) +#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) +#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) +#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) + +#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) +#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) +#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) +#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) +#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) +#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) +#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) +#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) +#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) +#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) +#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) +#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) +#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) +#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) +#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) +#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) +#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) +#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) +#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) +#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) +#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) +#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) +#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) +#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) +#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) +#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) +#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) +#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) +#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) +#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) +#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) +#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) + +#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) +#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) +#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) +#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) +#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) +#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) +#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) +#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) +#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) +#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) +#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) +#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) +#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) +#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) +#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) +#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) +#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) +#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) +#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) +#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) +#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) +#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) +#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) +#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) +#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) +#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) +#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) +#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) +#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) +#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) +#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) +#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) + +static unsigned long at91_pios[] = { + AT91_PIOA, + AT91_PIOB, + AT91_PIOC, +#ifdef AT91_PIOD + AT91_PIOD, +#ifdef AT91_PIOE + AT91_PIOE +#endif +#endif +}; + +static inline void *pin_to_controller(unsigned pin) +{ + pin -= PIN_BASE; + pin /= 32; + return (void *)(AT91_BASE_SYS + at91_pios[pin]); +} + +static inline unsigned pin_to_mask(unsigned pin) +{ + pin -= PIN_BASE; + return 1 << (pin % 32); +} + +/* + * mux the pin to the "GPIO" peripheral role. + */ +static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); + __raw_writel(mask, pio + PIO_PER); + return 0; +} + +/* + * mux the pin to the "A" internal peripheral role. + */ +static inline int at91_set_A_periph(unsigned pin, int use_pullup) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); + __raw_writel(mask, pio + PIO_ASR); + __raw_writel(mask, pio + PIO_PDR); + return 0; +} + +/* + * mux the pin to the "B" internal peripheral role. + */ +static inline int at91_set_B_periph(unsigned pin, int use_pullup) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); + __raw_writel(mask, pio + PIO_BSR); + __raw_writel(mask, pio + PIO_PDR); + return 0; +} + +/* + * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and + * configure it for an input. + */ +static inline int at91_set_gpio_input(unsigned pin, int use_pullup) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); + __raw_writel(mask, pio + PIO_ODR); + __raw_writel(mask, pio + PIO_PER); + return 0; +} + +/* + * mux the pin to the gpio controller (instead of "A" or "B" peripheral), + * and configure it for an output. + */ +static inline int at91_set_gpio_output(unsigned pin, int value) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + PIO_IDR); + __raw_writel(mask, pio + PIO_PUDR); + __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); + __raw_writel(mask, pio + PIO_OER); + __raw_writel(mask, pio + PIO_PER); + return 0; +} + +/* + * enable/disable the glitch filter; mostly used with IRQ handling. + */ +static inline int at91_set_deglitch(unsigned pin, int is_on) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); + return 0; +} + +/* + * enable/disable the multi-driver; This is only valid for output and + * allows the output pin to run as an open collector output. + */ +static inline int at91_set_multi_drive(unsigned pin, int is_on) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR)); + return 0; +} + +static inline int gpio_direction_input(unsigned pin) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!(__raw_readl(pio + PIO_PSR) & mask)) + return -EINVAL; + __raw_writel(mask, pio + PIO_ODR); + return 0; +} + +static inline int gpio_direction_output(unsigned pin, int value) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!(__raw_readl(pio + PIO_PSR) & mask)) + return -EINVAL; + __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); + __raw_writel(mask, pio + PIO_OER); + return 0; +} + +/* + * assuming the pin is muxed as a gpio output, set its value. + */ +static inline int at91_set_gpio_value(unsigned pin, int value) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); + return 0; +} + +/* + * read the pin's value (works even if it's not muxed as a gpio). + */ +static inline int at91_get_gpio_value(unsigned pin) +{ + void *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + u32 pdsr; + + pdsr = __raw_readl(pio + PIO_PDSR); + return (pdsr & mask) != 0; +} + +#endif diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h new file mode 100644 index 00000000000..f31241901a3 --- /dev/null +++ b/include/asm-arm/arch-at91/hardware.h @@ -0,0 +1,54 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/hardware.h] + * + * Copyright (C) 2003 SAN People + * Copyright (C) 2003 ATMEL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include + +#if defined(CONFIG_AT91RM9200) +#include +#elif defined(CONFIG_AT91SAM9260) +#include +#define AT91_BASE_EMAC AT91SAM9260_BASE_EMAC +#define AT91_BASE_SPI AT91SAM9260_BASE_SPI0 +#define AT91_ID_UHP AT91SAM9260_ID_UHP +#define AT91_PMC_UHP AT91SAM926x_PMC_UHP +#elif defined(CONFIG_AT91SAM9261) +#include +#define AT91_BASE_SPI AT91SAM9261_BASE_SPI0 +#define AT91_ID_UHP AT91SAM9261_ID_UHP +#define AT91_PMC_UHP AT91SAM926x_PMC_UHP +#elif defined(CONFIG_AT91SAM9263) +#include +#define AT91_BASE_EMAC AT91SAM9263_BASE_EMAC +#define AT91_BASE_SPI AT91SAM9263_BASE_SPI0 +#define AT91_ID_UHP AT91SAM9263_ID_UHP +#define AT91_PMC_UHP AT91SAM926x_PMC_UHP +#elif defined(CONFIG_AT91SAM9RL) +#include +#define AT91_BASE_SPI AT91SAM9RL_BASE_SPI +#define AT91_ID_UHP AT91SAM9RL_ID_UHP +#elif defined(CONFIG_AT91CAP9) +#include +#define AT91_BASE_EMAC AT91CAP9_BASE_EMAC +#define AT91_BASE_SPI AT91CAP9_BASE_SPI0 +#define AT91_ID_UHP AT91CAP9_ID_UHP +#define AT91_PMC_UHP AT91CAP9_PMC_UHP +#elif defined(CONFIG_AT91X40) +#include +#else +#error "Unsupported AT91 processor" +#endif + +#endif diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h new file mode 100644 index 00000000000..f09b2df0e31 --- /dev/null +++ b/include/asm-arm/arch-at91/io.h @@ -0,0 +1,40 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/io.h] + * + * Copyright (C) 2003 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_IO_H +#define __ASM_ARCH_IO_H + +#include + +static inline unsigned int at91_sys_read(unsigned int reg_offset) +{ + void *addr = (void *)AT91_BASE_SYS; + + return __raw_readl(addr + reg_offset); +} + +static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) +{ + void *addr = (void *)AT91_BASE_SYS; + + __raw_writel(value, addr + reg_offset); +} + +#endif diff --git a/include/asm-arm/arch-at91/memory-map.h b/include/asm-arm/arch-at91/memory-map.h new file mode 100644 index 00000000000..8015dad6a9c --- /dev/null +++ b/include/asm-arm/arch-at91/memory-map.h @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop + * Lead Tech Design + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __ASM_ARM_ARCH_MEMORYMAP_H__ +#define __ASM_ARM_ARCH_MEMORYMAP_H__ + +#include + +#define USART0_BASE AT91_USART0 +#define USART1_BASE AT91_USART1 +#define USART2_BASE AT91_USART2 +#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU) + +#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */ diff --git a/include/asm-arm/arch-at91sam9/at91_pio.h b/include/asm-arm/arch-at91sam9/at91_pio.h deleted file mode 100644 index f6ce1f924ef..00000000000 --- a/include/asm-arm/arch-at91sam9/at91_pio.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91_pit.h b/include/asm-arm/arch-at91sam9/at91_pit.h deleted file mode 100644 index 94dd242a5fb..00000000000 --- a/include/asm-arm/arch-at91sam9/at91_pit.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_pit.h] - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Periodic Interval Timer (PIT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIT_H -#define AT91_PIT_H - -#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ -#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ -#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ -#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ - -#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ -#define AT91_PIT_PITS (1 << 0) /* Timer Status */ - -#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ -#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ -#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ -#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91_pmc.h b/include/asm-arm/arch-at91sam9/at91_pmc.h deleted file mode 100644 index b57875d798e..00000000000 --- a/include/asm-arm/arch-at91sam9/at91_pmc.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Power Management Controller (PMC) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PMC_H -#define AT91_PMC_H - -#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ -#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ - -#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ -#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ -#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ -#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ -#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ -#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ -#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ -#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ -#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ - -#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ -#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ -#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ - -#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */ - -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ - -#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ -#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ - -#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ -#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ -#define AT91_PMC_DIV (0xff << 0) /* Divider */ -#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ -#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ -#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ -#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ -#define AT91_PMC_USBDIV_1 (0 << 28) -#define AT91_PMC_USBDIV_2 (1 << 28) -#define AT91_PMC_USBDIV_4 (2 << 28) -#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ - -#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ -#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ -#define AT91_PMC_CSS_SLOW (0 << 0) -#define AT91_PMC_CSS_MAIN (1 << 0) -#define AT91_PMC_CSS_PLLA (2 << 0) -#define AT91_PMC_CSS_PLLB (3 << 0) -#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) -#define AT91_PMC_PRES_2 (1 << 2) -#define AT91_PMC_PRES_4 (2 << 2) -#define AT91_PMC_PRES_8 (3 << 2) -#define AT91_PMC_PRES_16 (4 << 2) -#define AT91_PMC_PRES_32 (5 << 2) -#define AT91_PMC_PRES_64 (6 << 2) -#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -#define AT91_PMC_MDIV_1 (0 << 8) -#define AT91_PMC_MDIV_2 (1 << 8) -#define AT91_PMC_MDIV_3 (2 << 8) -#define AT91_PMC_MDIV_4 (3 << 8) - -#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ - -#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ -#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ -#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ -#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ -#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ -#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ -#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ - -#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ -#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ - -#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91_rstc.h b/include/asm-arm/arch-at91sam9/at91_rstc.h deleted file mode 100644 index e49caef9218..00000000000 --- a/include/asm-arm/arch-at91sam9/at91_rstc.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h] - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Reset Controller (RSTC) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RSTC_H -#define AT91_RSTC_H - -#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ -#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ -#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ -#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ -#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */ - -#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ -#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ -#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ -#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) -#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8) -#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8) -#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8) -#define AT91_RSTC_RSTTYP_USER (4 << 8) -#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ -#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ - -#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ -#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ -#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ -#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91_spi.h b/include/asm-arm/arch-at91sam9/at91_spi.h deleted file mode 100644 index 30643c60920..00000000000 --- a/include/asm-arm/arch-at91sam9/at91_spi.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Serial Peripheral Interface (SPI) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SPI_H -#define AT91_SPI_H - -#define AT91_SPI_CR 0x00 /* Control Register */ -#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ -#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ -#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_MR 0x04 /* Mode Register */ -#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ -#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ -#define AT91_SPI_PS_FIXED (0 << 1) -#define AT91_SPI_PS_VARIABLE (1 << 1) -#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ -#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ -#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ - -#define AT91_SPI_RDR 0x08 /* Receive Data Register */ -#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ - -#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ -#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_SR 0x10 /* Status Register */ -#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ -#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ -#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ -#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ -#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ -#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ -#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ -#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ -#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ -#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ -#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ - -#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ -#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ -#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ - -#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ -#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ -#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ -#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ -#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ -#define AT91_SPI_BITS_8 (0 << 4) -#define AT91_SPI_BITS_9 (1 << 4) -#define AT91_SPI_BITS_10 (2 << 4) -#define AT91_SPI_BITS_11 (3 << 4) -#define AT91_SPI_BITS_12 (4 << 4) -#define AT91_SPI_BITS_13 (5 << 4) -#define AT91_SPI_BITS_14 (6 << 4) -#define AT91_SPI_BITS_15 (7 << 4) -#define AT91_SPI_BITS_16 (8 << 4) -#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ -#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ -#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ - -#define AT91_SPI_RPR 0x0100 /* Receive Pointer Register */ - -#define AT91_SPI_RCR 0x0104 /* Receive Counter Register */ - -#define AT91_SPI_TPR 0x0108 /* Transmit Pointer Register */ - -#define AT91_SPI_TCR 0x010c /* Transmit Counter Register */ - -#define AT91_SPI_RNPR 0x0110 /* Receive Next Pointer Register */ - -#define AT91_SPI_RNCR 0x0114 /* Receive Next Counter Register */ - -#define AT91_SPI_TNPR 0x0118 /* Transmit Next Pointer Register */ - -#define AT91_SPI_TNCR 0x011c /* Transmit Next Counter Register */ - -#define AT91_SPI_PTCR 0x0120 /* PDC Transfer Control Register */ -#define AT91_SPI_RXTEN (0x1 << 0) /* Receiver Transfer Enable */ -#define AT91_SPI_RXTDIS (0x1 << 1) /* Receiver Transfer Disable */ -#define AT91_SPI_TXTEN (0x1 << 8) /* Transmitter Transfer Enable */ -#define AT91_SPI_TXTDIS (0x1 << 9) /* Transmitter Transfer Disable */ - -#define AT91_SPI_PTSR 0x0124 /* PDC Transfer Status Register */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91cap9.h b/include/asm-arm/arch-at91sam9/at91cap9.h deleted file mode 100644 index 0b522281386..00000000000 --- a/include/asm-arm/arch-at91sam9/at91cap9.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9.h] - * - * Copyright (C) 2007 Stelian Pop - * Copyright (C) 2007 Lead Tech Design - * Copyright (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_H -#define AT91CAP9_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ -#define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ -#define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ -#define AT91CAP9_ID_MPB2 5 /* MP Block Peripheral 2 */ -#define AT91CAP9_ID_MPB3 6 /* MP Block Peripheral 3 */ -#define AT91CAP9_ID_MPB4 7 /* MP Block Peripheral 4 */ -#define AT91CAP9_ID_US0 8 /* USART 0 */ -#define AT91CAP9_ID_US1 9 /* USART 1 */ -#define AT91CAP9_ID_US2 10 /* USART 2 */ -#define AT91CAP9_ID_MCI0 11 /* Multimedia Card Interface 0 */ -#define AT91CAP9_ID_MCI1 12 /* Multimedia Card Interface 1 */ -#define AT91CAP9_ID_CAN 13 /* CAN */ -#define AT91CAP9_ID_TWI 14 /* Two-Wire Interface */ -#define AT91CAP9_ID_SPI0 15 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SPI1 16 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SSC0 17 /* Serial Synchronous Controller 0 */ -#define AT91CAP9_ID_SSC1 18 /* Serial Synchronous Controller 1 */ -#define AT91CAP9_ID_AC97C 19 /* AC97 Controller */ -#define AT91CAP9_ID_TCB 20 /* Timer Counter 0, 1 and 2 */ -#define AT91CAP9_ID_PWMC 21 /* Pulse Width Modulation Controller */ -#define AT91CAP9_ID_EMAC 22 /* Ethernet */ -#define AT91CAP9_ID_AESTDES 23 /* Advanced Encryption Standard, Triple DES */ -#define AT91CAP9_ID_ADC 24 /* Analog-to-Digital Converter */ -#define AT91CAP9_ID_ISI 25 /* Image Sensor Interface */ -#define AT91CAP9_ID_LCDC 26 /* LCD Controller */ -#define AT91CAP9_ID_DMA 27 /* DMA Controller */ -#define AT91CAP9_ID_UDPHS 28 /* USB High Speed Device Port */ -#define AT91CAP9_ID_UHP 29 /* USB Host Port */ -#define AT91CAP9_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91CAP9_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - -/* - * User Peripheral physical base addresses. - */ -#define AT91CAP9_BASE_UDPHS 0xfff78000 -#define AT91CAP9_BASE_TCB0 0xfff7c000 -#define AT91CAP9_BASE_TC0 0xfff7c000 -#define AT91CAP9_BASE_TC1 0xfff7c040 -#define AT91CAP9_BASE_TC2 0xfff7c080 -#define AT91CAP9_BASE_MCI0 0xfff80000 -#define AT91CAP9_BASE_MCI1 0xfff84000 -#define AT91CAP9_BASE_TWI 0xfff88000 -#define AT91CAP9_BASE_US0 0xfff8c000 -#define AT91CAP9_BASE_US1 0xfff90000 -#define AT91CAP9_BASE_US2 0xfff94000 -#define AT91CAP9_BASE_SSC0 0xfff98000 -#define AT91CAP9_BASE_SSC1 0xfff9c000 -#define AT91CAP9_BASE_AC97C 0xfffa0000 -#define AT91CAP9_BASE_SPI0 0xfffa4000 -#define AT91CAP9_BASE_SPI1 0xfffa8000 -#define AT91CAP9_BASE_CAN 0xfffac000 -#define AT91CAP9_BASE_PWMC 0xfffb8000 -#define AT91CAP9_BASE_EMAC 0xfffbc000 -#define AT91CAP9_BASE_ADC 0xfffc0000 -#define AT91CAP9_BASE_ISI 0xfffc4000 -#define AT91_BASE_SYS 0xffffe200 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) -#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC (0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) -#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR_REVB (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR_REVC (0xfffffd60 - AT91_BASE_SYS) - -#define AT91_USART0 AT91CAP9_BASE_US0 -#define AT91_USART1 AT91CAP9_BASE_US1 -#define AT91_USART2 AT91CAP9_BASE_US2 - -/* - * SCKCR flags - */ -#define AT91CAP9_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */ -#define AT91CAP9_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */ -#define AT91CAP9_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */ -#define AT91CAP9_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */ -#define AT91CAP9_SCKCR_OSCSEL_RC (0 << 3) -#define AT91CAP9_SCKCR_OSCSEL_32 (1 << 3) - -/* - * Internal Memory. - */ -#define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ -#define AT91CAP9_SRAM_SIZE (32 * SZ_1K) /* Internal SRAM size (32Kb) */ - -#define AT91CAP9_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */ - -#define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91CAP9_UDPHS_BASE 0x00600000 /* USB High Speed Device Port */ -#define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ - -#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91cap9_matrix.h b/include/asm-arm/arch-at91sam9/at91cap9_matrix.h deleted file mode 100644 index 22b7e9b8f4b..00000000000 --- a/include/asm-arm/arch-at91sam9/at91cap9_matrix.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9_matrix.h] - * - * Copyright (C) 2007 Stelian Pop - * Copyright (C) 2007 Lead Tech Design - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_MATRIX_H -#define AT91CAP9_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ -#define AT91_MATRIX_SCFG9 (AT91_MATRIX + 0x64) /* Slave Configuration Register 9 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ -#define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ -#define AT91_MATRIX_PRAS9 (AT91_MATRIX + 0xC8) /* Priority Register A for Slave 9 */ -#define AT91_MATRIX_PRBS9 (AT91_MATRIX + 0xCC) /* Priority Register B for Slave 9 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ -#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ -#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_RCB9 (1 << 9) -#define AT91_MATRIX_RCB10 (1 << 10) -#define AT91_MATRIX_RCB11 (1 << 11) - -#define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */ -#define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_BCRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DQSPDC (1 << 9) /* Data Qualifier Strobe Pull-Down Configuration */ -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MPBS2_SFR (AT91_MATRIX + 0x12C) /* MPBlock Slave 2 Special Function Register */ -#define AT91_MPBS3_SFR (AT91_MATRIX + 0x130) /* MPBlock Slave 3 Special Function Register */ -#define AT91_APB_SFR (AT91_MATRIX + 0x134) /* APB Bridge Special Function Register */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9260.h b/include/asm-arm/arch-at91sam9/at91sam9260.h deleted file mode 100644 index 920a7f3c9ff..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9260.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260.h] - * - * (C) 2006 Andrew Victor - * - * Common definitions. - * Based on AT91SAM9260 datasheet revision A (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_H -#define AT91SAM9260_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9260_ID_ADC 5 /* Analog-to-Digital Converter */ -#define AT91SAM9260_ID_US0 6 /* USART 0 */ -#define AT91SAM9260_ID_US1 7 /* USART 1 */ -#define AT91SAM9260_ID_US2 8 /* USART 2 */ -#define AT91SAM9260_ID_MCI 9 /* Multimedia Card Interface */ -#define AT91SAM9260_ID_UDP 10 /* USB Device Port */ -#define AT91SAM9260_ID_TWI 11 /* Two-Wire Interface */ -#define AT91SAM9260_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT91SAM9260_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT91SAM9260_ID_SSC 14 /* Serial Synchronous Controller */ -#define AT91SAM9260_ID_TC0 17 /* Timer Counter 0 */ -#define AT91SAM9260_ID_TC1 18 /* Timer Counter 1 */ -#define AT91SAM9260_ID_TC2 19 /* Timer Counter 2 */ -#define AT91SAM9260_ID_UHP 20 /* USB Host port */ -#define AT91SAM9260_ID_EMAC 21 /* Ethernet */ -#define AT91SAM9260_ID_ISI 22 /* Image Sensor Interface */ -#define AT91SAM9260_ID_US3 23 /* USART 3 */ -#define AT91SAM9260_ID_US4 24 /* USART 4 */ -#define AT91SAM9260_ID_US5 25 /* USART 5 */ -#define AT91SAM9260_ID_TC3 26 /* Timer Counter 3 */ -#define AT91SAM9260_ID_TC4 27 /* Timer Counter 4 */ -#define AT91SAM9260_ID_TC5 28 /* Timer Counter 5 */ -#define AT91SAM9260_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9260_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91SAM9260_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9260_BASE_TCB0 0xfffa0000 -#define AT91SAM9260_BASE_TC0 0xfffa0000 -#define AT91SAM9260_BASE_TC1 0xfffa0040 -#define AT91SAM9260_BASE_TC2 0xfffa0080 -#define AT91SAM9260_BASE_UDP 0xfffa4000 -#define AT91SAM9260_BASE_MCI 0xfffa8000 -#define AT91SAM9260_BASE_TWI 0xfffac000 -#define AT91SAM9260_BASE_US0 0xfffb0000 -#define AT91SAM9260_BASE_US1 0xfffb4000 -#define AT91SAM9260_BASE_US2 0xfffb8000 -#define AT91SAM9260_BASE_SSC 0xfffbc000 -#define AT91SAM9260_BASE_ISI 0xfffc0000 -#define AT91SAM9260_BASE_EMAC 0xfffc4000 -#define AT91SAM9260_BASE_SPI0 0xfffc8000 -#define AT91SAM9260_BASE_SPI1 0xfffcc000 -#define AT91SAM9260_BASE_US3 0xfffd0000 -#define AT91SAM9260_BASE_US4 0xfffd4000 -#define AT91SAM9260_BASE_US5 0xfffd8000 -#define AT91SAM9260_BASE_TCB1 0xfffdc000 -#define AT91SAM9260_BASE_TC3 0xfffdc000 -#define AT91SAM9260_BASE_TC4 0xfffdc040 -#define AT91SAM9260_BASE_TC5 0xfffdc080 -#define AT91SAM9260_BASE_ADC 0xfffe0000 -#define AT91_BASE_SYS 0xffffe800 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9260_BASE_US0 -#define AT91_USART1 AT91SAM9260_BASE_US1 -#define AT91_USART2 AT91SAM9260_BASE_US2 -#define AT91_USART3 AT91SAM9260_BASE_US3 -#define AT91_USART4 AT91SAM9260_BASE_US4 -#define AT91_USART5 AT91SAM9260_BASE_US5 - -/* - * Internal Memory. - */ -#define AT91SAM9260_ROM_BASE 0x00100000 /* Internal ROM base address */ -#define AT91SAM9260_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9260_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ -#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ -#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ -#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ - -#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ - -#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */ -#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h b/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h deleted file mode 100644 index f8b023d9327..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9260 datasheet revision B. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_MATRIX_H -#define AT91SAM9260_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9261.h b/include/asm-arm/arch-at91sam9/at91sam9261.h deleted file mode 100644 index 752d81dfe3f..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9261.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261.h] - * - * Copyright (C) SAN People - * - * Common definitions. - * Based on AT91SAM9261 datasheet revision E. (Preliminary) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_H -#define AT91SAM9261_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9261_ID_US0 6 /* USART 0 */ -#define AT91SAM9261_ID_US1 7 /* USART 1 */ -#define AT91SAM9261_ID_US2 8 /* USART 2 */ -#define AT91SAM9261_ID_MCI 9 /* Multimedia Card Interface */ -#define AT91SAM9261_ID_UDP 10 /* USB Device Port */ -#define AT91SAM9261_ID_TWI 11 /* Two-Wire Interface */ -#define AT91SAM9261_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT91SAM9261_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT91SAM9261_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9261_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9261_ID_SSC2 16 /* Serial Synchronous Controller 2 */ -#define AT91SAM9261_ID_TC0 17 /* Timer Counter 0 */ -#define AT91SAM9261_ID_TC1 18 /* Timer Counter 1 */ -#define AT91SAM9261_ID_TC2 19 /* Timer Counter 2 */ -#define AT91SAM9261_ID_UHP 20 /* USB Host port */ -#define AT91SAM9261_ID_LCDC 21 /* LDC Controller */ -#define AT91SAM9261_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9261_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91SAM9261_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9261_BASE_TCB0 0xfffa0000 -#define AT91SAM9261_BASE_TC0 0xfffa0000 -#define AT91SAM9261_BASE_TC1 0xfffa0040 -#define AT91SAM9261_BASE_TC2 0xfffa0080 -#define AT91SAM9261_BASE_UDP 0xfffa4000 -#define AT91SAM9261_BASE_MCI 0xfffa8000 -#define AT91SAM9261_BASE_TWI 0xfffac000 -#define AT91SAM9261_BASE_US0 0xfffb0000 -#define AT91SAM9261_BASE_US1 0xfffb4000 -#define AT91SAM9261_BASE_US2 0xfffb8000 -#define AT91SAM9261_BASE_SSC0 0xfffbc000 -#define AT91SAM9261_BASE_SSC1 0xfffc0000 -#define AT91SAM9261_BASE_SSC2 0xfffc4000 -#define AT91SAM9261_BASE_SPI0 0xfffc8000 -#define AT91SAM9261_BASE_SPI1 0xfffcc000 -#define AT91_BASE_SYS 0xffffea00 - - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9261_BASE_US0 -#define AT91_USART1 AT91SAM9261_BASE_US1 -#define AT91_USART2 AT91SAM9261_BASE_US2 - - -/* - * Internal Memory. - */ -#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */ - -#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ -#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ - - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9261_matrix.h b/include/asm-arm/arch-at91sam9/at91sam9261_matrix.h deleted file mode 100644 index e2bfc4b0c9b..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9261_matrix.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_MATRIX_H -#define AT91SAM9261_MATRIX_H - -#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_ITCM_64 (7 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ - -#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ -#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9263.h b/include/asm-arm/arch-at91sam9/at91sam9263.h deleted file mode 100644 index 98251cbeee1..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9263.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h] - * - * (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_H -#define AT91SAM9263_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9263_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9263_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9263_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ -#define AT91SAM9263_ID_US0 7 /* USART 0 */ -#define AT91SAM9263_ID_US1 8 /* USART 1 */ -#define AT91SAM9263_ID_US2 9 /* USART 2 */ -#define AT91SAM9263_ID_MCI0 10 /* Multimedia Card Interface 0 */ -#define AT91SAM9263_ID_MCI1 11 /* Multimedia Card Interface 1 */ -#define AT91SAM9263_ID_CAN 12 /* CAN */ -#define AT91SAM9263_ID_TWI 13 /* Two-Wire Interface */ -#define AT91SAM9263_ID_SPI0 14 /* Serial Peripheral Interface 0 */ -#define AT91SAM9263_ID_SPI1 15 /* Serial Peripheral Interface 1 */ -#define AT91SAM9263_ID_SSC0 16 /* Serial Synchronous Controller 0 */ -#define AT91SAM9263_ID_SSC1 17 /* Serial Synchronous Controller 1 */ -#define AT91SAM9263_ID_AC97C 18 /* AC97 Controller */ -#define AT91SAM9263_ID_TCB 19 /* Timer Counter 0, 1 and 2 */ -#define AT91SAM9263_ID_PWMC 20 /* Pulse Width Modulation Controller */ -#define AT91SAM9263_ID_EMAC 21 /* Ethernet */ -#define AT91SAM9263_ID_2DGE 23 /* 2D Graphic Engine */ -#define AT91SAM9263_ID_UDP 24 /* USB Device Port */ -#define AT91SAM9263_ID_ISI 25 /* Image Sensor Interface */ -#define AT91SAM9263_ID_LCDC 26 /* LCD Controller */ -#define AT91SAM9263_ID_DMA 27 /* DMA Controller */ -#define AT91SAM9263_ID_UHP 29 /* USB Host port */ -#define AT91SAM9263_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9263_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9263_BASE_UDP 0xfff78000 -#define AT91SAM9263_BASE_TCB0 0xfff7c000 -#define AT91SAM9263_BASE_TC0 0xfff7c000 -#define AT91SAM9263_BASE_TC1 0xfff7c040 -#define AT91SAM9263_BASE_TC2 0xfff7c080 -#define AT91SAM9263_BASE_MCI0 0xfff80000 -#define AT91SAM9263_BASE_MCI1 0xfff84000 -#define AT91SAM9263_BASE_TWI 0xfff88000 -#define AT91SAM9263_BASE_US0 0xfff8c000 -#define AT91SAM9263_BASE_US1 0xfff90000 -#define AT91SAM9263_BASE_US2 0xfff94000 -#define AT91SAM9263_BASE_SSC0 0xfff98000 -#define AT91SAM9263_BASE_SSC1 0xfff9c000 -#define AT91SAM9263_BASE_AC97C 0xfffa0000 -#define AT91SAM9263_BASE_SPI0 0xfffa4000 -#define AT91SAM9263_BASE_SPI1 0xfffa8000 -#define AT91SAM9263_BASE_CAN 0xfffac000 -#define AT91SAM9263_BASE_PWMC 0xfffb8000 -#define AT91SAM9263_BASE_EMAC 0xfffbc000 -#define AT91SAM9263_BASE_ISI 0xfffc4000 -#define AT91SAM9263_BASE_2DGE 0xfffc8000 -#define AT91_BASE_SYS 0xffffe000 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) -#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) -#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) -#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) -#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) -#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9263_BASE_US0 -#define AT91_USART1 AT91SAM9263_BASE_US1 -#define AT91_USART2 AT91SAM9263_BASE_US2 - -#define AT91_SMC AT91_SMC0 - -/* - * Internal Memory. - */ -#define AT91SAM9263_SRAM0_BASE 0x00300000 /* Internal SRAM 0 base address */ -#define AT91SAM9263_SRAM0_SIZE (80 * SZ_1K) /* Internal SRAM 0 size (80Kb) */ - -#define AT91SAM9263_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9263_ROM_SIZE SZ_128K /* Internal ROM size (128Kb) */ - -#define AT91SAM9263_SRAM1_BASE 0x00500000 /* Internal SRAM 1 base address */ -#define AT91SAM9263_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ - -#define AT91SAM9263_LCDC_BASE 0x00700000 /* LCD Controller */ -#define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */ -#define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */ - - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9263_matrix.h b/include/asm-arm/arch-at91sam9/at91sam9263_matrix.h deleted file mode 100644 index 83aaaab7731..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9263_matrix.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263_matrix.h] - * - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_MATRIX_H -#define AT91SAM9263_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3) -#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9_smc.h b/include/asm-arm/arch-at91sam9/at91sam9_smc.h deleted file mode 100644 index d64511b36dd..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9_smc.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h] - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Static Memory Controllers (SMC) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9_SMC_H -#define AT91SAM9_SMC_H - -#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ -#define AT91_SMC_NWESETUP_(x) ((x) << 0) -#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ -#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) -#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ -#define AT91_SMC_NRDSETUP_(x) ((x) << 16) -#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ -#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) - -#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ -#define AT91_SMC_NWEPULSE_(x) ((x) << 0) -#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ -#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) -#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ -#define AT91_SMC_NRDPULSE_(x) ((x) << 16) -#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ -#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) - -#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ -#define AT91_SMC_NWECYCLE_(x) ((x) << 0) -#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ -#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) - -#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ -#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ -#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ -#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) -#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) -#define AT91_SMC_EXNWMODE_READY (3 << 4) -#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ -#define AT91_SMC_BAT_SELECT (0 << 8) -#define AT91_SMC_BAT_WRITE (1 << 8) -#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ -#define AT91_SMC_DBW_8 (0 << 12) -#define AT91_SMC_DBW_16 (1 << 12) -#define AT91_SMC_DBW_32 (2 << 12) -#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ -#define AT91_SMC_TDF_(x) ((x) << 16) -#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ -#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ -#define AT91_SMC_PS (3 << 28) /* Page Size */ -#define AT91_SMC_PS_4 (0 << 28) -#define AT91_SMC_PS_8 (1 << 28) -#define AT91_SMC_PS_16 (2 << 28) -#define AT91_SMC_PS_32 (3 << 28) - -#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ -#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#endif - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9rl.h b/include/asm-arm/arch-at91sam9/at91sam9rl.h deleted file mode 100644 index 215bbc8d6a7..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9rl.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl.h] - * - * Copyright (C) 2007 Atmel Corporation - * - * Common definitions. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_H -#define AT91SAM9RL_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Controller */ -#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */ -#define AT91SAM9RL_ID_US0 6 /* USART 0 */ -#define AT91SAM9RL_ID_US1 7 /* USART 1 */ -#define AT91SAM9RL_ID_US2 8 /* USART 2 */ -#define AT91SAM9RL_ID_US3 9 /* USART 3 */ -#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */ -#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */ -#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */ -#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */ -#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */ -#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */ -#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */ -#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */ -#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */ -#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */ -#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */ -#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9RL_BASE_TCB0 0xfffa0000 -#define AT91SAM9RL_BASE_TC0 0xfffa0000 -#define AT91SAM9RL_BASE_TC1 0xfffa0040 -#define AT91SAM9RL_BASE_TC2 0xfffa0080 -#define AT91SAM9RL_BASE_MCI 0xfffa4000 -#define AT91SAM9RL_BASE_TWI0 0xfffa8000 -#define AT91SAM9RL_BASE_TWI1 0xfffac000 -#define AT91SAM9RL_BASE_US0 0xfffb0000 -#define AT91SAM9RL_BASE_US1 0xfffb4000 -#define AT91SAM9RL_BASE_US2 0xfffb8000 -#define AT91SAM9RL_BASE_US3 0xfffbc000 -#define AT91SAM9RL_BASE_SSC0 0xfffc0000 -#define AT91SAM9RL_BASE_SSC1 0xfffc4000 -#define AT91SAM9RL_BASE_PWMC 0xfffc8000 -#define AT91SAM9RL_BASE_SPI 0xfffcc000 -#define AT91SAM9RL_BASE_TSC 0xfffd0000 -#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 -#define AT91SAM9RL_BASE_AC97C 0xfffd8000 -#define AT91_BASE_SYS 0xffffc000 - - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9RL_BASE_US0 -#define AT91_USART1 AT91SAM9RL_BASE_US1 -#define AT91_USART2 AT91SAM9RL_BASE_US2 -#define AT91_USART3 AT91SAM9RL_BASE_US3 - - -/* - * Internal Memory. - */ -#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ - -#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */ - -#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */ - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9rl_matrix.h b/include/asm-arm/arch-at91sam9/at91sam9rl_matrix.h deleted file mode 100644 index af8d914acc4..00000000000 --- a/include/asm-arm/arch-at91sam9/at91sam9rl_matrix.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_MATRIX_H -#define AT91SAM9RL_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - - -#endif diff --git a/include/asm-arm/arch-at91sam9/clk.h b/include/asm-arm/arch-at91sam9/clk.h deleted file mode 100644 index 1b502c822cd..00000000000 --- a/include/asm-arm/arch-at91sam9/clk.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2007 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_CLK_H__ -#define __ASM_ARM_ARCH_CLK_H__ - -#include - -static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) -{ - return AT91_MASTER_CLOCK; -} - -static inline unsigned long get_usart_clk_rate(unsigned int dev_id) -{ - return AT91_MASTER_CLOCK; -} - -static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) -{ - return AT91_MASTER_CLOCK; -} - - -#endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/include/asm-arm/arch-at91sam9/gpio.h b/include/asm-arm/arch-at91sam9/gpio.h deleted file mode 100644 index c4d7b971beb..00000000000 --- a/include/asm-arm/arch-at91sam9/gpio.h +++ /dev/null @@ -1,366 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h] - * - * Copyright (C) 2005 HP Labs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_AT91_GPIO_H -#define __ASM_ARCH_AT91_GPIO_H - -#include -#include -#include - -#define PIN_BASE 32 - -#define MAX_GPIO_BANKS 5 - -/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ - -#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) -#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) -#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) -#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) -#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) -#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) -#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) -#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) -#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) -#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) -#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) -#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) -#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) -#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) -#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) -#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) -#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) -#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) -#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) -#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) -#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) -#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) -#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) -#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) -#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) -#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) -#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) -#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) -#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) -#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) -#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) -#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) - -#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) -#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) -#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) -#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) -#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) -#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) -#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) -#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) -#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) -#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) -#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) -#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) -#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) -#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) -#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) -#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) -#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) -#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) -#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) -#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) -#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) -#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) -#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) -#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) -#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) -#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) -#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) -#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) -#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) -#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) -#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) -#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) - -#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) -#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) -#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) -#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) -#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) -#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) -#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) -#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) -#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) -#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) -#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) -#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) -#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) -#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) -#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) -#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) -#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) -#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) -#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) -#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) -#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) -#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) -#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) -#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) -#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) -#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) -#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) -#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) -#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) -#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) -#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) -#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) - -#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) -#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) -#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) -#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) -#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) -#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) -#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) -#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) -#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) -#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) -#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) -#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) -#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) -#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) -#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) -#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) -#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) -#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) -#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) -#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) -#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) -#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) -#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) -#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) -#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) -#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) -#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) -#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) -#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) -#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) -#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) -#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) - -#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) -#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) -#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) -#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) -#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) -#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) -#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) -#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) -#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) -#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) -#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) -#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) -#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) -#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) -#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) -#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) -#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) -#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) -#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) -#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) -#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) -#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) -#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) -#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) -#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) -#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) -#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) -#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) -#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) -#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) -#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) -#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) - -static unsigned long at91_pios[] = { - AT91_PIOA, - AT91_PIOB, - AT91_PIOC, -#ifdef AT91_PIOD - AT91_PIOD, -#ifdef AT91_PIOE - AT91_PIOE -#endif -#endif -}; - -static inline void *pin_to_controller(unsigned pin) -{ - pin -= PIN_BASE; - pin /= 32; - return (void *)(AT91_BASE_SYS + at91_pios[pin]); -} - -static inline unsigned pin_to_mask(unsigned pin) -{ - pin -= PIN_BASE; - return 1 << (pin % 32); -} - -/* - * mux the pin to the "GPIO" peripheral role. - */ -static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + PIO_IDR); - __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); - __raw_writel(mask, pio + PIO_PER); - return 0; -} - -/* - * mux the pin to the "A" internal peripheral role. - */ -static inline int at91_set_A_periph(unsigned pin, int use_pullup) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + PIO_IDR); - __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); - __raw_writel(mask, pio + PIO_ASR); - __raw_writel(mask, pio + PIO_PDR); - return 0; -} - -/* - * mux the pin to the "B" internal peripheral role. - */ -static inline int at91_set_B_periph(unsigned pin, int use_pullup) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + PIO_IDR); - __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); - __raw_writel(mask, pio + PIO_BSR); - __raw_writel(mask, pio + PIO_PDR); - return 0; -} - -/* - * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and - * configure it for an input. - */ -static inline int at91_set_gpio_input(unsigned pin, int use_pullup) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + PIO_IDR); - __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR)); - __raw_writel(mask, pio + PIO_ODR); - __raw_writel(mask, pio + PIO_PER); - return 0; -} - -/* - * mux the pin to the gpio controller (instead of "A" or "B" peripheral), - * and configure it for an output. - */ -static inline int at91_set_gpio_output(unsigned pin, int value) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + PIO_IDR); - __raw_writel(mask, pio + PIO_PUDR); - __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); - __raw_writel(mask, pio + PIO_OER); - __raw_writel(mask, pio + PIO_PER); - return 0; -} - -/* - * enable/disable the glitch filter; mostly used with IRQ handling. - */ -static inline int at91_set_deglitch(unsigned pin, int is_on) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); - return 0; -} - -/* - * enable/disable the multi-driver; This is only valid for output and - * allows the output pin to run as an open collector output. - */ -static inline int at91_set_multi_drive(unsigned pin, int is_on) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR)); - return 0; -} - -static inline int gpio_direction_input(unsigned pin) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - if (!(__raw_readl(pio + PIO_PSR) & mask)) - return -EINVAL; - __raw_writel(mask, pio + PIO_ODR); - return 0; -} - -static inline int gpio_direction_output(unsigned pin, int value) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - if (!(__raw_readl(pio + PIO_PSR) & mask)) - return -EINVAL; - __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); - __raw_writel(mask, pio + PIO_OER); - return 0; -} - -/* - * assuming the pin is muxed as a gpio output, set its value. - */ -static inline int at91_set_gpio_value(unsigned pin, int value) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); - return 0; -} - -/* - * read the pin's value (works even if it's not muxed as a gpio). - */ -static inline int at91_get_gpio_value(unsigned pin) -{ - void *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - u32 pdsr; - - pdsr = __raw_readl(pio + PIO_PDSR); - return (pdsr & mask) != 0; -} - -#endif diff --git a/include/asm-arm/arch-at91sam9/hardware.h b/include/asm-arm/arch-at91sam9/hardware.h deleted file mode 100644 index f31241901a3..00000000000 --- a/include/asm-arm/arch-at91sam9/hardware.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/hardware.h] - * - * Copyright (C) 2003 SAN People - * Copyright (C) 2003 ATMEL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -#if defined(CONFIG_AT91RM9200) -#include -#elif defined(CONFIG_AT91SAM9260) -#include -#define AT91_BASE_EMAC AT91SAM9260_BASE_EMAC -#define AT91_BASE_SPI AT91SAM9260_BASE_SPI0 -#define AT91_ID_UHP AT91SAM9260_ID_UHP -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91SAM9261) -#include -#define AT91_BASE_SPI AT91SAM9261_BASE_SPI0 -#define AT91_ID_UHP AT91SAM9261_ID_UHP -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91SAM9263) -#include -#define AT91_BASE_EMAC AT91SAM9263_BASE_EMAC -#define AT91_BASE_SPI AT91SAM9263_BASE_SPI0 -#define AT91_ID_UHP AT91SAM9263_ID_UHP -#define AT91_PMC_UHP AT91SAM926x_PMC_UHP -#elif defined(CONFIG_AT91SAM9RL) -#include -#define AT91_BASE_SPI AT91SAM9RL_BASE_SPI -#define AT91_ID_UHP AT91SAM9RL_ID_UHP -#elif defined(CONFIG_AT91CAP9) -#include -#define AT91_BASE_EMAC AT91CAP9_BASE_EMAC -#define AT91_BASE_SPI AT91CAP9_BASE_SPI0 -#define AT91_ID_UHP AT91CAP9_ID_UHP -#define AT91_PMC_UHP AT91CAP9_PMC_UHP -#elif defined(CONFIG_AT91X40) -#include -#else -#error "Unsupported AT91 processor" -#endif - -#endif diff --git a/include/asm-arm/arch-at91sam9/io.h b/include/asm-arm/arch-at91sam9/io.h deleted file mode 100644 index f09b2df0e31..00000000000 --- a/include/asm-arm/arch-at91sam9/io.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/io.h] - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include - -static inline unsigned int at91_sys_read(unsigned int reg_offset) -{ - void *addr = (void *)AT91_BASE_SYS; - - return __raw_readl(addr + reg_offset); -} - -static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) -{ - void *addr = (void *)AT91_BASE_SYS; - - __raw_writel(value, addr + reg_offset); -} - -#endif diff --git a/include/asm-arm/arch-at91sam9/memory-map.h b/include/asm-arm/arch-at91sam9/memory-map.h deleted file mode 100644 index 8015dad6a9c..00000000000 --- a/include/asm-arm/arch-at91sam9/memory-map.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_MEMORYMAP_H__ -#define __ASM_ARM_ARCH_MEMORYMAP_H__ - -#include - -#define USART0_BASE AT91_USART0 -#define USART1_BASE AT91_USART1 -#define USART2_BASE AT91_USART2 -#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU) - -#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */ -- cgit v1.3.1 From f5acb9fd9bba1160de3ef349c7d33fe510eda286 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 13 Aug 2008 01:40:09 +0200 Subject: mx31: move freescale's mx31 boards to vendor board dir Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- Makefile | 2 +- board/freescale/mx31ads/Makefile | 47 ++++++ board/freescale/mx31ads/config.mk | 1 + board/freescale/mx31ads/lowlevel_init.S | 281 ++++++++++++++++++++++++++++++++ board/freescale/mx31ads/mx31ads.c | 106 ++++++++++++ board/freescale/mx31ads/u-boot.lds | 70 ++++++++ board/mx31ads/Makefile | 47 ------ board/mx31ads/config.mk | 1 - board/mx31ads/lowlevel_init.S | 281 -------------------------------- board/mx31ads/mx31ads.c | 106 ------------ board/mx31ads/u-boot.lds | 70 -------- 11 files changed, 506 insertions(+), 506 deletions(-) create mode 100644 board/freescale/mx31ads/Makefile create mode 100644 board/freescale/mx31ads/config.mk create mode 100644 board/freescale/mx31ads/lowlevel_init.S create mode 100644 board/freescale/mx31ads/mx31ads.c create mode 100644 board/freescale/mx31ads/u-boot.lds delete mode 100644 board/mx31ads/Makefile delete mode 100644 board/mx31ads/config.mk delete mode 100644 board/mx31ads/lowlevel_init.S delete mode 100644 board/mx31ads/mx31ads.c delete mode 100644 board/mx31ads/u-boot.lds (limited to 'Makefile') diff --git a/Makefile b/Makefile index 6624370a889..0defeca97fb 100644 --- a/Makefile +++ b/Makefile @@ -2681,7 +2681,7 @@ imx31_phycore_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31 mx31ads_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31 + @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31 omap2420h4_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx diff --git a/board/freescale/mx31ads/Makefile b/board/freescale/mx31ads/Makefile new file mode 100644 index 00000000000..a12f39174be --- /dev/null +++ b/board/freescale/mx31ads/Makefile @@ -0,0 +1,47 @@ +# +# Copyright (C) 2008, Guennadi Liakhovetski +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := mx31ads.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mx31ads/config.mk b/board/freescale/mx31ads/config.mk new file mode 100644 index 00000000000..d34dc02d96a --- /dev/null +++ b/board/freescale/mx31ads/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x87f00000 diff --git a/board/freescale/mx31ads/lowlevel_init.S b/board/freescale/mx31ads/lowlevel_init.S new file mode 100644 index 00000000000..e16605836be --- /dev/null +++ b/board/freescale/mx31ads/lowlevel_init.S @@ -0,0 +1,281 @@ +/* + * Copyright (C) 2008, Guennadi Liakhovetski + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +.macro REG reg, val + ldr r2, =\reg + ldr r3, =\val + str r3, [r2] +.endm + +.macro REG8 reg, val + ldr r2, =\reg + ldr r3, =\val + strb r3, [r2] +.endm + +.macro DELAY loops + ldr r2, =\loops +1: + subs r2, r2, #1 + nop + bcs 1b +.endm + +/* RedBoot: AIPS setup - Only setup MPROTx registers. + * The PACR default values are good.*/ +.macro init_aips + /* + * Set all MPROTx to be non-bufferable, trusted for R/W, + * not forced to user-mode. + */ + ldr r0, =0x43F00000 + ldr r1, =0x77777777 + str r1, [r0, #0x00] + str r1, [r0, #0x04] + ldr r0, =0x53F00000 + str r1, [r0, #0x00] + str r1, [r0, #0x04] + + /* + * Clear the on and off peripheral modules Supervisor Protect bit + * for SDMA to access them. Did not change the AIPS control registers + * (offset 0x20) access type + */ + ldr r0, =0x43F00000 + ldr r1, =0x0 + str r1, [r0, #0x40] + str r1, [r0, #0x44] + str r1, [r0, #0x48] + str r1, [r0, #0x4C] + ldr r1, [r0, #0x50] + and r1, r1, #0x00FFFFFF + str r1, [r0, #0x50] + + ldr r0, =0x53F00000 + ldr r1, =0x0 + str r1, [r0, #0x40] + str r1, [r0, #0x44] + str r1, [r0, #0x48] + str r1, [r0, #0x4C] + ldr r1, [r0, #0x50] + and r1, r1, #0x00FFFFFF + str r1, [r0, #0x50] +.endm /* init_aips */ + +/* RedBoot: MAX (Multi-Layer AHB Crossbar Switch) setup */ +.macro init_max + ldr r0, =0x43F04000 + /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ + ldr r1, =0x00302154 + str r1, [r0, #0x000] /* for S0 */ + str r1, [r0, #0x100] /* for S1 */ + str r1, [r0, #0x200] /* for S2 */ + str r1, [r0, #0x300] /* for S3 */ + str r1, [r0, #0x400] /* for S4 */ + /* SGPCR - always park on last master */ + ldr r1, =0x10 + str r1, [r0, #0x010] /* for S0 */ + str r1, [r0, #0x110] /* for S1 */ + str r1, [r0, #0x210] /* for S2 */ + str r1, [r0, #0x310] /* for S3 */ + str r1, [r0, #0x410] /* for S4 */ + /* MGPCR - restore default values */ + ldr r1, =0x0 + str r1, [r0, #0x800] /* for M0 */ + str r1, [r0, #0x900] /* for M1 */ + str r1, [r0, #0xA00] /* for M2 */ + str r1, [r0, #0xB00] /* for M3 */ + str r1, [r0, #0xC00] /* for M4 */ + str r1, [r0, #0xD00] /* for M5 */ +.endm /* init_max */ + +/* RedBoot: M3IF setup */ +.macro init_m3if + /* Configure M3IF registers */ + ldr r1, =0xB8003000 + /* + * M3IF Control Register (M3IFCTL) + * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 + * MRRP[1] = L2CC1 not on priority list (0 << 0) = 0x00000000 + * MRRP[2] = MBX not on priority list (0 << 0) = 0x00000000 + * MRRP[3] = MAX1 not on priority list (0 << 0) = 0x00000000 + * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 + * MRRP[5] = MPEG4 not on priority list (0 << 0) = 0x00000000 + * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 + * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 + * ------------ + * 0x00000040 + */ + ldr r0, =0x00000040 + str r0, [r1] /* M3IF control reg */ +.endm /* init_m3if */ + +/* RedBoot: To support 133MHz DDR */ +.macro init_drive_strength + /* + * Disable maximum drive strength SDRAM/DDR lines by clearing DSE1 bits + * in SW_PAD_CTL registers + */ + + /* SDCLK */ + ldr r1, =0x43FAC200 + ldr r0, [r1, #0x6C] + bic r0, r0, #(1 << 12) + str r0, [r1, #0x6C] + + /* CAS */ + ldr r0, [r1, #0x70] + bic r0, r0, #(1 << 22) + str r0, [r1, #0x70] + + /* RAS */ + ldr r0, [r1, #0x74] + bic r0, r0, #(1 << 2) + str r0, [r1, #0x74] + + /* CS2 (CSD0) */ + ldr r0, [r1, #0x7C] + bic r0, r0, #(1 << 22) + str r0, [r1, #0x7C] + + /* DQM3 */ + ldr r0, [r1, #0x84] + bic r0, r0, #(1 << 22) + str r0, [r1, #0x84] + + /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */ + ldr r2, =22 /* (0x2E0 - 0x288) / 4 = 22 */ +pad_loop: + ldr r0, [r1, #0x88] + bic r0, r0, #(1 << 22) + bic r0, r0, #(1 << 12) + bic r0, r0, #(1 << 2) + str r0, [r1, #0x88] + add r1, r1, #4 + subs r2, r2, #0x1 + bne pad_loop +.endm /* init_drive_strength */ + +/* CPLD on CS4 setup */ +.macro init_cs4 + ldr r0, =WEIM_BASE + ldr r1, =0x0000D843 + str r1, [r0, #0x40] + ldr r1, =0x22252521 + str r1, [r0, #0x44] + ldr r1, =0x22220A00 + str r1, [r0, #0x48] +.endm /* init_cs4 */ + +.globl lowlevel_init +lowlevel_init: + + /* Redboot initializes very early AIPS, what for? + * Then it also initializes Multi-Layer AHB Crossbar Switch, + * M3IF */ + /* Also setup the Peripheral Port Remap register inside the core */ + ldr r0, =0x40000015 /* start from AIPS 2GB region */ + mcr p15, 0, r0, c15, c2, 4 + + init_aips + + init_max + + init_m3if + + init_drive_strength + + init_cs4 + + /* Image Processing Unit: */ + /* Too early to switch display on? */ + REG IPU_CONF, IPU_CONF_DI_EN /* Switch on Display Interface */ + /* Clock Control Module: */ + REG CCM_CCMR, 0x074B0BF5 /* Use CKIH, MCU PLL off */ + + DELAY 0x40000 + + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE /* MCU PLL on */ + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS /* Switch to MCU PLL */ + + /* PBC CPLD on CS4 */ + mov r1, #CS4_BASE + ldrh r1, [r1, #0x2] + /* Is 27MHz switch set? */ + ands r1, r1, #0x10 + + /* 532-133-66.5 */ + ldr r0, =CCM_BASE + ldr r1, =0xFF871D58 + /* PDR0 */ + str r1, [r0, #0x4] + ldreq r1, MPCTL_PARAM_532 + ldrne r1, MPCTL_PARAM_532_27 + /* MPCTL */ + str r1, [r0, #0x10] + + /* Set UPLL=240MHz, USB=60MHz */ + ldr r1, =0x49FCFE7F + /* PDR1 */ + str r1, [r0, #0x8] + ldreq r1, UPCTL_PARAM_240 + ldrne r1, UPCTL_PARAM_240_27 + /* UPCTL */ + str r1, [r0, #0x14] + /* default CLKO to 1/8 of the ARM core */ + mov r1, #0x000002C0 + add r1, r1, #0x00000006 + /* COSR */ + str r1, [r0, #0x1c] + + /* RedBoot sets 0x1ff, 7, 3, 5, 1, 3, 0 */ +/* REG CCM_PDR0, PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) | PDR0_MCU_PODF(0)*/ + + /* Redboot: 0, 51, 10, 12 / 0, 14, 9, 13 */ +/* REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0x33) | PLL_MFI(7) | PLL_MFN(0x23)*/ + /* Default: 1, 4, 12, 1 */ + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1) + + /* B8xxxxxx - NAND, 8xxxxxxx - CSD0 RAM */ + REG 0xB8001010, 0x00000004 + REG 0xB8001004, 0x006ac73a + REG 0xB8001000, 0x92100000 + REG 0x80000f00, 0x12344321 + REG 0xB8001000, 0xa2100000 + REG 0x80000000, 0x12344321 + REG 0x80000000, 0x12344321 + REG 0xB8001000, 0xb2100000 + REG8 0x80000033, 0xda + REG8 0x81000000, 0xff + REG 0xB8001000, 0x82226080 + REG 0x80000000, 0xDEADBEEF + REG 0xB8001010, 0x0000000c + + mov pc, lr + +MPCTL_PARAM_532: + .word (((1-1) << 26) + ((52-1) << 16) + (10 << 10) + (12 << 0)) +MPCTL_PARAM_532_27: + .word (((1-1) << 26) + ((15-1) << 16) + (9 << 10) + (13 << 0)) +UPCTL_PARAM_240: + .word (((2-1) << 26) + ((13-1) << 16) + (9 << 10) + (3 << 0)) +UPCTL_PARAM_240_27: + .word (((2-1) << 26) + ((9 -1) << 16) + (8 << 10) + (8 << 0)) diff --git a/board/freescale/mx31ads/mx31ads.c b/board/freescale/mx31ads/mx31ads.c new file mode 100644 index 00000000000..c24c47c57f8 --- /dev/null +++ b/board/freescale/mx31ads/mx31ads.c @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2008, Guennadi Liakhovetski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init (void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +int board_init (void) +{ + int i; + + /* CS0: Nor Flash */ + /* + * CS0L and CS0A values are from the RedBoot sources by Freescale + * and are also equal to those used by Sascha Hauer for the Phytec + * i.MX31 board. CS0U is just a slightly optimized hardware default: + * the only non-zero field "Wait State Control" is set to half the + * default value. + */ + __REG(CSCR_U(0)) = 0x00000f00; + __REG(CSCR_L(0)) = 0x10000D03; + __REG(CSCR_A(0)) = 0x00720900; + + /* setup pins for UART1 */ + mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); + mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); + mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); + + /* SPI2 */ + mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B); + mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); + mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); + mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI); + mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO); + mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B); + mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B); + + /* start SPI2 clock */ + __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4); + + /* PBC setup */ + /* Enable UART transceivers also reset the Ethernet/external UART */ + readw(CS4_BASE + 4); + + writew(0x8023, CS4_BASE + 4); + + /* RedBoot also has an empty loop with 100000 iterations here - + * clock doesn't run yet */ + for (i = 0; i < 100000; i++) + ; + + /* Clear the reset, toggle the LEDs */ + writew(0xDF, CS4_BASE + 6); + + /* clock still doesn't run */ + for (i = 0; i < 100000; i++) + ; + + /* See 1.5.4 in IMX31ADSE_PERI_BUS_CNTRL_CPLD_RM.pdf */ + readb(CS4_BASE + 8); + readb(CS4_BASE + 7); + readb(CS4_BASE + 8); + readb(CS4_BASE + 7); + + gd->bd->bi_arch_number = MACH_TYPE_MX31ADS; /* board id for linux */ + gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */ + + return 0; +} + +int checkboard (void) +{ + printf("Board: MX31ADS\n"); + return 0; +} diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds new file mode 100644 index 00000000000..c379460c9b0 --- /dev/null +++ b/board/freescale/mx31ads/u-boot.lds @@ -0,0 +1,70 @@ +/* + * January 2004 - Changed to support H4 device + * Copyright (c) 2004 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/arm1136/start.o (.text) + board/freescale/mx31ads/libmx31ads.a (.text) + lib_arm/libarm.a (.text) + net/libnet.a (.text) + drivers/mtd/libmtd.a (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/environment.o(.text) + + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/board/mx31ads/Makefile b/board/mx31ads/Makefile deleted file mode 100644 index a12f39174be..00000000000 --- a/board/mx31ads/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -# -# Copyright (C) 2008, Guennadi Liakhovetski -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS := mx31ads.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/mx31ads/config.mk b/board/mx31ads/config.mk deleted file mode 100644 index d34dc02d96a..00000000000 --- a/board/mx31ads/config.mk +++ /dev/null @@ -1 +0,0 @@ -TEXT_BASE = 0x87f00000 diff --git a/board/mx31ads/lowlevel_init.S b/board/mx31ads/lowlevel_init.S deleted file mode 100644 index e16605836be..00000000000 --- a/board/mx31ads/lowlevel_init.S +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (C) 2008, Guennadi Liakhovetski - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -.macro REG reg, val - ldr r2, =\reg - ldr r3, =\val - str r3, [r2] -.endm - -.macro REG8 reg, val - ldr r2, =\reg - ldr r3, =\val - strb r3, [r2] -.endm - -.macro DELAY loops - ldr r2, =\loops -1: - subs r2, r2, #1 - nop - bcs 1b -.endm - -/* RedBoot: AIPS setup - Only setup MPROTx registers. - * The PACR default values are good.*/ -.macro init_aips - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - ldr r0, =0x43F00000 - ldr r1, =0x77777777 - str r1, [r0, #0x00] - str r1, [r0, #0x04] - ldr r0, =0x53F00000 - str r1, [r0, #0x00] - str r1, [r0, #0x04] - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - ldr r0, =0x43F00000 - ldr r1, =0x0 - str r1, [r0, #0x40] - str r1, [r0, #0x44] - str r1, [r0, #0x48] - str r1, [r0, #0x4C] - ldr r1, [r0, #0x50] - and r1, r1, #0x00FFFFFF - str r1, [r0, #0x50] - - ldr r0, =0x53F00000 - ldr r1, =0x0 - str r1, [r0, #0x40] - str r1, [r0, #0x44] - str r1, [r0, #0x48] - str r1, [r0, #0x4C] - ldr r1, [r0, #0x50] - and r1, r1, #0x00FFFFFF - str r1, [r0, #0x50] -.endm /* init_aips */ - -/* RedBoot: MAX (Multi-Layer AHB Crossbar Switch) setup */ -.macro init_max - ldr r0, =0x43F04000 - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ - ldr r1, =0x00302154 - str r1, [r0, #0x000] /* for S0 */ - str r1, [r0, #0x100] /* for S1 */ - str r1, [r0, #0x200] /* for S2 */ - str r1, [r0, #0x300] /* for S3 */ - str r1, [r0, #0x400] /* for S4 */ - /* SGPCR - always park on last master */ - ldr r1, =0x10 - str r1, [r0, #0x010] /* for S0 */ - str r1, [r0, #0x110] /* for S1 */ - str r1, [r0, #0x210] /* for S2 */ - str r1, [r0, #0x310] /* for S3 */ - str r1, [r0, #0x410] /* for S4 */ - /* MGPCR - restore default values */ - ldr r1, =0x0 - str r1, [r0, #0x800] /* for M0 */ - str r1, [r0, #0x900] /* for M1 */ - str r1, [r0, #0xA00] /* for M2 */ - str r1, [r0, #0xB00] /* for M3 */ - str r1, [r0, #0xC00] /* for M4 */ - str r1, [r0, #0xD00] /* for M5 */ -.endm /* init_max */ - -/* RedBoot: M3IF setup */ -.macro init_m3if - /* Configure M3IF registers */ - ldr r1, =0xB8003000 - /* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = MBX not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = MPEG4 not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ - ldr r0, =0x00000040 - str r0, [r1] /* M3IF control reg */ -.endm /* init_m3if */ - -/* RedBoot: To support 133MHz DDR */ -.macro init_drive_strength - /* - * Disable maximum drive strength SDRAM/DDR lines by clearing DSE1 bits - * in SW_PAD_CTL registers - */ - - /* SDCLK */ - ldr r1, =0x43FAC200 - ldr r0, [r1, #0x6C] - bic r0, r0, #(1 << 12) - str r0, [r1, #0x6C] - - /* CAS */ - ldr r0, [r1, #0x70] - bic r0, r0, #(1 << 22) - str r0, [r1, #0x70] - - /* RAS */ - ldr r0, [r1, #0x74] - bic r0, r0, #(1 << 2) - str r0, [r1, #0x74] - - /* CS2 (CSD0) */ - ldr r0, [r1, #0x7C] - bic r0, r0, #(1 << 22) - str r0, [r1, #0x7C] - - /* DQM3 */ - ldr r0, [r1, #0x84] - bic r0, r0, #(1 << 22) - str r0, [r1, #0x84] - - /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */ - ldr r2, =22 /* (0x2E0 - 0x288) / 4 = 22 */ -pad_loop: - ldr r0, [r1, #0x88] - bic r0, r0, #(1 << 22) - bic r0, r0, #(1 << 12) - bic r0, r0, #(1 << 2) - str r0, [r1, #0x88] - add r1, r1, #4 - subs r2, r2, #0x1 - bne pad_loop -.endm /* init_drive_strength */ - -/* CPLD on CS4 setup */ -.macro init_cs4 - ldr r0, =WEIM_BASE - ldr r1, =0x0000D843 - str r1, [r0, #0x40] - ldr r1, =0x22252521 - str r1, [r0, #0x44] - ldr r1, =0x22220A00 - str r1, [r0, #0x48] -.endm /* init_cs4 */ - -.globl lowlevel_init -lowlevel_init: - - /* Redboot initializes very early AIPS, what for? - * Then it also initializes Multi-Layer AHB Crossbar Switch, - * M3IF */ - /* Also setup the Peripheral Port Remap register inside the core */ - ldr r0, =0x40000015 /* start from AIPS 2GB region */ - mcr p15, 0, r0, c15, c2, 4 - - init_aips - - init_max - - init_m3if - - init_drive_strength - - init_cs4 - - /* Image Processing Unit: */ - /* Too early to switch display on? */ - REG IPU_CONF, IPU_CONF_DI_EN /* Switch on Display Interface */ - /* Clock Control Module: */ - REG CCM_CCMR, 0x074B0BF5 /* Use CKIH, MCU PLL off */ - - DELAY 0x40000 - - REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE /* MCU PLL on */ - REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS /* Switch to MCU PLL */ - - /* PBC CPLD on CS4 */ - mov r1, #CS4_BASE - ldrh r1, [r1, #0x2] - /* Is 27MHz switch set? */ - ands r1, r1, #0x10 - - /* 532-133-66.5 */ - ldr r0, =CCM_BASE - ldr r1, =0xFF871D58 - /* PDR0 */ - str r1, [r0, #0x4] - ldreq r1, MPCTL_PARAM_532 - ldrne r1, MPCTL_PARAM_532_27 - /* MPCTL */ - str r1, [r0, #0x10] - - /* Set UPLL=240MHz, USB=60MHz */ - ldr r1, =0x49FCFE7F - /* PDR1 */ - str r1, [r0, #0x8] - ldreq r1, UPCTL_PARAM_240 - ldrne r1, UPCTL_PARAM_240_27 - /* UPCTL */ - str r1, [r0, #0x14] - /* default CLKO to 1/8 of the ARM core */ - mov r1, #0x000002C0 - add r1, r1, #0x00000006 - /* COSR */ - str r1, [r0, #0x1c] - - /* RedBoot sets 0x1ff, 7, 3, 5, 1, 3, 0 */ -/* REG CCM_PDR0, PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) | PDR0_MCU_PODF(0)*/ - - /* Redboot: 0, 51, 10, 12 / 0, 14, 9, 13 */ -/* REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0x33) | PLL_MFI(7) | PLL_MFN(0x23)*/ - /* Default: 1, 4, 12, 1 */ - REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1) - - /* B8xxxxxx - NAND, 8xxxxxxx - CSD0 RAM */ - REG 0xB8001010, 0x00000004 - REG 0xB8001004, 0x006ac73a - REG 0xB8001000, 0x92100000 - REG 0x80000f00, 0x12344321 - REG 0xB8001000, 0xa2100000 - REG 0x80000000, 0x12344321 - REG 0x80000000, 0x12344321 - REG 0xB8001000, 0xb2100000 - REG8 0x80000033, 0xda - REG8 0x81000000, 0xff - REG 0xB8001000, 0x82226080 - REG 0x80000000, 0xDEADBEEF - REG 0xB8001010, 0x0000000c - - mov pc, lr - -MPCTL_PARAM_532: - .word (((1-1) << 26) + ((52-1) << 16) + (10 << 10) + (12 << 0)) -MPCTL_PARAM_532_27: - .word (((1-1) << 26) + ((15-1) << 16) + (9 << 10) + (13 << 0)) -UPCTL_PARAM_240: - .word (((2-1) << 26) + ((13-1) << 16) + (9 << 10) + (3 << 0)) -UPCTL_PARAM_240_27: - .word (((2-1) << 26) + ((9 -1) << 16) + (8 << 10) + (8 << 0)) diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c deleted file mode 100644 index c24c47c57f8..00000000000 --- a/board/mx31ads/mx31ads.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (C) 2008, Guennadi Liakhovetski - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -int board_init (void) -{ - int i; - - /* CS0: Nor Flash */ - /* - * CS0L and CS0A values are from the RedBoot sources by Freescale - * and are also equal to those used by Sascha Hauer for the Phytec - * i.MX31 board. CS0U is just a slightly optimized hardware default: - * the only non-zero field "Wait State Control" is set to half the - * default value. - */ - __REG(CSCR_U(0)) = 0x00000f00; - __REG(CSCR_L(0)) = 0x10000D03; - __REG(CSCR_A(0)) = 0x00720900; - - /* setup pins for UART1 */ - mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); - mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); - mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); - - /* SPI2 */ - mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B); - mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); - mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); - mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI); - mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO); - mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B); - mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B); - - /* start SPI2 clock */ - __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4); - - /* PBC setup */ - /* Enable UART transceivers also reset the Ethernet/external UART */ - readw(CS4_BASE + 4); - - writew(0x8023, CS4_BASE + 4); - - /* RedBoot also has an empty loop with 100000 iterations here - - * clock doesn't run yet */ - for (i = 0; i < 100000; i++) - ; - - /* Clear the reset, toggle the LEDs */ - writew(0xDF, CS4_BASE + 6); - - /* clock still doesn't run */ - for (i = 0; i < 100000; i++) - ; - - /* See 1.5.4 in IMX31ADSE_PERI_BUS_CNTRL_CPLD_RM.pdf */ - readb(CS4_BASE + 8); - readb(CS4_BASE + 7); - readb(CS4_BASE + 8); - readb(CS4_BASE + 7); - - gd->bd->bi_arch_number = MACH_TYPE_MX31ADS; /* board id for linux */ - gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */ - - return 0; -} - -int checkboard (void) -{ - printf("Board: MX31ADS\n"); - return 0; -} diff --git a/board/mx31ads/u-boot.lds b/board/mx31ads/u-boot.lds deleted file mode 100644 index 49713d454a2..00000000000 --- a/board/mx31ads/u-boot.lds +++ /dev/null @@ -1,70 +0,0 @@ -/* - * January 2004 - Changed to support H4 device - * Copyright (c) 2004 Texas Instruments - * - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/arm1136/start.o (.text) - board/mx31ads/libmx31ads.a (.text) - lib_arm/libarm.a (.text) - net/libnet.a (.text) - drivers/mtd/libmtd.a (.text) - - . = DEFINED(env_offset) ? env_offset : .; - common/environment.o(.text) - - *(.text) - } - - . = ALIGN(4); - .rodata : { *(.rodata) } - - . = ALIGN(4); - .data : { *(.data) } - - . = ALIGN(4); - .got : { *(.got) } - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; -} -- cgit v1.3.1