From 643be9c07e1c2abcc45d0efd4bbe562c4cb8dcaa Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Thu, 4 Jul 2013 12:29:17 +0530 Subject: EXYNOS: Move files from board/samsung to arch/arm This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde Signed-off-by: Minkyu Kang --- arch/arm/include/asm/arch-exynos/cpu.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 36b98c83e19..8685c429fe7 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -40,8 +40,7 @@ #define EXYNOS4_WATCHDOG_BASE 0x10060000 #define EXYNOS4_TZPC_BASE 0x10110000 #define EXYNOS4_MIU_BASE 0x10600000 -#define EXYNOS4_DMC0_BASE 0x10400000 -#define EXYNOS4_DMC1_BASE 0x10410000 +#define EXYNOS4_DMC_CTRL_BASE 0x10400000 #define EXYNOS4_GPIO_PART2_BASE 0x11000000 #define EXYNOS4_GPIO_PART1_BASE 0x11400000 #define EXYNOS4_FIMD_BASE 0x11C00000 @@ -64,6 +63,7 @@ #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_ACE_SFR_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4_DMC_PHY_BASE DEVICE_NOT_AVAILABLE /* EXYNOS4X12 */ #define EXYNOS4X12_GPIO_PART3_BASE 0x03860000 @@ -76,8 +76,7 @@ #define EXYNOS4X12_SYSTIMER_BASE 0x10050000 #define EXYNOS4X12_WATCHDOG_BASE 0x10060000 #define EXYNOS4X12_TZPC_BASE 0x10110000 -#define EXYNOS4X12_DMC0_BASE 0x10600000 -#define EXYNOS4X12_DMC1_BASE 0x10610000 +#define EXYNOS4X12_DMC_CTRL_BASE 0x10600000 #define EXYNOS4X12_GPIO_PART4_BASE 0x106E0000 #define EXYNOS4X12_GPIO_PART2_BASE 0x11000000 #define EXYNOS4X12_GPIO_PART1_BASE 0x11400000 @@ -99,6 +98,7 @@ #define EXYNOS4X12_SPI_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_SPI_ISP_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_ACE_SFR_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE /* EXYNOS5 Common*/ #define EXYNOS5_I2C_SPACING 0x10000 @@ -112,8 +112,7 @@ #define EXYNOS5_TZPC_BASE 0x10100000 #define EXYNOS5_WATCHDOG_BASE 0x101D0000 #define EXYNOS5_ACE_SFR_BASE 0x10830000 -#define EXYNOS5_DMC_PHY0_BASE 0x10C00000 -#define EXYNOS5_DMC_PHY1_BASE 0x10C10000 +#define EXYNOS5_DMC_PHY_BASE 0x10C00000 #define EXYNOS5_GPIO_PART3_BASE 0x10D10000 #define EXYNOS5_DMC_CTRL_BASE 0x10DD0000 #define EXYNOS5_GPIO_PART1_BASE 0x11400000 @@ -237,6 +236,8 @@ SAMSUNG_BASE(power, POWER_BASE) SAMSUNG_BASE(spi, SPI_BASE) SAMSUNG_BASE(spi_isp, SPI_ISP_BASE) SAMSUNG_BASE(tzpc, TZPC_BASE) +SAMSUNG_BASE(dmc_ctrl, DMC_CTRL_BASE) +SAMSUNG_BASE(dmc_phy, DMC_PHY_BASE) #endif #endif /* _EXYNOS4_CPU_H */ -- cgit v1.2.3