From 0b3b1766b78331dfd109f2c5f816dcdd65055eb6 Mon Sep 17 00:00:00 2001 From: Poonam Aggrwal Date: Mon, 7 Feb 2011 15:09:51 +0530 Subject: fsl_ddr: Adds 16 bit DDR Data width option Signed-off-by: Poonam Aggrwal Cc: York Sun Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/fsl_ddr_sdram.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h index b5b1efe6692..99dddb4f004 100644 --- a/arch/powerpc/include/asm/fsl_ddr_sdram.h +++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h @@ -84,6 +84,7 @@ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t; #define SDRAM_CFG_SDRAM_TYPE_SHIFT 24 #define SDRAM_CFG_DYN_PWR 0x00200000 #define SDRAM_CFG_32_BE 0x00080000 +#define SDRAM_CFG_16_BE 0x00100000 #define SDRAM_CFG_8_BE 0x00040000 #define SDRAM_CFG_NCAP 0x00020000 #define SDRAM_CFG_2T_EN 0x00008000 -- cgit v1.3.1