From 2045ca5c1f51d054579d0886184b6f245b8a134e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 14 Aug 2023 16:40:30 -0600 Subject: expo: Move cedit theme under bootstd This is related to standard boot, so put it under the same node. This may simplify schema upstreaming later. Mention themes in the documentation while we are here. Signed-off-by: Simon Glass --- arch/sandbox/dts/sandbox.dtsi | 12 ++++++------ arch/sandbox/dts/test.dts | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index 8aaf911a41a..ff7e5584c55 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -16,12 +16,6 @@ stdout-path = "/serial"; }; - cedit-theme { - font-size = <30>; - menu-inset = <3>; - menuitem-gap-y = <1>; - }; - alarm_wdt: alarm-wdt { compatible = "sandbox,alarm-wdt"; timeout-sec = <5>; @@ -36,6 +30,12 @@ bootstd { compatible = "u-boot,boot-std"; filename-prefixes = "./"; + + cedit-theme { + font-size = <30>; + menu-inset = <3>; + menuitem-gap-y = <1>; + }; }; buttons { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index f351d5cb84b..084cb88a232 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -100,6 +100,12 @@ menuitem-gap-y = <1>; }; + cedit-theme { + font-size = <30>; + menu-inset = <3>; + menuitem-gap-y = <1>; + }; + /* * This is used for the VBE OS-request tests. A FAT filesystem * created in a partition with the VBE information appearing @@ -144,12 +150,6 @@ cedit: cedit { }; - cedit-theme { - font-size = <30>; - menu-inset = <3>; - menuitem-gap-y = <1>; - }; - fuzzing-engine { compatible = "sandbox,fuzzing-engine"; }; -- cgit v1.3.1 From e2d22f782297bcec8b0b55d15b9a04e92bd4ea83 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 24 Aug 2023 13:55:37 -0600 Subject: sandbox: Add a way to access persistent test files Some pytests create files in the persistent-data directory. It is useful to be able to access these files in C tests. Add a function which can locate a file given its leaf name, using the environment variable set up in test/py/conftest.py Signed-off-by: Simon Glass --- arch/sandbox/cpu/os.c | 24 ++++++++++++++++++++++++ include/os.h | 10 ++++++++++ 2 files changed, 34 insertions(+) (limited to 'arch/sandbox') diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 9e93a0fa571..85d0d6a1703 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -258,6 +258,30 @@ int os_unmap(void *buf, int size) return 0; } +int os_persistent_file(char *buf, int maxsize, const char *fname) +{ + const char *dirname = getenv("U_BOOT_PERSISTENT_DATA_DIR"); + char *ptr; + int len; + + len = strlen(fname) + (dirname ? strlen(dirname) + 1 : 0) + 1; + if (len > maxsize) + return -ENOSPC; + + ptr = buf; + if (dirname) { + strcpy(ptr, dirname); + ptr += strlen(dirname); + *ptr++ = '/'; + } + strcpy(ptr, fname); + + if (access(buf, F_OK) == -1) + return -ENOENT; + + return 0; +} + /* Restore tty state when we exit */ static struct termios orig_term; static bool term_setup; diff --git a/include/os.h b/include/os.h index 968412b0a82..fc8a1b15cbf 100644 --- a/include/os.h +++ b/include/os.h @@ -98,6 +98,16 @@ int os_close(int fd); */ int os_unlink(const char *pathname); +/** os_persistent_fname() - Find the path to a test file + * + * @buf: Buffer to hold path + * @maxsize: Maximum size of buffer + * @fname: Leaf filename to find + * Returns: 0 on success, -ENOENT if file is not found, -ENOSPC if the buffer is + * too small + */ +int os_persistent_file(char *buf, int maxsize, const char *fname); + /** * os_exit() - access to the OS exit() system call * -- cgit v1.3.1 From d08db02d2d3d5ccf365e423b0c3dfb6fe311abd6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 24 Aug 2023 13:55:41 -0600 Subject: bootstd: Add a test for bootmeth_cros The ChromiumOS bootmeth has no tests at present. Before adding more features. add a basic test. This creates a disk which can be scanned by the bootmeth, so make sure things work. It is quite rudimentary, since the kernel is faked, the root disk is missing and there is no cmdline stored. Enable the bootmeth for snow so it can build the unit test. Signed-off-by: Simon Glass --- arch/sandbox/dts/test.dts | 9 +++ configs/snow_defconfig | 1 + test/boot/bootflow.c | 33 ++++++++++- test/py/tests/test_ut.py | 142 ++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 183 insertions(+), 2 deletions(-) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 084cb88a232..b48456aebee 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -39,6 +39,8 @@ mmc1 = "/mmc1"; mmc2 = "/mmc2"; mmc3 = "/mmc3"; + mmc4 = "/mmc4"; + mmc5 = "/mmc5"; pci0 = &pci0; pci1 = &pci1; pci2 = &pci2; @@ -1055,6 +1057,13 @@ filename = "mmc4.img"; }; + /* This is used for ChromiumOS tests */ + mmc5 { + status = "disabled"; + compatible = "sandbox,mmc"; + filename = "mmc5.img"; + }; + pch { compatible = "sandbox,pch"; }; diff --git a/configs/snow_defconfig b/configs/snow_defconfig index bb066a64599..22ec8e5141f 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -29,6 +29,7 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTMETH_CROS=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SILENT_CONSOLE=y CONFIG_BLOBLIST=y diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index 54a878c4bd5..ae34370981c 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -27,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; +extern U_BOOT_DRIVER(bootmeth_cros); extern U_BOOT_DRIVER(bootmeth_script); static int inject_response(struct unit_test_state *uts) @@ -514,7 +515,8 @@ BOOTSTD_TEST(bootflow_cmd_boot, UT_TESTF_DM | UT_TESTF_SCAN_FDT); * @mmc_dev: MMC device to use, e.g. "mmc4" * Returns 0 on success, -ve on failure */ -static int prep_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev) +static int prep_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev, + bool bind_cros) { const char *order[] = {"mmc2", "mmc1", mmc_dev, NULL}; struct udevice *dev, *bootstd; @@ -533,6 +535,13 @@ static int prep_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev) ut_assertok(device_bind(bootstd, DM_DRIVER_REF(bootmeth_script), "bootmeth_script", 0, ofnode_null(), &dev)); + /* Enable the cros bootmeth if needed */ + if (bind_cros) { + ut_assertok(uclass_first_device_err(UCLASS_BOOTSTD, &bootstd)); + ut_assertok(device_bind(bootstd, DM_DRIVER_REF(bootmeth_cros), + "cros", 0, ofnode_null(), &dev)); + } + /* Change the order to include the device */ std = dev_get_priv(bootstd); old_order = std->bootdev_order; @@ -556,7 +565,7 @@ static int prep_mmc_bootdev(struct unit_test_state *uts, const char *mmc_dev) */ static int prep_mmc4_bootdev(struct unit_test_state *uts) { - ut_assertok(prep_mmc_bootdev(uts, "mmc4")); + ut_assertok(prep_mmc_bootdev(uts, "mmc4", false)); return 0; } @@ -963,3 +972,23 @@ static int bootflow_cmdline(struct unit_test_state *uts) return 0; } BOOTSTD_TEST(bootflow_cmdline, 0); + +/* Test ChromiumOS bootmeth */ +static int bootflow_cros(struct unit_test_state *uts) +{ + ut_assertok(prep_mmc_bootdev(uts, "mmc5", true)); + ut_assertok(run_command("bootflow list", 0)); + + ut_assert_nextlinen("Showing all"); + ut_assert_nextlinen("Seq"); + ut_assert_nextlinen("---"); + ut_assert_nextlinen(" 0 extlinux"); + ut_assert_nextlinen(" 1 cros ready mmc 2 mmc5.bootdev.whole "); + ut_assert_nextlinen("---"); + ut_assert_skip_to_line("(2 bootflows, 2 valid)"); + + ut_assert_console_end(); + + return 0; +} +BOOTSTD_TEST(bootflow_cros, 0); diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py index 640129018c1..82932a662bf 100644 --- a/test/py/tests/test_ut.py +++ b/test/py/tests/test_ut.py @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +import collections import getpass import gzip import os @@ -282,6 +283,146 @@ label Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) copy_prepared_image(cons, mmc_dev, fname) +def setup_cros_image(cons): + """Create a 20MB disk image with ChromiumOS partitions""" + Partition = collections.namedtuple('part', 'start,size,name') + parts = {} + disk_data = None + + def pack_kernel(cons, arch, kern, dummy): + """Pack a kernel containing some fake data + + Args: + cons (ConsoleBase): Console to use + arch (str): Architecture to use ('x86' or 'arm') + kern (str): Filename containing kernel + dummy (str): Dummy filename to use for config and bootloader + + Return: + bytes: Packed-kernel data + """ + kern_part = os.path.join(cons.config.result_dir, 'kern-part-{arch}.bin') + u_boot_utils.run_and_log( + cons, + f'futility vbutil_kernel --pack {kern_part} ' + '--keyblock doc/chromium/files/devkeys/kernel.keyblock ' + '--signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk ' + f'--version 1 --config {dummy} --bootloader {dummy} ' + f'--vmlinuz {kern}') + + with open(kern_part, 'rb') as inf: + kern_part_data = inf.read() + return kern_part_data + + def set_part_data(partnum, data): + """Set the contents of a disk partition + + This updates disk_data by putting data in the right place + + Args: + partnum (int): Partition number to set + data (bytes): Data for that partition + """ + nonlocal disk_data + + start = parts[partnum].start * sect_size + disk_data = disk_data[:start] + data + disk_data[start + len(data):] + + mmc_dev = 5 + fname = os.path.join(cons.config.source_dir, f'mmc{mmc_dev}.img') + u_boot_utils.run_and_log(cons, 'qemu-img create %s 20M' % fname) + #mnt = os.path.join(cons.config.persistent_data_dir, 'mnt') + #mkdir_cond(mnt) + u_boot_utils.run_and_log(cons, f'cgpt create {fname}') + + uuid_state = 'ebd0a0a2-b9e5-4433-87c0-68b6b72699c7' + uuid_kern = 'fe3a2a5d-4f32-41a7-b725-accc3285a309' + uuid_root = '3cb8e202-3b7e-47dd-8a3c-7ff2a13cfcec' + uuid_rwfw = 'cab6e88e-abf3-4102-a07a-d4bb9be3c1d3' + uuid_reserved = '2e0a753d-9e48-43b0-8337-b15192cb1b5e' + uuid_efi = 'c12a7328-f81f-11d2-ba4b-00a0c93ec93b' + + ptr = 40 + + # Number of sectors in 1MB + sect_size = 512 + sect_1mb = (1 << 20) // sect_size + + required_parts = [ + {'num': 0xb, 'label':'RWFW', 'type': uuid_rwfw, 'size': '1'}, + {'num': 6, 'label':'KERN_C', 'type': uuid_kern, 'size': '1'}, + {'num': 7, 'label':'ROOT_C', 'type': uuid_root, 'size': '1'}, + {'num': 9, 'label':'reserved', 'type': uuid_reserved, 'size': '1'}, + {'num': 0xa, 'label':'reserved', 'type': uuid_reserved, 'size': '1'}, + + {'num': 2, 'label':'KERN_A', 'type': uuid_kern, 'size': '1M'}, + {'num': 4, 'label':'KERN_B', 'type': uuid_kern, 'size': '1M'}, + + {'num': 8, 'label':'OEM', 'type': uuid_state, 'size': '1M'}, + {'num': 0xc, 'label':'EFI-SYSTEM', 'type': uuid_efi, 'size': '1M'}, + + {'num': 5, 'label':'ROOT_B', 'type': uuid_root, 'size': '1'}, + {'num': 3, 'label':'ROOT_A', 'type': uuid_root, 'size': '1'}, + {'num': 1, 'label':'STATE', 'type': uuid_state, 'size': '1M'}, + ] + + for part in required_parts: + size_str = part['size'] + if 'M' in size_str: + size = int(size_str[:-1]) * sect_1mb + else: + size = int(size_str) + u_boot_utils.run_and_log( + cons, + f"cgpt add -i {part['num']} -b {ptr} -s {size} -t {part['type']} {fname}") + ptr += size + + u_boot_utils.run_and_log(cons, f'cgpt boot -p {fname}') + out = u_boot_utils.run_and_log(cons, f'cgpt show -q {fname}') + '''We expect something like this: + 8239 2048 1 Basic data + 45 2048 2 ChromeOS kernel + 8238 1 3 ChromeOS rootfs + 2093 2048 4 ChromeOS kernel + 8237 1 5 ChromeOS rootfs + 41 1 6 ChromeOS kernel + 42 1 7 ChromeOS rootfs + 4141 2048 8 Basic data + 43 1 9 ChromeOS reserved + 44 1 10 ChromeOS reserved + 40 1 11 ChromeOS firmware + 6189 2048 12 EFI System Partition + ''' + + # Create a dict (indexed by partition number) containing the above info + for line in out.splitlines(): + start, size, num, name = line.split(maxsplit=3) + parts[int(num)] = Partition(int(start), int(size), name) + + dummy = os.path.join(cons.config.result_dir, 'dummy.txt') + with open(dummy, 'wb') as outf: + outf.write(b'dummy\n') + + # For now we just use dummy kernels. This limits testing to just detecting + # a signed kernel. We could add support for the x86 data structures so that + # testing could cover getting the cmdline, setup.bin and other pieces. + kern = os.path.join(cons.config.result_dir, 'kern.bin') + with open(kern, 'wb') as outf: + outf.write(b'kernel\n') + + with open(fname, 'rb') as inf: + disk_data = inf.read() + + # put x86 kernel in partition 2 and arm one in partition 4 + set_part_data(2, pack_kernel(cons, 'x86', kern, dummy)) + set_part_data(4, pack_kernel(cons, 'arm', kern, dummy)) + + with open(fname, 'wb') as outf: + outf.write(disk_data) + + return fname + + def setup_cedit_file(cons): infname = os.path.join(cons.config.source_dir, 'test/boot/files/expo_layout.dts') @@ -329,6 +470,7 @@ def test_ut_dm_init_bootstd(u_boot_console): setup_bootflow_image(u_boot_console) setup_bootmenu_image(u_boot_console) setup_cedit_file(u_boot_console) + setup_cros_image(u_boot_console) # Restart so that the new mmc1.img is picked up u_boot_console.restart_uboot() -- cgit v1.3.1 From f72d0d4a2f9a2d05ebeefb583992cc620f7c4c2d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 21 Aug 2023 21:16:56 -0600 Subject: event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass --- arch/arm/mach-imx/imx8/cpu.c | 4 ++-- arch/arm/mach-imx/imx8m/soc.c | 4 ++-- arch/arm/mach-imx/imx8ulp/soc.c | 7 +------ arch/arm/mach-imx/imx9/soc.c | 4 ++-- arch/arm/mach-omap2/am33xx/board.c | 4 ++-- arch/arm/mach-omap2/hwinit-common.c | 12 ++++-------- arch/mips/mach-pic32/cpu.c | 10 ++-------- arch/nios2/cpu/cpu.c | 4 ++-- arch/riscv/cpu/cpu.c | 4 ++-- arch/riscv/include/asm/system.h | 2 +- arch/riscv/lib/spl.c | 2 +- arch/sandbox/cpu/start.c | 7 +------ arch/x86/cpu/baytrail/cpu.c | 4 ++-- arch/x86/cpu/broadwell/cpu.c | 4 ++-- arch/x86/cpu/ivybridge/cpu.c | 4 ++-- arch/x86/cpu/quark/quark.c | 26 ++++++++++--------------- arch/x86/lib/fsp2/fsp_init.c | 4 ++-- board/google/chromebook_coral/coral.c | 4 ++-- board/keymile/kmcent2/kmcent2.c | 4 ++-- board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 4 ++-- board/starfive/visionfive2/spl.c | 2 +- drivers/cpu/microblaze_cpu.c | 4 ++-- lib/fwu_updates/fwu.c | 4 ++-- test/py/tests/test_event_dump.py | 2 +- 24 files changed, 52 insertions(+), 78 deletions(-) (limited to 'arch/sandbox') diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index c62357044e0..39ac0bc4140 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -69,7 +69,7 @@ int arch_cpu_init(void) return 0; } -static int imx8_init_mu(void *ctx, struct event *event) +static int imx8_init_mu(void) { struct udevice *devp; int node, ret; @@ -91,7 +91,7 @@ static int imx8_init_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, imx8_init_mu); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8_init_mu); #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 78b775f449d..431ad959f53 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -532,7 +532,7 @@ static void imx_set_wdog_powerdown(bool enable) writew(enable, &wdog3->wmcr); } -static int imx8m_check_clock(void *ctx, struct event *event) +static int imx8m_check_clock(void) { struct udevice *dev; int ret; @@ -549,7 +549,7 @@ static int imx8m_check_clock(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, imx8m_check_clock); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8m_check_clock); static void imx8m_setup_snvs(void) { diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index e23cf60d126..fd436dd8851 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -803,12 +803,7 @@ int imx8ulp_dm_post_init(void) return 0; } - -static int imx8ulp_evt_dm_post_init(void *ctx, struct event *event) -{ - return imx8ulp_dm_post_init(); -} -EVENT_SPY(EVT_DM_POST_INIT_F, imx8ulp_evt_dm_post_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8ulp_dm_post_init); #if defined(CONFIG_SPL_BUILD) __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index f43b73a6c21..5d8687b6f43 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -552,7 +552,7 @@ int arch_cpu_init(void) return 0; } -int imx9_probe_mu(void *ctx, struct event *event) +int imx9_probe_mu(void) { struct udevice *devp; int node, ret; @@ -576,7 +576,7 @@ int imx9_probe_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, imx9_probe_mu); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx9_probe_mu); int timer_init(void) { diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index ecc0a592e99..a6307251c1f 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -527,7 +527,7 @@ void board_init_f(ulong dummy) #endif -static int am33xx_dm_post_init(void *ctx, struct event *event) +static int am33xx_dm_post_init(void) { hw_data_init(); #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) @@ -535,4 +535,4 @@ static int am33xx_dm_post_init(void *ctx, struct event *event) #endif return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, am33xx_dm_post_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, am33xx_dm_post_init); diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index 771533394bc..0e4572ca41a 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -174,7 +174,7 @@ void __weak init_package_revision(void) * done in each of these cases * This function is called with SRAM stack. */ -void early_system_init(void) +int early_system_init(void) { #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT) int ret; @@ -225,6 +225,8 @@ void early_system_init(void) debug_uart_init(); #endif prcm_init(); + + return 0; } #ifdef CONFIG_SPL_BUILD @@ -240,13 +242,7 @@ void board_init_f(ulong dummy) } #endif -static int omap2_system_init(void *ctx, struct event *event) -{ - early_system_init(); - - return 0; -} -EVENT_SPY(EVT_DM_POST_INIT_F, omap2_system_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, early_system_init); /* * Routine: wait_for_command_complete diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c index ec3c2505313..785a87b618b 100644 --- a/arch/mips/mach-pic32/cpu.c +++ b/arch/mips/mach-pic32/cpu.c @@ -95,14 +95,8 @@ static void prefetch_init(void) iounmap(regs); } -/* arch specific CPU init after DM */ -static int pic32_flash_prefetch(void *ctx, struct event *event) -{ - /* flash prefetch */ - prefetch_init(); - return 0; -} -EVENT_SPY(EVT_DM_POST_INIT_F, pic32_flash_prefetch); +/* arch-specific CPU init after DM: flash prefetch */ +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, prefetch_init); /* Un-gate DDR2 modules (gated by default) */ static void ddr2_pmd_ungate(void) diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index da167f4b29e..79a54d1bc25 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -64,7 +64,7 @@ static void copy_exception_trampoline(void) } #endif -static int nios_cpu_setup(void *ctx, struct event *event) +static int nios_cpu_setup(void) { struct udevice *dev; int ret; @@ -80,7 +80,7 @@ static int nios_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, nios_cpu_setup); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, nios_cpu_setup); static int altera_nios2_get_desc(const struct udevice *dev, char *buf, int size) diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index ecfb1fb08c4..4c050333c29 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -91,7 +91,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) } #endif -int riscv_cpu_setup(void *ctx, struct event *event) +int riscv_cpu_setup(void) { int ret; @@ -145,7 +145,7 @@ int riscv_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, riscv_cpu_setup); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, riscv_cpu_setup); int arch_early_init_r(void) { diff --git a/arch/riscv/include/asm/system.h b/arch/riscv/include/asm/system.h index ffa7649f3f9..87a804bfd5f 100644 --- a/arch/riscv/include/asm/system.h +++ b/arch/riscv/include/asm/system.h @@ -26,6 +26,6 @@ struct event; } while (0) /* Hook to set up the CPU (called from SPL too) */ -int riscv_cpu_setup(void *ctx, struct event *event); +int riscv_cpu_setup(void); #endif /* __ASM_RISCV_SYSTEM_H */ diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c index f4d3b67e5dd..9b242ed8212 100644 --- a/arch/riscv/lib/spl.c +++ b/arch/riscv/lib/spl.c @@ -28,7 +28,7 @@ __weak void board_init_f(ulong dummy) if (ret) panic("spl_early_init() failed: %d\n", ret); - riscv_cpu_setup(NULL, NULL); + riscv_cpu_setup(); preloader_console_init(); diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 234652872ec..1026898727f 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -119,12 +119,7 @@ int sandbox_early_getopt_check(void) os_exit(0); } - -static int sandbox_misc_init_f(void *ctx, struct event *event) -{ - return sandbox_early_getopt_check(); -} -EVENT_SPY(EVT_MISC_INIT_F, sandbox_misc_init_f); +EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, sandbox_early_getopt_check); static int sandbox_cmdline_cb_help(struct sandbox_state *state, const char *arg) { diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 4a7b4f617f8..c270426d820 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -45,7 +45,7 @@ static void hsuart_clock_set(void *base) * Configure the internal clock of both SIO HS-UARTs, if they are enabled * via FSP */ -static int baytrail_uart_init(void *ctx, struct event *event) +static int baytrail_uart_init(void) { struct udevice *dev; void *base; @@ -64,7 +64,7 @@ static int baytrail_uart_init(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, baytrail_uart_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, baytrail_uart_init); static void set_max_freq(void) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index f30aebfe4c6..560b1f7893f 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -25,7 +25,7 @@ #include #include -static int broadwell_init_cpu(void *ctx, struct event *event) +static int broadwell_init_cpu(void) { struct udevice *dev; int ret; @@ -40,7 +40,7 @@ static int broadwell_init_cpu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, broadwell_init_cpu); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, broadwell_init_cpu); void set_max_freq(void) { diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index c988d7ff477..e71a10bfd44 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -54,7 +54,7 @@ int arch_cpu_init(void) return x86_cpu_init_f(); } -static int ivybridge_cpu_init(void *ctx, struct event *ev) +static int ivybridge_cpu_init(void) { struct pci_controller *hose; struct udevice *bus, *dev; @@ -86,7 +86,7 @@ static int ivybridge_cpu_init(void *ctx, struct event *ev) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, ivybridge_cpu_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, ivybridge_cpu_init); #define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI1_TEMP_BAR0 0xe8000400 diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 1be8e38cdf4..86d90d84ddb 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -248,22 +248,16 @@ int arch_cpu_init(void) return 0; } -static int quark_init_pcie(void *ctx, struct event *event) -{ - /* - * Initialize PCIe controller - * - * Quark SoC holds the PCIe controller in reset following a power on. - * U-Boot needs to release the PCIe controller from reset. The PCIe - * controller (D23:F0/F1) will not be visible in PCI configuration - * space and any access to its PCI configuration registers will cause - * system hang while it is held in reset. - */ - quark_pcie_early_init(); - - return 0; -} -EVENT_SPY(EVT_DM_POST_INIT_F, quark_init_pcie); +/* + * Initialize PCIe controller + * + * Quark SoC holds the PCIe controller in reset following a power on. + * U-Boot needs to release the PCIe controller from reset. The PCIe + * controller (D23:F0/F1) will not be visible in PCI configuration + * space and any access to its PCI configuration registers will cause + * system hang while it is held in reset. + */ +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, quark_pcie_early_init); int checkcpu(void) { diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index afec7d08d67..aadc08cf3c4 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -19,7 +19,7 @@ #include #include -int fsp_setup_pinctrl(void *ctx, struct event *event) +int fsp_setup_pinctrl(void) { struct udevice *dev; ofnode node; @@ -42,7 +42,7 @@ int fsp_setup_pinctrl(void *ctx, struct event *event) return ret; } -EVENT_SPY(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c index 9e23f5cd31e..9d9168d608a 100644 --- a/board/google/chromebook_coral/coral.c +++ b/board/google/chromebook_coral/coral.c @@ -33,7 +33,7 @@ struct cros_gpio_info { int flags; }; -static int coral_check_ll_boot(void *ctx, struct event *event) +static int coral_check_ll_boot(void) { if (!ll_boot_init()) { printf("Running as secondary loader"); @@ -57,7 +57,7 @@ static int coral_check_ll_boot(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_MISC_INIT_F, coral_check_ll_boot); +EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, coral_check_ll_boot); int arch_misc_init(void) { diff --git a/board/keymile/kmcent2/kmcent2.c b/board/keymile/kmcent2/kmcent2.c index ed552c57b5f..7e655175c57 100644 --- a/board/keymile/kmcent2/kmcent2.c +++ b/board/keymile/kmcent2/kmcent2.c @@ -182,7 +182,7 @@ unsigned long get_serial_clock(unsigned long dummy) return (gd->bus_clk / 2); } -static int kmcent2_misc_init_f(void *ctx, struct event *event) +static int kmcent2_misc_init_f(void) { /* configure QRIO pis for i2c deblocking */ i2c_deblock_gpio_cfg(); @@ -210,7 +210,7 @@ static int kmcent2_misc_init_f(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_MISC_INIT_F, kmcent2_misc_init_f); +EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, kmcent2_misc_init_f); #define USED_SRDS_BANK 0 #define EXPECTED_SRDS_RFCK SRDS_PLLCR0_RFCK_SEL_100 diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 2f1731eea6a..d7f47959ebd 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -110,14 +110,14 @@ int board_early_init_f(void) return 0; } -static int pg_wcom_misc_init_f(void *ctx, struct event *event) +static int pg_wcom_misc_init_f(void) { if (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED)) check_for_uboot_update(); return 0; } -EVENT_SPY(EVT_MISC_INIT_F, pg_wcom_misc_init_f); +EVENT_SPY_SIMPLE(EVT_MISC_INIT_F, pg_wcom_misc_init_f); int board_init(void) { diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index 7acd3995aad..ad5f71a2018 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -218,7 +218,7 @@ void board_init_f(ulong dummy) if (ret) panic("spl_early_init() failed: %d\n", ret); - riscv_cpu_setup(NULL, NULL); + riscv_cpu_setup(); preloader_console_init(); /* Set the parent clock of cpu_root clock to pll0, diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c index c97a89fbd5c..a229f6913b0 100644 --- a/drivers/cpu/microblaze_cpu.c +++ b/drivers/cpu/microblaze_cpu.c @@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR; ci = tmp; \ } -static int microblaze_cpu_probe_all(void *ctx, struct event *event) +static int microblaze_cpu_probe_all(void) { int ret; @@ -29,7 +29,7 @@ static int microblaze_cpu_probe_all(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all); static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci) { diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c index 22bdc78df59..b5805740153 100644 --- a/lib/fwu_updates/fwu.c +++ b/lib/fwu_updates/fwu.c @@ -618,7 +618,7 @@ int fwu_trial_state_ctr_start(void) return ret; } -static int fwu_boottime_checks(void *ctx, struct event *event) +static int fwu_boottime_checks(void) { int ret; u32 boot_idx, active_idx; @@ -682,4 +682,4 @@ static int fwu_boottime_checks(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_MAIN_LOOP, fwu_boottime_checks); +EVENT_SPY_SIMPLE(EVT_MAIN_LOOP, fwu_boottime_checks); diff --git a/test/py/tests/test_event_dump.py b/test/py/tests/test_event_dump.py index 041f8f9c979..a6df9e10e54 100644 --- a/test/py/tests/test_event_dump.py +++ b/test/py/tests/test_event_dump.py @@ -18,6 +18,6 @@ def test_event_dump(u_boot_console): -------------------- ------------------------------ ------------------------------ EVT_FT_FIXUP bootmeth_vbe_ft_fixup .*boot/vbe_request.c:.* EVT_FT_FIXUP bootmeth_vbe_simple_ft_fixup .*boot/vbe_simple_os.c:.* -EVT_MISC_INIT_F sandbox_misc_init_f .*arch/sandbox/cpu/start.c:.* +EVT_MISC_INIT_F sandbox_early_getopt_check .*arch/sandbox/cpu/start.c:.* EVT_TEST h_adder_simple .*test/common/event.c:''' assert re.match(expect, out, re.MULTILINE) is not None -- cgit v1.3.1 From 14639bf14d824d9fbcfd918f0e7924c7f7065422 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 31 Aug 2023 22:16:35 +0000 Subject: phy: Set phy->dev to NULL when generic_phy_get_by_index_nodev() fails Generic phy helpers typically use generic_phy_valid() to determine if the helper should perform its function on a passed struct phy. generic_phy_valid() treat any struct phy having phy->dev set as valid. With generic_phy_get_by_index_nodev() setting phy->dev to a valid struct udevice early, there can be situations where the struct phy is returned as valid when initialization in fact failed and returned an error. Fix this by setting phy->dev back to NULL when any of the calls to of_xlate ops, device_get_supply_regulator or phy_alloc_counts fail. Also extend the dm_test_phy_base test with a test where of_xlate ops fail. Fixes: 72e5016f878d ("drivers: phy: add generic PHY framework") Fixes: b9688df3cbf4 ("drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails") Signed-off-by: Jonas Karlman --- arch/sandbox/dts/test.dts | 11 +++++++++++ drivers/phy/phy-uclass.c | 1 + test/dm/phy.c | 12 +++++++++++- 3 files changed, 23 insertions(+), 1 deletion(-) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index b48456aebee..63fda15da76 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -433,6 +433,11 @@ #phy-cells = <0>; }; + phy_provider3: gen_phy@3 { + compatible = "sandbox,phy"; + #phy-cells = <2>; + }; + gen_phy_user: gen_phy_user { compatible = "simple-bus"; phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; @@ -445,6 +450,12 @@ phy-names = "phy1", "phy2"; }; + gen_phy_user2: gen_phy_user2 { + compatible = "simple-bus"; + phys = <&phy_provider3 0 0>; + phy-names = "phy1"; + }; + some-bus { #address-cells = <1>; #size-cells = <0>; diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index 0baf314a347..7d707c02293 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -195,6 +195,7 @@ int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) return 0; err: + phy->dev = NULL; return ret; } diff --git a/test/dm/phy.c b/test/dm/phy.c index 09329b9f71f..2abd27b22d6 100644 --- a/test/dm/phy.c +++ b/test/dm/phy.c @@ -49,7 +49,7 @@ static int dm_test_phy_base(struct unit_test_state *uts) ut_assert(phy2.dev != phy3.dev); /* Try to get a non-existing phy */ - ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PHY, 4, &dev)); + ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PHY, 5, &dev)); ut_asserteq(-ENODATA, generic_phy_get_by_name(parent, "phy_not_existing", &phy1_method1)); ut_assert(!generic_phy_valid(&phy1_method1)); @@ -57,6 +57,16 @@ static int dm_test_phy_base(struct unit_test_state *uts) &phy1_method2)); ut_assert(!generic_phy_valid(&phy1_method2)); + /* Try to get a phy where of_xlate fail */ + ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS, + "gen_phy_user2", &parent)); + ut_asserteq(-EINVAL, generic_phy_get_by_name(parent, "phy1", + &phy1_method1)); + ut_assert(!generic_phy_valid(&phy1_method1)); + ut_asserteq(-EINVAL, generic_phy_get_by_index(parent, 0, + &phy1_method2)); + ut_assert(!generic_phy_valid(&phy1_method2)); + return 0; } DM_TEST(dm_test_phy_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- cgit v1.3.1 From fa12dfa08a7bdc7d67e3758f10461468a663ce2e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 25 Aug 2023 11:37:46 +0200 Subject: dm: core: support reading a single indexed u64 value Add helper function to allow reading a single indexed u64 value from a device-tree property containing multiple u64 values, that is an array of u64's. Co-developed-by: Ashok Reddy Soma Signed-off-by: Ashok Reddy Soma Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/08043c8d204d0068f04c27de86afe78c75c50b69.1692956263.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 1 + drivers/core/of_access.c | 16 ++++++++++++---- drivers/core/ofnode.c | 30 ++++++++++++++++++++++++++++++ include/dm/of_access.h | 19 +++++++++++++++++++ include/dm/ofnode.h | 12 ++++++++++++ test/dm/ofnode.c | 8 ++++++++ 6 files changed, 82 insertions(+), 4 deletions(-) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 63fda15da76..d4693e3c7a9 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -301,6 +301,7 @@ uint-value = <(-1234)>; int64-value = /bits/ 64 <0x1111222233334444>; int-array = <5678 9123 4567>; + int64-array = /bits/ 64 <0x1111222233334444 0x4444333322221111>; str-value = "test string"; interrupts-extended = <&irq 3 0>; acpi,name = "GHIJ"; diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c index 57f10445b12..1bb4d8eab70 100644 --- a/drivers/core/of_access.c +++ b/drivers/core/of_access.c @@ -570,26 +570,34 @@ int of_read_u32_index(const struct device_node *np, const char *propname, return 0; } -int of_read_u64(const struct device_node *np, const char *propname, u64 *outp) +int of_read_u64_index(const struct device_node *np, const char *propname, + int index, u64 *outp) { const __be64 *val; debug("%s: %s: ", __func__, propname); if (!np) return -EINVAL; - val = of_find_property_value_of_size(np, propname, sizeof(*outp)); + + val = of_find_property_value_of_size(np, propname, + sizeof(*outp) * (index + 1)); if (IS_ERR(val)) { debug("(not found)\n"); return PTR_ERR(val); } - *outp = be64_to_cpup(val); + *outp = be64_to_cpup(val + index); debug("%#llx (%lld)\n", (unsigned long long)*outp, - (unsigned long long)*outp); + (unsigned long long)*outp); return 0; } +int of_read_u64(const struct device_node *np, const char *propname, u64 *outp) +{ + return of_read_u64_index(np, propname, 0, outp); +} + int of_property_match_string(const struct device_node *np, const char *propname, const char *string) { diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index a4dc9bde085..8311282abf6 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -344,6 +344,36 @@ int ofnode_read_u32_index(ofnode node, const char *propname, int index, return 0; } +int ofnode_read_u64_index(ofnode node, const char *propname, int index, + u64 *outp) +{ + const fdt64_t *cell; + int len; + + assert(ofnode_valid(node)); + + if (ofnode_is_np(node)) + return of_read_u64_index(ofnode_to_np(node), propname, index, + outp); + + cell = fdt_getprop(ofnode_to_fdt(node), ofnode_to_offset(node), + propname, &len); + if (!cell) { + debug("(not found)\n"); + return -EINVAL; + } + + if (len < (sizeof(u64) * (index + 1))) { + debug("(not large enough)\n"); + return -EOVERFLOW; + } + + *outp = fdt64_to_cpu(cell[index]); + debug("%#llx (%lld)\n", *outp, *outp); + + return 0; +} + u32 ofnode_read_u32_index_default(ofnode node, const char *propname, int index, u32 def) { diff --git a/include/dm/of_access.h b/include/dm/of_access.h index c556a18f7d9..9361d0a87bf 100644 --- a/include/dm/of_access.h +++ b/include/dm/of_access.h @@ -333,6 +333,25 @@ int of_read_u32(const struct device_node *np, const char *propname, u32 *outp); int of_read_u32_index(const struct device_node *np, const char *propname, int index, u32 *outp); +/** + * of_read_u64_index() - Find and read a 64-bit value from a multi-value + * property + * + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @index: index of the u32 in the list of values + * @outp: pointer to return value, modified only if return value is 0. + * + * Search for a property in a device node and read a 64-bit value from + * it. + * + * Return: + * 0 on success, -EINVAL if the property does not exist, or -EOVERFLOW if the + * property data isn't large enough. + */ +int of_read_u64_index(const struct device_node *np, const char *propname, + int index, u64 *outp); + /** * of_read_u64() - Find and read a 64-bit integer from a property * diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0f38b3e736d..0a85db31f36 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -434,6 +434,18 @@ int ofnode_read_u32(ofnode node, const char *propname, u32 *outp); int ofnode_read_u32_index(ofnode node, const char *propname, int index, u32 *outp); +/** + * ofnode_read_u64_index() - Read a 64-bit integer from a multi-value property + * + * @node: valid node reference to read property from + * @propname: name of the property to read from + * @index: index of the integer to return + * @outp: place to put value (if found) + * Return: 0 if OK, -ve on error + */ +int ofnode_read_u64_index(ofnode node, const char *propname, int index, + u64 *outp); + /** * ofnode_read_s32() - Read a 32-bit integer from a property * diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 6fbebc7da08..b74f5c2ebcf 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -967,6 +967,14 @@ static int dm_test_ofnode_u64(struct unit_test_state *uts) ut_asserteq_64(0x1111222233334444, val); ut_asserteq(-EINVAL, ofnode_read_u64(node, "missing", &val)); + ut_assertok(ofnode_read_u64_index(node, "int64-array", 0, &val)); + ut_asserteq_64(0x1111222233334444, val); + ut_assertok(ofnode_read_u64_index(node, "int64-array", 1, &val)); + ut_asserteq_64(0x4444333322221111, val); + ut_asserteq(-EOVERFLOW, + ofnode_read_u64_index(node, "int64-array", 2, &val)); + ut_asserteq(-EINVAL, ofnode_read_u64_index(node, "missing", 0, &val)); + return 0; } DM_TEST(dm_test_ofnode_u64, UT_TESTF_SCAN_FDT); -- cgit v1.3.1 From 99b46477e3495f819f6826d11470d46f12a4f9f7 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Wed, 30 Aug 2023 10:31:42 +0200 Subject: clk: Dont return error when assigned-clocks is empty or missing There is a chance that assigned-clock-rates is given and assigned-clocks could be empty. Dont return error in that case, because the probe of the corresponding driver will not be called at all if this fails. Better to continue to look for it and return 0. Signed-off-by: Ashok Reddy Soma Reviewed-by: Tom Rini Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/a9a9d853e0ac396cd9b3577cce26279a75765711.1693384296.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 16 ++++++++++++++++ drivers/clk/clk-uclass.c | 8 +++++++- test/dm/clk.c | 9 +++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index d4693e3c7a9..e6a471e40d9 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -614,6 +614,22 @@ clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; }; + clk-test2 { + compatible = "sandbox,clk-test"; + assigned-clock-rates = <321>; + }; + + clk-test3 { + compatible = "sandbox,clk-test"; + assigned-clocks = <&clk_sandbox 1>; + }; + + clk-test4 { + compatible = "sandbox,clk-test"; + assigned-clock-rates = <654>, <321>; + assigned-clocks = <&clk_sandbox 1>; + }; + ccf: clk-ccf { compatible = "sandbox,clk-ccf"; }; diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index dc3e9d6a261..f186fcbcdb8 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -329,7 +329,13 @@ static int clk_set_default_rates(struct udevice *dev, dev_dbg(dev, "could not get assigned clock %d (err = %d)\n", index, ret); - continue; + /* Skip if it is empty */ + if (ret == -ENOENT) { + ret = 0; + continue; + } + + return ret; } /* This is clk provider device trying to program itself diff --git a/test/dm/clk.c b/test/dm/clk.c index f48de05436b..01417fbd825 100644 --- a/test/dm/clk.c +++ b/test/dm/clk.c @@ -36,6 +36,15 @@ static int dm_test_clk_base(struct unit_test_state *uts) ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true); ut_asserteq(clk_method1.id, clk_method2.id); + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev)); + ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE)); + return 0; } -- cgit v1.3.1 From db5e349d3ddfc75953b2364e94b111ea1795f3c8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 31 Aug 2023 08:59:05 +0200 Subject: dm: core: ofnode: Add ofnode_read_bootscript_address() ofnode_read_bootscript_address() reads bootscript address from /options/u-boot DT node. bootscr-address or bootscr-ram-offset properties are read and values are filled. bootscr-address has higher priority than bootscr-ram-offset and the only one should be described in DT. Also add test to cover this new function. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/23be3838502efef61803c90ef6e8b32bbd6ede41.1693465140.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 7 +++++++ drivers/core/ofnode.c | 25 +++++++++++++++++++++++++ include/dm/ofnode.h | 26 ++++++++++++++++++++++++++ test/dm/ofnode.c | 14 ++++++++++++++ 4 files changed, 72 insertions(+) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index e6a471e40d9..d93c010bc5b 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -81,6 +81,13 @@ }; }; + options { + u-boot { + compatible = "u-boot,config"; + bootscr-ram-offset = /bits/ 64 <0x12345678>; + }; + }; + bootstd { bootph-verify; compatible = "u-boot,boot-std"; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 8311282abf6..5076054acd6 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1593,6 +1593,31 @@ const char *ofnode_conf_read_str(const char *prop_name) return ofnode_read_string(node, prop_name); } +int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + int ret; + ofnode uboot; + + *bootscr_address = 0; + *bootscr_offset = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-address", bootscr_address); + if (ret) { + ret = ofnode_read_u64(uboot, "bootscr-ram-offset", + bootscr_offset); + if (ret) + return -EINVAL; + } + + return 0; +} + ofnode ofnode_get_phy_node(ofnode node) { /* DT node properties that reference a PHY node */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0a85db31f36..c38596acbd0 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -20,6 +20,7 @@ struct resource; #include +#include struct ofnode_phandle_args { ofnode node; @@ -1512,6 +1513,26 @@ int ofnode_conf_read_int(const char *prop_name, int default_val); */ const char *ofnode_conf_read_str(const char *prop_name); +/** + * ofnode_read_bootscript_address() - Read bootscr-address or bootscr-ram-offset + * + * @bootscr_address: pointer to 64bit address where bootscr-address property value + * is stored + * @bootscr_offset: pointer to 64bit offset address where bootscr-ram-offset + * property value is stored + * + * This reads a bootscr-address or bootscr-ram-offset property from + * the /options/u-boot/ node of the devicetree. bootscr-address holds the full + * address of the boot script file. bootscr-ram-offset holds the boot script + * file offset from the start of the ram base address. When bootscr-address is + * defined, bootscr-ram-offset property is ignored. + * + * This only works with the control FDT. + * + * Return: 0 if OK, -EINVAL if property is not found. + */ +int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset); + #else /* CONFIG_DM */ static inline bool ofnode_conf_read_bool(const char *prop_name) { @@ -1528,6 +1549,11 @@ static inline const char *ofnode_conf_read_str(const char *prop_name) return NULL; } +static inline int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) +{ + return -EINVAL; +} + #endif /* CONFIG_DM */ /** diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index b74f5c2ebcf..621a4b4fa3c 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -583,6 +583,20 @@ static int dm_test_ofnode_conf(struct unit_test_state *uts) } DM_TEST(dm_test_ofnode_conf, 0); +static int dm_test_ofnode_options(struct unit_test_state *uts) +{ + u64 bootscr_address; + u64 bootscr_offset; + + ut_assertok(ofnode_read_bootscript_address(&bootscr_address, + &bootscr_offset)); + ut_asserteq_64(0, bootscr_address); + ut_asserteq_64(0x12345678, bootscr_offset); + + return 0; +} +DM_TEST(dm_test_ofnode_options, 0); + static int dm_test_ofnode_for_each_compatible_node(struct unit_test_state *uts) { const char compatible[] = "denx,u-boot-fdt-test"; -- cgit v1.3.1 From 44f35e1aca706e7625aa2989911b4bc938681158 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 31 Aug 2023 09:04:27 +0200 Subject: dm: core: ofnode: Add ofnode_read_bootscript_flash() ofnode_read_bootscript_flash() reads bootscript address from /options/u-boot DT node. bootscr-flash-offset and bootscr-flash-size properties are read and values are filled. When bootscr-flash-size is not defined, bootscr-flash-offset property is unusable that's why cleaned. Both of these properties should be defined to function properly. Also add test to cover this new function. Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/08a3e6c09cce13287c69ad370e409e7f1766b406.1693465465.git.michal.simek@amd.com --- arch/sandbox/dts/test.dts | 2 ++ drivers/core/ofnode.c | 34 ++++++++++++++++++++++++++++++++++ include/dm/ofnode.h | 27 +++++++++++++++++++++++++++ test/dm/ofnode.c | 9 +++++++-- 4 files changed, 70 insertions(+), 2 deletions(-) (limited to 'arch/sandbox') diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index d93c010bc5b..9a863ea732f 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -85,6 +85,8 @@ u-boot { compatible = "u-boot,config"; bootscr-ram-offset = /bits/ 64 <0x12345678>; + bootscr-flash-offset = /bits/ 64 <0>; + bootscr-flash-size = /bits/ 64 <0x2000>; }; }; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 5076054acd6..fb4447c84b7 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -1618,6 +1618,40 @@ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset) return 0; } +int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size) +{ + int ret; + ofnode uboot; + + *bootscr_flash_offset = 0; + *bootscr_flash_size = 0; + + uboot = ofnode_path("/options/u-boot"); + if (!ofnode_valid(uboot)) { + printf("%s: Missing /u-boot node\n", __func__); + return -EINVAL; + } + + ret = ofnode_read_u64(uboot, "bootscr-flash-offset", + bootscr_flash_offset); + if (ret) + return -EINVAL; + + ret = ofnode_read_u64(uboot, "bootscr-flash-size", + bootscr_flash_size); + if (ret) + return -EINVAL; + + if (!bootscr_flash_size) { + debug("bootscr-flash-size is zero. Ignoring properties!\n"); + *bootscr_flash_offset = 0; + return -EINVAL; + } + + return 0; +} + ofnode ofnode_get_phy_node(ofnode node) { /* DT node properties that reference a PHY node */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index c38596acbd0..06ea68e81c5 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -1533,6 +1533,27 @@ const char *ofnode_conf_read_str(const char *prop_name); */ int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset); +/** + * ofnode_read_bootscript_flash() - Read bootscr-flash-offset/size + * + * @bootscr_flash_offset: pointer to 64bit offset where bootscr-flash-offset + * property value is stored + * @bootscr_flash_size: pointer to 64bit size where bootscr-flash-size property + * value is stored + * + * This reads a bootscr-flash-offset and bootscr-flash-size properties from + * the /options/u-boot/ node of the devicetree. bootscr-flash-offset holds + * the offset of the boot script file from start of flash. bootscr-flash-size + * holds the boot script size in flash. When bootscr-flash-size is not defined, + * bootscr-flash-offset property is cleaned. + * + * This only works with the control FDT. + * + * Return: 0 if OK, -EINVAL if property is not found or incorrect. + */ +int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size); + #else /* CONFIG_DM */ static inline bool ofnode_conf_read_bool(const char *prop_name) { @@ -1554,6 +1575,12 @@ static inline int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *boot return -EINVAL; } +static inline int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, + u64 *bootscr_flash_size) +{ + return -EINVAL; +} + #endif /* CONFIG_DM */ /** diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 621a4b4fa3c..d71faac0ee4 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -585,14 +585,19 @@ DM_TEST(dm_test_ofnode_conf, 0); static int dm_test_ofnode_options(struct unit_test_state *uts) { - u64 bootscr_address; - u64 bootscr_offset; + u64 bootscr_address, bootscr_offset; + u64 bootscr_flash_offset, bootscr_flash_size; ut_assertok(ofnode_read_bootscript_address(&bootscr_address, &bootscr_offset)); ut_asserteq_64(0, bootscr_address); ut_asserteq_64(0x12345678, bootscr_offset); + ut_assertok(ofnode_read_bootscript_flash(&bootscr_flash_offset, + &bootscr_flash_size)); + ut_asserteq_64(0, bootscr_flash_offset); + ut_asserteq_64(0x2000, bootscr_flash_size); + return 0; } DM_TEST(dm_test_ofnode_options, 0); -- cgit v1.3.1 From 50834884a8159845475fdc28ac196a41fe4d4915 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 19 Sep 2023 21:00:15 -0600 Subject: Record the position of the SMBIOS tables Remember where these end up so that we can pass this information on to the EFI layer. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/include/asm/global_data.h | 3 +++ arch/riscv/include/asm/global_data.h | 3 +++ arch/sandbox/include/asm/global_data.h | 1 + arch/x86/include/asm/global_data.h | 1 + arch/x86/lib/tables.c | 3 +++ include/asm-generic/global_data.h | 8 ++++++++ 6 files changed, 19 insertions(+) (limited to 'arch/sandbox') diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 2a222c53882..b385bae0266 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -102,6 +102,9 @@ struct arch_global_data { #ifdef CONFIG_ARCH_IMX8ULP bool m33_handshake_done; #endif +#ifdef CONFIG_SMBIOS + ulong smbios_start; /* Start address of SMBIOS table */ +#endif }; #include diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index 9d97517e124..937fa4d1544 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -32,6 +32,9 @@ struct arch_global_data { ulong available_harts; #endif #endif +#ifdef CONFIG_SMBIOS + ulong smbios_start; /* Start address of SMBIOS table */ +#endif }; #include diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index f0ab3ba5c14..c6977735029 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -17,6 +17,7 @@ struct arch_global_data { ulong table_end; /* End address of x86 tables */ ulong table_start_high; /* Start address of high x86 tables */ ulong table_end_high; /* End address of high x86 tables */ + ulong smbios_start; /* Start address of SMBIOS table */ }; #include diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index ea58259ad77..6f4a7130f1d 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -127,6 +127,7 @@ struct arch_global_data { ulong table_end; /* End address of x86 tables */ ulong table_start_high; /* Start address of high x86 tables */ ulong table_end_high; /* End address of high x86 tables */ + ulong smbios_start; /* Start address of SMBIOS table */ }; #endif diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 67bc0a72aeb..5b5070f7ca5 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -97,6 +97,9 @@ int write_tables(void) int size = table->size ? : CONFIG_ROM_TABLE_SIZE; u32 rom_table_end; + if (!strcmp("smbios", table->name)) + gd->arch.smbios_start = rom_addr; + if (IS_ENABLED(CONFIG_BLOBLIST_TABLES) && table->tag) { if (!gd->arch.table_end) gd->arch.table_end = rom_addr; diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index d47c674c742..c6d63b3657c 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -552,6 +552,14 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #define gd_set_acpi_start(addr) #endif +#ifdef CONFIG_SMBIOS +#define gd_smbios_start() gd->smbios_start +#define gd_set_smbios_start(addr) gd->arch.smbios_start = addr +#else +#define gd_smbios_start() 0UL +#define gd_set_smbios_start(addr) +#endif + #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) #define gd_multi_dtb_fit() gd->multi_dtb_fit #define gd_set_multi_dtb_fit(_dtb) gd->multi_dtb_fit = _dtb -- cgit v1.3.1