From 029e6f250cd5caa166f37c5bbb3d00af2cff9baf Mon Sep 17 00:00:00 2001 From: Tanmay Kathpalia Date: Mon, 15 Dec 2025 03:01:14 -0800 Subject: Revert "arch: arm: dts: agilex5: Set SDIO_SEL GPIO pin as output" Remove GPIO hog configuration for SDIO_SEL pin as it is now handled through the voltage regulator framework for SD ultra high speed mode support. The GPIO pin 3 on portb controller is used to control the level shifter for SD card I/O voltage switching. The regulator-based approach provides proper voltage switching control for UHS-I modes (SDR50, SDR104) while maintaining compatibility with the MMC subsystem's voltage switching protocols. This reverts commit b0dbc9fcb7dfb7522be25ee205997be2fb5e1bdc. Signed-off-by: Tanmay Kathpalia Reviewed-by: Tien Fong Chee --- arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi index d51a9e2ff7f..35b198b79ef 100644 --- a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi @@ -681,17 +681,6 @@ bootph-all; }; -&gpio1 { - /* Configure GPIO 1 pin 3 as output pin with value 0 during GPIO probe */ - portb: gpio-controller@0{ - sdio_sel { - gpio-hog; - gpios = <3 GPIO_ACTIVE_HIGH>; - output-low; - }; - }; -}; - &i2c0 { reset-names = "i2c"; }; -- cgit v1.3.1