From 1d5555fae4446143c28eb1dd535bd0bb5a980e40 Mon Sep 17 00:00:00 2001 From: Philippe Reynes Date: Fri, 11 Feb 2022 19:18:34 +0100 Subject: bcm6753: add initial support This add the initial support of the broadcom bcm6753 SoC family. Signed-off-by: Philippe Reynes --- arch/arm/Kconfig | 7 ++ arch/arm/dts/bcm6753.dtsi | 201 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 208 insertions(+) create mode 100644 arch/arm/dts/bcm6753.dtsi (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 06a540d965d..6ce683a9a11 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -617,6 +617,13 @@ config ARCH_BCM63158 select OF_CONTROL imply CMD_DM +config ARCH_BCM6753 + bool "Broadcom BCM6753 family" + select CPU_V7A + select DM + select OF_CONTROL + imply CMD_DM + config ARCH_BCM68360 bool "Broadcom BCM68360 family" select DM diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi new file mode 100644 index 00000000000..bcbb8e17da9 --- /dev/null +++ b/arch/arm/dts/bcm6753.dtsi @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes + */ + +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm6753"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu0: cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x1>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu2: cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x2>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + l2: l2-cache0 { + compatible = "cache"; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + u-boot,dm-pre-reloc; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + u-boot,dm-pre-reloc; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_osc>; + clock-mult = <2>; + clock-div = <1>; + }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + uart0: serial@ff812000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xff812000 0x1000>; + clock = <50000000>; + + status = "disabled"; + }; + + wdt1: watchdog@ff800480 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff800480 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt2: watchdog@ff8004c0 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff8004c0 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdt1>; + }; + + gpio0: gpio-controller@0xff800500 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800500 0x4>, + <0xff800520 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio1: gpio-controller@0xff800504 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800504 0x4>, + <0xff800524 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio2: gpio-controller@0xff800508 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800508 0x4>, + <0xff800528 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio3: gpio-controller@0xff80050c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80050c 0x4>, + <0xff80052c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio4: gpio-controller@0xff800510 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800510 0x4>, + <0xff800530 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio5: gpio-controller@0xff800514 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800514 0x4>, + <0xff800534 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio6: gpio-controller@0xff800518 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800518 0x4>, + <0xff800538 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio7: gpio-controller@0xff80051c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80051c 0x4>, + <0xff80053c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + nand: nand-controller@ff801800 { + compatible = "brcm,nand-bcm6753", + "brcm,brcmnand-v5.0", + "brcm,brcmnand"; + reg-names = "nand", "nand-int-base", "nand-cache"; + reg = <0xff801800 0x180>, + <0xff802000 0x10>, + <0xff801c00 0x200>; + parameter-page-big-endian = <0>; + + status = "disabled"; + }; + }; +}; -- cgit v1.3.1 From a241ccdc449320b5e7750cf57618b0a455212040 Mon Sep 17 00:00:00 2001 From: Philippe Reynes Date: Fri, 11 Feb 2022 19:18:38 +0100 Subject: bcm96753ref: add initial support This add the initial support of the broadcom reference board bcm96753ref with a bcm6753 SoC. This board has 1 GB of RAM, 256 MB of flash (nand), 2 USB port, 1 UART, and 4 ethernet ports. Signed-off-by: Philippe Reynes --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 3 ++ arch/arm/dts/bcm96753ref.dts | 80 +++++++++++++++++++++++++++++++ board/broadcom/bcm96753ref/Kconfig | 16 +++++++ board/broadcom/bcm96753ref/MAINTAINERS | 6 +++ board/broadcom/bcm96753ref/Makefile | 3 ++ board/broadcom/bcm96753ref/bcm96753ref.c | 40 ++++++++++++++++ configs/bcm96753ref_ram_defconfig | 81 ++++++++++++++++++++++++++++++++ include/configs/broadcom_bcm96753ref.h | 34 ++++++++++++++ 9 files changed, 264 insertions(+) create mode 100644 arch/arm/dts/bcm96753ref.dts create mode 100644 board/broadcom/bcm96753ref/Kconfig create mode 100644 board/broadcom/bcm96753ref/MAINTAINERS create mode 100644 board/broadcom/bcm96753ref/Makefile create mode 100644 board/broadcom/bcm96753ref/bcm96753ref.c create mode 100644 configs/bcm96753ref_ram_defconfig create mode 100644 include/configs/broadcom_bcm96753ref.h (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6ce683a9a11..8c7f3176970 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2213,6 +2213,7 @@ source "board/armltd/vexpress/Kconfig" source "board/armltd/vexpress64/Kconfig" source "board/cortina/presidio-asic/Kconfig" source "board/broadcom/bcm963158/Kconfig" +source "board/broadcom/bcm96753ref/Kconfig" source "board/broadcom/bcm968360bg/Kconfig" source "board/broadcom/bcm968580xref/Kconfig" source "board/broadcom/bcmns3/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 960f1a9fd4d..e53ad53a97e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1104,6 +1104,9 @@ dtb-$(CONFIG_ARCH_BCM63158) += \ dtb-$(CONFIG_ARCH_BCM68360) += \ bcm968360bg.dtb +dtb-$(CONFIG_ARCH_BCM6753) += \ + bcm96753ref.dtb + dtb-$(CONFIG_ARCH_BCM6858) += \ bcm968580xref.dtb diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts new file mode 100644 index 00000000000..e27a5b552f3 --- /dev/null +++ b/arch/arm/dts/bcm96753ref.dts @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes + */ + +/dts-v1/; + +#include "bcm6753.dtsi" + +#include + +/ { + model = "Broadcom bcm6753ref"; + compatible = "broadcom,bcm6753ref", "brcm,bcm6753"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&nand { + status = "okay"; + write-protect = <0>; + #address-cells = <1>; + #size-cells = <0>; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + }; +}; diff --git a/board/broadcom/bcm96753ref/Kconfig b/board/broadcom/bcm96753ref/Kconfig new file mode 100644 index 00000000000..479e7905787 --- /dev/null +++ b/board/broadcom/bcm96753ref/Kconfig @@ -0,0 +1,16 @@ +if TARGET_BCM96753REF + +config SYS_VENDOR + default "broadcom" + +config SYS_BOARD + default "bcm96753ref" + +config SYS_CONFIG_NAME + default "broadcom_bcm96753ref" + +endif + +config TARGET_BCM96753REF + bool "Support Broadcom bcm96753ref" + depends on ARCH_BCM6753 diff --git a/board/broadcom/bcm96753ref/MAINTAINERS b/board/broadcom/bcm96753ref/MAINTAINERS new file mode 100644 index 00000000000..be060f5a709 --- /dev/null +++ b/board/broadcom/bcm96753ref/MAINTAINERS @@ -0,0 +1,6 @@ +BROADCOM BCM96753REF +M: Philippe Reynes +S: Maintained +F: board/broadcom/bcm96753ref +F: include/configs/broadcom_bcm96753ref.h +F: configs/bcm96753ref_ram_defconfig diff --git a/board/broadcom/bcm96753ref/Makefile b/board/broadcom/bcm96753ref/Makefile new file mode 100644 index 00000000000..a1fa2bff867 --- /dev/null +++ b/board/broadcom/bcm96753ref/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += bcm96753ref.o diff --git a/board/broadcom/bcm96753ref/bcm96753ref.c b/board/broadcom/bcm96753ref/bcm96753ref.c new file mode 100644 index 00000000000..bf78d843aa5 --- /dev/null +++ b/board/broadcom/bcm96753ref/bcm96753ref.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes + */ + +#include +#include +#include +#include + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + printf("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} + +void enable_caches(void) +{ + icache_enable(); + dcache_enable(); +} diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig new file mode 100644 index 00000000000..4474797e3d6 --- /dev/null +++ b/configs/bcm96753ref_ram_defconfig @@ -0,0 +1,81 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y +CONFIG_ARCH_BCM6753=y +CONFIG_SYS_TEXT_BASE=0x1000000 +CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="bcm96753ref" +CONFIG_ARMV7_LPAE=y +CONFIG_TARGET_BCM96753REF=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_CIPHER=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +# CONFIG_AUTOBOOT is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set +# CONFIG_NET is not set +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y +CONFIG_CLK=y +CONFIG_BCM6345_GPIO=y +# CONFIG_INPUT is not set +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6753=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_PL01X_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_MEM=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_WDT_BCM6345=y +CONFIG_REGEX=y diff --git a/include/configs/broadcom_bcm96753ref.h b/include/configs/broadcom_bcm96753ref.h new file mode 100644 index 00000000000..c002985cf45 --- /dev/null +++ b/include/configs/broadcom_bcm96753ref.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Philippe Reynes + */ + +#include + +/* + * common + */ + +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 500000, 1500000 } +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 24 + +/* + * 6853 + */ + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +/* U-Boot */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) + +#ifdef CONFIG_MTD_RAW_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#endif /* CONFIG_MTD_RAW_NAND */ + +/* + * 96753ref + */ -- cgit v1.3.1 From 66425ca694fa7dd2a795c5a47714f4f45f92b438 Mon Sep 17 00:00:00 2001 From: Philippe Reynes Date: Thu, 17 Feb 2022 17:17:05 +0100 Subject: arch: arm: dts: bcm6753: add led support Add a node leds to support the LED IP in the device tree of the bcm6753. Signed-off-by: Philippe Reynes --- arch/arm/dts/bcm6753.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi index bcbb8e17da9..e88ab095c29 100644 --- a/arch/arm/dts/bcm6753.dtsi +++ b/arch/arm/dts/bcm6753.dtsi @@ -197,5 +197,12 @@ status = "disabled"; }; + + leds: led-controller@ff803000 { + compatible = "brcm,bcm6753-leds"; + reg = <0xff803000 0x3480>; + + status = "disabled"; + }; }; }; -- cgit v1.3.1 From 3bf5e4343cd6d57d59a315f6f4c5b2874dd01a63 Mon Sep 17 00:00:00 2001 From: Philippe Reynes Date: Thu, 17 Feb 2022 17:17:06 +0100 Subject: arch: arm: dts: bcm96753ref: enable led support Enable the led in the device tree of the refboard bcm96753ref. It also defines two leds (led_red ad led_green). Signed-off-by: Philippe Reynes --- arch/arm/dts/bcm96753ref.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts index e27a5b552f3..ca15ca5f108 100644 --- a/arch/arm/dts/bcm96753ref.dts +++ b/arch/arm/dts/bcm96753ref.dts @@ -78,3 +78,21 @@ brcm,nand-oob-sector-size = <16>; }; }; + +&leds { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + brcm,serial-led-en-pol; + brcm,serial-led-data-ppol; + + led@0 { + reg = <0>; + label = "led_red"; + }; + + led@1 { + reg = <1>; + label = "led_green"; + }; +}; -- cgit v1.3.1 From ab9e48f0961aee82c4427987fc58a32164889c58 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Fri, 18 Feb 2022 13:28:42 +0100 Subject: arm: dts: Add mmc[01] aliases to am33xx.dtsi This change provides similar aliases definitions as now present in Linux kernel v5.16.9 for am33xx.dtsi file. Signed-off-by: Lukasz Majewski --- arch/arm/dts/am33xx.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi index b5093020ee9..5f9b306ddbf 100644 --- a/arch/arm/dts/am33xx.dtsi +++ b/arch/arm/dts/am33xx.dtsi @@ -40,6 +40,8 @@ ethernet1 = &cpsw_emac1; spi0 = &spi0; spi1 = &spi1; + mmc0 = &mmc1; + mmc1 = &mmc2; }; cpus { -- cgit v1.3.1 From 4a9099ef1c77c4a166509a811d15694309bd4c17 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Fri, 18 Feb 2022 13:28:43 +0100 Subject: arm: dts: Add DTS description for MMC2 am33xx devices This code has been ported from Linux v5.16.9 arch/arm/boot/dts/am33xx.dtsi file to allow correct usage of MMC2 controller in U-Boot. This IP block is a bit specific as it is connected to L3 interconnect bus, whereas mmc[01] are connected to L4. Proper configuration of this block (including providing clock) is handled in ti-sysc.c driver. Signed-off-by: Lukasz Majewski --- arch/arm/dts/am33xx.dtsi | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi index 5f9b306ddbf..5871344edbf 100644 --- a/arch/arm/dts/am33xx.dtsi +++ b/arch/arm/dts/am33xx.dtsi @@ -42,6 +42,7 @@ spi1 = &spi1; mmc0 = &mmc1; mmc1 = &mmc2; + mmc2 = &mmc3; }; cpus { @@ -303,6 +304,35 @@ }; }; + target-module@47810000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x478102fc 0x4>, + <0x47810110 0x4>, + <0x47810114 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = , + , + ; + ti,syss-mask = <1>; + clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x47810000 0x1000>; + + mmc3: mmc@0 { + compatible = "ti,am335-sdhci"; + ti,needs-special-reset; + interrupts = <29>; + reg = <0x0 0x1000>; + status = "disabled"; + }; + }; + i2c0: i2c@44e0b000 { compatible = "ti,omap4-i2c"; #address-cells = <1>; @@ -359,15 +389,6 @@ status = "disabled"; }; - mmc3: mmc@47810000 { - compatible = "ti,omap4-hsmmc"; - ti,hwmods = "mmc3"; - ti,needs-special-reset; - interrupts = <29>; - reg = <0x47810000 0x1000>; - status = "disabled"; - }; - wdt2: wdt@44e35000 { compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; -- cgit v1.3.1 From 7da8754971cf02d9f883302343fc7aad3d7bc568 Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Wed, 16 Feb 2022 10:26:57 +1030 Subject: ARM: dts: ast2500: Add ngpios property to GPIO node Populate gpio_count in the gpio subsystem for the AST2500. Signed-off-by: Andrew Jeffery --- arch/arm/dts/ast2500.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi index 98359bf9242..ee66ef67042 100644 --- a/arch/arm/dts/ast2500.dtsi +++ b/arch/arm/dts/ast2500.dtsi @@ -214,6 +214,7 @@ reg = <0x1e780000 0x1000>; interrupts = <20>; gpio-ranges = <&pinctrl 0 0 220>; + ngpios = <228>; interrupt-controller; }; -- cgit v1.3.1