From 5764911e6735a63b0255bc45d04dcb21ae8d926a Mon Sep 17 00:00:00 2001 From: "b.l.huang" Date: Mon, 1 Jun 2020 00:01:28 +0800 Subject: rockchip: rk3328: add rock-pi-e dts file The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328 Quad-Core ARM Cortex A53. Net - Dual ethernet port, 1 X Gbe, 1 X 100M USB - USB 3.0 DC - USB-Type C, 5V 2A Storage - TF card, eMMC Just build idbloader.img and u-boot.itb for Rockpi E board and follow the blow steps to replace the relevant partition. dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc Signed-off-by: Banglang Huang --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 33 ++++ arch/arm/dts/rk3328-rock-pi-e.dts | 267 ++++++++++++++++++++++++++++++ 3 files changed, 302 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi create mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts (limited to 'arch') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c6af87cf5e8..61afe94a056 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -107,7 +107,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ dtb-$(CONFIG_ROCKCHIP_RK3328) += \ rk3328-evb.dtb \ rk3328-roc-cc.dtb \ - rk3328-rock64.dtb + rk3328-rock64.dtb \ + rk3328-rock-pi-e.dtb dtb-$(CONFIG_ROCKCHIP_RK3368) += \ rk3368-lion.dtb \ diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi new file mode 100644 index 00000000000..bf5b1f3adcb --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +#include "rk3328-u-boot.dtsi" +#include "rk3328-sdram-ddr3-666.dtsi" + +&gpio0 { + u-boot,dm-spl; +}; + +&pinctrl { + u-boot,dm-spl; +}; + +&sdmmc0m1_gpio { + u-boot,dm-spl; +}; + +&pcfg_pull_up_4ma { + u-boot,dm-spl; +}; + +&usb_host0_xhci { + vbus-supply = <&vcc5v0_host_xhci>; + status = "okay"; +}; + +/* Need this and all the pinctrl/gpio stuff above to set pinmux */ +&vcc_sd { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts new file mode 100644 index 00000000000..4b9f9a82480 --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e.dts @@ -0,0 +1,267 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +/dts-v1/; +#include "rk3328.dtsi" + +/ { + model = "Radxa Rockpi E"; + compatible = "radxa,rock-pi-e", "rockchip,rk3328"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_clkin"; + #clock-cells = <0>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0m1_gpio>; + regulator-name = "vcc_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_io>; + }; + + vcc5v0_host_xhci: vcc5v0-host-xhci-drv { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc5v0_host_xhci"; + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_emmc>; + status = "okay"; +}; + +&gmac2io { + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; + phy-supply = <&vcc_io>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; + snps,force_thresh_dma_mode; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x26>; + rx_delay = <0x11>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + rk805: rk805@18 { + compatible = "rockchip,rk805"; + status = "okay"; + reg = <0x18>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_18: LDO_REG1 { + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_emmc: LDO_REG2 { + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; +}; + +&io_domains { + status = "okay"; + + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; + vccio4-supply = <&vcc_io>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + pmuio-supply = <&vcc_io>; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + max-frequency = <150000000>; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; + supports-sd; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&saradc { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb20_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; -- cgit v1.3.1 From 3d82b1b3d3022b933e702515370755d559cf77dd Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 3 Jun 2020 15:25:28 +0800 Subject: rockchip: rk3399-evb: add stdout-path for the board The 'stdout-path' is missing after dts sync. Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux") Signed-off-by: Kever Yang --- arch/arm/dts/rk3399-evb-u-boot.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi index c42bd2856f6..1be54feacc0 100644 --- a/arch/arm/dts/rk3399-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi @@ -8,6 +8,7 @@ / { chosen { + stdout-path = "serial2:1500000n8"; u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; }; }; -- cgit v1.3.1 From 1831191b18d7d92705f74059f0720637206563e3 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 4 Jun 2020 20:21:40 +0530 Subject: roc-rk3399-pc: Add SPI boot U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) Trying to boot from MMC1 NOTICE: BL31: v2.2(release): NOTICE: BL31: Built : 15:05:37, May 12 2020 U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) SoC: Rockchip rk3399 Reset cause: POR Model: Firefly ROC-RK3399-PC Board DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Firefly ROC-RK3399-PC Board Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 12 +++++++++++- configs/roc-pc-mezzanine-rk3399_defconfig | 3 +++ configs/roc-pc-rk3399_defconfig | 3 +++ 3 files changed, 17 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index 141dd0b3067..fc155e69036 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -12,7 +12,11 @@ }; chosen { - u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; + }; + + config { + u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ }; vcc_hub_en: vcc_hub_en-regulator { @@ -40,6 +44,12 @@ vin-supply = <&vcc_vbus_typec0>; }; +&spi1 { + spi_flash: flash@0 { + u-boot,dm-pre-reloc; + }; +}; + &vdd_log { regulator-min-microvolt = <430000>; regulator-init-microvolt = <950000>; diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 3b91c25ff4d..fd1b85c1e4b 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -9,12 +9,15 @@ CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 6edd4a88226..80e70014818 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -9,12 +9,15 @@ CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y -- cgit v1.3.1 From b587acc6b1fbcbf6edcebef7613cbf7ea84a999e Mon Sep 17 00:00:00 2001 From: Marcin Juszkiewicz Date: Wed, 3 Jun 2020 17:15:13 +0200 Subject: rockchip: rockpro64: add SPI boot U-Boot TPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200) Trying to boot from SPI U-Boot 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200) SoC: Rockchip rk3399 Reset cause: RST Model: Pine64 RockPro64 v2.1 DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: vidconsole Err: vidconsole Model: Pine64 RockPro64 v2.1 Net: eth0: ethernet@fe300000 Hit any key to stop autoboot: 0 => Signed-off-by: Marcin Juszkiewicz Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 12 +++++++++++- configs/rockpro64-rk3399_defconfig | 3 +++ 2 files changed, 14 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi index deaa3efd39c..bac09df4a38 100644 --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -11,7 +11,17 @@ }; chosen { - u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; + u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdmmc, &sdhci; + }; + + config { + u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */ + }; +}; + +&spi1 { + spi_flash: flash@0 { + u-boot,dm-pre-reloc; }; }; diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 227503e3d43..807747485a3 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -8,6 +8,8 @@ CONFIG_TARGET_ROCKPRO64_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" CONFIG_MISC_INIT_R=y @@ -15,6 +17,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_SPI_LOAD=y CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y -- cgit v1.3.1 From 41c985d5fb01a9b864fc6b66a4b4c26296c5851a Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 5 Jun 2020 12:06:36 +0200 Subject: arm64: dts: rk3399-puma: fix gpio levels for gmac reset pin The gmac reset has opposite values for the gpio declaration and the separate reset-active, bring this in line to make u-boot also find the ethernet-phy. This mimics the upstream Linux commit found on https://lore.kernel.org/r/20200603132836.362519-1-heiko@sntech.de Signed-off-by: Heiko Stuebner Reviewed-by: Philipp Tomsich Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-puma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 07694b196fd..531520e771e 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -157,7 +157,7 @@ phy-mode = "rgmii"; pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; + snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <0 10000 50000>; tx_delay = <0x10>; -- cgit v1.3.1 From e2dd607bced83b0fe04e18a5295239fbc1ba2969 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 5 Jun 2020 12:06:37 +0200 Subject: arm64: dts: rk3399-puma: fix gpio levels for vcc5v0-host regulator The regulator enable-gpio uses opposite values for the declaration vs. the enable_active_low property, breaking the regulator enablement. Make the usbhost-supply work again by bringing them in sync again. This mimics the upstream Linux change found on: http://lore.kernel.org/r/20200604091239.424318-1-heiko@sntech.de Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang Reviewed-by: Philipp Tomsich --- arch/arm/dts/rk3399-puma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 531520e771e..72c06abd27e 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -101,7 +101,7 @@ vcc5v0_host: vcc5v0-host-regulator { compatible = "regulator-fixed"; - gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; + gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; enable-active-low; pinctrl-names = "default"; pinctrl-0 = <&vcc5v0_host_en>; -- cgit v1.3.1 From efcb2bd9cb756a18db12a55e9538764d8c2cd0f4 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 5 Jun 2020 12:06:38 +0200 Subject: rockchip: puma: fix indentation for -u-boot.dtsi Tabs not spaces, so transform it to the common styling. Signed-off-by: Heiko Stuebner Reviewed-by: Philipp Tomsich Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-puma-u-boot.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/rk3399-puma-u-boot.dtsi b/arch/arm/dts/rk3399-puma-u-boot.dtsi index 3ad11398332..ddb5fa6e763 100644 --- a/arch/arm/dts/rk3399-puma-u-boot.dtsi +++ b/arch/arm/dts/rk3399-puma-u-boot.dtsi @@ -2,24 +2,24 @@ #include "rk3399-u-boot.dtsi" / { - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ - u-boot,boot-led = "module_led"; - sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; - }; + config { + u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ + u-boot,boot-led = "module_led"; + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = \ + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = \ "same-as-spl", &norflash, &sdhci, &sdmmc; - }; + }; - aliases { - spi0 = &spi1; - spi1 = &spi5; - }; + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; /* * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module -- cgit v1.3.1 From 97fa7847253cda048f290e640c1903130351860d Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 5 Jun 2020 12:06:40 +0200 Subject: rockchip: puma: reorganize devicetrees to actually work and match upstream So far the puma dts files only just included the main puma dtsi without handling the actual baseboard and rk3399-puma.dtsi was very much detached from the variant in the mainline Linux kernel. Recent changes resulted in a strange situation with nonworking puma boards. Commit ab800e5a6f28 ("arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi") moved the sdram include from rk3399-puma-ddrX.dts to new files rk3399-puma-ddrx-u-boot.dtsi which were never included anywhere though. Commit 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux") replaced the rk3399-puma.dtsi nearly completely, but in the kernel it definitly depends on a baseboard dts to actually enable peripherals like sd-slot, uarts, etc. So to untagle this and bring the whole thing more in line with mainline Linux, bring the rk3399-puma-haikou.dts over as well, drop the separate DDR-option devicetrees and instead replace them with a puma Kconfig option to select and include the needed DDR variant. Signed-off-by: Heiko Stuebner Reviewed-by: Philipp Tomsich Reviewed-by: Kever Yang --- arch/arm/dts/Makefile | 4 +- arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi | 4 - arch/arm/dts/rk3399-puma-ddr1333.dts | 8 - arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi | 4 - arch/arm/dts/rk3399-puma-ddr1600.dts | 9 - arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi | 4 - arch/arm/dts/rk3399-puma-ddr1866.dts | 8 - arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 64 +++++++ arch/arm/dts/rk3399-puma-haikou.dts | 271 +++++++++++++++++++++++++++ arch/arm/dts/rk3399-puma-u-boot.dtsi | 53 ------ board/theobroma-systems/puma_rk3399/Kconfig | 15 ++ configs/puma-rk3399_defconfig | 2 +- 12 files changed, 352 insertions(+), 94 deletions(-) delete mode 100644 arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3399-puma-ddr1333.dts delete mode 100644 arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3399-puma-ddr1600.dts delete mode 100644 arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi delete mode 100644 arch/arm/dts/rk3399-puma-ddr1866.dts create mode 100644 arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-haikou.dts delete mode 100644 arch/arm/dts/rk3399-puma-u-boot.dtsi (limited to 'arch') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 61afe94a056..9900b442741 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -131,9 +131,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-nanopi-neo4.dtb \ rk3399-orangepi.dtb \ rk3399-pinebook-pro.dtb \ - rk3399-puma-ddr1333.dtb \ - rk3399-puma-ddr1600.dtb \ - rk3399-puma-ddr1866.dtb \ + rk3399-puma-haikou.dtb \ rk3399-roc-pc.dtb \ rk3399-roc-pc-mezzanine.dtb \ rk3399-rock-pi-4.dtb \ diff --git a/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi deleted file mode 100644 index 39d3927f498..00000000000 --- a/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi +++ /dev/null @@ -1,4 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -#include "rk3399-puma-u-boot.dtsi" -#include "rk3399-sdram-ddr3-1333.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1333.dts b/arch/arm/dts/rk3399-puma-ddr1333.dts deleted file mode 100644 index 80f27699f42..00000000000 --- a/arch/arm/dts/rk3399-puma-ddr1333.dts +++ /dev/null @@ -1,8 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; - -#include "rk3399-puma.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi deleted file mode 100644 index be58311dc48..00000000000 --- a/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi +++ /dev/null @@ -1,4 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -#include "rk3399-puma-u-boot.dtsi" -#include "rk3399-sdram-ddr3-1600.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1600.dts b/arch/arm/dts/rk3399-puma-ddr1600.dts deleted file mode 100644 index cb76b0165cf..00000000000 --- a/arch/arm/dts/rk3399-puma-ddr1600.dts +++ /dev/null @@ -1,9 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; - -#include "rk3399-puma.dtsi" -#include "rk3399-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi deleted file mode 100644 index 48da0763291..00000000000 --- a/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi +++ /dev/null @@ -1,4 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -#include "rk3399-puma-u-boot.dtsi" -#include "rk3399-sdram-ddr3-1866.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts deleted file mode 100644 index 80f27699f42..00000000000 --- a/arch/arm/dts/rk3399-puma-ddr1866.dts +++ /dev/null @@ -1,8 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; - -#include "rk3399-puma.dtsi" diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi new file mode 100644 index 00000000000..29846c4b001 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-u-boot.dtsi" + +#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1333 +#include "rk3399-sdram-ddr3-1333.dtsi" +#endif +#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1600 +#include "rk3399-sdram-ddr3-1600.dtsi" +#endif +#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1866 +#include "rk3399-sdram-ddr3-1866.dtsi" +#endif + +/ { + config { + u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ + u-boot,boot-led = "module_led"; + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = \ + "same-as-spl", &norflash, &sdhci, &sdmmc; + }; + + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; + + /* + * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module + * eMMC and SPI flash powered-down initially (in fact it keeps the + * reset signal asserted). Even though it is an enable signal, we + * model this as a regulator. + */ + bios_enable: bios_enable { + compatible = "regulator-fixed"; + u-boot,dm-pre-reloc; + regulator-name = "bios_enable"; + enable-active-high; + gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +&gpio1 { + u-boot,dm-pre-reloc; +}; + +&gpio3 { + u-boot,dm-pre-reloc; +}; + +&norflash { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3399-puma-haikou.dts b/arch/arm/dts/rk3399-puma-haikou.dts new file mode 100644 index 00000000000..d80d6b72682 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-haikou.dts @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH + */ + +/dts-v1/; +#include "rk3399-puma.dtsi" + +/ { + model = "Theobroma Systems RK3399-Q7 SoM"; + compatible = "tsd,rk3399-puma-haikou", "rockchip,rk3399"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + pinctrl-0 = <&led_pin_module>, <&led_sd_haikou>; + + sd-card-led { + label = "sd_card_led"; + gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + }; + }; + + i2s0-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Haikou,I2S-codec"; + simple-audio-card,mclk-fs = <512>; + + simple-audio-card,codec { + clocks = <&sgtl5000_clk>; + sound-dai = <&sgtl5000>; + }; + + simple-audio-card,cpu { + bitclock-master; + frame-master; + sound-dai = <&i2s0>; + }; + }; + + sgtl5000_clk: sgtl5000-oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_baseboard: vcc3v3-baseboard { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_baseboard"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_baseboard: vcc5v0-baseboard { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_baseboard"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_otg: vcc5v0-otg-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_drv>; + regulator-name = "vcc5v0_otg"; + regulator-always-on; + }; + + vdda_codec: vdda-codec { + compatible = "regulator-fixed"; + regulator-name = "vdda_codec"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_baseboard>; + }; + + vddd_codec: vddd-codec { + compatible = "regulator-fixed"; + regulator-name = "vddd_codec"; + regulator-boot-on; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1600000>; + vin-supply = <&vcc5v0_baseboard>; + }; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c2 { + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + status = "okay"; + clock-frequency = <400000>; + + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&sgtl5000_clk>; + #sound-dai-cells = <0>; + VDDA-supply = <&vdda_codec>; + VDDIO-supply = <&vdda_codec>; + VDDD-supply = <&vddd_codec>; + status = "okay"; + }; +}; + +&i2c6 { + status = "okay"; + clock-frequency = <400000>; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; + status = "okay"; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&haikou_pin_hog>; + + hog { + haikou_pin_hog: haikou-pin-hog { + rockchip,pins = + /* LID_BTN */ + <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, + /* BATLOW# */ + <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, + /* SLP_BTN# */ + <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, + /* BIOS_DISABLE# */ + <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + led_sd_haikou: led-sd-gpio { + rockchip,pins = + <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb2 { + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = + <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + vmmc-supply = <&vcc3v3_baseboard>; + status = "okay"; +}; + +&spi5 { + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + dr_mode = "otg"; + status = "okay"; +}; + +&u2phy0_host { + phy-supply = <&vcc5v0_otg>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/arch/arm/dts/rk3399-puma-u-boot.dtsi b/arch/arm/dts/rk3399-puma-u-boot.dtsi deleted file mode 100644 index ddb5fa6e763..00000000000 --- a/arch/arm/dts/rk3399-puma-u-boot.dtsi +++ /dev/null @@ -1,53 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -#include "rk3399-u-boot.dtsi" -/ { - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ - u-boot,boot-led = "module_led"; - sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = \ - "same-as-spl", &norflash, &sdhci, &sdmmc; - }; - - aliases { - spi0 = &spi1; - spi1 = &spi5; - }; - - /* - * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module - * eMMC and SPI flash powered-down initially (in fact it keeps the - * reset signal asserted). Even though it is an enable signal, we - * model this as a regulator. - */ - bios_enable: bios_enable { - compatible = "regulator-fixed"; - u-boot,dm-pre-reloc; - regulator-name = "bios_enable"; - enable-active-high; - gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; -}; - -&gpio1 { - u-boot,dm-pre-reloc; -}; - -&gpio3 { - u-boot,dm-pre-reloc; -}; - -&norflash { - u-boot,dm-pre-reloc; -}; diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig index 9e232527549..e82623a1701 100644 --- a/board/theobroma-systems/puma_rk3399/Kconfig +++ b/board/theobroma-systems/puma_rk3399/Kconfig @@ -18,4 +18,19 @@ config ENV_SIZE config ENV_OFFSET default 0x3fc000 if ENV_IS_IN_SPI_FLASH +choice + prompt "Theobroma Systems RK3399-Q7 DDR Option" + default TARGET_PUMA_RK3399_RAM_DDR3_1333 + +config TARGET_PUMA_RK3399_RAM_DDR3_1333 + bool "DDR3-1333MHz" + +config TARGET_PUMA_RK3399_RAM_DDR3_1600 + bool "DDR3-1600MHz" + +config TARGET_PUMA_RK3399_RAM_DDR3_1866 + bool "DDR3-1866MHz" + +endchoice + endif diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index a148832b83d..47a60930b63 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-ddr1600" +CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -- cgit v1.3.1