From 5d8546efa7b134ff16f70c614571bd9d1676a4f8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 17:53:40 +0100 Subject: arm: socfpga: socrates: Add missing PHY skew config Add missing KSZ9021 PHY skew configuration for the EBV socrates board. Signed-off-by: Marek Vasut Cc: Joe Hershberger Cc: Chin Liang See Cc: Dinh Nguyen --- arch/arm/dts/socfpga_cyclone5_socrates.dts | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index 05b935da0a0..a18d16856b4 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -28,6 +28,15 @@ &gmac1 { status = "okay"; phy-mode = "rgmii"; + + rxd0-skew-ps = <0>; + rxd1-skew-ps = <0>; + rxd2-skew-ps = <0>; + rxd3-skew-ps = <0>; + txen-skew-ps = <0>; + txc-skew-ps = <2600>; + rxdv-skew-ps = <0>; + rxc-skew-ps = <2000>; }; &i2c0 { -- cgit v1.2.3 From 70311e69fa7f0b7c289eb6552ccc3f9fb7320c69 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_arria5_socdk.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 7d1836e8be7..5933a406cb0 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator { -- cgit v1.2.3 From c90ada94fba5486d4b4d3773013804982ccadb56 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 9eb5a2209c6..224928f7557 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; }; regulator_3_3v: 3-3-v-regulator { @@ -77,10 +78,6 @@ vqmmc-supply = <®ulator_3_3v>; }; -&usb1 { - status = "okay"; -}; - &qspi { status = "okay"; @@ -100,3 +97,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; -- cgit v1.2.3 From 5b5226a8e68eae394aed7ca2d7691ebd7ef8ba4e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts index b649c9ac089..dc09bed9019 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts @@ -16,6 +16,7 @@ aliases { ethernet0 = &gmac1; + udc0 = &usb1; }; memory { @@ -59,3 +60,7 @@ status = "okay"; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +}; -- cgit v1.2.3 From 9368aa6a680f150755a233be9f97956bba5a915e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts index e1e3d738bc4..7d3f9894723 100644 --- a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts +++ b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts @@ -16,6 +16,7 @@ aliases { ethernet0 = &gmac0; + udc0 = &usb1; }; memory { @@ -51,3 +52,7 @@ bus-width = <8>; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +}; -- cgit v1.2.3 From 225217da2804d1c61725e2974262bd2f27882cd7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts index d7c41c83533..e45c2abbc2b 100644 --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts @@ -14,9 +14,10 @@ bootargs = "console=ttyS0,115200"; }; - aliases { + aliases { ethernet0 = &gmac1; - }; + udc0 = &usb1; + }; memory { name = "memory"; @@ -90,3 +91,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; -- cgit v1.2.3 From b5a5d2bd967781818ab1eadcd3ce779d01676e2e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 19:24:22 +0100 Subject: arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Lukasz Majewski Cc: Lukasz Majewski --- arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index a18d16856b4..591d96c4120 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -14,6 +14,10 @@ bootargs = "console=ttyS0,115200"; }; + aliases { + udc0 = &usb1; + }; + memory { name = "memory"; device_type = "memory"; @@ -72,3 +76,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; -- cgit v1.2.3 From 8e535af2e441030f5e4b940a3756a0d92646b5fe Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 5 Dec 2015 21:07:23 +0100 Subject: arm: socfpga: Introduce common board code The SoCFPGA has reached a point where every single board code become the same, since each and every single board is probed equally from OF. Move the common board code into arch/arm/mach-socfpga/ . Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen --- arch/arm/mach-socfpga/Makefile | 2 +- arch/arm/mach-socfpga/board.c | 64 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-socfpga/board.c (limited to 'arch') diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 316b326d417..5cf9e23e2ba 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -8,7 +8,7 @@ # obj-y += misc.o timer.o reset_manager.o system_manager.o clock_manager.o \ - fpga_manager.o scan_manager.o + fpga_manager.o scan_manager.o board.o obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o # QTS-generated config file wrappers diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c new file mode 100644 index 00000000000..a41d0899d77 --- /dev/null +++ b/arch/arm/mach-socfpga/board.c @@ -0,0 +1,64 @@ +/* + * Altera SoCFPGA common board code + * + * Copyright (C) 2015 Marek Vasut + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void s_init(void) {} + +/* + * Miscellaneous platform dependent initialisations + */ +int board_init(void) +{ + /* Address of boot parameters for ATAG (if ATAG is used) */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +#ifdef CONFIG_USB_GADGET +struct dwc2_plat_otg_data socfpga_otg_data = { + .usb_gusbcfg = 0x1417, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + + return dwc2_udc_probe(&socfpga_otg_data); +} + +int g_dnl_board_usb_cable_connected(void) +{ + return 1; +} +#endif -- cgit v1.2.3 From ed77aeb575934ff8ec202a7fe6e0cdc07f8cee3e Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 2 Dec 2015 13:31:25 -0600 Subject: arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config property In order to re-use as much Cyclone5 and Arria5 code as possible to support the Arria10 platform, we need to wrap some of the code with #ifdef's. By adding CONFIG_TARGET_SOCFPGA_GEN5, we can shorten the check by not having to check for both AV || AV. Signed-off-by: Dinh Nguyen --- arch/arm/mach-socfpga/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 0cb9f9e281c..dea4ce569f7 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -2,9 +2,14 @@ if ARCH_SOCFPGA config TARGET_SOCFPGA_ARRIA5 bool + select TARGET_SOCFPGA_GEN5 config TARGET_SOCFPGA_CYCLONE5 bool + select TARGET_SOCFPGA_GEN5 + +config TARGET_SOCFPGA_GEN5 + bool choice prompt "Altera SOCFPGA board select" -- cgit v1.2.3 From e5ad7d9889f6c2af625449dcb4487a3936709e50 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 2 Dec 2015 13:31:32 -0600 Subject: arm: socfpga: remove building scan manager The scan manager is not needed for the Arria10. Edit the makefile to build the scan manager for arria5 and cyclone5 only. Signed-off-by: Dinh Nguyen Acked-by: Marek Vasut --- arch/arm/mach-socfpga/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 5cf9e23e2ba..809cd47947a 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -8,11 +8,12 @@ # obj-y += misc.o timer.o reset_manager.o system_manager.o clock_manager.o \ - fpga_manager.o scan_manager.o board.o + fpga_manager.o board.o + obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o # QTS-generated config file wrappers -obj-y += wrap_pll_config.o +obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += scan_manager.o wrap_pll_config.o obj-$(CONFIG_SPL_BUILD) += wrap_iocsr_config.o wrap_pinmux_config.o \ wrap_sdram_config.o CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR) -- cgit v1.2.3 From a1684b61054714daae7250e570fe3298f86605b7 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 2 Dec 2015 13:31:33 -0600 Subject: arm: socfpga: fix up a questionable macro for SDMMC Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen Signed-off-by: Marek Vasut [fix parenthesis in the sdmmc_mask] --- arch/arm/mach-socfpga/include/mach/system_manager.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index 8712f8ea117..c45edea32d3 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -129,9 +129,13 @@ struct socfpga_system_manager { #define SYSMGR_FPGAINTF_NAND (1 << 4) #define SYSMGR_FPGAINTF_SDMMC (1 << 5) -/* FIXME: This is questionable macro. */ -#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \ - ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38)) +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 3 +#else +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 +#endif + +#define SYSMGR_SDMMC_DRVSEL_SHIFT 0 /* EMAC Group Bit definitions */ #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 -- cgit v1.2.3