From 47cc45a91ccc86c718fef7e8a00188e1047cf3dd Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 12 Mar 2020 09:03:13 +0100 Subject: arm64: zynqmp Add support for zcu102 rev1.1 rev1.1 has different DDR sodimm module that's why it requires different DDR configuration. Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-zcu102-rev1.1.dts | 15 +++++++++++++++ 2 files changed, 16 insertions(+) create mode 100644 arch/arm/dts/zynqmp-zcu102-rev1.1.dts (limited to 'arch') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 820ee9733a0..ec8fd112f91 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -277,6 +277,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revB.dtb \ zynqmp-zcu102-rev1.0.dtb \ + zynqmp-zcu102-rev1.1.dtb \ zynqmp-zcu104-revA.dtb \ zynqmp-zcu104-revC.dtb \ zynqmp-zcu106-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.1.dts b/arch/arm/dts/zynqmp-zcu102-rev1.1.dts new file mode 100644 index 00000000000..b6798394fcf --- /dev/null +++ b/arch/arm/dts/zynqmp-zcu102-rev1.1.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU102 Rev1.1 + * + * (C) Copyright 2016 - 2020, Xilinx, Inc. + * + * Michal Simek + */ + +#include "zynqmp-zcu102-rev1.0.dts" + +/ { + model = "ZynqMP ZCU102 Rev1.1"; + compatible = "xlnx,zynqmp-zcu102-rev1.1", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; +}; -- cgit v1.3.1