From 6a0804c87e6d214beb72a4e90d96a1ef23a3e44a Mon Sep 17 00:00:00 2001 From: Julien Stephan Date: Wed, 29 Apr 2026 15:59:01 +0200 Subject: arm: dts: mt8189: Add ethernet support for Genio 520/720 boards Add Ethernet support for MediaTek MT8189-based Genio 520 and Genio 720 development boards. The ethernet interface is disabled by default in the SoC dtsi and enabled in the board-specific configuration with proper PHY settings. The ethernet related nodes are not part of current dt submission on the kernel [1] and come from downstream u-boot. When switching to OF_UPSTREAM we should add them back. [1]: https://lore.kernel.org/all/20251203-add-mediatek-genio-520-720-evk-v1-3-df794b2a30ae@collabora.com/ Signed-off-by: Julien Stephan Reviewed-by: Macpaul Lin Link: https://patch.msgid.link/20260429-add-ethernet-support-for-genio-520-720-v4-8-be54e17239b7@baylibre.com Signed-off-by: David Lechner --- arch/arm/dts/mt8189.dtsi | 77 ++++++++++++++++++++++++++++++++ arch/arm/dts/mt8371-genio-common.dtsi | 83 +++++++++++++++++++++++++++++++++++ 2 files changed, 160 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/mt8189.dtsi b/arch/arm/dts/mt8189.dtsi index 891d3249ecd..c965b00bb5c 100644 --- a/arch/arm/dts/mt8189.dtsi +++ b/arch/arm/dts/mt8189.dtsi @@ -381,6 +381,83 @@ #reset-cells = <1>; }; + eth: ethernet@1101a000 { + compatible = "mediatek,mt8189-gmac", "snps,dwmac-5.10a"; + reg = <0 0x1101a000 0 0x4000>; + interrupts = ; + interrupt-names = "macirq"; + clock-names = "mac_main", + "ptp_ref"; + clocks = <&topckgen_clk CLK_TOP_ETH_250M_SEL>, + <&topckgen_clk CLK_TOP_ETH_62P4M_PTP_SEL>; + assigned-clocks = <&topckgen_clk CLK_TOP_ETH_250M_SEL>, + <&topckgen_clk CLK_TOP_ETH_62P4M_PTP_SEL>, + <&topckgen_clk CLK_TOP_ETH_50M_RMII_SEL>; + assigned-clock-parents = <&topckgen_clk CLK_TOP_ETHPLL_D2>, + <&topckgen_clk CLK_TOP_ETHPLL_D8>, + <&topckgen_clk CLK_TOP_ETHPLL_D10>; + mediatek,pericfg = <&pericfg_ao_clk>; + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,txpbl = <16>; + snps,rxpbl = <16>; + clk-csr = <4>; + status = "disabled"; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr-osr-lmt = <0x7>; + snps,rd-osr-lmt = <0x7>; + snps,blen = <0 0 0 0 16 8 4>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + queue2 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + queue3 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x0>; + }; + queue1 { + snps,weight = <0x11>; + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + queue2 { + snps,weight = <0x12>; + snps,dcb-algorithm; + snps,priority = <0x2>; + }; + queue3 { + snps,weight = <0x13>; + snps,dcb-algorithm; + snps,priority = <0x3>; + }; + }; + }; + topckgen_clk: clock-controller@10000000 { compatible = "mediatek,mt8189-topckgen", "syscon"; reg = <0 0x10000000 0 0x1000>; diff --git a/arch/arm/dts/mt8371-genio-common.dtsi b/arch/arm/dts/mt8371-genio-common.dtsi index 1d4728e3732..123133b0eb8 100644 --- a/arch/arm/dts/mt8371-genio-common.dtsi +++ b/arch/arm/dts/mt8371-genio-common.dtsi @@ -312,6 +312,68 @@ bias-pull-up; }; }; + + eth_default_pins: eth-default-pins { + txd-pins { + pinmux = , + , + , + ; + drive-strength = ; + }; + cc-pins { + pinmux = , + , + , + ; + drive-strength = ; + }; + rxd-pins { + pinmux = , + , + , + ; + drive-strength = ; + }; + mdio-pins { + pinmux = , + ; + drive-strength = ; + input-enable; + }; + power-pins { + pinmux = , + ; + output-high; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + txd-pins { + pinmux = , + , + , + ; + }; + cc-pins { + pinmux = , + , + , + ; + }; + rxd-pins { + pinmux = , + , + , + ; + }; + mdio-pins { + pinmux = , + ; + input-disable; + bias-disable; + }; + }; }; &pmic { @@ -342,3 +404,24 @@ vbus-supply = <&usb_p4_vbus>; status = "okay"; }; + +ð { + /* + * TX clock is provided by MAC + */ + phy-mode = "rgmii-rxid"; + phy-handle = <&phy>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð_default_pins>; + pinctrl-1 = <ð_sleep_pins>; + status = "okay"; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + phy: phy@0 { + compatible = "ethernet-phy-idc0ff.0421"; + reg = <0>; + }; + }; +}; -- cgit v1.3.1