From 5bacb4402e338e856410ed841ae9bd85171b5022 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 30 Jan 2020 00:55:57 +0900 Subject: ARM: uniphier: remove adhoc reset deassertion for the NAND controller Now that the reset controlling of the Denali NAND driver (denali_dt.c) works for this platform, remove the adhoc reset deassert code. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 2 -- arch/arm/mach-uniphier/clk/Makefile | 4 ++-- arch/arm/mach-uniphier/clk/clk-ld4.c | 32 -------------------------------- arch/arm/mach-uniphier/clk/clk-pro4.c | 14 ++------------ arch/arm/mach-uniphier/clk/clk-pro5.c | 14 ++------------ arch/arm/mach-uniphier/clk/clk-pxs2.c | 14 ++------------ arch/arm/mach-uniphier/init.h | 1 - 7 files changed, 8 insertions(+), 73 deletions(-) delete mode 100644 arch/arm/mach-uniphier/clk/clk-ld4.c (limited to 'arch') diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 7535f915286..99727a30042 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -40,7 +40,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { .soc_id = UNIPHIER_LD4_ID, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init, - .clk_init = uniphier_ld4_clk_init, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) @@ -56,7 +55,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { .soc_id = UNIPHIER_SLD8_ID, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init, - .clk_init = uniphier_ld4_clk_init, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index d12f49e5230..c49e44754c0 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -11,9 +11,9 @@ obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o else -obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o pll-pro4.o dpll-tail.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c deleted file mode 100644 index 03939425039..00000000000 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Copyright (C) 2015-2016 Socionext Inc. - * Author: Masahiro Yamada - */ - -#include - -#include "../init.h" -#include "../sc-regs.h" - -void uniphier_ld4_clk_init(void) -{ - u32 tmp; - - /* deassert reset */ - tmp = readl(sc_base + SC_RSTCTRL); -#ifdef CONFIG_NAND_DENALI - tmp |= SC_RSTCTRL_NRST_NAND; -#endif - writel(tmp, sc_base + SC_RSTCTRL); - readl(sc_base + SC_RSTCTRL); /* dummy read */ - - /* provide clocks */ - tmp = readl(sc_base + SC_CLKCTRL); -#ifdef CONFIG_NAND_DENALI - tmp |= SC_CLKCTRL_CEN_NAND; -#endif - writel(tmp, sc_base + SC_CLKCTRL); - readl(sc_base + SC_CLKCTRL); /* dummy read */ -} diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 2b364dca410..798128b3024 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -12,36 +12,26 @@ void uniphier_pro4_clk_init(void) { +#ifdef CONFIG_USB_DWC3_UNIPHIER u32 tmp; /* deassert reset */ tmp = readl(sc_base + SC_RSTCTRL); -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; -#endif -#ifdef CONFIG_NAND_DENALI - tmp |= SC_RSTCTRL_NRST_NAND; -#endif writel(tmp, sc_base + SC_RSTCTRL); readl(sc_base + SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; writel(tmp, sc_base + SC_RSTCTRL2); readl(sc_base + SC_RSTCTRL2); /* dummy read */ -#endif /* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL); -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; -#endif -#ifdef CONFIG_NAND_DENALI - tmp |= SC_CLKCTRL_CEN_NAND; -#endif writel(tmp, sc_base + SC_CLKCTRL); readl(sc_base + SC_CLKCTRL); /* dummy read */ +#endif } diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 874964b2d5b..36006fd256c 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -10,35 +10,25 @@ void uniphier_pro5_clk_init(void) { +#ifdef CONFIG_USB_DWC3_UNIPHIER u32 tmp; /* deassert reset */ tmp = readl(sc_base + SC_RSTCTRL); -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; -#endif -#ifdef CONFIG_NAND_DENALI - tmp |= SC_RSTCTRL_NRST_NAND; -#endif writel(tmp, sc_base + SC_RSTCTRL); readl(sc_base + SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, sc_base + SC_RSTCTRL2); readl(sc_base + SC_RSTCTRL2); /* dummy read */ -#endif /* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL); -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; -#endif -#ifdef CONFIG_NAND_DENALI - tmp |= SC_CLKCTRL_CEN_NAND; -#endif writel(tmp, sc_base + SC_CLKCTRL); readl(sc_base + SC_CLKCTRL); /* dummy read */ +#endif } diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 8cb4f87ae54..c2a75ce0001 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -11,20 +11,15 @@ void uniphier_pxs2_clk_init(void) { +#ifdef CONFIG_USB_DWC3_UNIPHIER u32 tmp; /* deassert reset */ tmp = readl(sc_base + SC_RSTCTRL); -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; -#endif -#ifdef CONFIG_NAND_DENALI - tmp |= SC_RSTCTRL_NRST_NAND; -#endif writel(tmp, sc_base + SC_RSTCTRL); readl(sc_base + SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, sc_base + SC_RSTCTRL2); @@ -33,17 +28,12 @@ void uniphier_pxs2_clk_init(void) tmp = readl(sc_base + SC_RSTCTRL6); tmp |= 0x37; writel(tmp, sc_base + SC_RSTCTRL6); -#endif /* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL); -#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; -#endif -#ifdef CONFIG_NAND_DENALI - tmp |= SC_CLKCTRL_CEN_NAND; -#endif writel(tmp, sc_base + SC_CLKCTRL); readl(sc_base + SC_CLKCTRL); /* dummy read */ +#endif } diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index b37ab2fa508..9dc5b885a5f 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -90,7 +90,6 @@ void uniphier_ld11_pll_init(void); void uniphier_ld20_pll_init(void); void uniphier_pxs3_pll_init(void); -void uniphier_ld4_clk_init(void); void uniphier_pro4_clk_init(void); void uniphier_pro5_clk_init(void); void uniphier_pxs2_clk_init(void); -- cgit v1.3.1 From 407b01b3b3f548d951b3c35a40bb49bb82f31748 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 30 Jan 2020 22:07:59 +0900 Subject: mtd: rawnand: denali_dt: use UCLASS_MTD instead of UCLASS_MISC UCLASS_MTD is a better fit for NAND drivers. Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile drivers/mtd/mtd-uclass.c Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig of this platform enables NAND_DENALI_DT. Signed-off-by: Masahiro Yamada Reviewed-by: Miquel Raynal --- arch/arm/Kconfig | 1 + drivers/mtd/nand/raw/Kconfig | 2 +- drivers/mtd/nand/raw/denali_dt.c | 4 ++-- 3 files changed, 4 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 12363151688..f04b6a6d368 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1548,6 +1548,7 @@ config ARCH_UNIPHIER select DM_GPIO select DM_I2C select DM_MMC + select DM_MTD select DM_RESET select DM_SERIAL select DM_USB diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 7814d84ba01..23201ca7204 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -116,7 +116,7 @@ config NAND_DENALI config NAND_DENALI_DT bool "Support Denali NAND controller as a DT device" select NAND_DENALI - depends on OF_CONTROL && DM + depends on OF_CONTROL && DM_MTD help Enable the driver for NAND flash on platforms using a Denali NAND controller as a DT device. diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c index 587e480faa1..759ad40e517 100644 --- a/drivers/mtd/nand/raw/denali_dt.c +++ b/drivers/mtd/nand/raw/denali_dt.c @@ -160,7 +160,7 @@ static int denali_dt_probe(struct udevice *dev) U_BOOT_DRIVER(denali_nand_dt) = { .name = "denali-nand-dt", - .id = UCLASS_MISC, + .id = UCLASS_MTD, .of_match = denali_nand_dt_ids, .probe = denali_dt_probe, .priv_auto_alloc_size = sizeof(struct denali_nand_info), @@ -171,7 +171,7 @@ void board_nand_init(void) struct udevice *dev; int ret; - ret = uclass_get_device_by_driver(UCLASS_MISC, + ret = uclass_get_device_by_driver(UCLASS_MTD, DM_GET_DRIVER(denali_nand_dt), &dev); if (ret && ret != -ENODEV) -- cgit v1.3.1 From 6da69d33f5280c9c80690310e1fb3d3e1c821d3e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 30 Jan 2020 22:20:37 +0900 Subject: ARM: uniphier: set gd->ram_base correctly gd->ram_base is not set at all if the end address of the DRAM ch0 exceeds the 4GB limit. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram_init.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 13821a92883..5f9d90fe6dc 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -248,12 +248,7 @@ int dram_init(void) max_size = (1ULL << 32) - dram_map[i].base; - if (dram_map[i].size > max_size) { - gd->ram_size += max_size; - break; - } - - gd->ram_size += dram_map[i].size; + gd->ram_size = min(dram_map[i].size, max_size); if (!valid_bank_found) gd->ram_base = dram_map[i].base; -- cgit v1.3.1