From 626879b7946287b22ce800be3b18961dd2c38549 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Tue, 10 Mar 2020 11:56:03 +0200 Subject: ARM: dts: sama7g5: add initial DT for sama7g5 SoC Add initial basic devicetree for sama7g5 SoC Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 65 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 arch/arm/dts/sama7g5.dtsi (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi new file mode 100644 index 00000000000..24b6f909579 --- /dev/null +++ b/arch/arm/dts/sama7g5.dtsi @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sama7g5.dtsi - Device Tree Include file for SAMA7G5 SoC. + * + * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * + * Author: Eugen Hristev + * Author: Claudiu Beznea + * + */ + +#include "skeleton.dtsi" + +/ { + model = "Microchip SAMA7G5 family SoC"; + compatible = "microchip,sama7g5"; + + clocks { + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + mck: mck { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + sdmmc1: sdio-host@e1208000 { + compatible = "microchip,sama7g5-sdhci"; + reg = <0xe1208000 0x300>; + clocks = <&mck>, <&mck>, <&mck>; + clock-names = "hclock", "multclk", "baseclk"; + status = "disabled"; + }; + + uart0: serial@e1824200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xe1824200 0x200>; + clocks = <&mck>; + clock-names = "usart"; + status = "disabled"; + }; + }; + }; +}; -- cgit v1.3.1 From 1d463d6735b8d9ec3342f52acbe9b0c49feeeca2 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Tue, 10 Mar 2020 11:56:38 +0200 Subject: board: atmel: sama7g5ek: add initial support for sama7g5ek Add initial support for sama7g5 evaluation kit board. Signed-off-by: Eugen Hristev --- arch/arm/dts/Makefile | 3 ++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 33 ++++++++++++++++++ arch/arm/dts/sama7g5ek.dts | 39 ++++++++++++++++++++++ arch/arm/mach-at91/Kconfig | 8 +++++ board/atmel/sama7g5ek/Kconfig | 15 +++++++++ board/atmel/sama7g5ek/MAINTAINERS | 7 ++++ board/atmel/sama7g5ek/Makefile | 7 ++++ board/atmel/sama7g5ek/sama7g5ek.c | 68 ++++++++++++++++++++++++++++++++++++++ configs/sama7g5ek_mmc1_defconfig | 59 +++++++++++++++++++++++++++++++++ include/configs/sama7g5ek.h | 46 ++++++++++++++++++++++++++ 10 files changed, 285 insertions(+) create mode 100644 arch/arm/dts/sama7g5ek-u-boot.dtsi create mode 100644 arch/arm/dts/sama7g5ek.dts create mode 100644 board/atmel/sama7g5ek/Kconfig create mode 100644 board/atmel/sama7g5ek/MAINTAINERS create mode 100644 board/atmel/sama7g5ek/Makefile create mode 100644 board/atmel/sama7g5ek/sama7g5ek.c create mode 100644 configs/sama7g5ek_mmc1_defconfig create mode 100644 include/configs/sama7g5ek.h (limited to 'arch') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index fd47e408f82..073cf0672e6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -889,6 +889,9 @@ dtb-$(CONFIG_TARGET_OMAP4_SDP4430) += \ dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \ omap5-uevm.dtb +dtb-$(CONFIG_TARGET_SAMA7G5EK) += \ + sama7g5ek.dtb + dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \ at91-sama5d2_ptc_ek.dtb diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi new file mode 100644 index 00000000000..c0f8f94027a --- /dev/null +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sama7g5ek-u-boot.dts - Device Tree file for SAMA7G5 SoC u-boot properties. + * + * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * + * Author: Eugen Hristev + * Author: Claudiu Beznea + * + */ + +/ { + chosen { + u-boot,dm-pre-reloc; + }; + + ahb { + u-boot,dm-pre-reloc; + + apb { + u-boot,dm-pre-reloc; + }; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&mck { + u-boot,dm-pre-reloc; +}; + diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts new file mode 100644 index 00000000000..41a754df6fa --- /dev/null +++ b/arch/arm/dts/sama7g5ek.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * sama7g5ek.dts - Device Tree file for SAMA7G5 EK + * SAMA7G5 Evaluation Kit + * + * Copyright (c) 2020, Microchip Technology Inc. + * 2020, Eugen Hristev + * 2020, Claudiu Beznea + */ +/dts-v1/; +#include "sama7g5.dtsi" +#include "sama7g5-pinfunc.h" + +/ { + model = "Microchip SAMA7G5 Evaluation Kit"; + compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + ahb { + + apb { + sdmmc1: sdio-host@e1208000 { + bus-width = <4>; + status = "okay"; + }; + + uart0: serial@e1824200 { + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index be1415f909a..c78a308f488 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -265,6 +265,13 @@ config TARGET_CORVUS select SUPPORT_SPL imply CMD_DM +config TARGET_SAMA7G5EK + bool "SAMA7G5 EK board" + select SAMA7G5 + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + + config TARGET_TAURUS bool "Support taurus" select AT91SAM9G20 @@ -327,6 +334,7 @@ source "board/atmel/at91sam9n12ek/Kconfig" source "board/atmel/at91sam9rlek/Kconfig" source "board/atmel/at91sam9x5ek/Kconfig" source "board/atmel/sam9x60ek/Kconfig" +source "board/atmel/sama7g5ek/Kconfig" source "board/atmel/sama5d2_ptc_ek/Kconfig" source "board/atmel/sama5d2_xplained/Kconfig" source "board/atmel/sama5d27_som1_ek/Kconfig" diff --git a/board/atmel/sama7g5ek/Kconfig b/board/atmel/sama7g5ek/Kconfig new file mode 100644 index 00000000000..a89db8d8a82 --- /dev/null +++ b/board/atmel/sama7g5ek/Kconfig @@ -0,0 +1,15 @@ +if TARGET_SAMA7G5EK + +config SYS_BOARD + default "sama7g5ek" + +config SYS_VENDOR + default "atmel" + +config SYS_SOC + default "at91" + +config SYS_CONFIG_NAME + default "sama7g5ek" + +endif diff --git a/board/atmel/sama7g5ek/MAINTAINERS b/board/atmel/sama7g5ek/MAINTAINERS new file mode 100644 index 00000000000..f66953ac4e3 --- /dev/null +++ b/board/atmel/sama7g5ek/MAINTAINERS @@ -0,0 +1,7 @@ +SAMA7G5 EK BOARD +M: Eugen Hristev +S: Maintained +F: board/atmel/sama7g5ek.c +F: include/configs/sama7g5ek.h +F: configs/sama7g5ek_mmc1_defconfig + diff --git a/board/atmel/sama7g5ek/Makefile b/board/atmel/sama7g5ek/Makefile new file mode 100644 index 00000000000..a6eedd10fa9 --- /dev/null +++ b/board/atmel/sama7g5ek/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020 Microchip Technology Inc. +# Eugen Hristev +# + +obj-y += sama7g5ek.o diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c new file mode 100644 index 00000000000..42b032cf363 --- /dev/null +++ b/board/atmel/sama7g5ek/sama7g5ek.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Microchip Technology, Inc. + * Eugen Hristev + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_late_init(void) +{ + return 0; +} + +#if (IS_ENABLED(CONFIG_DEBUG_UART_BOARD_INIT)) +static void board_uart0_hw_init(void) +{ + /* FLEXCOM3 IO0 */ + atmel_pio4_set_f_periph(AT91_PIO_PORTD, 17, ATMEL_PIO_PUEN_MASK); + /* FLEXCOM3 IO1 */ + atmel_pio4_set_f_periph(AT91_PIO_PORTD, 16, 0); + + at91_periph_clk_enable(ATMEL_ID_FLEXCOM3); +} + +void board_debug_uart_init(void) +{ + board_uart0_hw_init(); +} +#endif + +int board_early_init_f(void) +{ +#if (IS_ENABLED(CONFIG_DEBUG_UART)) + debug_uart_init(); +#endif + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig new file mode 100644 index 00000000000..d54af0ccbf6 --- /dev/null +++ b/configs/sama7g5ek_mmc1_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x66f00000 +CONFIG_TARGET_SAMA7G5EK=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x4000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xe1824200 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" +CONFIG_DEBUG_UART=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_SD_BOOT=y +CONFIG_USE_BOOTARGS=y +CONFIG_MISC_INIT_R=y +CONFIG_HUSH_PARSER=y +# CONFIG_AUTOBOOT is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x70000000 +CONFIG_CMD_STRINGS=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_ATMEL_PIO4=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91PIO4=y +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_TIMER=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER_HII is not set diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h new file mode 100644 index 00000000000..3b3432ba5e6 --- /dev/null +++ b/include/configs/sama7g5ek.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA7G5EK Board. + * + * Copyright (C) 2020 Microchip Corporation + * Eugen Hristev + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CONFIG_SYS_SDRAM_SIZE 0x20000000 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_INIT_SP_ADDR 0x218000 +#else +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#endif + +#define CONFIG_SYS_LOAD_ADDR 0x62000000 /* load address */ + +#undef CONFIG_BOOTCOMMAND +#ifdef CONFIG_SD_BOOT +/* u-boot env in sd/mmc card */ +#define FAT_ENV_INTERFACE "mmc" +#define FAT_ENV_DEVICE_AND_PART "0" +#define FAT_ENV_FILE "uboot.env" +/* bootstrap + u-boot + env in sd card */ +#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; " \ + "fatload mmc 0:1 0x62000000 zImage; " \ + "bootz 0x62000000 - 0x61000000" +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" +#endif + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) + +#endif -- cgit v1.3.1 From 3b86096a59c8b21165d15b4f6bdbe0663c81794e Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:19:19 +0300 Subject: ARM: dts: sama7g5: move clock frequencies for xtals in board file Move clock frequencies for crystals on board specific files. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 2 -- arch/arm/dts/sama7g5ek.dts | 10 ++++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 24b6f909579..618f3a37d5e 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -19,13 +19,11 @@ slow_xtal: slow_xtal { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <0>; }; main_xtal: main_xtal { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <0>; }; mck: mck { diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 41a754df6fa..03c7aa07ea4 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -23,6 +23,16 @@ stdout-path = "serial0:115200n8"; }; + clocks { + slow_xtal: slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal: main_xtal { + clock-frequency = <24000000>; + }; + }; + ahb { apb { -- cgit v1.3.1 From 5e19ade9e50e1277587a5ba74ecfd92395c5e1df Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:22:21 +0300 Subject: ARM: dts: sama7g5: add slow rc and main rc oscillators Add slow rc and main rc oscillators to dtsi. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 12 ++++++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 8 ++++++++ 2 files changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 618f3a37d5e..0fc7a5e1973 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -16,6 +16,18 @@ compatible = "microchip,sama7g5"; clocks { + slow_rc_osc: slow_rc_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + }; + + main_rc: main_rc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12000000>; + }; + slow_xtal: slow_xtal { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index c0f8f94027a..06af2f74eea 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -23,6 +23,14 @@ }; }; +&main_rc { + u-boot,dm-pre-reloc; +}; + +&slow_rc_osc { + u-boot,dm-pre-reloc; +}; + &uart0 { u-boot,dm-pre-reloc; }; -- cgit v1.3.1 From 072c9759403d6a5ae433be329a330f6fd9ff4386 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:23:02 +0300 Subject: ARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals Add dm-pre-reloc DT binding property for cristals. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5ek-u-boot.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 06af2f74eea..d10448e0316 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -27,10 +27,18 @@ u-boot,dm-pre-reloc; }; +&main_xtal { + u-boot,dm-pre-reloc; +}; + &slow_rc_osc { u-boot,dm-pre-reloc; }; +&slow_xtal { + u-boot,dm-pre-reloc; +}; + &uart0 { u-boot,dm-pre-reloc; }; -- cgit v1.3.1 From 09f19f77706a86a0fa7e7ae4805606f79fb56985 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:23:49 +0300 Subject: ARM: dts: sama7g5: add slow clock bindings Add DT bindings for slow clock driver. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 0fc7a5e1973..d27d246a682 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -55,6 +55,13 @@ #address-cells = <1>; #size-cells = <1>; + clk32: sckc@e001d050 { + compatible = "microchip,sam9x60-sckc"; + reg = <0xe001d050 0x4>; + clocks = <&slow_rc_osc>, <&slow_xtal>; + #clock-cells = <1>; + }; + sdmmc1: sdio-host@e1208000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1208000 0x300>; -- cgit v1.3.1 From 33fa0b6cef32d040de3443ca9767ff40781f23c5 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:24:25 +0300 Subject: ARM: dts: sama7g5: add PMC bindings Add DT bindings for PMC driver. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 9 +++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ++++ 2 files changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index d27d246a682..62368062447 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -55,6 +55,15 @@ #address-cells = <1>; #size-cells = <1>; + pmc: pmc@e0018000 { + compatible = "microchip,sama7g5-pmc"; + reg = <0xe0018000 0x200>; + #clock-cells = <2>; + clocks = <&clk32 1>, <&clk32 0>, <&main_xtal>, <&main_rc>; + clock-names = "td_slck", "md_slck", "main_xtal", "main_rc"; + status = "okay"; + }; + clk32: sckc@e001d050 { compatible = "microchip,sam9x60-sckc"; reg = <0xe001d050 0x4>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index d10448e0316..428b98c3033 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -31,6 +31,10 @@ u-boot,dm-pre-reloc; }; +&pmc { + u-boot,dm-pre-reloc; +}; + &slow_rc_osc { u-boot,dm-pre-reloc; }; -- cgit v1.3.1 From 394f52070965621ce1c1e2fa454644636dd605b3 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:26:12 +0300 Subject: ARM: dts: sama7g5: switch to PMC bindings Get rid of software defined MCK and switch to PMC bindings for IPs currently present in device tree. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 13 ++++--------- arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ---- 2 files changed, 4 insertions(+), 13 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 62368062447..a41306431ac 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -10,6 +10,7 @@ */ #include "skeleton.dtsi" +#include / { model = "Microchip SAMA7G5 family SoC"; @@ -37,12 +38,6 @@ compatible = "fixed-clock"; #clock-cells = <0>; }; - - mck: mck { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; }; ahb { @@ -74,15 +69,15 @@ sdmmc1: sdio-host@e1208000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1208000 0x300>; - clocks = <&mck>, <&mck>, <&mck>; - clock-names = "hclock", "multclk", "baseclk"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>; + clock-names = "hclock", "multclk"; status = "disabled"; }; uart0: serial@e1824200 { compatible = "atmel,at91sam9260-usart"; reg = <0xe1824200 0x200>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; clock-names = "usart"; status = "disabled"; }; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 428b98c3033..95d9c3bff2c 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -47,7 +47,3 @@ u-boot,dm-pre-reloc; }; -&mck { - u-boot,dm-pre-reloc; -}; - -- cgit v1.3.1 From 13f986b748fea1ca15ffd260fd332fc4dbd58bfb Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 15:35:55 +0300 Subject: ARM: dts: sama7g5: add CPU bindings Add CPU DT bindings. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index a41306431ac..7918b9174e2 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -40,6 +40,18 @@ }; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + A7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>; + clock-names = "cpu", "master", "xtal"; + }; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; -- cgit v1.3.1 From b032230f877ce6226cca002b00a258f9bf8d4f84 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 2 Jun 2020 18:42:18 +0300 Subject: ARM: dts: sama7g5: add pit64b support Add DT bindings for PIT64B driver. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 8 ++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ++++ 2 files changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 7918b9174e2..d7906c7f861 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -86,6 +86,14 @@ status = "disabled"; }; + pit64b0: timer@e1800000 { + compatible = "microchip,sama7g5-pit64b"; + reg = <0xe1800000 0x4000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>; + clock-names = "pclk", "gclk"; + status = "okay"; + }; + uart0: serial@e1824200 { compatible = "atmel,at91sam9260-usart"; reg = <0xe1824200 0x200>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 95d9c3bff2c..27e0f316f31 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -31,6 +31,10 @@ u-boot,dm-pre-reloc; }; +&pit64b0 { + u-boot,dm-pre-reloc; +}; + &pmc { u-boot,dm-pre-reloc; }; -- cgit v1.3.1 From 47a13af5863504cd97998e3778e35038fb5bd982 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 4 Jun 2020 10:37:13 +0300 Subject: ARM: dts: at91: sama7g5: add pinctrl node Add pioA pinctrl node. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 13 +++++++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 8 ++++++++ 2 files changed, 21 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index d7906c7f861..1955dd4a5b3 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -62,6 +62,19 @@ #address-cells = <1>; #size-cells = <1>; + pioA: pinctrl@e0014000 { + compatible = "atmel,sama5d2-gpio"; + reg = <0xe0014000 0x800>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; + status = "okay"; + + pinctrl: pinctrl_default { + compatible = "microchip,sama7g5-pinctrl"; + }; + }; + pmc: pmc@e0018000 { compatible = "microchip,sama7g5-pmc"; reg = <0xe0018000 0x200>; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 27e0f316f31..4af4d1bb5bc 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -31,6 +31,14 @@ u-boot,dm-pre-reloc; }; +&pioA { + u-boot,dm-pre-reloc; + + pinctrl { + u-boot,dm-pre-reloc; + }; +}; + &pit64b0 { u-boot,dm-pre-reloc; }; -- cgit v1.3.1 From 7d41a8da8480f549d60ff318a9d879ec26579759 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 4 Jun 2020 10:38:49 +0300 Subject: ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3 Add pinctrl for sdmmc1 and flx3. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5ek-u-boot.dtsi | 4 ++++ arch/arm/dts/sama7g5ek.dts | 30 ++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/sama7g5ek-u-boot.dtsi index 4af4d1bb5bc..5e1a0d53a53 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/sama7g5ek-u-boot.dtsi @@ -39,6 +39,10 @@ }; }; +&pinctrl_flx3_default { + u-boot,dm-pre-reloc; +}; + &pit64b0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 03c7aa07ea4..a9190bfcb33 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -38,12 +38,42 @@ apb { sdmmc1: sdio-host@e1208000 { bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default + &pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>; status = "okay"; }; uart0: serial@e1824200 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx3_default>; status = "okay"; }; }; }; }; + +&pinctrl { + pinctrl_flx3_default: flx3_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default { + pinmux = , + , + , + , + ; + bias-pull-up; + }; + + pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default { + pinmux = , + , + , + ; + bias-pull-up; + }; +}; -- cgit v1.3.1 From e95af87e9b4f6a251329da5ee1fa72dcf54abb86 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 9 Jun 2020 13:53:00 +0300 Subject: ARM: dts: sama7g5: add GMAC0 Add GMAC0. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 11 +++++++++++ arch/arm/dts/sama7g5ek.dts | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 1955dd4a5b3..df271a78bf7 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -114,6 +114,17 @@ clock-names = "usart"; status = "disabled"; }; + + gmac0: ethernet@e2800000 { + compatible = "cdns,sama7g5-gem"; + reg = <0xe2800000 0x4000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>; + clock-names = "hclk", "pclk", "tx_clk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 51>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */ + assigned-clock-rates = <125000000>; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index a9190bfcb33..194f4644b59 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -53,6 +53,19 @@ }; }; +&gmac0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac0_default>; + phy-mode = "rgmii-id"; + status = "okay"; + + ethernet-phy@7 { + reg = <0x7>; + }; +}; + &pinctrl { pinctrl_flx3_default: flx3_default { pinmux = , @@ -76,4 +89,23 @@ ; bias-pull-up; }; + + pinctrl_gmac0_default: gmac0_default { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + }; }; -- cgit v1.3.1 From 3e5853e6a1b5aa239b1143420e789bca880ef165 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 9 Jun 2020 13:53:45 +0300 Subject: ARM: dts: sama7g5: add GMAC1 Add GMAC1. Signed-off-by: Claudiu Beznea --- arch/arm/dts/sama7g5.dtsi | 8 ++++++++ arch/arm/dts/sama7g5ek.dts | 27 +++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index df271a78bf7..17710e4e6f6 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -125,6 +125,14 @@ assigned-clock-rates = <125000000>; status = "disabled"; }; + + gmac1: ethernet@e2804000 { + compatible = "cdns,sama7g5-emac"; + reg = <0xe2804000 0x1000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 194f4644b59..3eac94896d8 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -66,6 +66,19 @@ }; }; +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac1_default>; + phy-mode = "rmii"; + status = "okay"; + + ethernet-phy@0 { + reg = <0x0>; + }; +}; + &pinctrl { pinctrl_flx3_default: flx3_default { pinmux = , @@ -108,4 +121,18 @@ ; bias-disable; }; + + pinctrl_gmac1_default: gmac1_default { + pinmux = , + , + , + , + , + , + , + , + , + ; + bias-disable; + }; }; -- cgit v1.3.1 From 9b6f157e19ef4bdc0d75b387ec7500c4c275beed Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 30 Jul 2020 15:50:59 +0300 Subject: ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1 SDMMC1 requires clock specification with assigned-clocks, such that the PMC will know which parent to assign and the initial start-up frequency. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 17710e4e6f6..9e9f84fe06f 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -96,6 +96,9 @@ reg = <0xe1208000 0x300>; clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>; clock-names = "hclock", "multclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 81>; + assigned-clock-rates = <200000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ status = "disabled"; }; -- cgit v1.3.1 From 523c10c1fdfc3738ee5f224798727e7c7deeb8cf Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 30 Jul 2020 15:52:13 +0300 Subject: ARM: dts: at91: sama7g5: add node for sdmmc0 Add node for sdmmc0 block. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 9e9f84fe06f..bf6462e4736 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -91,6 +91,17 @@ #clock-cells = <1>; }; + sdmmc0: sdio-host@e1204000 { + compatible = "microchip,sama7g5-sdhci"; + reg = <0xe1204000 0x300>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>; + clock-names = "hclock", "multclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 80>; + assigned-clock-rates = <200000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + status = "disabled"; + }; + sdmmc1: sdio-host@e1208000 { compatible = "microchip,sama7g5-sdhci"; reg = <0xe1208000 0x300>; -- cgit v1.3.1 From 7f4c89cc5c20b396ece095c443d6018c813981d4 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 30 Jul 2020 15:52:51 +0300 Subject: ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl Enable sdmmc0 on this board. A non-removable eMMC is connected on this block. Configure pincontrol accordingly. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5ek.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 3eac94896d8..452bf425df1 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -36,6 +36,15 @@ ahb { apb { + sdmmc0: sdio-host@e1204000 { + bus-width = <8>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default + &pinctrl_sdmmc0_ck_rstn_ds_cd_default>; + status = "okay"; + }; + sdmmc1: sdio-host@e1208000 { bus-width = <4>; pinctrl-names = "default"; @@ -86,6 +95,27 @@ bias-disable; }; + pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default { + pinmux = , + , + , + , + , + , + , + , + ; + bias-pull-up; + }; + + pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default { + pinmux = , + , + , + ; + bias-pull-up; + }; + pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default { pinmux = , , -- cgit v1.3.1 From 1c629fd033cef61ff45619211bfdb4d2a02f1a47 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Fri, 31 Jul 2020 15:19:23 +0300 Subject: ARM: dts: at91: sama7g5: add flexcom1 and i2c subnode Add flexcom1 and i2c subnode. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index bf6462e4736..0cb6eaf5d06 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -121,6 +121,24 @@ status = "okay"; }; + flx1: flexcom@e181c000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe181c000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe181c000 0x800>; + status = "disabled"; + + i2c1: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; + }; + }; + uart0: serial@e1824200 { compatible = "atmel,at91sam9260-usart"; reg = <0xe1824200 0x200>; -- cgit v1.3.1 From 9b614c87bb5ed281740b055dbe9ee3cf9c3ed571 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Fri, 31 Jul 2020 15:20:01 +0300 Subject: ARM: dts: sama7g5ek: add i2c1 bus and eeproms Add node for flx1 i2c1 subnode (and alias to bus 0) This bus has two eeprom devices connected. Signed-off-by: Eugen Hristev --- arch/arm/dts/sama7g5ek.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index 452bf425df1..b7c35559fe8 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -17,6 +17,7 @@ aliases { serial0 = &uart0; + i2c0 = &i2c1; }; chosen { @@ -62,6 +63,29 @@ }; }; +&flx1 { + atmel,flexcom-mode = <3>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx1_default>; + status = "okay"; + + eeprom@52 { + compatible = "microchip,24aa02e48"; + reg = <0x52>; + pagesize = <16>; + }; + + eeprom@53 { + compatible = "microchip,24aa02e48"; + reg = <0x53>; + pagesize = <16>; + }; +}; + &gmac0 { #address-cells = <1>; #size-cells = <0>; @@ -89,6 +113,12 @@ }; &pinctrl { + pinctrl_flx1_default: flx1_default { + pinmux = , + ; + bias-disable; + }; + pinctrl_flx3_default: flx3_default { pinmux = , ; -- cgit v1.3.1 From aeaef07c5124afbe848f727a24019cf432f5e011 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Fri, 30 Oct 2020 18:33:14 +0100 Subject: ARM: dts: sama7g5ek: fix TXC pin configuration TXC line is directly connected from the SoC to the KSZ9131 PHY. There is a transient state on this signal, before configuring it to RGMII, which leads to packet transmit being blocked. Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes the issue. Signed-off-by: Nicolas Ferre --- arch/arm/dts/sama7g5ek.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index b7c35559fe8..ff9c9eb45c6 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -90,7 +90,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac0_default>; + pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>; phy-mode = "rgmii-id"; status = "okay"; @@ -173,7 +173,6 @@ , , , - , , , , @@ -182,6 +181,11 @@ bias-disable; }; + pinctrl_gmac0_txc_default: gmac0_txc_default { + pinmux = ; + bias-pull-up; + }; + pinctrl_gmac1_default: gmac1_default { pinmux = , , -- cgit v1.3.1