From 65325fba5a8d6bcafb2fc1662bd82b348b735dc2 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 15 Nov 2019 10:27:07 +0800 Subject: rockchip: Convert to use FIT generator for optee Use generator script so that we can use environment for TEE source. $TEE for tee.bin, and if file not exist, the script can report a warning, and meke the build success without a error. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/fit_spl_optee.its | 50 -------------------- arch/arm/mach-rockchip/fit_spl_optee.sh | 78 ++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+), 50 deletions(-) delete mode 100644 arch/arm/mach-rockchip/fit_spl_optee.its create mode 100755 arch/arm/mach-rockchip/fit_spl_optee.sh (limited to 'arch') diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its deleted file mode 100644 index 6ed5d486f2e..00000000000 --- a/arch/arm/mach-rockchip/fit_spl_optee.its +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2017 Rockchip Electronic Co.,Ltd - * - * Simple U-boot fit source file containing U-Boot, dtb and optee - */ - -/dts-v1/; - -/ { - description = "Simple image with OP-TEE support"; - #address-cells = <1>; - - images { - uboot { - description = "U-Boot"; - data = /incbin/("../../../u-boot-nodtb.bin"); - type = "standalone"; - os = "U-Boot"; - arch = "arm"; - compression = "none"; - load = <0x61000000>; - }; - optee { - description = "OP-TEE"; - data = /incbin/("../../../tee.bin"); - type = "firmware"; - arch = "arm"; - os = "tee"; - compression = "none"; - load = <0x68400000>; - entry = <0x68400000>; - }; - fdt { - description = "dtb"; - data = /incbin/("../../../u-boot.dtb"); - type = "flat_dt"; - compression = "none"; - }; - }; - - configurations { - default = "conf"; - conf { - description = "Rockchip armv7 with OP-TEE"; - firmware = "optee"; - loadables = "uboot"; - fdt = "fdt"; - }; - }; -}; diff --git a/arch/arm/mach-rockchip/fit_spl_optee.sh b/arch/arm/mach-rockchip/fit_spl_optee.sh new file mode 100755 index 00000000000..89ef04312cf --- /dev/null +++ b/arch/arm/mach-rockchip/fit_spl_optee.sh @@ -0,0 +1,78 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Rockchip Electronic Co.,Ltd +# +# Script to generate FIT image source for 32-bit Rockchip SoCs with +# U-Boot proper, OPTEE, and devicetree. +# +# usage: $0 + +[ -z "$TEE" ] && TEE="tee.bin" + +if [ ! -f $TEE ]; then + echo "WARNING: TEE file $TEE NOT found, U-Boot.itb is non-functional" >&2 + echo "Please export path for TEE or copy tee.bin to U-Boot folder" >&2 + TEE=/dev/null +fi + +dtname=$1 + +cat << __HEADER_EOF +/* + * Copyright (C) 2017-2019 Rockchip Electronic Co.,Ltd + * + * Simple U-boot FIT source file containing U-Boot, dtb and optee + */ + +/dts-v1/; + +/ { + description = "FIT image with OP-TEE support"; + #address-cells = <1>; + + images { + uboot { + description = "U-Boot"; + data = /incbin/("u-boot-nodtb.bin"); + type = "standalone"; + os = "U-Boot"; + arch = "arm"; + compression = "none"; + load = <0x61000000>; + }; + optee { + description = "OP-TEE"; + data = /incbin/("$TEE"); + type = "firmware"; + arch = "arm"; + os = "tee"; + compression = "none"; + load = <0x68400000>; + entry = <0x68400000>; + }; + fdt { + description = "$(basename $dtname .dtb)"; + data = /incbin/("$dtname"); + type = "flat_dt"; + compression = "none"; + }; +__HEADER_EOF + +cat << __CONF_HEADER_EOF + }; + + configurations { + default = "conf"; + conf { + description = "$(basename $dtname .dtb)"; + firmware = "optee"; + loadables = "uboot"; + fdt = "fdt"; + }; +__CONF_HEADER_EOF + +cat << __ITS_EOF + }; +}; +__ITS_EOF -- cgit v1.2.3 From c618bb00429238ab23b1607f8190bda1575ec990 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 19 Nov 2019 13:56:22 +0530 Subject: rockchip: Setup dwc3_device (for non-dm gadgets) Setup dwc3_device structure for non-dm gadgets, which is used in rk3399 platforms. dwc3_device would have basic regbase, dr_mode, high speed and 16-bit UTMI+ etc. Cc: Marek Vasut Tested-by: Levin Du Signed-off-by: Jagan Teki Reviewed-by: Kever Yang (Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3) Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/board.c | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index c90eb976d0f..8cd8911ad3e 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -49,8 +49,10 @@ void enable_caches(void) } #endif -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#if defined(CONFIG_USB_GADGET) #include + +#if defined(CONFIG_USB_GADGET_DWC2_OTG) #include static struct dwc2_plat_otg_data otg_data = { @@ -117,7 +119,33 @@ int board_usb_cleanup(int index, enum usb_init_type init) { return 0; } -#endif +#endif /* CONFIG_USB_GADGET_DWC2_OTG */ + +#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET) +#include + +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_HIGH, + .base = 0xfe800000, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, + .dis_u2_susphy_quirk = 1, + .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW, +}; + +int usb_gadget_handle_interrupts(void) +{ + dwc3_uboot_handle_interrupt(0); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + return dwc3_uboot_init(&dwc3_device_data); +} +#endif /* CONFIG_USB_DWC3_GADGET */ + +#endif /* CONFIG_USB_GADGET */ #if CONFIG_IS_ENABLED(FASTBOOT) int fastboot_set_reboot_flag(void) -- cgit v1.2.3 From 8019d32c4701b95410113541deb7f28d5c2b02a5 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 19 Nov 2019 12:04:02 +0100 Subject: rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evb As part of loading trustedfirmware, the SPL is required to place portions of code into the socs sram but the mmc controllers can only do dma transfers into the regular memory, not sram. The results of this are not directly visible in u-boot itself, but manifest as security-relate cpu aborts during boot of for example Linux. There were a number of attempts to solve this elegantly but so far discussion is still ongoing, so to make the board at least boot correctly put both mmc controllers into fifo-mode, which also circumvents the issue for now. Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang Reviewed-by: Philipp Tomsich --- arch/arm/dts/px30-evb-u-boot.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/px30-evb-u-boot.dtsi b/arch/arm/dts/px30-evb-u-boot.dtsi index 3de9c7068ea..a2a2c07dcc1 100644 --- a/arch/arm/dts/px30-evb-u-boot.dtsi +++ b/arch/arm/dts/px30-evb-u-boot.dtsi @@ -31,12 +31,15 @@ &sdmmc { u-boot,dm-pre-reloc; - /* temporary till I find out why dma mode doesn't work */ - fifo-mode; + /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ + u-boot,spl-fifo-mode; }; &emmc { u-boot,dm-pre-reloc; + + /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ + u-boot,spl-fifo-mode; }; &grf { -- cgit v1.2.3