From 32f9ef3e2ba813ea541f08c551b9188ef4749307 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=B6rg=20Krause?= Date: Thu, 26 Mar 2015 23:53:11 +0100 Subject: ARM: mxs: Get boot mode from OCRAM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reading the boot mode pins after power-up does not necessarily represent the boot mode used by the ROM loader. For example the state of a pin may have changed because a recovery switch which was pressed to enter USB mode is already released after plugging in USB. The ROM loader stores the value a fixed address in OCRAM. Use this value instead of reading the boot map pins. The GLOBAL_BOOT_MODE_ADDR for i.MX28 is taken from an U-Boot patch for the MX28EVK: http://repository.timesys.com/buildsources/u/u-boot/u-boot-2009.08/u-boot-2009.08-mx28-201012211513.patch Leave the boot mode detection for the i.MX23 untouched. Someone has to test whether the i.MX ROM loader does also store the boot mode in OCRAM and if the address match. This patch superseeds my incorrect patch: ARM: mxs: get boot mode from OTP http://patchwork.ozlabs.org/patch/454930/ Signed-off-by: Jörg Krause Cc: Stefano Babic --- arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 29 ++++++----------------------- 1 file changed, 6 insertions(+), 23 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index d7956e57de2..eb8669bb2e7 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -49,13 +49,6 @@ static const iomux_cfg_t iomux_boot[] = { MX23_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD, MX23_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD, MX23_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, -#elif defined(CONFIG_MX28) - MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD, - MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, #endif }; @@ -65,10 +58,10 @@ static uint8_t mxs_get_bootmode_index(void) int i; uint8_t masked; +#if defined(CONFIG_MX23) /* Setup IOMUX of bootmode pads to GPIO */ mxs_iomux_setup_multiple_pads(iomux_boot, ARRAY_SIZE(iomux_boot)); -#if defined(CONFIG_MX23) /* Setup bootmode pins as GPIO input */ gpio_direction_input(MX23_PAD_LCD_D00__GPIO_1_0); gpio_direction_input(MX23_PAD_LCD_D01__GPIO_1_1); @@ -83,21 +76,11 @@ static uint8_t mxs_get_bootmode_index(void) bootmode |= (gpio_get_value(MX23_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3; bootmode |= (gpio_get_value(MX23_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5; #elif defined(CONFIG_MX28) - /* Setup bootmode pins as GPIO input */ - gpio_direction_input(MX28_PAD_LCD_D00__GPIO_1_0); - gpio_direction_input(MX28_PAD_LCD_D01__GPIO_1_1); - gpio_direction_input(MX28_PAD_LCD_D02__GPIO_1_2); - gpio_direction_input(MX28_PAD_LCD_D03__GPIO_1_3); - gpio_direction_input(MX28_PAD_LCD_D04__GPIO_1_4); - gpio_direction_input(MX28_PAD_LCD_D05__GPIO_1_5); - - /* Read bootmode pads */ - bootmode |= (gpio_get_value(MX28_PAD_LCD_D00__GPIO_1_0) ? 1 : 0) << 0; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D01__GPIO_1_1) ? 1 : 0) << 1; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D02__GPIO_1_2) ? 1 : 0) << 2; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) << 4; - bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5; + /* The global boot mode will be detected by ROM code and its value + * is stored at the fixed address 0x00019BF0 in OCRAM. + */ +#define GLOBAL_BOOT_MODE_ADDR 0x00019BF0 + bootmode = __raw_readl(GLOBAL_BOOT_MODE_ADDR); #endif for (i = 0; i < ARRAY_SIZE(mxs_boot_modes); i++) { -- cgit v1.2.3 From 78c5a180871d4337d4cfd41d6739a04b271b2e4d Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 3 Apr 2015 16:52:52 -0700 Subject: arm: mx6: ddr: add pd_fast_exit flag to system information DDR3 has a special Precharge power-down mode: fast-exit vs slow-exit. In slow-exit mode the DLL is off but in some quiescent state that makes it easy to turn on again in tXPDLL cycles (about 10tCK) vs the full tDLLK (512tCK). In fast-exist mode the DLL is maintained such that it is ready again in about 3tCK. Signed-off-by: Tim Harvey --- arch/arm/cpu/armv7/mx6/ddr.c | 7 ++++++- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index fef2231a390..653d58ef243 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -514,17 +514,21 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, /* MR2 */ val = (sysinfo->rtt_wr & 3) << 9 | (ddr3_cfg->SRT & 1) << 7 | ((tcwl - 3) & 3) << 3; + debug("MR2 CS%d: 0x%08x\n", cs, (u32)MR(val, 2, 3, cs)); mmdc0->mdscr = MR(val, 2, 3, cs); /* MR3 */ + debug("MR3 CS%d: 0x%08x\n", cs, (u32)MR(0, 3, 3, cs)); mmdc0->mdscr = MR(0, 3, 3, cs); /* MR1 */ val = ((sysinfo->rtt_nom & 1) ? 1 : 0) << 2 | ((sysinfo->rtt_nom & 2) ? 1 : 0) << 6; + debug("MR1 CS%d: 0x%08x\n", cs, (u32)MR(val, 1, 3, cs)); mmdc0->mdscr = MR(val, 1, 3, cs); /* MR0 */ val = ((tcl - 1) << 4) | /* CAS */ (1 << 8) | /* DLL Reset */ ((twr - 3) << 9); /* Write Recovery */ + debug("MR0 CS%d: 0x%08x\n", cs, (u32)MR(val, 0, 3, cs)); mmdc0->mdscr = MR(val, 0, 3, cs); /* ZQ calibration */ val = (1 << 10); @@ -535,10 +539,11 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, mmdc0->mdpdc = (tcke & 0x7) << 16 | 5 << 12 | /* PWDT_1: 256 cycles */ 5 << 8 | /* PWDT_0: 256 cycles */ - 1 << 7 | /* SLOW_PD */ 1 << 6 | /* BOTH_CS_PD */ (tcksrx & 0x7) << 3 | (tcksre & 0x7); + if (!sysinfo->pd_fast_exit) + mmdc0->mdpdc |= (1 << 7); /* SLOW_PD */ mmdc0->mapsr = 0x00001006; /* ADOPT power down enabled */ /* Step 11: Configure ZQ calibration: one-time and periodic 1ms */ diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 8e0d7d15c17..c49aa6290c6 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -250,6 +250,7 @@ struct mx6_ddr_sysinfo { u8 mif3_mode; /* Command prediction working mode */ u8 rst_to_cke; /* Time from SDE enable to CKE rise */ u8 sde_to_rst; /* Time from SDE enable until DDR reset# is high */ + u8 pd_fast_exit;/* enable precharge powerdown fast-exit */ }; /* -- cgit v1.2.3 From b8ce6fe2613d0630db252c12716753bad08d47d8 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 20 Apr 2015 14:48:57 -0300 Subject: mx6: Add initial SPL support for HummingBoard-i2eX Add the initial SPL support for HummingBoard-i2eX, which is based on a MX6 Dual. For more information about HummingBoard, please check: http://www.solid-run.com/products/hummingboard/ Based on the work from Jon Nettleton and Rabeeh Khoury. Signed-off-by: Fabio Estevam Reviewed-by: Tom Rini --- arch/arm/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7ed0e205210..7c383cb89ab 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -523,6 +523,11 @@ config TARGET_MX6SABRESD select CPU_V7 select SUPPORT_SPL +config TARGET_MX6CUBOXI + bool "Support Solid-run mx6 boards" + select CPU_V7 + select SUPPORT_SPL + config TARGET_MX6SLEVK bool "Support mx6slevk" select CPU_V7 @@ -856,6 +861,7 @@ source "board/siemens/draco/Kconfig" source "board/siemens/pxm2/Kconfig" source "board/siemens/rut/Kconfig" source "board/silica/pengwyn/Kconfig" +source "board/solidrun/mx6cuboxi/Kconfig" source "board/solidrun/hummingboard/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" -- cgit v1.2.3