From aa6e94deabb45154cea07ad44c4a5c047bca078b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:37 -0500 Subject: global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- board/freescale/m5275evb/m5275evb.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'board/freescale/m5275evb') diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c index 1c4fb7232af..00fa35ca5f7 100644 --- a/board/freescale/m5275evb/m5275evb.c +++ b/board/freescale/m5275evb/m5275evb.c @@ -35,7 +35,7 @@ int dram_init(void) out_be16(&gpio_reg->par_sdram, 0x3FF); /* Set up chip select */ - out_be32(&sdp->sdbar0, CONFIG_SYS_SDRAM_BASE); + out_be32(&sdp->sdbar0, CFG_SYS_SDRAM_BASE); out_be32(&sdp->sdbmr0, MCF_SDRAMC_SDMRn_BAM_32M | MCF_SDRAMC_SDMRn_V); /* Set up timing */ @@ -49,34 +49,34 @@ int dram_init(void) setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL); /* Dummy write to start SDRAM */ - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; /* Send LEMR */ setbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_BNKAD_LEMR | MCF_SDRAMC_SDMR_AD(0x0) | MCF_SDRAMC_SDMR_CMD); - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; /* Send LMR */ out_be32(&sdp->sdmr, 0x058d0000); - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; /* Stop sending commands */ clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD); /* Set precharge */ setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL); - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; /* Stop manual precharge, send 2 IREF */ clrbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL); setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IREF); - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; out_be32(&sdp->sdmr, 0x018d0000); - *((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696; + *((volatile unsigned long *)CFG_SYS_SDRAM_BASE) = 0xa5a59696; /* Stop sending commands */ clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD); @@ -91,7 +91,7 @@ int dram_init(void) | MCF_SDRAMC_SDCR_RCNT((SDRAM_TREFI/(PERIOD*64)) - 1 + 1) | MCF_SDRAMC_SDCR_DQS_OE(0x3)); - gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; + gd->ram_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024; return 0; }; -- cgit v1.3.1