From b0b525a942040de7cc7c59ca310a078596ff4c8b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 3 Feb 2020 13:09:23 -0300 Subject: mx6ul_evk: Remove FEC related board code mx6ul_evk uses DM_ETH, so there is no need to have board code to setup the FEC IOMUX and to register the network ports via the old board_eth_init() method. Remove these FEC related pieces of code. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 50 ----------------------- 1 file changed, 50 deletions(-) (limited to 'board') diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 9cb5b14f135..07941fb1560 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -196,56 +196,6 @@ int board_ehci_hcd_init(int port) #endif #ifdef CONFIG_FEC_MXC -/* - * pin conflicts for fec1 and fec2, GPIO1_IO06 and GPIO1_IO07 can only - * be used for ENET1 or ENET2, cannot be used for both. - */ -static iomux_v3_cfg_t const fec1_pads[] = { - MX6_PAD_GPIO1_IO06__ENET1_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL), - MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_TX_EN__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL), - MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_RX_ER__ENET1_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET1_RX_EN__ENET1_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), -}; - -static iomux_v3_cfg_t const fec2_pads[] = { - MX6_PAD_GPIO1_IO06__ENET2_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL), - MX6_PAD_GPIO1_IO07__ENET2_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - - MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL), - MX6_PAD_ENET2_TX_EN__ENET2_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - - MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_EN__ENET2_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_ER__ENET2_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL), -}; - -static void setup_iomux_fec(int fec_id) -{ - if (fec_id == 0) - imx_iomux_v3_setup_multiple_pads(fec1_pads, - ARRAY_SIZE(fec1_pads)); - else - imx_iomux_v3_setup_multiple_pads(fec2_pads, - ARRAY_SIZE(fec2_pads)); -} - -int board_eth_init(bd_t *bis) -{ - setup_iomux_fec(CONFIG_FEC_ENET_DEV); - - return fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV, - CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); -} - static int setup_fec(int fec_id) { struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; -- cgit v1.2.3 From 03279b7d1f0b81f0d635718802352ce64bb01965 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 3 Feb 2020 14:23:58 -0300 Subject: mx6ullevk: Enable Ethernet support Add Ethernet support using DM_ETH. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- board/freescale/mx6ullevk/mx6ullevk.c | 47 +++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'board') diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index e1eddbff953..3f1ecce10f8 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -19,6 +19,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -60,11 +61,57 @@ int board_early_init_f(void) return 0; } +#ifdef CONFIG_FEC_MXC +static int setup_fec(int fec_id) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + if (fec_id == 0) { + /* + * Use 50MHz anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + } else { + /* + * Use 50MHz anatop loopback REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + } + + ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + int board_init(void) { /* Address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; +#ifdef CONFIG_FEC_MXC + setup_fec(CONFIG_FEC_ENET_DEV); +#endif + return 0; } -- cgit v1.2.3 From ac1f2b498791ce1b7e5c2abb1f095a2a7a95c21a Mon Sep 17 00:00:00 2001 From: Markus Niebel Date: Thu, 9 Apr 2020 15:21:36 +0200 Subject: tqma6: resurrect support by supplying correct SYS_TEXT_BASE reason: SYS_TEXT_BASE was moved to Kconfig. Give reasonable defaults in board specific Kconfig. Signed-off-by: Markus Niebel Signed-off-by: Michael Krummsdorf --- board/tqc/tqma6/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board') diff --git a/board/tqc/tqma6/Kconfig b/board/tqc/tqma6/Kconfig index 6df41342865..2a4cff0ec85 100644 --- a/board/tqc/tqma6/Kconfig +++ b/board/tqc/tqma6/Kconfig @@ -74,6 +74,10 @@ config WRU4 endchoice +config SYS_TEXT_BASE + default 0x2fc00000 if TQMA6S + default 0x4fc00000 if TQMA6Q || TQMA6DL + config IMX_CONFIG default "board/tqc/tqma6/tqma6q.cfg" if TQMA6Q default "board/tqc/tqma6/tqma6dl.cfg" if TQMA6DL -- cgit v1.2.3 From 45fde2ac7abfb127e24fa4e213bbf4fc9116a356 Mon Sep 17 00:00:00 2001 From: Michael Krummsdorf Date: Thu, 9 Apr 2020 15:21:39 +0200 Subject: board: tqc: tqma6: mba6: apply default Kconfig for device model Signed-off-by: Michael Krummsdorf --- board/tqc/tqma6/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'board') diff --git a/board/tqc/tqma6/Kconfig b/board/tqc/tqma6/Kconfig index 2a4cff0ec85..084fdb5230e 100644 --- a/board/tqc/tqma6/Kconfig +++ b/board/tqc/tqma6/Kconfig @@ -63,6 +63,17 @@ choice config MBA6 bool "TQMa6 on MBa6 Starterkit" + select DM_ETH + select USB + select DM_USB + select CMD_USB + select USB_STORAGE + select USB_HOST_ETHER + select USB_ETHER_SMSC95XX + select PHYLIB + select PHY_MICREL + select PHY_MICREL_KSZ90X1 + select MXC_UART help Select the MBa6 starterkit. This features a GigE Phy, USB, SD-Card etc. -- cgit v1.2.3 From b7c1447910c63b128d129ba6251ef0cefd693b6e Mon Sep 17 00:00:00 2001 From: Michael Krummsdorf Date: Thu, 9 Apr 2020 15:21:41 +0200 Subject: board: tqc: tqma6: hw init code disabled for device model Keep code for non-dm configuration of baseboard WRU4. It cannot be upgraded to device model as we have no suitable device tree for it. These changes were not run-tested on WRU4, only compile-tested. Signed-off-by: Michael Krummsdorf --- board/tqc/tqma6/tqma6.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'board') diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index c8ddc2c1f85..675341abdde 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -60,6 +60,7 @@ int dram_init(void) static const uint16_t tqma6_emmc_dsr = 0x0100; +#ifndef CONFIG_DM_MMC /* eMMC on USDHCI3 always present */ static iomux_v3_cfg_t const tqma6_usdhc3_pads[] = { NEW_PAD_CTRL(MX6_PAD_SD3_CLK__SD3_CLK, USDHC_PAD_CTRL), @@ -132,7 +133,9 @@ int board_mmc_init(bd_t *bis) return 0; } +#endif +#ifndef CONFIG_DM_SPI static iomux_v3_cfg_t const tqma6_ecspi1_pads[] = { /* SS1 */ NEW_PAD_CTRL(MX6_PAD_EIM_D19__GPIO3_IO19, SPI_PAD_CTRL), @@ -164,7 +167,9 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs) (cs == CONFIG_SF_DEFAULT_CS)) ? TQMA6_SF_CS_GPIO : -1; } #endif +#endif +#ifdef CONFIG_SYS_I2C static struct i2c_pads_info tqma6_i2c3_pads = { /* I2C3: on board LM75, M24C64, */ .scl = { @@ -194,6 +199,7 @@ static void tqma6_setup_i2c(void) if (ret) printf("setup I2C3 failed: %d\n", ret); } +#endif int board_early_init_f(void) { @@ -205,8 +211,12 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; +#ifndef CONFIG_DM_SPI tqma6_iomuxc_spi(); +#endif +#ifdef CONFIG_SYS_I2C tqma6_setup_i2c(); +#endif tqma6_bb_board_init(); @@ -235,6 +245,7 @@ static const char *tqma6_get_boardname(void) }; } +#ifdef CONFIG_POWER /* setup board specific PMIC */ int power_init_board(void) { @@ -251,6 +262,7 @@ int power_init_board(void) return 0; } +#endif int board_late_init(void) { -- cgit v1.2.3 From 8f660ba7bb96e2ae69a521721d727ecf2fe16fba Mon Sep 17 00:00:00 2001 From: Michael Krummsdorf Date: Thu, 9 Apr 2020 15:21:42 +0200 Subject: board: tqc: tqma6_mba6: switch to device model Ethernet, usdhc2 and i2c1 interfaces are probed by dm drivers. Therefor init functions in board file are not necessary. Signed-off-by: Michael Krummsdorf --- board/tqc/tqma6/tqma6_mba6.c | 171 ++----------------------------------------- 1 file changed, 5 insertions(+), 166 deletions(-) (limited to 'board') diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index 154ea0e9258..a5b7587737f 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -68,13 +68,6 @@ #endif -#define ENET_RX_PAD_CTRL (PAD_CTL_DSE_34ohm) -#define ENET_TX_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_34ohm) -#define ENET_CLK_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_34ohm) -#define ENET_MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_60ohm) - /* disable on die termination for RGMII */ #define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE 0x00000000 /* optimised drive strength for 1.0 .. 1.3 V signal on RGMII */ @@ -82,34 +75,6 @@ /* optimised drive strength for 1.3 .. 2.5 V signal on RGMII */ #define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V 0x000C0000 -#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 25) - -static iomux_v3_cfg_t const mba6_enet_pads[] = { - NEW_PAD_CTRL(MX6_PAD_ENET_MDIO__ENET_MDIO, ENET_MDIO_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_ENET_MDC__ENET_MDC, ENET_MDIO_PAD_CTRL), - - NEW_PAD_CTRL(MX6_PAD_RGMII_TXC__RGMII_TXC, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD0__RGMII_TD0, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD1__RGMII_TD1, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD2__RGMII_TD2, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TD3__RGMII_TD3, ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL, - ENET_TX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_ENET_REF_CLK__ENET_TX_CLK, ENET_CLK_PAD_CTRL), - /* - * these pins are also used for config strapping by phy - */ - NEW_PAD_CTRL(MX6_PAD_RGMII_RD0__RGMII_RD0, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RD1__RGMII_RD1, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RD2__RGMII_RD2, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RD3__RGMII_RD3, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RXC__RGMII_RXC, ENET_RX_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL, - ENET_RX_PAD_CTRL), - /* KSZ9031 PHY Reset */ - NEW_PAD_CTRL(MX6_PAD_ENET_CRS_DV__GPIO1_IO25, GPIO_OUT_PAD_CTRL), -}; - static void mba6_setup_iomuxc_enet(void) { struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; @@ -121,22 +86,6 @@ static void mba6_setup_iomuxc_enet(void) (void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM); __raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V, (void *)IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII); - - imx_iomux_v3_setup_multiple_pads(mba6_enet_pads, - ARRAY_SIZE(mba6_enet_pads)); - - /* Reset PHY */ - gpio_direction_output(ENET_PHY_RESET_GPIO , 0); - /* Need delay 10ms after power on according to KSZ9031 spec */ - mdelay(10); - gpio_set_value(ENET_PHY_RESET_GPIO, 1); - /* - * KSZ9031 manual: 100 usec wait time after reset before communication - * over MDIO - * BUGBUG: hardware has an RC const that needs > 10 msec from 0->1 on - * reset before the phy sees a high level - */ - mdelay(15); } static iomux_v3_cfg_t const mba6_uart2_pads[] = { @@ -150,91 +99,14 @@ static void mba6_setup_iomuxc_uart(void) ARRAY_SIZE(mba6_uart2_pads)); } -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -#define USDHC2_WP_GPIO IMX_GPIO_NR(1, 2) - -int tqma6_bb_board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - if (cfg->esdhc_base == USDHC2_BASE_ADDR) - ret = !gpio_get_value(USDHC2_CD_GPIO); - - return ret; -} - -int tqma6_bb_board_mmc_getwp(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - if (cfg->esdhc_base == USDHC2_BASE_ADDR) - ret = gpio_get_value(USDHC2_WP_GPIO); - - return ret; -} - -static struct fsl_esdhc_cfg mba6_usdhc_cfg = { - .esdhc_base = USDHC2_BASE_ADDR, - .max_bus_width = 4, -}; - -static iomux_v3_cfg_t const mba6_usdhc2_pads[] = { - NEW_PAD_CTRL(MX6_PAD_SD2_CLK__SD2_CLK, USDHC_CLK_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_CMD__SD2_CMD, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL), - NEW_PAD_CTRL(MX6_PAD_SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), - /* CD */ - NEW_PAD_CTRL(MX6_PAD_GPIO_4__GPIO1_IO04, GPIO_IN_PAD_CTRL), - /* WP */ - NEW_PAD_CTRL(MX6_PAD_GPIO_2__GPIO1_IO02, GPIO_IN_PAD_CTRL), -}; - -int tqma6_bb_board_mmc_init(bd_t *bis) -{ - imx_iomux_v3_setup_multiple_pads(mba6_usdhc2_pads, - ARRAY_SIZE(mba6_usdhc2_pads)); - gpio_direction_input(USDHC2_CD_GPIO); - gpio_direction_input(USDHC2_WP_GPIO); - - mba6_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - if (fsl_esdhc_initialize(bis, &mba6_usdhc_cfg)) - puts("Warning: failed to initialize SD\n"); - - return 0; -} - -static struct i2c_pads_info mba6_i2c1_pads = { -/* I2C1: MBa6x */ - .scl = { - .i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__I2C1_SCL, - I2C_PAD_CTRL), - .gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__GPIO5_IO27, - I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__I2C1_SDA, - I2C_PAD_CTRL), - .gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__GPIO5_IO26, - I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 26) - } -}; - -static void mba6_setup_i2c(void) +int board_mmc_get_env_dev(int devno) { - int ret; /* - * use logical index for bus, e.g. I2C1 -> 0 - * warn on error + * This assumes that the baseboard registered + * the boot device first ... + * Note: SDHC3 == idx2 */ - ret = setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mba6_i2c1_pads); - if (ret) - printf("setup I2C1 failed: %d\n", ret); + return (2 == devno) ? 0 : 1; } int board_phy_config(struct phy_device *phydev) @@ -284,37 +156,6 @@ int board_phy_config(struct phy_device *phydev) return 0; } -int board_eth_init(bd_t *bis) -{ - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - int ret; - - bus = fec_get_miibus(base, -1); - if (!bus) - return -EINVAL; - /* scan phy */ - phydev = phy_find_by_mask(bus, (0xf << CONFIG_FEC_MXC_PHYADDR), - PHY_INTERFACE_MODE_RGMII); - - if (!phydev) { - ret = -EINVAL; - goto free_bus; - } - ret = fec_probe(bis, -1, base, bus, phydev); - if (ret) - goto free_phydev; - - return 0; - -free_phydev: - free(phydev); -free_bus: - free(bus); - return ret; -} - int tqma6_bb_board_early_init_f(void) { mba6_setup_iomuxc_uart(); @@ -324,8 +165,6 @@ int tqma6_bb_board_early_init_f(void) int tqma6_bb_board_init(void) { - mba6_setup_i2c(); - /* do it here - to have reset completed */ mba6_setup_iomuxc_enet(); return 0; -- cgit v1.2.3 From 168fff26a88fe0bd9034beb8035f61b4c9460048 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 15 Apr 2020 15:01:34 -0300 Subject: imx8qxp_mek: Start with USDHC2 unpowered After triggering a "reboot" command in Linux the following hang in SPL is observed: U-Boot SPL 2020.04 (Apr 15 2020 - 10:49:29 -0300) Normal Boot WDT: Not found! Trying to boot from MMC2_2 spl: mmc init failed with error: -70 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### This error happens because the CMD_ERR bit is set in the IRQ status register after booting from Linux. To ensure a fresh start, force the VMMC supply to get unpowered first. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- board/freescale/imx8qxp_mek/spl.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'board') diff --git a/board/freescale/imx8qxp_mek/spl.c b/board/freescale/imx8qxp_mek/spl.c index cb4006eb2a4..e4e4cbe7163 100644 --- a/board/freescale/imx8qxp_mek/spl.c +++ b/board/freescale/imx8qxp_mek/spl.c @@ -12,9 +12,24 @@ #include #include #include +#include +#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define USDHC2_SD_PWR IMX_GPIO_NR(4, 19) +static iomux_cfg_t usdhc2_sd_pwr[] = { + SC_P_USDHC1_RESET_B | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + void spl_board_init(void) { struct udevice *dev; @@ -32,6 +47,9 @@ void spl_board_init(void) timer_init(); + imx8_iomux_setup_multiple_pads(usdhc2_sd_pwr, ARRAY_SIZE(usdhc2_sd_pwr)); + gpio_direction_output(USDHC2_SD_PWR, 0); + preloader_console_init(); puts("Normal Boot\n"); -- cgit v1.2.3 From f8ae0bc7c279e48a4bf6602d8a8a7e71d96377db Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Fri, 27 Mar 2020 12:28:18 +0200 Subject: verdin-imx8mm: adjust dram size in case bl32 is used Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty), so during MMU initialization U-Boot won't touch this mem area. BL32 is loaded to the end of DRAM, bl32 payload size is read from rom_pointer[1]. This relates to the issue described in 59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory"). Signed-off-by: Igor Opaniuk --- board/toradex/verdin-imx8mm/verdin-imx8mm.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 16b9fa1ec18..cb9b4e3b0a9 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -13,7 +14,11 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { - gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + /* rom_pointer[1] contains the size of TEE occupies */ + if (rom_pointer[1]) + gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1]; + else + gd->ram_size = PHYS_SDRAM_SIZE; return 0; } -- cgit v1.2.3 From 47d430baed16b35a1afc5ae2ae8c468de8d21efd Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Fri, 27 Mar 2020 12:28:19 +0200 Subject: imx8mm_evk: adjust dram size in case bl32 is used Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty), so during MMU initialization U-Boot won't touch this mem area. BL32 is loaded to the end of DRAM, bl32 payload size is read from rom_pointer[1]. This relates to the issue described in 59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory"). Signed-off-by: Igor Opaniuk --- board/freescale/imx8mm_evk/imx8mm_evk.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c index c5fd940eeb7..53ebb949df4 100644 --- a/board/freescale/imx8mm_evk/imx8mm_evk.c +++ b/board/freescale/imx8mm_evk/imx8mm_evk.c @@ -15,7 +15,11 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { - gd->ram_size = PHYS_SDRAM_SIZE; + /* rom_pointer[1] contains the size of TEE occupies */ + if (rom_pointer[1]) + gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1]; + else + gd->ram_size = PHYS_SDRAM_SIZE; return 0; } -- cgit v1.2.3 From 4c13a4db60b4d570ea8cc496d02e5ea31adf27f0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 17 Apr 2020 09:27:09 -0300 Subject: wandboard: Fix version detection for mx6q/mx6dl revD1 The detection of the revD1 version is based on the presence of the PMIC. Currently revb1 device trees are used for mx6q/mx6dl variants, which do not have the PMIC nodes. This causes revD1 boards to be incorrectly be detected as revB1. Fix this issue by using the revd1 device trees, so that the PMIC node can be found and then the PMIC can be detected by reading its register ID. Imported the revd1 device trees from mainline kernel version 5.7-rc1. Reported-by: Heiko Schocher Reported-by: Derek Atkins Signed-off-by: Fabio Estevam Tested-by: Derek Atkins Tested-by: Heiko Schocher Tested-by: Peter Robinson --- board/wandboard/wandboard.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 5725c5816cd..90957167b2a 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -484,13 +484,13 @@ int checkboard(void) int board_fit_config_name_match(const char *name) { if (is_mx6dq()) { - if (!strcmp(name, "imx6q-wandboard-revb1")) + if (!strcmp(name, "imx6q-wandboard-revd1")) return 0; } else if (is_mx6dqp()) { if (!strcmp(name, "imx6qp-wandboard-revd1")) return 0; } else if (is_mx6dl() || is_mx6solo()) { - if (!strcmp(name, "imx6dl-wandboard-revb1")) + if (!strcmp(name, "imx6dl-wandboard-revd1")) return 0; } -- cgit v1.2.3 From b8e74fc8dbb6335f614c45257c330eba07e3e3b4 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 17 Apr 2020 09:27:11 -0300 Subject: wandboard: Do not print error when PMIC is not present On wandboard variants prior to revD1, there is no PMIC populated, so do not print an error when the reading of the device ID register fails. Signed-off-by: Fabio Estevam Tested-by: Heiko Schocher --- board/wandboard/wandboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 90957167b2a..7fd60682a54 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -369,7 +369,7 @@ int power_init_board(void) reg = pmic_reg_read(dev, PFUZE100_DEVICEID); if (reg < 0) { - printf("pmic_reg_read() ret %d\n", reg); + debug("pmic_reg_read() ret %d\n", reg); return 0; } printf("PMIC: PFUZE100 ID=0x%02x\n", reg); -- cgit v1.2.3 From fe2f432c1c81763e13a5b5f2f9e61c8fd49555d9 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 17 Apr 2020 09:27:13 -0300 Subject: wandboard: Print the board version in board_late_init() Since CONFIG_DISPLAY_BOARDINFO_LATE is no longer used, the checkboard() function is no longer called. As it is useful to print the board revision, print it inside board_late_init() instead. Also, to avoid GPIO errors related to using a GPIO without requesting it, move the gpio_request(REV_DETECTION, "REV_DETECT") call prior to its usage. Signed-off-by: Fabio Estevam Tested-by: Heiko Schocher --- board/wandboard/wandboard.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) (limited to 'board') diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 7fd60682a54..fb2f3c1fd25 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -404,6 +404,7 @@ static const struct boot_mode board_boot_modes[] = { static bool is_revc1(void) { SETUP_IOMUX_PADS(rev_detection_pad); + gpio_request(REV_DETECTION, "REV_DETECT"); gpio_direction_input(REV_DETECTION); if (gpio_get_value(REV_DETECTION)) @@ -442,6 +443,14 @@ int board_late_init(void) env_set("board_name", "B1"); #endif setup_iomux_enet(); + + if (is_revd1()) + puts("Board: Wandboard rev D1\n"); + else if (is_revc1()) + puts("Board: Wandboard rev C1\n"); + else + puts("Board: Wandboard rev B1\n"); + return 0; } @@ -466,20 +475,6 @@ int board_init(void) return 0; } -int checkboard(void) -{ - gpio_request(REV_DETECTION, "REV_DETECT"); - - if (is_revd1()) - puts("Board: Wandboard rev D1\n"); - else if (is_revc1()) - puts("Board: Wandboard rev C1\n"); - else - puts("Board: Wandboard rev B1\n"); - - return 0; -} - #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { -- cgit v1.2.3 From 15df6b31b62671d4e2347131bdbf4c07a305cab1 Mon Sep 17 00:00:00 2001 From: Harald Seiler Date: Wed, 15 Apr 2020 20:04:53 +0200 Subject: ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETH Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator to the relevant device-trees and augment the FEC node with properties for the reset GPIO. It should be noted that the relevant properties for the reset GPIO already exist in the PHY node (reset-gpios, reset-delay-us, reset-post-delay-us) but U-Boot currently ignores those and only supports the bus-level reset properties in the FEC node (phy-reset-gpios, phy-reset-duration, phy-reset-post-delay). Signed-off-by: Harald Seiler --- board/dhelectronics/dh_imx6/dh_imx6.c | 51 ++--------------------------------- 1 file changed, 2 insertions(+), 49 deletions(-) (limited to 'board') diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index 33ce7e8ff11..b6f8b11a10c 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -28,10 +28,7 @@ #include #include #include -#include #include -#include -#include #include #include @@ -52,24 +49,6 @@ int overwrite_console(void) return 1; } -#ifdef CONFIG_FEC_MXC -static void eth_phy_reset(void) -{ - /* Reset PHY */ - gpio_direction_output(IMX_GPIO_NR(5, 0) , 0); - udelay(500); - gpio_set_value(IMX_GPIO_NR(5, 0), 1); - - /* Enable VIO */ - gpio_direction_output(IMX_GPIO_NR(1, 7) , 0); - - /* - * KSZ9021 PHY needs at least 10 mSec after PHY reset - * is released to stabilize - */ - mdelay(10); -} - static int setup_fec_clock(void) { struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; @@ -80,34 +59,6 @@ static int setup_fec_clock(void) return enable_fec_anatop_clock(0, ENET_50MHZ); } -int board_eth_init(bd_t *bis) -{ - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - - gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset"); - gpio_request(IMX_GPIO_NR(1, 7), "VIO"); - - setup_fec_clock(); - - eth_phy_reset(); - - bus = fec_get_miibus(base, -1); - if (!bus) - return -EINVAL; - - /* Scan PHY 0 */ - phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - printf("Ethernet PHY not found!\n"); - return -EINVAL; - } - - return fec_probe(bis, -1, base, bus, phydev); -} -#endif - #ifdef CONFIG_USB_EHCI_MX6 static void setup_usb(void) { @@ -190,6 +141,8 @@ int board_init(void) setup_dhcom_mac_from_fuse(); + setup_fec_clock(); + return 0; } -- cgit v1.2.3 From 7c0fbf2fe3f87193691828d94cadb0a62b4e9f5f Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 26 Feb 2020 12:37:02 +0100 Subject: imx: pmic: Set proper pmic name for iMX53 HSC|DDC boards After the commit 4213609cc7fb ("drivers: core: use strcmp when find device by name") the exact DTS node name for PMIC device must be provided. This patch fixes this issue by providing full DTS node name ('mc34708@8'). Signed-off-by: Lukasz Majewski Reviewed-by: Jaehoon Chug --- board/k+p/kp_imx53/kp_imx53.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/k+p/kp_imx53/kp_imx53.c b/board/k+p/kp_imx53/kp_imx53.c index 2f57310e27a..eb5b67d1e62 100644 --- a/board/k+p/kp_imx53/kp_imx53.c +++ b/board/k+p/kp_imx53/kp_imx53.c @@ -48,7 +48,7 @@ static int power_init(void) struct udevice *dev; int ret; - ret = pmic_get("mc34708", &dev); + ret = pmic_get("mc34708@8", &dev); if (ret) { printf("%s: mc34708 not found !\n", __func__); return ret; -- cgit v1.2.3 From 931edc6efb11f07557b5fb85f5ce95afa4818f25 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Tue, 18 Feb 2020 20:02:55 +0100 Subject: Add support for i.MXRT1020-EVK board Signed-off-by: Giulio Benetti Reviewed-by: Lukasz Majewski --- board/freescale/imxrt1020-evk/Kconfig | 22 ++++++++ board/freescale/imxrt1020-evk/MAINTAINERS | 6 ++ board/freescale/imxrt1020-evk/Makefile | 6 ++ board/freescale/imxrt1020-evk/README | 31 ++++++++++ board/freescale/imxrt1020-evk/imximage.cfg | 36 ++++++++++++ board/freescale/imxrt1020-evk/imxrt1020-evk.c | 81 +++++++++++++++++++++++++++ 6 files changed, 182 insertions(+) create mode 100644 board/freescale/imxrt1020-evk/Kconfig create mode 100644 board/freescale/imxrt1020-evk/MAINTAINERS create mode 100644 board/freescale/imxrt1020-evk/Makefile create mode 100644 board/freescale/imxrt1020-evk/README create mode 100644 board/freescale/imxrt1020-evk/imximage.cfg create mode 100644 board/freescale/imxrt1020-evk/imxrt1020-evk.c (limited to 'board') diff --git a/board/freescale/imxrt1020-evk/Kconfig b/board/freescale/imxrt1020-evk/Kconfig new file mode 100644 index 00000000000..d00cbff094b --- /dev/null +++ b/board/freescale/imxrt1020-evk/Kconfig @@ -0,0 +1,22 @@ +if TARGET_IMXRT1020_EVK + +config SYS_BOARD + string + default "imxrt1020-evk" + +config SYS_VENDOR + string + default "freescale" + +config SYS_SOC + string + default "imxrt1020" + +config SYS_CONFIG_NAME + string + default "imxrt1020-evk" + +config IMX_CONFIG + default "board/freescale/imxrt1020-evk/imximage.cfg" + +endif diff --git a/board/freescale/imxrt1020-evk/MAINTAINERS b/board/freescale/imxrt1020-evk/MAINTAINERS new file mode 100644 index 00000000000..05f017b2bab --- /dev/null +++ b/board/freescale/imxrt1020-evk/MAINTAINERS @@ -0,0 +1,6 @@ +IMXRT1020 EVALUATION KIT +M: Giulio Benetti +S: Maintained +F: board/freescale/imxrt1020-evk +F: include/configs/imxrt1020-evk.h +F: configs/imxrt1020-evk_defconfig diff --git a/board/freescale/imxrt1020-evk/Makefile b/board/freescale/imxrt1020-evk/Makefile new file mode 100644 index 00000000000..807dc7c35e1 --- /dev/null +++ b/board/freescale/imxrt1020-evk/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2020 +# Author(s): Giulio Benetti + +obj-y := imxrt1020-evk.o diff --git a/board/freescale/imxrt1020-evk/README b/board/freescale/imxrt1020-evk/README new file mode 100644 index 00000000000..3da72fdad27 --- /dev/null +++ b/board/freescale/imxrt1020-evk/README @@ -0,0 +1,31 @@ +How to use U-Boot on NXP i.MXRT1020 EVK +----------------------------------------------- + +- Build U-Boot for i.MXRT1020 EVK: + +$ make mrproper +$ make imxrt1020-evk_defconfig +$ make + +This will generate the SPL image called SPL and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot.img image into the micro SD card: + +sudo dd if=u-boot.img of=/dev/sdb bs=1k seek=128; sync + +- Jumper settings: + +SW8: 0 1 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Connect the USB cable between the EVK and the PC for the console. +(The USB console connector is the one close the ethernet connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up. diff --git a/board/freescale/imxrt1020-evk/imximage.cfg b/board/freescale/imxrt1020-evk/imximage.cfg new file mode 100644 index 00000000000..9bcc2c15907 --- /dev/null +++ b/board/freescale/imxrt1020-evk/imximage.cfg @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 + * Author(s): Giulio Benetti + */ + +#define __ASSEMBLY__ +#include + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi/sd/nand/onenand, qspi/nor + */ + +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Set all FlexRAM as OCRAM(01b) */ +DATA 4 0x400AC044 0x00005555 +/* Use FLEXRAM_BANK_CFG to config FlexRAM */ +SET_BIT 4 0x400AC040 0x4 diff --git a/board/freescale/imxrt1020-evk/imxrt1020-evk.c b/board/freescale/imxrt1020-evk/imxrt1020-evk.c new file mode 100644 index 00000000000..06ad524d5d2 --- /dev/null +++ b/board/freescale/imxrt1020-evk/imxrt1020-evk.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 + * Author(s): Giulio Benetti + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ +#ifndef CONFIG_SUPPORT_SPL + int rv; + struct udevice *dev; + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) { + debug("DRAM init failed: %d\n", rv); + return rv; + } + +#endif + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + debug("SPL: booting kernel\n"); + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; +} +#endif + +int spl_dram_init(void) +{ + struct udevice *dev; + int rv; + + rv = uclass_get_device(UCLASS_RAM, 0, &dev); + if (rv) + debug("DRAM init failed: %d\n", rv); + return rv; +} + +void spl_board_init(void) +{ + spl_dram_init(); + preloader_console_init(); + arch_cpu_init(); /* to configure mpu for sdram rw permissions */ +} + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_MMC1; +} +#endif + +u32 get_board_rev(void) +{ + return 0; +} + +int board_init(void) +{ + gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + + return 0; +} -- cgit v1.2.3