From b736e4b929197b5141b883f4f3906c4bd38dd4f3 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 10 Oct 2012 21:11:41 +0000 Subject: ARM: Fix start.S when used with SPL in arm1136 This patch modifies start.S for the arm1136 to make it conform to start.S in armv7 architecture, to make it usable if the SPL framework is used. Signed-off-by: Stefano Babic --- board/freescale/mx31ads/u-boot.lds | 2 ++ 1 file changed, 2 insertions(+) (limited to 'board') diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds index 79eb7aca387..91ffdbefd13 100644 --- a/board/freescale/mx31ads/u-boot.lds +++ b/board/freescale/mx31ads/u-boot.lds @@ -63,6 +63,8 @@ SECTIONS . = ALIGN(4); + __image_copy_end = .; + .rel.dyn : { __rel_dyn_start = .; *(.rel*) -- cgit v1.2.3 From d81b27a24507c578764270865606ee6a91036616 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 10 Oct 2012 21:11:46 +0000 Subject: MX35: add support for woodburn board The woodburn board is based on the MX35 SOC. Support for both external (NOR) and internal (SD Card) boot mode are added. It uses the generic SPL framework to implement the internal boot mode. The following peripherals are supported: - Ethernet (FEC) - SD Card - NAND (512 MB) - NOR Flash In the internal boot mode, a simple imximage header is generated to set the address in internal RAM where the SOC must copy the SPL code. The initial setup is then demanded to the SPL itself. Signed-off-by: Stefano Babic --- board/woodburn/Makefile | 43 +++++++ board/woodburn/imximage.cfg | 4 + board/woodburn/lowlevel_init.S | 38 ++++++ board/woodburn/woodburn.c | 261 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 346 insertions(+) create mode 100644 board/woodburn/Makefile create mode 100644 board/woodburn/imximage.cfg create mode 100644 board/woodburn/lowlevel_init.S create mode 100644 board/woodburn/woodburn.c (limited to 'board') diff --git a/board/woodburn/Makefile b/board/woodburn/Makefile new file mode 100644 index 00000000000..b60163f9fd4 --- /dev/null +++ b/board/woodburn/Makefile @@ -0,0 +1,43 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski +# +# (C) Copyright 2008-2009 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := woodburn.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/woodburn/imximage.cfg b/board/woodburn/imximage.cfg new file mode 100644 index 00000000000..b4cc8ecf63a --- /dev/null +++ b/board/woodburn/imximage.cfg @@ -0,0 +1,4 @@ +BOOT_FROM sd + +# DDR2 init +DATA 4 0xB8001010 0x00000304 diff --git a/board/woodburn/lowlevel_init.S b/board/woodburn/lowlevel_init.S new file mode 100644 index 00000000000..57fb1b139e7 --- /dev/null +++ b/board/woodburn/lowlevel_init.S @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2007, Guennadi Liakhovetski + * + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. + * + * Copyright (C) 2011, Stefano Babic + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +.globl lowlevel_init +lowlevel_init: + + core_init + + init_aips + + init_max + + init_m3if + + mov pc, lr diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c new file mode 100644 index 00000000000..286749f3c91 --- /dev/null +++ b/board/woodburn/woodburn.c @@ -0,0 +1,261 @@ +/* + * Copyright (C) 2012, Stefano Babic + * + * Based on flea3.c and mx35pdk.c + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CCM_CCMR_CONFIG 0x003F4208 + +#define ESDCTL_DDR2_CONFIG 0x007FFC3F + +/* For MMC */ +#define GPIO_MMC_CD 7 +#define GPIO_MMC_WP 8 + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, + PHYS_SDRAM_1_SIZE); + + return 0; +} + +static void board_setup_sdram(void) +{ + struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR; + + /* Initialize with default values both CSD0/1 */ + writel(0x2000, &esdc->esdctl0); + writel(0x2000, &esdc->esdctl1); + + mx3_setup_sdram_bank(CSD0_BASE_ADDR, ESDCTL_DDR2_CONFIG, + 13, 10, 2, 0x8080); +} + +static void setup_iomux_fec(void) +{ + /* setup pins for FEC */ + mxc_request_iomux(MX35_PIN_FEC_TX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_DV, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_COL, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TX_EN, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_MDC, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_MDIO, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TX_ERR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RX_ERR, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_CRS, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_RDATA3, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_FEC_TDATA3, MUX_CONFIG_FUNC); +} + +int woodburn_init(void) +{ + struct ccm_regs *ccm = + (struct ccm_regs *)IMX_CCM_BASE; + + /* initialize PLL and clock configuration */ + writel(CCM_CCMR_CONFIG, &ccm->ccmr); + + /* Set-up RAM */ + board_setup_sdram(); + + /* enable clocks */ + writel(readl(&ccm->cgr0) | + MXC_CCM_CGR0_EMI_MASK | + MXC_CCM_CGR0_EDIO_MASK | + MXC_CCM_CGR0_EPIT1_MASK, + &ccm->cgr0); + + writel(readl(&ccm->cgr1) | + MXC_CCM_CGR1_FEC_MASK | + MXC_CCM_CGR1_GPIO1_MASK | + MXC_CCM_CGR1_GPIO2_MASK | + MXC_CCM_CGR1_GPIO3_MASK | + MXC_CCM_CGR1_I2C1_MASK | + MXC_CCM_CGR1_I2C2_MASK | + MXC_CCM_CGR1_I2C3_MASK, + &ccm->cgr1); + + /* Set-up NAND */ + __raw_writel(readl(&ccm->rcsr) | MXC_CCM_RCSR_NFC_FMS, &ccm->rcsr); + + /* Set pinmux for the required peripherals */ + setup_iomux_fec(); + + /* setup GPIO1_4 FEC_ENABLE signal */ + mxc_request_iomux(MX35_PIN_SCKR, MUX_CONFIG_ALT5); + gpio_direction_output(4, 1); + mxc_request_iomux(MX35_PIN_HCKT, MUX_CONFIG_ALT5); + gpio_direction_output(9, 0); + gpio_set_value(9, 1); + + return 0; +} + +#if defined(CONFIG_SPL_BUILD) +void board_init_f(ulong dummy) +{ + /* Set the stack pointer. */ + asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK)); + + /* Initialize MUX and SDRAM */ + woodburn_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end__ - __bss_start); + + /* Set global data pointer. */ + gd = &gdata; + + preloader_console_init(); + timer_init(); + + board_init_r(NULL, 0); +} + +void spl_board_init(void) +{ +} + +#endif + + +/* Booting from NOR in external mode */ +int board_early_init_f(void) +{ + return woodburn_init(); +} + + +int board_init(void) +{ + struct pmic *p; + u32 val; + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + pmic_init(); + p = get_pmic(); + + /* + * Set switchers in Auto in NORMAL mode & STANDBY mode + * Setup the switcher mode for SW1 & SW2 + */ + pmic_reg_read(p, REG_SW_4, &val); + val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | + (SWMODE_MASK << SWMODE2_SHIFT))); + val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | + (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); + /* Set SWILIMB */ + val |= (1 << 22); + pmic_reg_write(p, REG_SW_4, val); + + /* Setup the switcher mode for SW3 & SW4 */ + pmic_reg_read(p, REG_SW_5, &val); + val &= ~((SWMODE_MASK << SWMODE4_SHIFT) | + (SWMODE_MASK << SWMODE3_SHIFT)); + val |= (SWMODE_AUTO_AUTO << SWMODE4_SHIFT) | + (SWMODE_AUTO_AUTO << SWMODE3_SHIFT); + pmic_reg_write(p, REG_SW_5, val); + + /* Set VGEN1 to 3.15V */ + pmic_reg_read(p, REG_SETTING_0, &val); + val &= ~(VGEN1_MASK); + val |= VGEN1_3_15; + pmic_reg_write(p, REG_SETTING_0, val); + + pmic_reg_read(p, REG_MODE_0, &val); + val |= VGEN1EN; + pmic_reg_write(p, REG_MODE_0, val); + udelay(2000); + + return 0; +} + +#if defined(CONFIG_FSL_ESDHC) +struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR}; + +int board_mmc_init(bd_t *bis) +{ + /* configure pins for SDHC1 only */ + mxc_request_iomux(MX35_PIN_SD1_CMD, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_CLK, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA0, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA1, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_FUNC); + + /* MMC Card Detect on GPIO1_7 */ + mxc_request_iomux(MX35_PIN_SCKT, MUX_CONFIG_ALT5); + mxc_iomux_set_input(MUX_IN_GPIO1_IN_7, 0x1); + gpio_direction_input(GPIO_MMC_CD); + + mxc_request_iomux(MX35_PIN_FST, MUX_CONFIG_ALT5); + mxc_iomux_set_input(MUX_IN_GPIO1_IN_8, 0x1); + gpio_direction_output(GPIO_MMC_WP, 0); + + esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK); + + return fsl_esdhc_initialize(bis, &esdhc_cfg); +} + +int board_mmc_getcd(struct mmc *mmc) +{ + return !gpio_get_value(GPIO_MMC_CD); +} +#endif + +u32 get_board_rev(void) +{ + int rev = 0; + + return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; +} -- cgit v1.2.3 From af2a4093cb141f9c5ea433c41ab06a528a7792a6 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 23 Oct 2012 06:34:49 +0000 Subject: mx25pdk: Add esdhc support mx25pdk has a SD/MMC slot connected to esdhc1. Add support for it and allow the environment variables to be saved into SD/MMC. Signed-off-by: Fabio Estevam --- board/freescale/mx25pdk/mx25pdk.c | 53 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) (limited to 'board') diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 4a8352fb3d2..9bf2d48b369 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -19,12 +19,24 @@ #include #include +#include #include #include #include +#include +#include +#include + +#define CARD_DETECT IMX_GPIO_NR(2, 1) DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {IMX_MMC_SDHC1_BASE}, +}; +#endif + int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -48,6 +60,47 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_ESDHC +int board_mmc_getcd(struct mmc *mmc) +{ + struct iomuxc_mux_ctl *muxctl; + struct iomuxc_pad_ctl *padctl; + u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5); + + /* + * Set up the Card Detect pin. + * + * SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15 + * + */ + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; + + writel(gpio_mux_mode, &muxctl->pad_a15); + writel(0x0, &padctl->pad_a15); + + gpio_direction_input(CARD_DETECT); + return !gpio_get_value(CARD_DETECT); +} + +int board_mmc_init(bd_t *bis) +{ + struct iomuxc_mux_ctl *muxctl; + u32 sdhc1_mux_mode = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION; + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; + writel(sdhc1_mux_mode, &muxctl->pad_sd1_cmd); + writel(sdhc1_mux_mode, &muxctl->pad_sd1_clk); + writel(sdhc1_mux_mode, &muxctl->pad_sd1_data0); + writel(sdhc1_mux_mode, &muxctl->pad_sd1_data1); + writel(sdhc1_mux_mode, &muxctl->pad_sd1_data2); + writel(sdhc1_mux_mode, &muxctl->pad_sd1_data3); + + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK); + return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); +} +#endif + int checkboard(void) { puts("Board: MX25PDK\n"); -- cgit v1.2.3 From e100a3d52ebfb4604cca04710a31dfbc91225e96 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 23 Oct 2012 06:34:52 +0000 Subject: mx25: Place common functions into sys_proto.h imx-regs.h is meant to contain SoC register definitions. Common SoC funtions should go to sys_proto.h instead. Signed-off-by: Fabio Estevam --- board/syteco/zmx25/zmx25.c | 1 + 1 file changed, 1 insertion(+) (limited to 'board') diff --git a/board/syteco/zmx25/zmx25.c b/board/syteco/zmx25/zmx25.c index fe5589d9314..4f37c59d807 100644 --- a/board/syteco/zmx25/zmx25.c +++ b/board/syteco/zmx25/zmx25.c @@ -33,6 +33,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; -- cgit v1.2.3 From e00c89df0605037d417fdb4021d2334bc191beb1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 23 Oct 2012 06:34:53 +0000 Subject: mx25pdk: Add Ethernet support mx25pdk has a Ethernet port that is connected to its internal FEC controller. In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the MC34704 PMIC via I2C. Make the FEC ethernet port functional Signed-off-by: Fabio Estevam --- board/freescale/mx25pdk/mx25pdk.c | 61 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) (limited to 'board') diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 9bf2d48b369..72fa6bc8260 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -26,7 +26,13 @@ #include #include #include +#include +#include +#include +#include +#define FEC_RESET_B IMX_GPIO_NR(2, 3) +#define FEC_ENABLE_B IMX_GPIO_NR(4, 8) #define CARD_DETECT IMX_GPIO_NR(2, 1) DECLARE_GLOBAL_DATA_PTR; @@ -37,6 +43,47 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = { }; #endif +static void mx25pdk_fec_init(void) +{ + struct iomuxc_mux_ctl *muxctl; + struct iomuxc_pad_ctl *padctl; + u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5); + u32 gpio_mux_mode0_sion = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION; + + /* FEC pin init is generic */ + mx25_fec_init_pins(); + + muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; + padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; + /* + * Set up FEC_RESET_B and FEC_ENABLE_B + * + * FEC_RESET_B: gpio2_3 is ALT 5 mode of pin D12 + * FEC_ENABLE_B: gpio4_8 is ALT 5 mode of pin A17 + */ + writel(gpio_mux_mode, &muxctl->pad_d12); + writel(gpio_mux_mode, &muxctl->pad_a17); + + writel(0x0, &padctl->pad_d12); + writel(0x0, &padctl->pad_a17); + + /* Assert RESET and ENABLE low */ + gpio_direction_output(FEC_RESET_B, 0); + gpio_direction_output(FEC_ENABLE_B, 0); + + udelay(10); + + /* Deassert RESET and ENABLE */ + gpio_set_value(FEC_RESET_B, 1); + gpio_set_value(FEC_ENABLE_B, 1); + + /* Setup I2C pins so that PMIC can turn on PHY supply */ + writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_clk); + writel(gpio_mux_mode0_sion, &muxctl->pad_i2c1_dat); + writel(0x1E8, &padctl->pad_i2c1_clk); + writel(0x1E8, &padctl->pad_i2c1_dat); +} + int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -60,6 +107,20 @@ int board_init(void) return 0; } +int board_late_init(void) +{ + struct pmic *p; + + mx25pdk_fec_init(); + + pmic_init(); + p = get_pmic(); + /* Turn on Ethernet PHY supply */ + pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE); + + return 0; +} + #ifdef CONFIG_FSL_ESDHC int board_mmc_getcd(struct mmc *mmc) { -- cgit v1.2.3 From 11c5bc0b9d3d0f3416734515e612fcbf962afb6e Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Thu, 20 Sep 2012 00:19:56 +0000 Subject: arm:exynos4:trats: Fix SDRAM size Full 1GiB is visible Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- board/samsung/trats/trats.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index e11a8922fca..7b981fa7a5d 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -93,7 +93,9 @@ void i2c_init_board(void) int dram_init(void) { gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) + - get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) + + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) + + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE); return 0; } @@ -104,6 +106,10 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; + gd->bd->bi_dram[2].start = PHYS_SDRAM_3; + gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; + gd->bd->bi_dram[3].start = PHYS_SDRAM_4; + gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; } static unsigned int get_hw_revision(void) -- cgit v1.2.3 From d651e88a0007f06babd458aae1e85e9ec7b2a982 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Thu, 20 Sep 2012 00:19:58 +0000 Subject: arm:exynos4:trats: Use pinmux for mmc configuration This patch use the pinmux for mmc configuration for Trats Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Acked-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- board/samsung/trats/trats.c | 68 ++++++++------------------------------------- 1 file changed, 12 insertions(+), 56 deletions(-) (limited to 'board') diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 7b981fa7a5d..57400ce374e 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -157,54 +158,22 @@ int board_mmc_init(bd_t *bis) { struct exynos4_gpio_part2 *gpio = (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); - int i, err; + int err; /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */ s5p_gpio_direction_output(&gpio->k0, 2, 1); s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE); - /* - * eMMC GPIO: - * SDR 8-bit@48MHz at MMC0 - * GPK0[0] SD_0_CLK(2) - * GPK0[1] SD_0_CMD(2) - * GPK0[2] SD_0_CDn -> Not used - * GPK0[3:6] SD_0_DATA[0:3](2) - * GPK1[3:6] SD_0_DATA[0:3](3) - * - * DDR 4-bit@26MHz at MMC4 - * GPK0[0] SD_4_CLK(3) - * GPK0[1] SD_4_CMD(3) - * GPK0[2] SD_4_CDn -> Not used - * GPK0[3:6] SD_4_DATA[0:3](3) - * GPK1[3:6] SD_4_DATA[4:7](4) - */ - for (i = 0; i < 7; i++) { - if (i == 2) - continue; - /* GPK0[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio->k0, i, 0x2); - /* GPK0[0:6] pull disable */ - s5p_gpio_set_pull(&gpio->k0, i, GPIO_PULL_NONE); - /* GPK0[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio->k0, i, GPIO_DRV_4X); - } - - for (i = 3; i < 7; i++) { - /* GPK1[3:6] special function 3 */ - s5p_gpio_cfg_pin(&gpio->k1, i, 0x3); - /* GPK1[3:6] pull disable */ - s5p_gpio_set_pull(&gpio->k1, i, GPIO_PULL_NONE); - /* GPK1[3:6] drv 4x */ - s5p_gpio_set_drv(&gpio->k1, i, GPIO_DRV_4X); - } - /* * MMC device init * mmc0 : eMMC (8-bit buswidth) * mmc2 : SD card (4-bit buswidth) */ - err = s5p_mmc_init(0, 8); + err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); + if (err) + debug("SDMMC0 not configured\n"); + else + err = s5p_mmc_init(0, 8); /* T-flash detect */ s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf); @@ -215,24 +184,11 @@ int board_mmc_init(bd_t *bis) * GPX3[4] T-flash detect pin */ if (!s5p_gpio_get_value(&gpio->x3, 4)) { - /* - * SD card GPIO: - * GPK2[0] SD_2_CLK(2) - * GPK2[1] SD_2_CMD(2) - * GPK2[2] SD_2_CDn -> Not used - * GPK2[3:6] SD_2_DATA[0:3](2) - */ - for (i = 0; i < 7; i++) { - if (i == 2) - continue; - /* GPK2[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio->k2, i, 0x2); - /* GPK2[0:6] pull disable */ - s5p_gpio_set_pull(&gpio->k2, i, GPIO_PULL_NONE); - /* GPK2[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio->k2, i, GPIO_DRV_4X); - } - err = s5p_mmc_init(2, 4); + err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE); + if (err) + debug("SDMMC2 not configured\n"); + else + err = s5p_mmc_init(2, 4); } return err; -- cgit v1.2.3 From ea7991b8f14f258713e8a8ac89cdc6739d487383 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Thu, 20 Sep 2012 00:19:59 +0000 Subject: arm:exynos4:universal: Use pinmux for mmc configuration This patch use the pinmux for mmc configuration for Universal C210 Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- board/samsung/universal_c210/universal.c | 74 +++++++------------------------- 1 file changed, 15 insertions(+), 59 deletions(-) (limited to 'board') diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 90fff5cf5e1..7a4941c0521 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -177,7 +178,7 @@ int checkboard(void) #ifdef CONFIG_GENERIC_MMC int board_mmc_init(bd_t *bis) { - int i, err; + int err; switch (get_hwrev()) { case 0: @@ -200,75 +201,30 @@ int board_mmc_init(bd_t *bis) } /* - * eMMC GPIO: - * SDR 8-bit@48MHz at MMC0 - * GPK0[0] SD_0_CLK(2) - * GPK0[1] SD_0_CMD(2) - * GPK0[2] SD_0_CDn -> Not used - * GPK0[3:6] SD_0_DATA[0:3](2) - * GPK1[3:6] SD_0_DATA[0:3](3) - * - * DDR 4-bit@26MHz at MMC4 - * GPK0[0] SD_4_CLK(3) - * GPK0[1] SD_4_CMD(3) - * GPK0[2] SD_4_CDn -> Not used - * GPK0[3:6] SD_4_DATA[0:3](3) - * GPK1[3:6] SD_4_DATA[4:7](4) + * MMC device init + * mmc0 : eMMC (8-bit buswidth) + * mmc2 : SD card (4-bit buswidth) */ - for (i = 0; i < 7; i++) { - if (i == 2) - continue; - /* GPK0[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2); - /* GPK0[0:6] pull disable */ - s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE); - /* GPK0[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X); - } - - for (i = 3; i < 7; i++) { - /* GPK1[3:6] special function 3 */ - s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3); - /* GPK1[3:6] pull disable */ - s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE); - /* GPK1[3:6] drv 4x */ - s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X); - } + err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); + if (err) + debug("SDMMC0 not configured\n"); + else + err = s5p_mmc_init(0, 8); /* T-flash detect */ s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf); s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP); - /* - * MMC device init - * mmc0 : eMMC (8-bit buswidth) - * mmc2 : SD card (4-bit buswidth) - */ - err = s5p_mmc_init(0, 8); - /* * Check the T-flash detect pin * GPX3[4] T-flash detect pin */ if (!s5p_gpio_get_value(&gpio2->x3, 4)) { - /* - * SD card GPIO: - * GPK2[0] SD_2_CLK(2) - * GPK2[1] SD_2_CMD(2) - * GPK2[2] SD_2_CDn -> Not used - * GPK2[3:6] SD_2_DATA[0:3](2) - */ - for (i = 0; i < 7; i++) { - if (i == 2) - continue; - /* GPK2[0:6] special function 2 */ - s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2); - /* GPK2[0:6] pull disable */ - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); - /* GPK2[0:6] drv 4x */ - s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); - } - err = s5p_mmc_init(2, 4); + err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE); + if (err) + debug("SDMMC2 not configured\n"); + else + err = s5p_mmc_init(2, 4); } return err; -- cgit v1.2.3 From 11a447983f0207e3a0146f4898a14b1d84365e2d Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Thu, 20 Sep 2012 00:20:00 +0000 Subject: arm:exynos4:universal: Eliminated low level init Low level initialisation is done by another bootloader Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- board/samsung/universal_c210/Makefile | 1 - board/samsung/universal_c210/lowlevel_init.S | 395 --------------------------- board/samsung/universal_c210/universal.c | 8 + 3 files changed, 8 insertions(+), 396 deletions(-) delete mode 100644 board/samsung/universal_c210/lowlevel_init.S (limited to 'board') diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile index bfec08fa8ea..587cc1b8c70 100644 --- a/board/samsung/universal_c210/Makefile +++ b/board/samsung/universal_c210/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o COBJS-y := universal.o onenand.o -SOBJS := lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S deleted file mode 100644 index dc7f69ea447..00000000000 --- a/board/samsung/universal_c210/lowlevel_init.S +++ /dev/null @@ -1,395 +0,0 @@ -/* - * Lowlevel setup for universal board based on EXYNOS4210 - * - * Copyright (C) 2010 Samsung Electronics - * Kyungmin Park - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -/* - * Register usages: - * - * r5 has zero always - * r7 has GPIO part1 base 0x11400000 - * r6 has GPIO part2 base 0x11000000 - */ - - .globl lowlevel_init -lowlevel_init: - mov r11, lr - - /* r5 has always zero */ - mov r5, #0 - - ldr r7, =EXYNOS4_GPIO_PART1_BASE - ldr r6, =EXYNOS4_GPIO_PART2_BASE - - /* System Timer */ - ldr r0, =EXYNOS4_SYSTIMER_BASE - ldr r1, =0x5000 - str r1, [r0, #0x0] - ldr r1, =0xffffffff - str r1, [r0, #0x8] - ldr r1, =0x49 - str r1, [r0, #0x4] - - /* PMIC manual reset */ - /* nPOWER: XEINT_23: GPX2[7] */ - add r0, r6, #0xC40 @ EXYNOS4_GPIO_X2_OFFSET - ldr r1, [r0, #0x0] - bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit - orr r1, r1, #(0x1 << 28) @ Output - str r1, [r0, #0x0] - - ldr r1, [r0, #0x4] - orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit - str r1, [r0, #0x4] - - /* init system clock */ - bl system_clock_init - - /* Disable Watchdog */ - ldr r0, =EXYNOS4_WATCHDOG_BASE @0x10060000 - str r5, [r0] - - /* UART */ - bl uart_asm_init - - /* PMU init */ - bl system_power_init - - bl tzpc_init - - mov lr, r11 - mov pc, lr - nop - nop - nop - -/* - * uart_asm_init: Initialize UART's pins - */ -uart_asm_init: - /* - * setup UART0-UART4 GPIOs (part1) - * GPA1CON[3] = I2C_3_SCL (3) - * GPA1CON[2] = I2C_3_SDA (3) - */ - mov r0, r7 - ldr r1, =0x22222222 - str r1, [r0, #0x00] @ EXYNOS4_GPIO_A0_OFFSET - ldr r1, =0x00223322 - str r1, [r0, #0x20] @ EXYNOS4_GPIO_A1_OFFSET - - /* UART_SEL GPY4[7] (part2) at EXYNOS4 */ - add r0, r6, #0x1A0 @ EXYNOS4_GPIO_Y4_OFFSET - ldr r1, [r0, #0x0] - bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit - orr r1, r1, #(0x1 << 28) - str r1, [r0, #0x0] - - ldr r1, [r0, #0x8] - bic r1, r1, #(0x3 << 14) @ 14 = 7 * 2-bit - orr r1, r1, #(0x3 << 14) @ Pull-up enabled - str r1, [r0, #0x8] - - ldr r1, [r0, #0x4] - orr r1, r1, #(1 << 7) @ 7 = 7 * 1-bit - str r1, [r0, #0x4] - - mov pc, lr - nop - nop - nop - -system_clock_init: - ldr r0, =EXYNOS4_CLOCK_BASE - - /* APLL(1), MPLL(1), CORE(0), HPM(0) */ - ldr r1, =0x0101 - ldr r2, =0x14200 @ CLK_SRC_CPU - str r1, [r0, r2] - - /* wait ?us */ - mov r1, #0x10000 -1: subs r1, r1, #1 - bne 1b - - /* - * CLK_SRC_TOP0 - * MUX_ONENAND_SEL[28] 0: DOUT133, 1: DOUT166 - * MUX_VPLL_SEL[8] 0: FINPLL, 1: FOUTVPLL - * MUX_EPLL_SEL[4] 0: FINPLL, 1: FOUTEPLL - */ - ldr r1, =0x10000110 - ldr r2, =0x0C210 @ CLK_SRC_TOP - str r1, [r0, r2] - - /* SATA: SCLKMPLL(0), MMC[0:4]: SCLKMPLL(6) */ - ldr r1, =0x0066666 - ldr r2, =0x0C240 @ CLK_SRC_FSYS - str r1, [r0, r2] - /* UART[0:5], PWM: SCLKMPLL(6) */ - ldr r1, =0x6666666 - ldr r2, =0x0C250 @ CLK_SRC_PERIL0_OFFSET - str r1, [r0, r2] - - /* CPU0: CORE, COREM0, COREM1, PERI, ATB, PCLK_DBG, APLL */ - ldr r1, =0x0133730 - ldr r2, =0x14500 @ CLK_DIV_CPU0 - str r1, [r0, r2] - /* CPU1: COPY, HPM */ - ldr r1, =0x03 - ldr r2, =0x14504 @ CLK_DIV_CPU1 - str r1, [r0, r2] - /* DMC0: ACP, ACP_PCLK, DPHY, DMC, DMCD, DMCP, COPY2 CORE_TIMER */ - ldr r1, =0x13111113 - ldr r2, =0x10500 @ CLK_DIV_DMC0 - str r1, [r0, r2] - /* DMC1: PWI, DVSEM, DPM */ - ldr r1, =0x01010100 - ldr r2, =0x10504 @ CLK_DIV_DMC1 - str r1, [r0, r2] - /* LEFTBUS: GDL, GPL */ - ldr r1, =0x13 - ldr r2, =0x04500 @ CLK_DIV_LEFTBUS - str r1, [r0, r2] - /* RIGHHTBUS: GDR, GPR */ - ldr r1, =0x13 - ldr r2, =0x08500 @ CLK_DIV_RIGHTBUS - str r1, [r0, r2] - /* - * CLK_DIV_TOP - * ONENAND_RATIOD[18:16]: 0 SCLK_ONENAND = MOUTONENAND / (n + 1) - * ACLK_200, ACLK_100, ACLK_160, ACLK_133, - */ - ldr r1, =0x00005473 - ldr r2, =0x0C510 @ CLK_DIV_TOP - str r1, [r0, r2] - /* MMC[0:1] */ - ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */ - ldr r2, =0x0C544 @ CLK_DIV_FSYS1 - str r1, [r0, r2] - /* MMC[2:3] */ - ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */ - ldr r2, =0x0C548 @ CLK_DIV_FSYS2 - str r1, [r0, r2] - /* MMC4 */ - ldr r1, =0x000f /* 800(MPLL) / (15 + 1) */ - ldr r2, =0x0C54C @ CLK_DIV_FSYS3 - str r1, [r0, r2] - /* UART[0:5] */ - ldr r1, =0x774777 - ldr r2, =0x0C550 @ CLK_DIV_PERIL0 - str r1, [r0, r2] - /* SLIMBUS: ???, PWM */ - ldr r1, =0x8 - ldr r2, =0x0C55C @ CLK_DIV_PERIL3 - str r1, [r0, r2] - - /* PLL Setting */ - ldr r1, =0x1C20 - ldr r2, =0x14000 @ APLL_LOCK - str r1, [r0, r2] - ldr r2, =0x14008 @ MPLL_LOCK - str r1, [r0, r2] - ldr r2, =0x0C010 @ EPLL_LOCK - str r1, [r0, r2] - ldr r2, =0x0C020 @ VPLL_LOCK - str r1, [r0, r2] - - /* APLL */ - ldr r1, =0x8000001c - ldr r2, =0x14104 @ APLL_CON1 - str r1, [r0, r2] - ldr r1, =0x80c80601 @ 800MHz - ldr r2, =0x14100 @ APLL_CON0 - str r1, [r0, r2] - /* MPLL */ - ldr r1, =0x8000001C - ldr r2, =0x1410C @ MPLL_CON1 - str r1, [r0, r2] - ldr r1, =0x80c80601 @ 800MHz - ldr r2, =0x14108 @ MPLL_CON0 - str r1, [r0, r2] - /* EPLL */ - ldr r1, =0x0 - ldr r2, =0x0C114 @ EPLL_CON1 - str r1, [r0, r2] - ldr r1, =0x80300302 @ 96MHz - ldr r2, =0x0C110 @ EPLL_CON0 - str r1, [r0, r2] - /* VPLL */ - ldr r1, =0x11000400 - ldr r2, =0x0C124 @ VPLL_CON1 - str r1, [r0, r2] - ldr r1, =0x80350302 @ 108MHz - ldr r2, =0x0C120 @ VPLL_CON0 - str r1, [r0, r2] - - /* - * SMMUJPEG[11], JPEG[6], CSIS1[5] : 0111 1001 - * Turn off all - */ - ldr r1, =0xFFF80000 - ldr r2, =0x0C920 @ CLK_GATE_IP_CAM - str r1, [r0, r2] - - /* Turn off all */ - ldr r1, =0xFFFFFFC0 - ldr r2, =0x0C924 @ CLK_GATE_IP_VP - str r1, [r0, r2] - - /* Turn off all */ - ldr r1, =0xFFFFFFE0 - ldr r2, =0x0C928 @ CLK_GATE_IP_MFC - str r1, [r0, r2] - - /* Turn off all */ - ldr r1, =0xFFFFFFFC - ldr r2, =0x0C92C @ CLK_GATE_IP_G3D - str r1, [r0, r2] - - /* Turn off all */ - ldr r1, =0xFFFFFC00 - ldr r2, =0x0C930 @ CLK_GATE_IP_IMAGE - str r1, [r0, r2] - - /* DSIM0[3], MDNIE0[2], MIE0[1] : 0001 */ - ldr r1, =0xFFFFFFF1 - ldr r2, =0x0C934 @ CLK_GATE_IP_LCD0 - str r1, [r0, r2] - - /* Turn off all */ - ldr r1, =0xFFFFFFC0 - ldr r2, =0x0C938 @ CLK_GATE_IP_LCD1 - str r1, [r0, r2] - - /* - * SMMUPCIE[18], NFCON[16] : 1111 1010 - * PCIE[14], SATA[10], SDMMC43[9:8] : 1011 1000 - * SDMMC1[6], TSI[4], SATAPHY[3], PCIEPHY[2] : 1010 0011 - */ - ldr r1, =0xFFFAB8A3 - ldr r2, =0x0C940 @ CLK_GATE_IP_FSYS - str r1, [r0, r2] - - /* Turn off all */ - ldr r1, =0xFFFFFFFC - ldr r2, =0x0C94C @ CLK_GATE_IP_GPS - str r1, [r0, r2] - - /* - * AC97[27], SPDIF[26], SLIMBUS[25] : 1111 0001 - * I2C2[8] : 1111 1110 - */ - ldr r1, =0xF1FFFEFF - ldr r2, =0x0C950 @ CLK_GATE_IP_PERIL - str r1, [r0, r2] - - /* - * KEYIF[16] : 1111 1110 - */ - ldr r1, =0xFFFEFFFF - ldr r2, =0x0C960 @ CLK_GATE_IP_PERIR - str r1, [r0, r2] - - /* LCD1[5], G3D[3], MFC[2], TV[1] : 1101 0001 */ - ldr r1, =0xFFFFFFD1 - ldr r2, =0x0C970 @ CLK_GATE_BLOCK - str r1, [r0, r2] - mov pc, lr - nop - nop - nop - -system_power_init: - ldr r0, =EXYNOS4_POWER_BASE @ 0x10020000 - - ldr r2, =0x330C @ PS_HOLD_CONTROL - ldr r1, [r0, r2] - orr r1, r1, #(0x3 << 8) @ Data High, Output En - str r1, [r0, r2] - - /* Power Down */ - add r2, r0, #0x3000 - str r5, [r2, #0xC20] @ TV_CONFIGURATION - str r5, [r2, #0xC40] @ MFC_CONFIGURATION - str r5, [r2, #0xC60] @ G3D_CONFIGURATION - str r5, [r2, #0xCA0] @ LCD1_CONFIGURATION - str r5, [r2, #0xCE0] @ GPS_CONFIGURATION - - mov pc, lr - nop - nop - nop - -tzpc_init: - ldr r0, =0x10110000 - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #0x0804] - str r1, [r0, #0x0810] - str r1, [r0, #0x081C] - str r1, [r0, #0x0828] - - ldr r0, =0x10120000 - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #0x0804] - str r1, [r0, #0x0810] - str r1, [r0, #0x081C] - str r1, [r0, #0x0828] - - ldr r0, =0x10130000 - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #0x0804] - str r1, [r0, #0x0810] - str r1, [r0, #0x081C] - str r1, [r0, #0x0828] - - ldr r0, =0x10140000 - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #0x0804] - str r1, [r0, #0x0810] - str r1, [r0, #0x081C] - str r1, [r0, #0x0828] - - ldr r0, =0x10150000 - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #0x0804] - str r1, [r0, #0x0810] - str r1, [r0, #0x081C] - str r1, [r0, #0x0828] - - mov pc, lr diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 7a4941c0521..ded97ca3120 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -32,6 +32,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -276,3 +277,10 @@ struct s3c_plat_otg_data s5pc210_otg_data = { .usb_flags = PHY0_SLEEP, }; #endif + +int board_early_init_f(void) +{ + wdt_stop(); + + return 0; +} -- cgit v1.2.3 From ab23304dbcbb7d2123e69a8d3e9fccb7dffb894c Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Mon, 8 Oct 2012 20:45:42 +0000 Subject: arm: trats: Power down core 1 This patch turns power down for unused core 1 Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- board/samsung/trats/trats.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board') diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 57400ce374e..d5c681c05e2 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -321,6 +321,10 @@ static void board_power_init(void) writel(0, (unsigned int)&pwr->lcd1_configuration); writel(0, (unsigned int)&pwr->gps_configuration); writel(0, (unsigned int)&pwr->gps_alive_configuration); + + /* It is necessary to power down core 1 */ + /* to successfully boot CPU1 in kernel */ + writel(0, (unsigned int)&pwr->arm_core1_configuration); } static void board_uart_init(void) -- cgit v1.2.3 From 0d146a56f91a7a631bca2376c9c5c05d62e71620 Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Fri, 24 Aug 2012 00:39:24 +0000 Subject: SMDK5250: Config: Enable MAX77686 pmic chip This patch enables MAX77686 pmic chip for SMDK5250. Signed-off-by: Rajeshwari Shinde Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index a5816e445c8..18dd5d248ec 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -29,6 +29,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -63,6 +64,9 @@ static int smc9115_pre_init(void) int board_init(void) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); +#if defined(CONFIG_PMIC) + pmic_init(); +#endif return 0; } -- cgit v1.2.3 From ff0fedd58529e50e972d6b983c52c54a062f8c75 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Fri, 19 Oct 2012 05:34:03 +0000 Subject: exynos4: universal_C210: use software SPI This patch use software spi on Samsung Universal C210 board. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- board/samsung/universal_c210/universal.c | 87 +++++++++++++++++++++++++------- 1 file changed, 69 insertions(+), 18 deletions(-) (limited to 'board') diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index ded97ca3120..4c1163e9bb2 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -23,7 +23,9 @@ */ #include +#include #include +#include #include #include #include @@ -52,24 +54,6 @@ static int get_hwrev(void) static void check_hw_revision(void); -int board_init(void) -{ - gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; - gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; - - gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - -#if defined(CONFIG_PMIC) - pmic_init(); -#endif - - check_hw_revision(); - printf("HW Revision:\t0x%x\n", board_rev); - - return 0; -} - int dram_init(void) { gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) + @@ -284,3 +268,70 @@ int board_early_init_f(void) return 0; } + +#ifdef CONFIG_SOFT_SPI +static void soft_spi_init(void) +{ + gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK, + CONFIG_SOFT_SPI_MODE & SPI_CPOL); + gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1); + gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO); + gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS, + !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); +} + +void spi_cs_activate(struct spi_slave *slave) +{ + gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, + !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); + SPI_SCL(1); + gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, + CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS, + !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH)); +} + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void universal_spi_scl(int bit) +{ + gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit); +} + +void universal_spi_sda(int bit) +{ + gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit); +} + +int universal_spi_read(void) +{ + return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO); +} +#endif + +int board_init(void) +{ + gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; + gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; + + gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + +#if defined(CONFIG_PMIC) + pmic_init(); +#endif +#ifdef CONFIG_SOFT_SPI + soft_spi_init(); +#endif + check_hw_revision(); + printf("HW Revision:\t0x%x\n", board_rev); + + return 0; +} -- cgit v1.2.3 From d984b9f89cd944ccf23b9d5e95ef8bf9cb2c1499 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Fri, 19 Oct 2012 05:34:07 +0000 Subject: exynos4: universal_C210: add display support This patch add support for display on Universal C210 board. Width of displyed logo must be not bigger than 480 pixel and is limited by width of the screen. Tizen logo size is 520x120 pixels and should be resized. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- board/samsung/universal_c210/universal.c | 166 +++++++++++++++++++++++++++++++ 1 file changed, 166 insertions(+) (limited to 'board') diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 4c1163e9bb2..afe3bb0aeb8 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include @@ -35,6 +36,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -316,6 +319,168 @@ int universal_spi_read(void) } #endif +static void init_pmic_lcd(void) +{ + unsigned char val; + int ret = 0; + + struct pmic *p = get_pmic(); + + if (pmic_probe(p)) + return; + + /* LDO7 1.8V */ + val = 0x02; /* (1800 - 1600) / 100; */ + ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val); + + /* LDO17 3.0V */ + val = 0xe; /* (3000 - 1600) / 100; */ + ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val); + + /* Disable unneeded regulators */ + /* + * ONOFF1 + * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON + * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON + */ + val = 0xB9; + ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val); + + /* ONOFF2 + * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON, + * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF + */ + val = 0x50; + ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val); + + /* ONOFF3 + * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF + * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF + */ + val = 0x00; + ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val); + + if (ret) + puts("LCD pmic initialisation error!\n"); +} + +static void lcd_cfg_gpio(void) +{ + unsigned int i, f3_end = 4; + + for (i = 0; i < 8; i++) { + /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */ + s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2)); + s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2)); + /* pull-up/down disable */ + s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE); + s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE); + + /* drive strength to max (24bit) */ + s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW); + s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW); + s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW); + } + + for (i = 0; i < f3_end; i++) { + /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */ + s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2)); + /* pull-up/down disable */ + s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE); + /* drive strength to max (24bit) */ + s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X); + s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW); + } + + /* gpio pad configuration for LCD reset. */ + s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT); + + spi_init(); +} + +static void reset_lcd(void) +{ + s5p_gpio_set_value(&gpio2->y4, 5, 1); + udelay(10000); + s5p_gpio_set_value(&gpio2->y4, 5, 0); + udelay(10000); + s5p_gpio_set_value(&gpio2->y4, 5, 1); + udelay(100); +} + +static void lcd_power_on(void) +{ + struct pmic *p = get_pmic(); + + if (pmic_probe(p)) + return; + + pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON); + pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON); +} + +vidinfo_t panel_info = { + .vl_freq = 60, + .vl_col = 480, + .vl_row = 800, + .vl_width = 480, + .vl_height = 800, + .vl_clkp = CONFIG_SYS_HIGH, + .vl_hsp = CONFIG_SYS_HIGH, + .vl_vsp = CONFIG_SYS_HIGH, + .vl_dp = CONFIG_SYS_HIGH, + + .vl_bpix = 5, /* Bits per pixel */ + + /* LD9040 LCD Panel */ + .vl_hspw = 2, + .vl_hbpd = 16, + .vl_hfpd = 16, + + .vl_vspw = 2, + .vl_vbpd = 8, + .vl_vfpd = 8, + .vl_cmd_allow_len = 0xf, + + .win_id = 0, + .cfg_gpio = lcd_cfg_gpio, + .backlight_on = NULL, + .lcd_power_on = lcd_power_on, + .reset_lcd = reset_lcd, + .dual_lcd_enabled = 0, + + .init_delay = 0, + .power_on_delay = 10000, + .reset_delay = 10000, + .interface_mode = FIMD_RGB_INTERFACE, + .mipi_enabled = 0, +}; + +void init_panel_info(vidinfo_t *vid) +{ + vid->logo_on = 1; + vid->resolution = HD_RESOLUTION; + vid->rgb_mode = MODE_RGB_P; + +#ifdef CONFIG_TIZEN + get_tizen_logo_info(vid); +#endif + + /* for LD9040. */ + vid->pclk_name = 1; /* MPLL */ + vid->sclk_div = 1; + + vid->cfg_ldo = ld9040_cfg_ldo; + vid->enable_ldo = ld9040_enable_ldo; + + setenv("lcdinfo", "lcd=ld9040"); +} + int board_init(void) { gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; @@ -326,6 +491,7 @@ int board_init(void) #if defined(CONFIG_PMIC) pmic_init(); + init_pmic_lcd(); #endif #ifdef CONFIG_SOFT_SPI soft_spi_init(); -- cgit v1.2.3 From 3a8a70017d33e4f72f647154ed3432253b3dfac4 Mon Sep 17 00:00:00 2001 From: Hatim RV Date: Fri, 2 Nov 2012 01:15:37 +0000 Subject: EXYNOS5: Enable SPI This patch enables SPI driver for EXYNOS5. Signed-off-by: Rajeshwari Shinde Signed-off-by: Hatim Ali Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 18dd5d248ec..4c50342e5cd 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -66,6 +67,9 @@ int board_init(void) gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); #if defined(CONFIG_PMIC) pmic_init(); +#endif +#ifdef CONFIG_EXYNOS_SPI + spi_init(); #endif return 0; } -- cgit v1.2.3 From 7a5337732e3e05b2b0de1b592fa031b2c7b4f632 Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Fri, 2 Nov 2012 01:15:38 +0000 Subject: EXYNOS5: Enable SPI booting. This patch enables SPI Booting for EXYNOS5 Signed-off-by: Rajeshwari Shinde Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/Makefile | 2 +- board/samsung/smdk5250/mmc_boot.c | 58 -------------------------- board/samsung/smdk5250/spl_boot.c | 85 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 86 insertions(+), 59 deletions(-) delete mode 100644 board/samsung/smdk5250/mmc_boot.c create mode 100644 board/samsung/smdk5250/spl_boot.c (limited to 'board') diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile index 1474fa8a15a..47c6a5a46b5 100644 --- a/board/samsung/smdk5250/Makefile +++ b/board/samsung/smdk5250/Makefile @@ -36,7 +36,7 @@ COBJS += smdk5250.o endif ifdef CONFIG_SPL_BUILD -COBJS += mmc_boot.o +COBJS += spl_boot.o endif SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/samsung/smdk5250/mmc_boot.c b/board/samsung/smdk5250/mmc_boot.c deleted file mode 100644 index 449a919d5f2..00000000000 --- a/board/samsung/smdk5250/mmc_boot.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -/* -* Copy U-boot from mmc to RAM: -* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains -* Pointer to API (Data transfer from mmc to ram) -*/ -void copy_uboot_to_ram(void) -{ - u32 (*copy_bl2)(u32, u32, u32) = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR; - - copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE); -} - -void board_init_f(unsigned long bootflag) -{ - __attribute__((noreturn)) void (*uboot)(void); - copy_uboot_to_ram(); - - /* Jump to U-Boot image */ - uboot = (void *)CONFIG_SYS_TEXT_BASE; - (*uboot)(); - /* Never returns Here */ -} - -/* Place Holders */ -void board_init_r(gd_t *id, ulong dest_addr) -{ - /* Function attribute is no-return */ - /* This Function never executes */ - while (1) - ; -} - -void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} diff --git a/board/samsung/smdk5250/spl_boot.c b/board/samsung/smdk5250/spl_boot.c new file mode 100644 index 00000000000..d8f3c1e1848 --- /dev/null +++ b/board/samsung/smdk5250/spl_boot.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +enum boot_mode { + BOOT_MODE_MMC = 4, + BOOT_MODE_SERIAL = 20, + /* Boot based on Operating Mode pin settings */ + BOOT_MODE_OM = 32, + BOOT_MODE_USB, /* Boot using USB download */ +}; + + typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst); + +/* +* Copy U-boot from mmc to RAM: +* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains +* Pointer to API (Data transfer from mmc to ram) +*/ +void copy_uboot_to_ram(void) +{ + spi_copy_func_t spi_copy; + enum boot_mode bootmode; + u32 (*copy_bl2)(u32, u32, u32); + + bootmode = readl(EXYNOS5_POWER_BASE) & OM_STAT; + + switch (bootmode) { + case BOOT_MODE_SERIAL: + spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR; + spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE, + CONFIG_SYS_TEXT_BASE); + break; + case BOOT_MODE_MMC: + copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR; + copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, + CONFIG_SYS_TEXT_BASE); + break; + default: + break; + } +} + +void board_init_f(unsigned long bootflag) +{ + __attribute__((noreturn)) void (*uboot)(void); + copy_uboot_to_ram(); + + /* Jump to U-Boot image */ + uboot = (void *)CONFIG_SYS_TEXT_BASE; + (*uboot)(); + /* Never returns Here */ +} + +/* Place Holders */ +void board_init_r(gd_t *id, ulong dest_addr) +{ + /* Function attribute is no-return */ + /* This Function never executes */ + while (1) + ; +} + +void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} -- cgit v1.2.3 From 961a762838d55dc9bae8fa7ea57bc3c51a9c7b57 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Tue, 13 Nov 2012 09:58:25 +0000 Subject: mx35pdk: Add support for OTG MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the OTG port on the mx35pdk Personality board. Signed-off-by: Benoît Thébaudeau Tested-by: Stefano Babic Cc: Stefano Babic Cc: Marek Vasut --- board/freescale/mx35pdk/lowlevel_init.S | 4 ++++ board/freescale/mx35pdk/mx35pdk.c | 21 +++++++++++++++++++++ 2 files changed, 25 insertions(+) (limited to 'board') diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S index 75bb9586196..da8b6f3a4e2 100644 --- a/board/freescale/mx35pdk/lowlevel_init.S +++ b/board/freescale/mx35pdk/lowlevel_init.S @@ -94,6 +94,10 @@ orr r1, r1, #0x00000C00 orr r1, r1, #0x00000003 str r1, [r0, #CLKCTL_CGR1] + + ldr r1, [r0, #CLKCTL_CGR2] + orr r1, r1, #0x00C00000 + str r1, [r0, #CLKCTL_CGR2] .endm .macro setup_sdram diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index a12531fb892..4d8f2f5eea3 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -98,6 +98,26 @@ static void setup_iomux_spi(void) mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_SION); } +static void setup_iomux_usbotg(void) +{ + int in_pad, out_pad; + + /* Set up pins for USBOTG. */ + mxc_request_iomux(MX35_PIN_USBOTG_PWR, + MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_USBOTG_OC, + MUX_CONFIG_SION | MUX_CONFIG_FUNC); + + in_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + out_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_CMOS | PAD_CTL_PKE_NONE | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_USBOTG_PWR, out_pad); + mxc_iomux_set_pad(MX35_PIN_USBOTG_OC, in_pad); +} + static void setup_iomux_fec(void) { int pad; @@ -189,6 +209,7 @@ int board_early_init_f(void) __raw_writel(readl(&ccm->rcsr) | MXC_CCM_RCSR_NFC_FMS, &ccm->rcsr); setup_iomux_i2c(); + setup_iomux_usbotg(); setup_iomux_fec(); setup_iomux_spi(); -- cgit v1.2.3 From e1ae0d1f7185948d576dd7b53654444a0079a92d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 17 Oct 2012 13:24:49 +0000 Subject: tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- board/nvidia/common/board.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 2c7cd0d401f..f23c87daf51 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -118,6 +119,10 @@ int board_init(void) #ifdef CONFIG_TEGRA_SPI pin_mux_spi(); spi_init(); +#endif +#ifdef CONFIG_PWM_TEGRA + if (pwm_init(gd->fdt_blob)) + debug("%s: Failed to init pwm\n", __func__); #endif /* boot param addr */ gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); -- cgit v1.2.3 From 1b24a50b44d9577c65759d252571f94e8f702777 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 17 Oct 2012 13:24:52 +0000 Subject: tegra: Add LCD support to Nvidia boards Add calls to the LCD driver from Nvidia board code. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- board/nvidia/common/board.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'board') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index f23c87daf51..76ec6876e21 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -123,6 +124,9 @@ int board_init(void) #ifdef CONFIG_PWM_TEGRA if (pwm_init(gd->fdt_blob)) debug("%s: Failed to init pwm\n", __func__); +#endif +#ifdef CONFIG_LCD + tegra_lcd_check_next_stage(gd->fdt_blob, 0); #endif /* boot param addr */ gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100); @@ -149,6 +153,9 @@ int board_init(void) pin_mux_usb(); board_usb_init(gd->fdt_blob); #endif +#ifdef CONFIG_LCD + tegra_lcd_check_next_stage(gd->fdt_blob, 0); +#endif #ifdef CONFIG_TEGRA_NAND pin_mux_nand(); @@ -179,7 +186,19 @@ int board_early_init_f(void) /* Initialize periph GPIOs */ gpio_early_init(); gpio_early_init_uart(); +#ifdef CONFIG_LCD + tegra_lcd_early_init(gd->fdt_blob); +#endif return 0; } #endif /* EARLY_INIT */ + +int board_late_init(void) +{ +#ifdef CONFIG_LCD + /* Make sure we finish initing the LCD */ + tegra_lcd_check_next_stage(gd->fdt_blob, 1); +#endif + return 0; +} -- cgit v1.2.3 From 77139f5170ca74a7724f773ac8b355f8e191576c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 17 Oct 2012 13:24:58 +0000 Subject: tegra: fdt: Add LCD definitions for Seaboard The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled by one of the PWMs. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- board/nvidia/dts/tegra20-seaboard.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'board') diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts index 25a63a05d0c..dd98ca48e9f 100644 --- a/board/nvidia/dts/tegra20-seaboard.dts +++ b/board/nvidia/dts/tegra20-seaboard.dts @@ -163,4 +163,37 @@ compatible = "hynix,hy27uf4g2b", "nand-flash"; }; }; + + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + + lcd_panel: panel { + /* Seaboard has 1366x768 */ + clock = <70600000>; + xres = <1366>; + yres = <768>; + left-margin = <58>; + right-margin = <58>; + hsync-len = <58>; + lower-margin = <4>; + upper-margin = <4>; + vsync-len = <4>; + hsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 2 0>; + nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */ + nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */ + nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */ + nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */ + nvidia,panel-timings = <400 4 203 17 15>; + }; + }; -- cgit v1.2.3 From 7155dc97f62a7bb3c64eee0a643c8e329abe9f3c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 1 Nov 2012 12:14:37 +0000 Subject: ARM: tegra: TrimSlice: add support for USB1 port TrimSlice's USB1 port has two purposes; it either acts as a device port hosting Tegra's USB recovery protocol, or acts as a host port connected to the internal USB->SATA bridge chip, which may in turn be connected to an SSD or HDD. Add the appropriate device tree and board configuration options to enable this port as a host port, and route the port to the SATA bridge using the VBUS GPIO. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- board/compulab/dts/tegra20-trimslice.dts | 3 ++- board/compulab/trimslice/trimslice.c | 8 ++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/compulab/dts/tegra20-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts index db79e7796d0..4450674a759 100644 --- a/board/compulab/dts/tegra20-trimslice.dts +++ b/board/compulab/dts/tegra20-trimslice.dts @@ -8,6 +8,7 @@ aliases { usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; }; memory { @@ -48,7 +49,7 @@ }; usb@c5000000 { - status = "disabled"; + nvidia,vbus-gpio = <&gpio 170 0>; /* PV2 */ }; usb@c5004000 { diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index 9ef66fd8653..8f4dd09faa3 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -34,6 +34,14 @@ #include #endif +void pin_mux_usb(void) +{ + /* + * USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO + * in the current device tree. + */ + pinmux_tristate_disable(PINGRP_UAC); +} void pin_mux_spi(void) { -- cgit v1.2.3 From 72573543b5b9f788b46fb9e7ab3372cfeba8d25f Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 2 Nov 2012 06:56:13 +0000 Subject: ARM: tegra: enable 8-bit SD slots in board files Harmony contains an SD slot with all 8 bits routed. This allows plugging in an eMMC-chip-in-SD-form-factor. Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits hooked up. Now that the U-Boot eMMC code fully supports 8-bit operation, initialize those ports as 8-bit instead of 4-bit to improve performance. Whistler was already registering its ports as 8-bit. TrimSlice doesn't have any 8-bit ports. I don't have any Avionic Design boards nor the Colibri board to test with. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- board/compal/paz00/paz00.c | 5 ++--- board/nvidia/harmony/harmony.c | 5 ++--- board/nvidia/seaboard/seaboard.c | 5 ++--- 3 files changed, 6 insertions(+), 9 deletions(-) (limited to 'board') diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 0725989de06..6492d4168e1 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -61,9 +61,8 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc(); debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 4-bit bus */ - /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra_mmc_init(0, 4, -1, -1); + /* init dev 0, eMMC chip, with 8-bit bus */ + tegra_mmc_init(0, 8, -1, -1); debug("board_mmc_init: init SD slot\n"); /* init dev 3, SD slot, with 4-bit bus */ diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index c7590ac6cff..93430edd3bd 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -64,9 +64,8 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc(); debug("board_mmc_init: init SD slot J26\n"); - /* init dev 0, SD slot J26, with 4-bit bus */ - /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); + /* init dev 0, SD slot J26, with 8-bit bus */ + tegra_mmc_init(0, 8, GPIO_PI6, GPIO_PH2); debug("board_mmc_init: init SD slot J5\n"); /* init dev 2, SD slot J5, with 4-bit bus */ diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index c412c077da0..3e33da0afc3 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -71,9 +71,8 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc(); debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 4-bit bus */ - /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra_mmc_init(0, 4, -1, -1); + /* init dev 0, eMMC chip, with 8-bit bus */ + tegra_mmc_init(0, 8, -1, -1); debug("board_mmc_init: init SD slot\n"); /* init dev 1, SD slot, with 4-bit bus */ -- cgit v1.2.3 From 48e91caefe572117d68c7b7bc194225e51555950 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Sun, 9 Dec 2012 20:50:11 +0000 Subject: universal_c210: fix compiler error and compiler warning This patch fix following errors universal.c: In function 'init_pmic_lcd': universal.c:340: warning: implicit declaration of function 'get_pmic' universal.c:340: warning: initialization makes pointer from integer without a cast universal.c: In function 'lcd_power_on': universal.c:431: warning: initialization makes pointer from integer without a cast universal.c: At top level: universal.c:335: warning: 'init_pmic_lcd' defined but not used Signed-off-by: Minkyu Kang Cc: Donghwa Lee Cc: Lukasz Majewski Tested-by: Piotr Wilczek --- board/samsung/universal_c210/universal.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 3d508bea237..48697982839 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -55,6 +55,8 @@ static int get_hwrev(void) return board_rev & 0xFF; } +static void init_pmic_lcd(void); + int power_init_board(void) { int ret; @@ -63,6 +65,8 @@ int power_init_board(void) if (ret) return ret; + init_pmic_lcd(); + return 0; } @@ -337,7 +341,7 @@ static void init_pmic_lcd(void) unsigned char val; int ret = 0; - struct pmic *p = get_pmic(); + struct pmic *p = pmic_get("MAX8998_PMIC"); if (pmic_probe(p)) return; @@ -428,7 +432,7 @@ static void reset_lcd(void) static void lcd_power_on(void) { - struct pmic *p = get_pmic(); + struct pmic *p = pmic_get("MAX8998_PMIC"); if (pmic_probe(p)) return; -- cgit v1.2.3 From 211e8438cf61df1e2a53b6b979a8e4224158d5dc Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Mon, 10 Dec 2012 01:55:48 +0000 Subject: SMDK5250: Enable pmic MAX77686 Enabled pmic MAX77686 for SMDK5250. Signed-off-by: Rajeshwari Shinde Reviewed-by: Lukasz Majewski Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 4c50342e5cd..9c926d6ecf2 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -65,9 +65,6 @@ static int smc9115_pre_init(void) int board_init(void) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); -#if defined(CONFIG_PMIC) - pmic_init(); -#endif #ifdef CONFIG_EXYNOS_SPI spi_init(); #endif @@ -87,6 +84,16 @@ int dram_init(void) return 0; } +#if defined(CONFIG_POWER) +int power_init_board(void) +{ + if (pmic_init(I2C_PMIC)) + return -1; + else + return 0; +} +#endif + void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; -- cgit v1.2.3 From fbef8e6e7f1233ed20f8c5045e12c9cf31b43540 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Mon, 10 Dec 2012 22:43:57 +0900 Subject: universal_c210: check the NULL pointer when get the PMIC PMIC 2.0 require to test return pointer from pmic_get() Signed-off-by: Minkyu Kang Cc: Wolfgang Denk Acked-by: Lukasz Majewski --- board/samsung/universal_c210/universal.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'board') diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index 48697982839..e742707f796 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -343,6 +343,9 @@ static void init_pmic_lcd(void) struct pmic *p = pmic_get("MAX8998_PMIC"); + if (!p) + return; + if (pmic_probe(p)) return; @@ -434,6 +437,9 @@ static void lcd_power_on(void) { struct pmic *p = pmic_get("MAX8998_PMIC"); + if (!p) + return; + if (pmic_probe(p)) return; -- cgit v1.2.3 From cabe240b590adeed975d77744c120b3967a31c12 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 11 Dec 2012 04:58:02 +0000 Subject: mx25pdk: Adapt it for the new PMIC framework Make the necessary adaptions for the new PMIC framework, so that mx25pdk can be built again. Signed-off-by: Fabio Estevam Acked-by: Stefano Babic --- board/freescale/mx25pdk/mx25pdk.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'board') diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 72fa6bc8260..d73e27e5405 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include @@ -110,11 +110,18 @@ int board_init(void) int board_late_init(void) { struct pmic *p; + int ret; mx25pdk_fec_init(); - pmic_init(); - p = get_pmic(); + ret = pmic_init(I2C_PMIC); + if (ret) + return ret; + + p = pmic_get("FSL_PMIC"); + if (!p) + return -ENODEV; + /* Turn on Ethernet PHY supply */ pmic_reg_write(p, MC34704_GENERAL2_REG, ONOFFE); -- cgit v1.2.3 From 9634670323cf01b62c7465299ec41aeb0bf8b703 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 11 Dec 2012 06:19:55 +0000 Subject: woodburn: Set gpio value in gpio_direction_output() Set the gpio value in gpio_direction_output() instead of an extra gpio_set_value call. Signed-off-by: Fabio Estevam Acked-by: Stefano Babic --- board/woodburn/woodburn.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'board') diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c index 66a0d35450a..d74f360e130 100644 --- a/board/woodburn/woodburn.c +++ b/board/woodburn/woodburn.c @@ -133,8 +133,7 @@ int woodburn_init(void) mxc_request_iomux(MX35_PIN_SCKR, MUX_CONFIG_ALT5); gpio_direction_output(4, 1); mxc_request_iomux(MX35_PIN_HCKT, MUX_CONFIG_ALT5); - gpio_direction_output(9, 0); - gpio_set_value(9, 1); + gpio_direction_output(9, 1); return 0; } -- cgit v1.2.3 From 8965112bbf393d7b63703c07c28cc43a3fa58f8f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 11 Dec 2012 06:36:58 +0000 Subject: mx53loco: Fix PMIC name commit c73368150 (pmic: Extend PMIC framework to support multiple instances of PMIC devices) has incorrectly passed the PMIC name under the FSL PMIC case. Fix that by passing "FSL_PMIC" as the parameter of pmic_get. Signed-off-by: Fabio Estevam --- board/freescale/mx53loco/mx53loco.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 81c511cdc18..2c8cb7a1cc5 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -374,7 +374,7 @@ static int power_init(void) if (retval) return retval; - p = pmic_get("DIALOG_PMIC"); + p = pmic_get("FSL_PMIC"); if (!p) return -ENODEV; -- cgit v1.2.3