From 7b6c34cb15270c3dbd463faaceb2bfbdd0b8f1a8 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 31 May 2020 15:34:22 +0200 Subject: log: clean up Kconfig LOG_DEFAULT_LEVEL has been chosen as 6. Adjust the default of LOG_MAX_LEVEL to this value. Use ranges to clamp log levels to reasonable values. Group output options by main U-Boot, SPL, TPL, followed by other logging options. Signed-off-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- common/Kconfig | 159 ++++++++++++++++++++++++++++++--------------------------- 1 file changed, 85 insertions(+), 74 deletions(-) (limited to 'common') diff --git a/common/Kconfig b/common/Kconfig index 2d86dd7e63c..7872bc46cd2 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -647,28 +647,12 @@ config LOG discarded if not needed. Logging supports various categories and levels of severity. -config SPL_LOG - bool "Enable logging support in SPL" - depends on LOG - help - This enables support for logging of status and debug messages. These - can be displayed on the console, recorded in a memory buffer, or - discarded if not needed. Logging supports various categories and - levels of severity. - -config TPL_LOG - bool "Enable logging support in TPL" - depends on LOG - help - This enables support for logging of status and debug messages. These - can be displayed on the console, recorded in a memory buffer, or - discarded if not needed. Logging supports various categories and - levels of severity. +if LOG config LOG_MAX_LEVEL int "Maximum log level to record" - depends on LOG - default 5 + default 6 + range 0 9 help This selects the maximum log level that will be recorded. Any value higher than this will be ignored. If possible log statements below @@ -685,14 +669,15 @@ config LOG_MAX_LEVEL 8 - debug content 9 - debug hardware I/O -config SPL_LOG_MAX_LEVEL - int "Maximum log level to record in SPL" - depends on SPL_LOG - default 3 +config LOG_DEFAULT_LEVEL + int "Default logging level to display" + default LOG_MAX_LEVEL + range 0 LOG_MAX_LEVEL help - This selects the maximum log level that will be recorded. Any value - higher than this will be ignored. If possible log statements below - this level will be discarded at build time. Levels: + This is the default logging level set when U-Boot starts. It can + be adjusted later using the 'log level' command. Note that setting + this to a value above LOG_MAX_LEVEL will be ineffective, since the + higher levels are not compiled in to U-Boot. 0 - emergency 1 - alert @@ -705,10 +690,38 @@ config SPL_LOG_MAX_LEVEL 8 - debug content 9 - debug hardware I/O -config TPL_LOG_MAX_LEVEL - int "Maximum log level to record in TPL" - depends on TPL_LOG +config LOG_CONSOLE + bool "Allow log output to the console" + default y + help + Enables a log driver which writes log records to the console. + Generally the console is the serial port or LCD display. Only the + log message is shown - other details like level, category, file and + line number are omitted. + +config LOG_SYSLOG + bool "Log output to syslog server" + depends on NET + help + Enables a log driver which broadcasts log records via UDP port 514 + to syslog servers. + +config SPL_LOG + bool "Enable logging support in SPL" + depends on LOG + help + This enables support for logging of status and debug messages. These + can be displayed on the console, recorded in a memory buffer, or + discarded if not needed. Logging supports various categories and + levels of severity. + +if SPL_LOG + +config SPL_LOG_MAX_LEVEL + int "Maximum log level to record in SPL" + depends on SPL_LOG default 3 + range 0 9 help This selects the maximum log level that will be recorded. Any value higher than this will be ignored. If possible log statements below @@ -725,14 +738,37 @@ config TPL_LOG_MAX_LEVEL 8 - debug content 9 - debug hardware I/O -config LOG_DEFAULT_LEVEL - int "Default logging level to display" - default 6 +config SPL_LOG_CONSOLE + bool "Allow log output to the console in SPL" + default y help - This is the default logging level set when U-Boot starts. It can - be adjusted later using the 'log level' command. Note that setting - this to a value above LOG_MAX_LEVEL will be ineffective, since the - higher levels are not compiled in to U-Boot. + Enables a log driver which writes log records to the console. + Generally the console is the serial port or LCD display. Only the + log message is shown - other details like level, category, file and + line number are omitted. + +endif + +config TPL_LOG + bool "Enable logging support in TPL" + depends on LOG + help + This enables support for logging of status and debug messages. These + can be displayed on the console, recorded in a memory buffer, or + discarded if not needed. Logging supports various categories and + levels of severity. + +if TPL_LOG + +config TPL_LOG_MAX_LEVEL + int "Maximum log level to record in TPL" + depends on TPL_LOG + default 3 + range 0 9 + help + This selects the maximum log level that will be recorded. Any value + higher than this will be ignored. If possible log statements below + this level will be discarded at build time. Levels: 0 - emergency 1 - alert @@ -745,29 +781,8 @@ config LOG_DEFAULT_LEVEL 8 - debug content 9 - debug hardware I/O -config LOG_CONSOLE - bool "Allow log output to the console" - depends on LOG - default y - help - Enables a log driver which writes log records to the console. - Generally the console is the serial port or LCD display. Only the - log message is shown - other details like level, category, file and - line number are omitted. - -config SPL_LOG_CONSOLE - bool "Allow log output to the console in SPL" - depends on SPL_LOG - default y - help - Enables a log driver which writes log records to the console. - Generally the console is the serial port or LCD display. Only the - log message is shown - other details like level, category, file and - line number are omitted. - config TPL_LOG_CONSOLE bool "Allow log output to the console in TPL" - depends on TPL_LOG default y help Enables a log driver which writes log records to the console. @@ -775,26 +790,10 @@ config TPL_LOG_CONSOLE log message is shown - other details like level, category, file and line number are omitted. -config LOG_SYSLOG - bool "Log output to syslog server" - depends on LOG && NET - help - Enables a log driver which broadcasts log records via UDP port 514 - to syslog servers. - -config LOG_TEST - bool "Provide a test for logging" - depends on LOG && UNIT_TEST - default y if SANDBOX - help - This enables a 'log test' command to test logging. It is normally - executed from a pytest and simply outputs logging information - in various different ways to test that the logging system works - correctly with various settings. +endif config LOG_ERROR_RETURN bool "Log all functions which return an error" - depends on LOG help When an error is returned in U-Boot it is sometimes difficult to figure out the root cause. For example, reading from SPI flash may @@ -805,6 +804,18 @@ config LOG_ERROR_RETURN You can add log_ret() to all functions which return an error code. +config LOG_TEST + bool "Provide a test for logging" + depends on UNIT_TEST + default y if SANDBOX + help + This enables a 'log test' command to test logging. It is normally + executed from a pytest and simply outputs logging information + in various different ways to test that the logging system works + correctly with various settings. + +endif + endmenu config SUPPORT_RAW_INITRD -- cgit v1.3.1 From d16b38f42704fe3cc94fbee1601be96045013151 Mon Sep 17 00:00:00 2001 From: Reuben Dowle Date: Thu, 16 Apr 2020 17:36:52 +1200 Subject: Add support for SHA384 and SHA512 The current recommendation for best security practice from the US government is to use SHA384 for TOP SECRET [1]. This patch adds support for SHA384 and SHA512 in the hash command, and also allows FIT images to be hashed with these algorithms, and signed with sha384,rsaXXXX and sha512,rsaXXXX The SHA implementation is adapted from the linux kernel implementation. [1] Commercial National Security Algorithm Suite http://www.iad.gov/iad/programs/iad-initiatives/cnsa-suite.cfm Signed-off-by: Reuben Dowle --- Kconfig | 26 ++- common/hash.c | 85 +++++++++- common/image-fit.c | 9 + common/image-sig.c | 26 ++- common/spl/Kconfig | 32 +++- include/hash.h | 4 + include/image.h | 18 ++ include/u-boot/rsa-checksum.h | 1 + include/u-boot/sha512.h | 38 +++++ lib/Kconfig | 23 +++ lib/Makefile | 1 + lib/sha512.c | 383 ++++++++++++++++++++++++++++++++++++++++++ tools/Makefile | 2 + 13 files changed, 632 insertions(+), 16 deletions(-) create mode 100644 include/u-boot/sha512.h create mode 100644 lib/sha512.c (limited to 'common') diff --git a/Kconfig b/Kconfig index 0e7ccc0b074..34a88ebe348 100644 --- a/Kconfig +++ b/Kconfig @@ -358,12 +358,26 @@ config FIT_ENABLE_SHA256_SUPPORT help Enable this to support SHA256 checksum of FIT image contents. A SHA256 checksum is a 256-bit (32-byte) hash value used to check that - the image contents have not been corrupted. SHA256 is recommended - for use in secure applications since (as at 2016) there is no known - feasible attack that could produce a 'collision' with differing - input data. Use this for the highest security. Note that only the - SHA256 variant is supported: SHA512 and others are not currently - supported in U-Boot. + the image contents have not been corrupted. + +config FIT_ENABLE_SHA384_SUPPORT + bool "Support SHA384 checksum of FIT image contents" + default n + select SHA384 + help + Enable this to support SHA384 checksum of FIT image contents. A + SHA384 checksum is a 384-bit (48-byte) hash value used to check that + the image contents have not been corrupted. Use this for the highest + security. + +config FIT_ENABLE_SHA512_SUPPORT + bool "Support SHA512 checksum of FIT image contents" + default n + select SHA512 + help + Enable this to support SHA512 checksum of FIT image contents. A + SHA512 checksum is a 512-bit (64-byte) hash value used to check that + the image contents have not been corrupted. config FIT_SIGNATURE bool "Enable signature verification of FIT uImages" diff --git a/common/hash.c b/common/hash.c index 8c00659d252..5c75848b7d9 100644 --- a/common/hash.c +++ b/common/hash.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #if !defined(USE_HOSTCC) && defined(CONFIG_NEEDS_MANUAL_RELOC) @@ -95,6 +96,65 @@ static int hash_finish_sha256(struct hash_algo *algo, void *ctx, void } #endif +#if defined(CONFIG_SHA384) +static int hash_init_sha384(struct hash_algo *algo, void **ctxp) +{ + sha512_context *ctx = malloc(sizeof(sha512_context)); + sha384_starts(ctx); + *ctxp = ctx; + return 0; +} + +static int hash_update_sha384(struct hash_algo *algo, void *ctx, + const void *buf, unsigned int size, int is_last) +{ + sha384_update((sha512_context *)ctx, buf, size); + return 0; +} + +static int hash_finish_sha384(struct hash_algo *algo, void *ctx, void + *dest_buf, int size) +{ + if (size < algo->digest_size) + return -1; + + sha384_finish((sha512_context *)ctx, dest_buf); + free(ctx); + return 0; +} +#endif + +#if defined(CONFIG_SHA512) +static int hash_init_sha512(struct hash_algo *algo, void **ctxp) +{ + sha512_context *ctx = malloc(sizeof(sha512_context)); + sha512_starts(ctx); + *ctxp = ctx; + return 0; +} + +static int hash_update_sha512(struct hash_algo *algo, void *ctx, + const void *buf, unsigned int size, int is_last) +{ + sha512_update((sha512_context *)ctx, buf, size); + return 0; +} + +static int hash_finish_sha512(struct hash_algo *algo, void *ctx, void + *dest_buf, int size) +{ + if (size < algo->digest_size) + return -1; + + printf("hello world\n"); + + sha512_finish((sha512_context *)ctx, dest_buf); + free(ctx); + return 0; +} +#endif + + static int hash_init_crc16_ccitt(struct hash_algo *algo, void **ctxp) { uint16_t *ctx = malloc(sizeof(uint16_t)); @@ -195,6 +255,28 @@ static struct hash_algo hash_algo[] = { .hash_finish = hash_finish_sha256, #endif }, +#endif +#ifdef CONFIG_SHA384 + { + .name = "sha384", + .digest_size = SHA384_SUM_LEN, + .chunk_size = CHUNKSZ_SHA384, + .hash_func_ws = sha384_csum_wd, + .hash_init = hash_init_sha384, + .hash_update = hash_update_sha384, + .hash_finish = hash_finish_sha384, + }, +#endif +#ifdef CONFIG_SHA512 + { + .name = "sha512", + .digest_size = SHA512_SUM_LEN, + .chunk_size = CHUNKSZ_SHA512, + .hash_func_ws = sha512_csum_wd, + .hash_init = hash_init_sha512, + .hash_update = hash_update_sha512, + .hash_finish = hash_finish_sha512, + }, #endif { .name = "crc16-ccitt", @@ -218,7 +300,8 @@ static struct hash_algo hash_algo[] = { /* Try to minimize code size for boards that don't want much hashing */ #if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM) || \ - defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_CMD_HASH) + defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_CMD_HASH) || \ + defined(CONFIG_SHA384) || defined(CONFIG_SHA512) #define multi_hash() 1 #else #define multi_hash() 0 diff --git a/common/image-fit.c b/common/image-fit.c index 1ece100a214..d54eff9033c 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -32,6 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; #include #include #include +#include /*****************************************************************************/ /* New uImage format routines */ @@ -1206,6 +1207,14 @@ int calculate_hash(const void *data, int data_len, const char *algo, sha256_csum_wd((unsigned char *)data, data_len, (unsigned char *)value, CHUNKSZ_SHA256); *value_len = SHA256_SUM_LEN; + } else if (IMAGE_ENABLE_SHA384 && strcmp(algo, "sha384") == 0) { + sha384_csum_wd((unsigned char *)data, data_len, + (unsigned char *)value, CHUNKSZ_SHA384); + *value_len = SHA384_SUM_LEN; + } else if (IMAGE_ENABLE_SHA512 && strcmp(algo, "sha512") == 0) { + sha512_csum_wd((unsigned char *)data, data_len, + (unsigned char *)value, CHUNKSZ_SHA512); + *value_len = SHA512_SUM_LEN; } else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) { md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5); *value_len = 16; diff --git a/common/image-sig.c b/common/image-sig.c index 498969d6414..f3c209ae8b7 100644 --- a/common/image-sig.c +++ b/common/image-sig.c @@ -40,7 +40,31 @@ struct checksum_algo checksum_algos[] = { .calculate_sign = EVP_sha256, #endif .calculate = hash_calculate, - } + }, +#ifdef CONFIG_SHA384 + { + .name = "sha384", + .checksum_len = SHA384_SUM_LEN, + .der_len = SHA384_DER_LEN, + .der_prefix = sha384_der_prefix, +#if IMAGE_ENABLE_SIGN + .calculate_sign = EVP_sha384, +#endif + .calculate = hash_calculate, + }, +#endif +#ifdef CONFIG_SHA512 + { + .name = "sha512", + .checksum_len = SHA512_SUM_LEN, + .der_len = SHA512_DER_LEN, + .der_prefix = sha512_der_prefix, +#if IMAGE_ENABLE_SIGN + .calculate_sign = EVP_sha512, +#endif + .calculate = hash_calculate, + }, +#endif }; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 8ece9057b1e..3eae65ebc19 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -412,7 +412,7 @@ config SPL_MD5_SUPPORT secure as it is possible (with a brute-force attack) to adjust the image while still retaining the same MD5 hash value. For secure applications where images may be changed maliciously, you should - consider SHA1 or SHA256. + consider SHA256 or SHA384. config SPL_SHA1_SUPPORT bool "Support SHA1" @@ -424,7 +424,7 @@ config SPL_SHA1_SUPPORT image contents have not been corrupted or maliciously altered. While SHA1 is fairly secure it is coming to the end of its life due to the expanding computing power available to brute-force - attacks. For more security, consider SHA256. + attacks. For more security, consider SHA256 or SHA384. config SPL_SHA256_SUPPORT bool "Support SHA256" @@ -433,12 +433,28 @@ config SPL_SHA256_SUPPORT help Enable this to support SHA256 in FIT images within SPL. A SHA256 checksum is a 256-bit (32-byte) hash value used to check that the - image contents have not been corrupted. SHA256 is recommended for - use in secure applications since (as at 2016) there is no known - feasible attack that could produce a 'collision' with differing - input data. Use this for the highest security. Note that only the - SHA256 variant is supported: SHA512 and others are not currently - supported in U-Boot. + image contents have not been corrupted. + +config SPL_SHA384_SUPPORT + bool "Support SHA384" + depends on SPL_FIT + select SHA384 + select SHA512_ALGO + help + Enable this to support SHA384 in FIT images within SPL. A SHA384 + checksum is a 384-bit (48-byte) hash value used to check that the + image contents have not been corrupted. Use this for the highest + security. + +config SPL_SHA512_SUPPORT + bool "Support SHA512" + depends on SPL_FIT + select SHA512 + select SHA512_ALGO + help + Enable this to support SHA512 in FIT images within SPL. A SHA512 + checksum is a 512-bit (64-byte) hash value used to check that the + image contents have not been corrupted. config SPL_FIT_IMAGE_TINY bool "Remove functionality from SPL FIT loading to reduce size" diff --git a/include/hash.h b/include/hash.h index 835962e7f66..97bb3ed5d9a 100644 --- a/include/hash.h +++ b/include/hash.h @@ -12,7 +12,11 @@ struct cmd_tbl; * Maximum digest size for all algorithms we support. Having this value * avoids a malloc() or C99 local declaration in common/cmd_hash.c. */ +#if defined(CONFIG_SHA384) || defined(CONFIG_SHA512) +#define HASH_MAX_DIGEST_SIZE 64 +#else #define HASH_MAX_DIGEST_SIZE 32 +#endif enum { HASH_FLAG_VERIFY = 1 << 0, /* Enable verify mode */ diff --git a/include/image.h b/include/image.h index ad81dad4442..ebd581a5944 100644 --- a/include/image.h +++ b/include/image.h @@ -32,8 +32,12 @@ struct fdt_region; #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ #define CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT 1 #define CONFIG_FIT_ENABLE_SHA256_SUPPORT +#define CONFIG_FIT_ENABLE_SHA384_SUPPORT +#define CONFIG_FIT_ENABLE_SHA512_SUPPORT #define CONFIG_SHA1 #define CONFIG_SHA256 +#define CONFIG_SHA384 +#define CONFIG_SHA512 #define IMAGE_ENABLE_IGNORE 0 #define IMAGE_INDENT_STRING "" @@ -92,6 +96,20 @@ struct fdt_region; #define IMAGE_ENABLE_SHA256 0 #endif +#if defined(CONFIG_FIT_ENABLE_SHA384_SUPPORT) || \ + defined(CONFIG_SPL_SHA384_SUPPORT) +#define IMAGE_ENABLE_SHA384 1 +#else +#define IMAGE_ENABLE_SHA384 0 +#endif + +#if defined(CONFIG_FIT_ENABLE_SHA512_SUPPORT) || \ + defined(CONFIG_SPL_SHA512_SUPPORT) +#define IMAGE_ENABLE_SHA512 1 +#else +#define IMAGE_ENABLE_SHA512 0 +#endif + #endif /* IMAGE_ENABLE_FIT */ #ifdef CONFIG_SYS_BOOT_GET_CMDLINE diff --git a/include/u-boot/rsa-checksum.h b/include/u-boot/rsa-checksum.h index 02b814d34e3..54e6a73744e 100644 --- a/include/u-boot/rsa-checksum.h +++ b/include/u-boot/rsa-checksum.h @@ -10,6 +10,7 @@ #include #include #include +#include /** * hash_calculate() - Calculate hash over the data diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h new file mode 100644 index 00000000000..516729d7750 --- /dev/null +++ b/include/u-boot/sha512.h @@ -0,0 +1,38 @@ +#ifndef _SHA512_H +#define _SHA512_H + +#define SHA384_SUM_LEN 48 +#define SHA384_DER_LEN 19 +#define SHA512_SUM_LEN 64 +#define SHA512_DER_LEN 19 +#define SHA512_BLOCK_SIZE 128 + +#define CHUNKSZ_SHA384 (16 * 1024) +#define CHUNKSZ_SHA512 (16 * 1024) + +typedef struct { + uint64_t state[SHA512_SUM_LEN / 8]; + uint64_t count[2]; + uint8_t buf[SHA512_BLOCK_SIZE]; +} sha512_context; + +extern const uint8_t sha512_der_prefix[]; + +void sha512_starts(sha512_context * ctx); +void sha512_update(sha512_context *ctx, const uint8_t *input, uint32_t length); +void sha512_finish(sha512_context * ctx, uint8_t digest[SHA512_SUM_LEN]); + +void sha512_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz); + +extern const uint8_t sha384_der_prefix[]; + +void sha384_starts(sha512_context * ctx); +void sha384_update(sha512_context *ctx, const uint8_t *input, uint32_t length); +void sha384_finish(sha512_context * ctx, uint8_t digest[SHA384_SUM_LEN]); + +void sha384_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz); + + +#endif /* _SHA512_H */ diff --git a/lib/Kconfig b/lib/Kconfig index af5c38afd98..fc7d68487b2 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -345,6 +345,29 @@ config SHA256 The SHA256 algorithm produces a 256-bit (32-byte) hash value (digest). +config SHA512_ALGO + bool "Enable SHA512 algorithm" + help + This option enables support of internal SHA512 algorithm. + +config SHA512 + bool "Enable SHA512 support" + depends on SHA512_ALGO + help + This option enables support of hashing using SHA512 algorithm. + The hash is calculated in software. + The SHA512 algorithm produces a 512-bit (64-byte) hash value + (digest). + +config SHA384 + bool "Enable SHA384 support" + depends on SHA512_ALGO + help + This option enables support of hashing using SHA384 algorithm. + The hash is calculated in software. + The SHA384 algorithm produces a 384-bit (48-byte) hash value + (digest). + config SHA_HW_ACCEL bool "Enable hashing using hardware" help diff --git a/lib/Makefile b/lib/Makefile index dc5761966c4..1dc06c57d5f 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_$(SPL_)MD5) += md5.o obj-$(CONFIG_$(SPL_)RSA) += rsa/ obj-$(CONFIG_SHA1) += sha1.o obj-$(CONFIG_SHA256) += sha256.o +obj-$(CONFIG_SHA512_ALGO) += sha512.o obj-$(CONFIG_$(SPL_)ZLIB) += zlib/ obj-$(CONFIG_$(SPL_)ZSTD) += zstd/ diff --git a/lib/sha512.c b/lib/sha512.c new file mode 100644 index 00000000000..f1e2acf0fbc --- /dev/null +++ b/lib/sha512.c @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * FIPS-180-2 compliant SHA-512 and SHA-384 implementation + * + * SHA-512 code by Jean-Luc Cooke + * + * Copyright (c) Jean-Luc Cooke + * Copyright (c) Andrew McDonald + * Copyright (c) 2003 Kyle McMartin + * Copyright (c) 2020 Reuben Dowle + */ + +#ifndef USE_HOSTCC +#include +#include +#else +#include +#endif /* USE_HOSTCC */ +#include +#include + +const uint8_t sha384_der_prefix[SHA384_DER_LEN] = { + 0x30, 0x41, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, + 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x02, 0x05, + 0x00, 0x04, 0x30 +}; + +const uint8_t sha512_der_prefix[SHA512_DER_LEN] = { + 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, + 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, + 0x00, 0x04, 0x40 +}; + +#define SHA384_H0 0xcbbb9d5dc1059ed8ULL +#define SHA384_H1 0x629a292a367cd507ULL +#define SHA384_H2 0x9159015a3070dd17ULL +#define SHA384_H3 0x152fecd8f70e5939ULL +#define SHA384_H4 0x67332667ffc00b31ULL +#define SHA384_H5 0x8eb44a8768581511ULL +#define SHA384_H6 0xdb0c2e0d64f98fa7ULL +#define SHA384_H7 0x47b5481dbefa4fa4ULL + +#define SHA512_H0 0x6a09e667f3bcc908ULL +#define SHA512_H1 0xbb67ae8584caa73bULL +#define SHA512_H2 0x3c6ef372fe94f82bULL +#define SHA512_H3 0xa54ff53a5f1d36f1ULL +#define SHA512_H4 0x510e527fade682d1ULL +#define SHA512_H5 0x9b05688c2b3e6c1fULL +#define SHA512_H6 0x1f83d9abfb41bd6bULL +#define SHA512_H7 0x5be0cd19137e2179ULL + +static inline uint64_t Ch(uint64_t x, uint64_t y, uint64_t z) +{ + return z ^ (x & (y ^ z)); +} + +static inline uint64_t Maj(uint64_t x, uint64_t y, uint64_t z) +{ + return (x & y) | (z & (x | y)); +} + +static const uint64_t sha512_K[80] = { + 0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL, + 0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL, + 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL, + 0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL, + 0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL, + 0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL, + 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL, + 0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL, + 0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL, + 0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL, + 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL, + 0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL, + 0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL, + 0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL, + 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL, + 0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL, + 0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL, + 0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL, + 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL, + 0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL, + 0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL, + 0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL, + 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL, + 0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL, + 0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL, + 0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL, + 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL, +}; + +static inline uint64_t ror64(uint64_t word, unsigned int shift) +{ + return (word >> (shift & 63)) | (word << ((-shift) & 63)); +} + +#define e0(x) (ror64(x,28) ^ ror64(x,34) ^ ror64(x,39)) +#define e1(x) (ror64(x,14) ^ ror64(x,18) ^ ror64(x,41)) +#define s0(x) (ror64(x, 1) ^ ror64(x, 8) ^ (x >> 7)) +#define s1(x) (ror64(x,19) ^ ror64(x,61) ^ (x >> 6)) + +/* + * 64-bit integer manipulation macros (big endian) + */ +#ifndef GET_UINT64_BE +#define GET_UINT64_BE(n,b,i) { \ + (n) = ( (unsigned long long) (b)[(i) ] << 56 ) \ + | ( (unsigned long long) (b)[(i) + 1] << 48 ) \ + | ( (unsigned long long) (b)[(i) + 2] << 40 ) \ + | ( (unsigned long long) (b)[(i) + 3] << 32 ) \ + | ( (unsigned long long) (b)[(i) + 4] << 24 ) \ + | ( (unsigned long long) (b)[(i) + 5] << 16 ) \ + | ( (unsigned long long) (b)[(i) + 6] << 8 ) \ + | ( (unsigned long long) (b)[(i) + 7] ); \ +} +#endif +#ifndef PUT_UINT64_BE +#define PUT_UINT64_BE(n,b,i) { \ + (b)[(i) ] = (unsigned char) ( (n) >> 56 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 48 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 40 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) >> 32 ); \ + (b)[(i) + 4] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 5] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 6] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 7] = (unsigned char) ( (n) ); \ +} +#endif + +static inline void LOAD_OP(int I, uint64_t *W, const uint8_t *input) +{ + GET_UINT64_BE(W[I], input, I*8); +} + +static inline void BLEND_OP(int I, uint64_t *W) +{ + W[I & 15] += s1(W[(I-2) & 15]) + W[(I-7) & 15] + s0(W[(I-15) & 15]); +} + +static void +sha512_transform(uint64_t *state, const uint8_t *input) +{ + uint64_t a, b, c, d, e, f, g, h, t1, t2; + + int i; + uint64_t W[16]; + + /* load the state into our registers */ + a=state[0]; b=state[1]; c=state[2]; d=state[3]; + e=state[4]; f=state[5]; g=state[6]; h=state[7]; + + /* now iterate */ + for (i=0; i<80; i+=8) { + if (!(i & 8)) { + int j; + + if (i < 16) { + /* load the input */ + for (j = 0; j < 16; j++) + LOAD_OP(i + j, W, input); + } else { + for (j = 0; j < 16; j++) { + BLEND_OP(i + j, W); + } + } + } + + t1 = h + e1(e) + Ch(e,f,g) + sha512_K[i ] + W[(i & 15)]; + t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2; + t1 = g + e1(d) + Ch(d,e,f) + sha512_K[i+1] + W[(i & 15) + 1]; + t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2; + t1 = f + e1(c) + Ch(c,d,e) + sha512_K[i+2] + W[(i & 15) + 2]; + t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2; + t1 = e + e1(b) + Ch(b,c,d) + sha512_K[i+3] + W[(i & 15) + 3]; + t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2; + t1 = d + e1(a) + Ch(a,b,c) + sha512_K[i+4] + W[(i & 15) + 4]; + t2 = e0(e) + Maj(e,f,g); h+=t1; d=t1+t2; + t1 = c + e1(h) + Ch(h,a,b) + sha512_K[i+5] + W[(i & 15) + 5]; + t2 = e0(d) + Maj(d,e,f); g+=t1; c=t1+t2; + t1 = b + e1(g) + Ch(g,h,a) + sha512_K[i+6] + W[(i & 15) + 6]; + t2 = e0(c) + Maj(c,d,e); f+=t1; b=t1+t2; + t1 = a + e1(f) + Ch(f,g,h) + sha512_K[i+7] + W[(i & 15) + 7]; + t2 = e0(b) + Maj(b,c,d); e+=t1; a=t1+t2; + } + + state[0] += a; state[1] += b; state[2] += c; state[3] += d; + state[4] += e; state[5] += f; state[6] += g; state[7] += h; + + /* erase our data */ + a = b = c = d = e = f = g = h = t1 = t2 = 0; +} + +static void sha512_block_fn(sha512_context *sst, const uint8_t *src, + int blocks) +{ + while (blocks--) { + sha512_transform(sst->state, src); + src += SHA512_BLOCK_SIZE; + } +} + +static void sha512_base_do_update(sha512_context *sctx, + const uint8_t *data, + unsigned int len) +{ + unsigned int partial = sctx->count[0] % SHA512_BLOCK_SIZE; + + sctx->count[0] += len; + if (sctx->count[0] < len) + sctx->count[1]++; + + if (unlikely((partial + len) >= SHA512_BLOCK_SIZE)) { + int blocks; + + if (partial) { + int p = SHA512_BLOCK_SIZE - partial; + + memcpy(sctx->buf + partial, data, p); + data += p; + len -= p; + + sha512_block_fn(sctx, sctx->buf, 1); + } + + blocks = len / SHA512_BLOCK_SIZE; + len %= SHA512_BLOCK_SIZE; + + if (blocks) { + sha512_block_fn(sctx, data, blocks); + data += blocks * SHA512_BLOCK_SIZE; + } + partial = 0; + } + if (len) + memcpy(sctx->buf + partial, data, len); +} + +static void sha512_base_do_finalize(sha512_context *sctx) +{ + const int bit_offset = SHA512_BLOCK_SIZE - sizeof(uint64_t[2]); + uint64_t *bits = (uint64_t *)(sctx->buf + bit_offset); + unsigned int partial = sctx->count[0] % SHA512_BLOCK_SIZE; + + sctx->buf[partial++] = 0x80; + if (partial > bit_offset) { + memset(sctx->buf + partial, 0x0, SHA512_BLOCK_SIZE - partial); + partial = 0; + + sha512_block_fn(sctx, sctx->buf, 1); + } + + memset(sctx->buf + partial, 0x0, bit_offset - partial); + bits[0] = cpu_to_be64(sctx->count[1] << 3 | sctx->count[0] >> 61); + bits[1] = cpu_to_be64(sctx->count[0] << 3); + sha512_block_fn(sctx, sctx->buf, 1); +} + +#if defined(CONFIG_SHA384) +void sha384_starts(sha512_context * ctx) +{ + ctx->state[0] = SHA384_H0; + ctx->state[1] = SHA384_H1; + ctx->state[2] = SHA384_H2; + ctx->state[3] = SHA384_H3; + ctx->state[4] = SHA384_H4; + ctx->state[5] = SHA384_H5; + ctx->state[6] = SHA384_H6; + ctx->state[7] = SHA384_H7; + ctx->count[0] = ctx->count[1] = 0; +} + +void sha384_update(sha512_context *ctx, const uint8_t *input, uint32_t length) +{ + sha512_base_do_update(ctx, input, length); +} + +void sha384_finish(sha512_context * ctx, uint8_t digest[SHA384_SUM_LEN]) +{ + int i; + + sha512_base_do_finalize(ctx); + for(i=0; istate[i], digest, i * 8); +} + +/* + * Output = SHA-512( input buffer ). Trigger the watchdog every 'chunk_sz' + * bytes of input processed. + */ +void sha384_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz) +{ + sha512_context ctx; +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + const unsigned char *end; + unsigned char *curr; + int chunk; +#endif + + sha384_starts(&ctx); + +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + curr = (unsigned char *)input; + end = input + ilen; + while (curr < end) { + chunk = end - curr; + if (chunk > chunk_sz) + chunk = chunk_sz; + sha384_update(&ctx, curr, chunk); + curr += chunk; + WATCHDOG_RESET(); + } +#else + sha384_update(&ctx, input, ilen); +#endif + + sha384_finish(&ctx, output); +} + +#endif + +#if defined(CONFIG_SHA512) +void sha512_starts(sha512_context * ctx) +{ + ctx->state[0] = SHA512_H0; + ctx->state[1] = SHA512_H1; + ctx->state[2] = SHA512_H2; + ctx->state[3] = SHA512_H3; + ctx->state[4] = SHA512_H4; + ctx->state[5] = SHA512_H5; + ctx->state[6] = SHA512_H6; + ctx->state[7] = SHA512_H7; + ctx->count[0] = ctx->count[1] = 0; +} + +void sha512_update(sha512_context *ctx, const uint8_t *input, uint32_t length) +{ + sha512_base_do_update(ctx, input, length); +} + +void sha512_finish(sha512_context * ctx, uint8_t digest[SHA512_SUM_LEN]) +{ + int i; + + sha512_base_do_finalize(ctx); + for(i=0; istate[i], digest, i * 8); +} + +/* + * Output = SHA-512( input buffer ). Trigger the watchdog every 'chunk_sz' + * bytes of input processed. + */ +void sha512_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz) +{ + sha512_context ctx; +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + const unsigned char *end; + unsigned char *curr; + int chunk; +#endif + + sha512_starts(&ctx); + +#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) + curr = (unsigned char *)input; + end = input + ilen; + while (curr < end) { + chunk = end - curr; + if (chunk > chunk_sz) + chunk = chunk_sz; + sha512_update(&ctx, curr, chunk); + curr += chunk; + WATCHDOG_RESET(); + } +#else + sha512_update(&ctx, input, ilen); +#endif + + sha512_finish(&ctx, output); +} +#endif diff --git a/tools/Makefile b/tools/Makefile index 879c3fd4a74..51123fd9298 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -107,6 +107,7 @@ dumpimage-mkimage-objs := aisimage.o \ lib/crc16.o \ lib/sha1.o \ lib/sha256.o \ + lib/sha512.o \ common/hash.o \ ublimage.o \ zynqimage.o \ @@ -225,6 +226,7 @@ HOSTCFLAGS_crc8.o := -pedantic HOSTCFLAGS_md5.o := -pedantic HOSTCFLAGS_sha1.o := -pedantic HOSTCFLAGS_sha256.o := -pedantic +HOSTCFLAGS_sha512.o := -pedantic -DCONFIG_SHA512 -DCONFIG_SHA384 quiet_cmd_wrap = WRAP $@ cmd_wrap = echo "\#include <../$(patsubst $(obj)/%,%,$@)>" >$@ -- cgit v1.3.1 From 7a81989b7b04bd87d1e684f2bafdc92a9c16fecc Mon Sep 17 00:00:00 2001 From: Harald Seiler Date: Mon, 15 Jun 2020 09:47:04 +0200 Subject: common: hash: Remove a debug printf statement Remove a left-over debug printf that was introduced with SHA512 support. Fixes: d16b38f42704 ("Add support for SHA384 and SHA512") Signed-off-by: Harald Seiler --- common/hash.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'common') diff --git a/common/hash.c b/common/hash.c index 5c75848b7d9..05238a8ba91 100644 --- a/common/hash.c +++ b/common/hash.c @@ -146,8 +146,6 @@ static int hash_finish_sha512(struct hash_algo *algo, void *ctx, void if (size < algo->digest_size) return -1; - printf("hello world\n"); - sha512_finish((sha512_context *)ctx, dest_buf); free(ctx); return 0; -- cgit v1.3.1 From 22b897a12323364c584b1ff31fe9f5250e0d3481 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 23 May 2020 17:11:20 +0200 Subject: video: extend stdout video console work-around for 'vga' cfb_console driver uses 'vga' console name and we still have board environments defining this name. Re-use existing DM_VIDEO work- around for console name to support 'vga' name in stdout environment. Signed-off-by: Anatolij Gustschin Tested-by: Soeren Moch Reviewed-by: Simon Glass Reviewed-by: Tom Rini --- arch/arm/mach-tegra/Kconfig | 1 - common/console.c | 7 ++++--- drivers/video/Kconfig | 16 +++++++++------- 3 files changed, 13 insertions(+), 11 deletions(-) (limited to 'common') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 00facf492e0..15e76840281 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -58,7 +58,6 @@ config TEGRA_COMMON select MISC select OF_CONTROL select SPI - select VIDCONSOLE_AS_LCD if DM_VIDEO imply CMD_DM imply CRC32_VERIFY diff --git a/common/console.c b/common/console.c index 1deca3cb78f..f149624954a 100644 --- a/common/console.c +++ b/common/console.c @@ -713,7 +713,7 @@ struct stdio_dev *search_device(int flags, const char *name) dev = stdio_get_by_name(name); #ifdef CONFIG_VIDCONSOLE_AS_LCD - if (!dev && !strcmp(name, "lcd")) + if (!dev && !strcmp(name, CONFIG_VIDCONSOLE_AS_LCD)) dev = stdio_get_by_name("vidconsole"); #endif @@ -897,8 +897,9 @@ done: stdio_print_current_devices(); #endif /* CONFIG_SYS_CONSOLE_INFO_QUIET */ #ifdef CONFIG_VIDCONSOLE_AS_LCD - if (strstr(stdoutname, "lcd")) - printf("Warning: Please change 'lcd' to 'vidconsole' in stdout/stderr environment vars\n"); + if (strstr(stdoutname, CONFIG_VIDCONSOLE_AS_LCD)) + printf("Warning: Please change '%s' to 'vidconsole' in stdout/stderr environment vars\n", + CONFIG_VIDCONSOLE_AS_LCD); #endif #ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index aaea7ce743f..01e8dbf678b 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -177,14 +177,16 @@ config SIMPLE_PANEL source "drivers/video/fonts/Kconfig" config VIDCONSOLE_AS_LCD - bool "Use 'vidconsole' when 'lcd' is seen in stdout" + string "Use 'vidconsole' when string defined here is seen in stdout" depends on DM_VIDEO - help - This is a work-around for boards which have 'lcd' in their stdout - environment variable, but have moved to use driver model for video. - In this case the console will no-longer work. While it is possible - to update the environment, the breakage may be confusing for users. - This option will be removed around the end of 2016. + default "lcd" if LCD || TEGRA_COMMON + default "vga" if !LCD + help + This is a work-around for boards which have 'lcd' or 'vga' in their + stdout environment variable, but have moved to use driver model for + video. In this case the console will no-longer work. While it is + possible to update the environment, the breakage may be confusing for + users. This option will be removed around the end of 2020. config VIDEO_COREBOOT bool "Enable coreboot framebuffer driver support" -- cgit v1.3.1 From b8fd54d62f92658cbd20ca051304e13eabf24ddd Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Mon, 6 Apr 2020 07:58:30 -0600 Subject: common: fdt: Remove additional 4k space for fdt allocation There is no technical reason to add additional 4k space for FDT. This space is completely unused and just increase memory requirements. This is problematic on systems with limited memory resources as Xilinx Zynq CSE/ZynqMP mini and Versal mini configurations. The patch is removing additional 4k space. EFI code is using copy_fdt() which copy FDT to different location. And all boot commands in case of using U-Boot's FDT pointed by $fdtcontroladdr are copying FDT to different locations by image_setup_libfdt(). That's why in proper flow none should modified DTB used by U-Boot that's why there is no need for additional space. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek Acked-by: Stephen Warren --- common/board_f.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'common') diff --git a/common/board_f.c b/common/board_f.c index 01194eaa0e4..dcad551ae43 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -537,7 +537,7 @@ static int reserve_fdt(void) * will be relocated with other data. */ if (gd->fdt_blob) { - gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); + gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32); gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size); gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); -- cgit v1.3.1 From 32d0b2dfe57ddb4e88f3f30c5fcabc10aabde6ed Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 10 May 2020 14:16:51 -0600 Subject: bdinfo: net: ppc: Drop bi_enet1addr and other similar info These values were 'old' in 2013 so it should be safe to remove them. They are never set in U-Boot anyway, so the values will always be zero. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Stefan Roese --- common/board_r.c | 16 +--------------- include/asm-generic/u-boot.h | 17 ----------------- 2 files changed, 1 insertion(+), 32 deletions(-) (limited to 'common') diff --git a/common/board_r.c b/common/board_r.c index fa57fa9b699..5e924322b2f 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -537,21 +537,7 @@ static int initr_ethaddr(void) /* kept around for legacy kernels only ... ignore the next section */ eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr); -#ifdef CONFIG_HAS_ETH1 - eth_env_get_enetaddr("eth1addr", bd->bi_enet1addr); -#endif -#ifdef CONFIG_HAS_ETH2 - eth_env_get_enetaddr("eth2addr", bd->bi_enet2addr); -#endif -#ifdef CONFIG_HAS_ETH3 - eth_env_get_enetaddr("eth3addr", bd->bi_enet3addr); -#endif -#ifdef CONFIG_HAS_ETH4 - eth_env_get_enetaddr("eth4addr", bd->bi_enet4addr); -#endif -#ifdef CONFIG_HAS_ETH5 - eth_env_get_enetaddr("eth5addr", bd->bi_enet5addr); -#endif + return 0; } #endif /* CONFIG_CMD_NET */ diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index b496e559649..008ebf3ca32 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -68,23 +68,6 @@ typedef struct bd_info { unsigned long bi_vcofreq; /* vco Freq in MHz */ unsigned long bi_flbfreq; /* Flexbus Freq in MHz */ #endif - -#ifdef CONFIG_HAS_ETH1 - unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH2 - unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH3 - unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH4 - unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */ -#endif -#ifdef CONFIG_HAS_ETH5 - unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */ -#endif - ulong bi_arch_number; /* unique id for this board */ ulong bi_boot_params; /* where this board expects params */ #ifdef CONFIG_NR_DRAM_BANKS -- cgit v1.3.1 From 56c404603825a4e3229dcf0d3d88318b20493fa6 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 4 Jun 2020 23:11:53 +0800 Subject: spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski Tested-by: Adam Ford #da850-evm Signed-off-by: Hou Zhiqiang [trini: Fixup a few platforms] Signed-off-by: Tom Rini --- arch/arm/Kconfig | 11 +++++++++++ board/l+g/vinco/vinco.c | 4 ++-- cmd/sf.c | 4 ++-- cmd/spi.c | 6 +++--- common/spl/Kconfig | 20 ++++++++++++++++++++ configs/am57xx_evm_defconfig | 2 ++ configs/am57xx_hs_evm_defconfig | 2 ++ configs/am57xx_hs_evm_usb_defconfig | 2 ++ configs/am65x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_hs_evm_a53_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/axm_defconfig | 2 ++ configs/brppt1_spi_defconfig | 1 + configs/brppt2_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/chromebook_coral_defconfig | 1 + configs/chromebook_link64_defconfig | 2 ++ configs/chromebook_samus_tpl_defconfig | 4 ++++ configs/cm_t43_defconfig | 1 + configs/da850evm_defconfig | 1 + configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_usb_defconfig | 2 ++ configs/imx28_xea_defconfig | 1 + configs/j721e_evm_a72_defconfig | 2 ++ configs/j721e_evm_r5_defconfig | 2 ++ configs/j721e_hs_evm_a72_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/k2e_evm_defconfig | 1 + configs/k2hk_evm_defconfig | 1 + configs/k2l_evm_defconfig | 1 + configs/ls1021aiot_qspi_defconfig | 2 ++ configs/ls1021aiot_sdcard_defconfig | 2 ++ configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + configs/qemu-x86_64_defconfig | 1 + configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 2 ++ configs/sama5d3xek_spiflash_defconfig | 2 ++ configs/sama5d4_xplained_spiflash_defconfig | 2 ++ configs/sama5d4ek_spiflash_defconfig | 2 ++ configs/stm32mp15_basic_defconfig | 2 ++ configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/taurus_defconfig | 2 ++ drivers/mtd/spi/Makefile | 4 ++-- drivers/mtd/spi/sf_probe.c | 2 +- drivers/net/fm/fm.c | 4 ++-- drivers/spi/Makefile | 2 +- drivers/spi/kirkwood_spi.c | 2 +- drivers/spi/mxc_spi.c | 6 +++--- drivers/spi/omap3_spi.c | 4 ++-- drivers/spi/sh_qspi.c | 4 ++-- env/sf.c | 2 +- include/spi.h | 8 ++++---- include/spi_flash.h | 2 +- test/dm/spi.c | 2 +- 59 files changed, 122 insertions(+), 28 deletions(-) (limited to 'common') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 54d65f84889..73a27316dfb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -549,6 +549,7 @@ config TARGET_GPLUGD config ARCH_DAVINCI bool "TI DaVinci" select CPU_ARM926EJS + select SPL_DM_SPI if SPL imply CMD_SAVES help Support for TI's DaVinci platform. @@ -566,6 +567,8 @@ config ARCH_MVEBU select DM_SERIAL select DM_SPI select DM_SPI_FLASH + select SPL_DM_SPI if SPL + select SPL_DM_SPI_FLASH if SPL select OF_CONTROL select OF_SEPARATE select SPI @@ -985,6 +988,8 @@ config ARCH_SOCFPGA imply FAT_WRITE imply SPL imply SPL_DM + imply SPL_DM_SPI + imply SPL_DM_SPI_FLASH imply SPL_LIBDISK_SUPPORT imply SPL_MMC_SUPPORT imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION @@ -1093,6 +1098,8 @@ config ARCH_ZYNQ select SPL_BOARD_INIT if SPL select SPL_CLK if SPL select SPL_DM if SPL + select SPL_DM_SPI if SPL + select SPL_DM_SPI_FLASH if SPL select SPL_OF_CONTROL if SPL select SPL_SEPARATE_BSS if SPL select SUPPORT_SPL @@ -1131,6 +1138,8 @@ config ARCH_ZYNQMP select OF_CONTROL select SPL_BOARD_INIT if SPL select SPL_CLK if SPL + select SPL_DM_SPI if SPI + select SPL_DM_SPI_FLASH if SPL_DM_SPI select SPL_DM_MAILBOX if SPL select SPL_FIRMWARE if SPL select SPL_SEPARATE_BSS if SPL @@ -1680,6 +1689,8 @@ config ARCH_ROCKCHIP select OF_CONTROL select SPI select SPL_DM if SPL + select SPL_DM_SPI if SPL + select SPL_DM_SPI_FLASH if SPL select SYS_MALLOC_F select SYS_THUMB_BUILD if !ARM64 imply ADC diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c index 5a998e37d8a..440838c1124 100644 --- a/board/l+g/vinco/vinco.c +++ b/board/l+g/vinco/vinco.c @@ -34,7 +34,7 @@ DECLARE_GLOBAL_DATA_PTR; /* FIXME gpio code here need to handle through DM_GPIO */ -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) int spi_cs_is_valid(unsigned int bus, unsigned int cs) { return bus == 0 && cs == 0; @@ -167,7 +167,7 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) vinco_spi0_hw_init(); #endif diff --git a/cmd/sf.c b/cmd/sf.c index d18f6a888ce..c0d6a8f8a06 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -91,7 +91,7 @@ static int do_spi_flash_probe(int argc, char *const argv[]) unsigned int speed = CONFIG_SF_DEFAULT_SPEED; unsigned int mode = CONFIG_SF_DEFAULT_MODE; char *endp; -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) struct udevice *new, *bus_dev; int ret; #else @@ -124,7 +124,7 @@ static int do_spi_flash_probe(int argc, char *const argv[]) return -1; } -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) /* Remove the old device, otherwise probe will just be a nop */ ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); if (!ret) { diff --git a/cmd/spi.c b/cmd/spi.c index aec912167c6..4aea1914129 100644 --- a/cmd/spi.c +++ b/cmd/spi.c @@ -38,7 +38,7 @@ static int do_spi_xfer(int bus, int cs) struct spi_slave *slave; int ret = 0; -#ifdef CONFIG_DM_SPI +#if CONFIG_IS_ENABLED(DM_SPI) char name[30], *str; struct udevice *dev; @@ -63,7 +63,7 @@ static int do_spi_xfer(int bus, int cs) goto done; ret = spi_xfer(slave, bitlen, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) /* We don't get an error code in this case */ if (ret) ret = -EIO; @@ -79,7 +79,7 @@ static int do_spi_xfer(int bus, int cs) } done: spi_release_bus(slave); -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) spi_free_slave(slave); #endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 3eae65ebc19..d09e52e88bf 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -756,6 +756,11 @@ config SPL_DM_SPI help Enable support for SPI DM drivers in SPL. +config SPL_DM_SPI_FLASH + bool "Support SPI DM FLASH drivers in SPL" + help + Enable support for SPI DM flash drivers in SPL. + endif if SPL_UBI config SPL_UBI_LOAD_BY_VOLNAME @@ -1092,6 +1097,11 @@ config SPL_SPI_FLASH_SFDP_SUPPORT SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP) tables as per JESD216 standard in SPL. +config SPL_SPI_FLASH_MTD + bool "Support for SPI flash MTD drivers in SPL" + help + Enable support for SPI flash MTD drivers in SPL. + config SPL_SPI_LOAD bool "Support loading from SPI flash" help @@ -1499,6 +1509,16 @@ config TPL_SPI_SUPPORT Enable support for using SPI in TPL. See SPL_SPI_SUPPORT for details. +config TPL_DM_SPI + bool "Support SPI DM drivers in TPL" + help + Enable support for SPI DM drivers in TPL. + +config TPL_DM_SPI_FLASH + bool "Support SPI DM FLASH drivers in TPL" + help + Enable support for SPI DM flash drivers in TPL. + config TPL_YMODEM_SUPPORT bool "Support loading using Ymodem" depends on TPL_SERIAL_SUPPORT diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 7c907fd3f49..cefed5b0600 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -78,6 +78,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_SPANSION=y @@ -96,6 +97,7 @@ CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TI_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 81bac5592eb..081a48f0380 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -74,6 +74,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_SPANSION=y @@ -92,6 +93,7 @@ CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TI_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index ea5215e8cf3..154154c68fb 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -80,6 +80,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_BAR=y @@ -99,6 +100,7 @@ CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TI_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 9d97a488db2..3f2f4e45e32 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 1e7a7d1e6ee..14466465ab4 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 49fe5a5b6da..373eb4b0093 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 9977e97f2b0..6e83f333793 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 6a3336c256b..ce3ad9f8b48 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -65,6 +65,8 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y +CONFIG_SPL_DM_SPI=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index aea67c25dc2..be527fd7257 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index c4eb03bde07..3bfe882c98e 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -33,6 +33,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index aac8d17876b..a7778674c0f 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 6cc3a8469fe..79f9b5a2321 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -37,6 +37,7 @@ CONFIG_HANDOFF=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_CPU_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_PCI=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_HUSH_PARSER=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index a80225a11f3..3e760e75ddd 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -31,6 +31,8 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CPU_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_DM_SPI=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH_SUPPORT=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 95c9b6e6af5..422bcfd8af4 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -32,11 +32,15 @@ CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_BLOBLIST_ADDR=0xff7c0000 CONFIG_HANDOFF=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DM_SPI=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH_SUPPORT=y CONFIG_TPL_PCI=y CONFIG_TPL_PCH_SUPPORT=y +CONFIG_TPL_DM_SPI=y +CONFIG_TPL_DM_SPI_FLASH=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 4232aaca002..98c50954b6b 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_PROMPT="CM-T43 # " diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 12768065f3a..2e87637f7e4 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -30,6 +30,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index f117077111e..022dfaeb378 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -84,6 +84,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_SPANSION=y @@ -106,6 +107,7 @@ CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TI_QSPI=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 6fa117cfae0..e15f62eded9 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -87,6 +87,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_SPANSION=y @@ -109,6 +110,7 @@ CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TI_QSPI=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 53cf7047553..91e28618923 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -84,6 +84,7 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_BAR=y @@ -106,6 +107,7 @@ CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TI_QSPI=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 592f3e387cc..0001f468ddd 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y CONFIG_SPL_DMA=y CONFIG_SPL_MMC_TINY=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 9bf07570b14..7c7b9905f94 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -121,6 +121,7 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_HBMC_AM654=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y @@ -147,6 +148,7 @@ CONFIG_DM_SERIAL=y CONFIG_SOC_TI=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index c597f830923..822d1fc4869 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -90,6 +90,7 @@ CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PINCTRL=y @@ -113,6 +114,7 @@ CONFIG_DM_SERIAL=y CONFIG_SOC_TI=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index ef4b1149e5c..0bfa4ff23d4 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 7bdf3401a1a..b1ee4755754 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index ae07f860e3a..f37644fe2cf 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_MX_CYCLIC=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 9f992055cae..a14db7db399 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_MX_CYCLIC=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 3311587c2c1..7180c23cc26 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_MX_CYCLIC=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 85ceeb480ad..f0bf8abaeee 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_CMD_SF=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -50,6 +51,7 @@ CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 11ccf57aad1..9c5dd8a5a16 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_CMD_SF=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" @@ -56,6 +57,7 @@ CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index f91534cfdd6..0542c5c3036 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -64,6 +64,7 @@ CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 9871c8edf44..fd499175059 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -76,6 +76,7 @@ CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPIy=y CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 4c82d668998..8ef05893342 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -62,6 +62,7 @@ CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPI_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index a5be09b2ba1..ec126b2d9ae 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -32,6 +32,7 @@ CONFIG_PCI_INIT_R=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_CPU_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH_SUPPORT=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 58b906ad592..cf949cd7419 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -33,6 +33,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index e5227b11f50..320175b517a 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -67,6 +67,8 @@ CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y CONFIG_MTD=y +CONFIG_SPL_DM_SPI=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index b3bc4b4fe59..8db078abaf7 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -23,6 +23,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_SPL_DM_SPI=y CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -31,6 +32,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 2799b69a5d2..4239c050304 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -68,6 +68,7 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y CONFIG_DM_ETH=y @@ -80,6 +81,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_ATMEL_PIT_TIMER=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 4b7e825ce02..3e5b2fd8b61 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -65,6 +65,7 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_SPI_FLASH_ATMEL=y CONFIG_DM_ETH=y @@ -77,6 +78,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_ATMEL_PIT_TIMER=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 668cd434f1e..f0abc89a43b 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -91,6 +91,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_STM32_FMC2=y CONFIG_MTD_SPI_NAND=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y @@ -121,6 +122,7 @@ CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_SPL_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y CONFIG_USB=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 1ac07c5865b..be5926d03a8 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -93,6 +93,7 @@ CONFIG_STM32_SDMMC2=y CONFIG_MTD=y CONFIG_SYS_MTDPARTS_RUNTIME=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 225d0449794..0344f07daee 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -89,6 +89,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 953f7784be4..229c97ead5a 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -73,6 +73,8 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y +CONFIG_SPL_DM_SPI=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index b5dfa300de4..952fd1e45a1 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -3,7 +3,7 @@ # (C) Copyright 2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o +obj-$(CONFIG_$(SPL_TPL_)DM_SPI_FLASH) += sf-uclass.o spi-nor-y := sf_probe.o spi-nor-ids.o ifdef CONFIG_SPL_BUILD @@ -19,5 +19,5 @@ endif obj-$(CONFIG_SPI_FLASH) += spi-nor.o obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o -obj-$(CONFIG_$(SPL_)SPI_FLASH_MTD) += sf_mtd.o +obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_MTD) += sf_mtd.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 3548d6319b3..afda241dd06 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -53,7 +53,7 @@ err_read_id: return ret; } -#ifndef CONFIG_DM_SPI_FLASH +#if !CONFIG_IS_ENABLED(DM_SPI_FLASH) struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, unsigned int max_hz, unsigned int spi_mode) { diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 8ab18163954..bbb1738c4bd 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -383,7 +383,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); int ret = 0; -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) struct udevice *new; /* speed and mode will be read from DT */ @@ -470,7 +470,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); int ret = 0; -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) struct udevice *new; /* speed and mode will be read from DT */ diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 54881a74124..9559e938d26 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -4,7 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # There are many options which enable SPI, so make this library available -ifdef CONFIG_DM_SPI +ifdef CONFIG_$(SPL_TPL_)DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 3986b06b25c..c03923f8749 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -94,7 +94,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, return 0; } -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) static struct kwspi_registers *spireg = (struct kwspi_registers *)MVEBU_SPI_BASE; diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index f52ebf4d67c..aad37803655 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -67,7 +67,7 @@ static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs) { -#if defined(CONFIG_DM_SPI) +#if CONFIG_IS_ENABLED(DM_SPI) struct udevice *dev = mxcs->dev; struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); @@ -85,7 +85,7 @@ static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs) static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs) { -#if defined(CONFIG_DM_SPI) +#if CONFIG_IS_ENABLED(DM_SPI) struct udevice *dev = mxcs->dev; struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); @@ -415,7 +415,7 @@ static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs) return 0; } -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags) { diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 6a615d1498e..ae08531f1ed 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -109,7 +109,7 @@ struct mcspi { }; struct omap3_spi_priv { -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) struct spi_slave slave; #endif struct mcspi *regs; @@ -455,7 +455,7 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) writel(conf, &priv->regs->modulctrl); } -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) { diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c index 2839dd1cebd..aa1c03047e2 100644 --- a/drivers/spi/sh_qspi.c +++ b/drivers/spi/sh_qspi.c @@ -68,7 +68,7 @@ struct sh_qspi_regs { }; struct sh_qspi_slave { -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) struct spi_slave slave; #endif struct sh_qspi_regs *regs; @@ -223,7 +223,7 @@ static int sh_qspi_xfer_common(struct sh_qspi_slave *ss, unsigned int bitlen, return ret; } -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) static inline struct sh_qspi_slave *to_sh_qspi(struct spi_slave *slave) { return container_of(slave, struct sh_qspi_slave, slave); diff --git a/env/sf.c b/env/sf.c index 02ed846fc73..3e524f29479 100644 --- a/env/sf.c +++ b/env/sf.c @@ -38,7 +38,7 @@ static struct spi_flash *env_flash; static int setup_flash_device(void) { -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) struct udevice *new; int ret; diff --git a/include/spi.h b/include/spi.h index 5cc6d6e0087..9b4fb8dc0b2 100644 --- a/include/spi.h +++ b/include/spi.h @@ -39,7 +39,7 @@ #define SPI_DEFAULT_WORDLEN 8 -#ifdef CONFIG_DM_SPI +#if CONFIG_IS_ENABLED(DM_SPI) /* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave */ struct dm_spi_bus { uint max_hz; @@ -131,7 +131,7 @@ enum spi_polarity { * @flags: Indication of SPI flags. */ struct spi_slave { -#ifdef CONFIG_DM_SPI +#if CONFIG_IS_ENABLED(DM_SPI) struct udevice *dev; /* struct spi_slave is dev->parentdata */ uint max_hz; uint speed; @@ -317,7 +317,7 @@ void spi_flash_copy_mmap(void *data, void *offset, size_t len); */ int spi_cs_is_valid(unsigned int bus, unsigned int cs); -#ifndef CONFIG_DM_SPI +#if !CONFIG_IS_ENABLED(DM_SPI) /** * Activate a SPI chipselect. * This function is provided by the board code when using a driver @@ -367,7 +367,7 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) return ret < 0 ? ret : din[1]; } -#ifdef CONFIG_DM_SPI +#if CONFIG_IS_ENABLED(DM_SPI) /** * struct spi_cs_info - Information about a bus chip select diff --git a/include/spi_flash.h b/include/spi_flash.h index d9b2af856c0..b3366194876 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -39,7 +39,7 @@ struct dm_spi_flash_ops { /* Access the serial operations for a device */ #define sf_get_ops(dev) ((struct dm_spi_flash_ops *)(dev)->driver->ops) -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) /** * spi_flash_read_dm() - Read data from SPI flash * diff --git a/test/dm/spi.c b/test/dm/spi.c index 8e417acc5f2..474008cde0d 100644 --- a/test/dm/spi.c +++ b/test/dm/spi.c @@ -117,7 +117,7 @@ static int dm_test_spi_xfer(struct unit_test_state *uts) * Since we are about to destroy all devices, we must tell sandbox * to forget the emulation device */ -#ifdef CONFIG_DM_SPI_FLASH +#if CONFIG_IS_ENABLED(DM_SPI_FLASH) sandbox_sf_unbind_emul(state_get_current(), busnum, cs); #endif -- cgit v1.3.1 From 40686c394e533fec765fe237936e353c84e73fff Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Wed, 24 Jun 2020 06:41:18 -0400 Subject: riscv: Clean up IPI initialization code The previous IPI code initialized the device whenever the first call was made to a riscv_*_ipi function. This made it difficult to determine when the IPI device was initialized. This patch introduces a new function riscv_init_ipi. It is called once during arch_cpu_init_dm. In SPL, it is called in spl_invoke_opensbi. Before this point, no riscv_*_ipi functions should be called. Signed-off-by: Sean Anderson Reviewed-by: Rick Chen --- arch/riscv/cpu/cpu.c | 6 ++++++ arch/riscv/include/asm/smp.h | 43 +++++++++++++++++++++++++++++++++++++ arch/riscv/lib/andes_plic.c | 34 +++++++++++------------------- arch/riscv/lib/sbi_ipi.c | 5 +++++ arch/riscv/lib/sifive_clint.c | 33 ++++++++++------------------- arch/riscv/lib/smp.c | 49 +++++++------------------------------------ common/spl/spl_opensbi.c | 5 +++++ 7 files changed, 89 insertions(+), 86 deletions(-) (limited to 'common') diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index 5804aa8e737..d75a3f045ae 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -98,6 +98,12 @@ int arch_cpu_init_dm(void) csr_write(CSR_SATP, 0); } +#ifdef CONFIG_SMP + ret = riscv_init_ipi(); + if (ret) + return ret; +#endif + return 0; } diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h index 74de92ed130..1b428856b26 100644 --- a/arch/riscv/include/asm/smp.h +++ b/arch/riscv/include/asm/smp.h @@ -51,4 +51,47 @@ void handle_ipi(ulong hart); */ int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait); +/** + * riscv_init_ipi() - Initialize inter-process interrupt (IPI) driver + * + * Platform code must provide this function. This function is called once after + * the cpu driver is initialized. No other riscv_*_ipi() calls will be made + * before this function is called. + * + * @return 0 if OK, -ve on error + */ +int riscv_init_ipi(void); + +/** + * riscv_send_ipi() - Send inter-processor interrupt (IPI) + * + * Platform code must provide this function. + * + * @hart: Hart ID of receiving hart + * @return 0 if OK, -ve on error + */ +int riscv_send_ipi(int hart); + +/** + * riscv_clear_ipi() - Clear inter-processor interrupt (IPI) + * + * Platform code must provide this function. + * + * @hart: Hart ID of hart to be cleared + * @return 0 if OK, -ve on error + */ +int riscv_clear_ipi(int hart); + +/** + * riscv_get_ipi() - Get status of inter-processor interrupt (IPI) + * + * Platform code must provide this function. + * + * @hart: Hart ID of hart to be checked + * @pending: Pointer to variable with result of the check, + * 1 if IPI is pending, 0 otherwise + * @return 0 if OK, -ve on error + */ +int riscv_get_ipi(int hart, int *pending); + #endif diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 20529ab3eb5..5cf29df670c 100644 --- a/arch/riscv/lib/andes_plic.c +++ b/arch/riscv/lib/andes_plic.c @@ -30,20 +30,6 @@ #define SEND_IPI_TO_HART(hart) (0x80 >> (hart)) DECLARE_GLOBAL_DATA_PTR; -static int init_plic(void); - -#define PLIC_BASE_GET(void) \ - do { \ - long *ret; \ - \ - if (!gd->arch.plic) { \ - ret = syscon_get_first_range(RISCV_SYSCON_PLIC); \ - if (IS_ERR(ret)) \ - return PTR_ERR(ret); \ - gd->arch.plic = ret; \ - init_plic(); \ - } \ - } while (0) static int enable_ipi(int hart) { @@ -93,13 +79,21 @@ static int init_plic(void) return -ENODEV; } -int riscv_send_ipi(int hart) +int riscv_init_ipi(void) { - unsigned int ipi; + long *ret = syscon_get_first_range(RISCV_SYSCON_PLIC); + + if (IS_ERR(ret)) + return PTR_ERR(ret); + gd->arch.plic = ret; + + return init_plic(); +} - PLIC_BASE_GET(); +int riscv_send_ipi(int hart) +{ + unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart)); - ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart)); writel(ipi, (void __iomem *)PENDING_REG(gd->arch.plic, gd->arch.boot_hart)); @@ -110,8 +104,6 @@ int riscv_clear_ipi(int hart) { u32 source_id; - PLIC_BASE_GET(); - source_id = readl((void __iomem *)CLAIM_REG(gd->arch.plic, hart)); writel(source_id, (void __iomem *)CLAIM_REG(gd->arch.plic, hart)); @@ -120,8 +112,6 @@ int riscv_clear_ipi(int hart) int riscv_get_ipi(int hart, int *pending) { - PLIC_BASE_GET(); - *pending = readl((void __iomem *)PENDING_REG(gd->arch.plic, gd->arch.boot_hart)); *pending = !!(*pending & SEND_IPI_TO_HART(hart)); diff --git a/arch/riscv/lib/sbi_ipi.c b/arch/riscv/lib/sbi_ipi.c index abafca9e5c1..d02e2b4c488 100644 --- a/arch/riscv/lib/sbi_ipi.c +++ b/arch/riscv/lib/sbi_ipi.c @@ -8,6 +8,11 @@ #include #include +int riscv_init_ipi(void) +{ + return 0; +} + int riscv_send_ipi(int hart) { ulong mask; diff --git a/arch/riscv/lib/sifive_clint.c b/arch/riscv/lib/sifive_clint.c index 5e0d25720bd..78fc6c868dd 100644 --- a/arch/riscv/lib/sifive_clint.c +++ b/arch/riscv/lib/sifive_clint.c @@ -24,22 +24,8 @@ DECLARE_GLOBAL_DATA_PTR; -#define CLINT_BASE_GET(void) \ - do { \ - long *ret; \ - \ - if (!gd->arch.clint) { \ - ret = syscon_get_first_range(RISCV_SYSCON_CLINT); \ - if (IS_ERR(ret)) \ - return PTR_ERR(ret); \ - gd->arch.clint = ret; \ - } \ - } while (0) - int riscv_get_time(u64 *time) { - CLINT_BASE_GET(); - *time = readq((void __iomem *)MTIME_REG(gd->arch.clint)); return 0; @@ -47,17 +33,24 @@ int riscv_get_time(u64 *time) int riscv_set_timecmp(int hart, u64 cmp) { - CLINT_BASE_GET(); - writeq(cmp, (void __iomem *)MTIMECMP_REG(gd->arch.clint, hart)); return 0; } -int riscv_send_ipi(int hart) +int riscv_init_ipi(void) { - CLINT_BASE_GET(); + long *ret = syscon_get_first_range(RISCV_SYSCON_CLINT); + + if (IS_ERR(ret)) + return PTR_ERR(ret); + gd->arch.clint = ret; + + return 0; +} +int riscv_send_ipi(int hart) +{ writel(1, (void __iomem *)MSIP_REG(gd->arch.clint, hart)); return 0; @@ -65,8 +58,6 @@ int riscv_send_ipi(int hart) int riscv_clear_ipi(int hart) { - CLINT_BASE_GET(); - writel(0, (void __iomem *)MSIP_REG(gd->arch.clint, hart)); return 0; @@ -74,8 +65,6 @@ int riscv_clear_ipi(int hart) int riscv_get_ipi(int hart, int *pending) { - CLINT_BASE_GET(); - *pending = readl((void __iomem *)MSIP_REG(gd->arch.clint, hart)); return 0; diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c index 17adb35730d..ac22136314f 100644 --- a/arch/riscv/lib/smp.c +++ b/arch/riscv/lib/smp.c @@ -12,38 +12,6 @@ DECLARE_GLOBAL_DATA_PTR; -/** - * riscv_send_ipi() - Send inter-processor interrupt (IPI) - * - * Platform code must provide this function. - * - * @hart: Hart ID of receiving hart - * @return 0 if OK, -ve on error - */ -extern int riscv_send_ipi(int hart); - -/** - * riscv_clear_ipi() - Clear inter-processor interrupt (IPI) - * - * Platform code must provide this function. - * - * @hart: Hart ID of hart to be cleared - * @return 0 if OK, -ve on error - */ -extern int riscv_clear_ipi(int hart); - -/** - * riscv_get_ipi() - Get status of inter-processor interrupt (IPI) - * - * Platform code must provide this function. - * - * @hart: Hart ID of hart to be checked - * @pending: Pointer to variable with result of the check, - * 1 if IPI is pending, 0 otherwise - * @return 0 if OK, -ve on error - */ -extern int riscv_get_ipi(int hart, int *pending); - static int send_ipi_many(struct ipi_data *ipi, int wait) { ofnode node, cpus; @@ -124,7 +92,7 @@ void handle_ipi(ulong hart) */ ret = riscv_clear_ipi(hart); if (ret) { - pr_err("Cannot clear IPI of hart %ld\n", hart); + pr_err("Cannot clear IPI of hart %ld (error %d)\n", hart, ret); return; } @@ -133,14 +101,11 @@ void handle_ipi(ulong hart) int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait) { - int ret = 0; - struct ipi_data ipi; - - ipi.addr = addr; - ipi.arg0 = arg0; - ipi.arg1 = arg1; - - ret = send_ipi_many(&ipi, wait); + struct ipi_data ipi = { + .addr = addr, + .arg0 = arg0, + .arg1 = arg1, + }; - return ret; + return send_ipi_many(&ipi, wait); } diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index e88136e6f39..defddac8f29 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -79,6 +79,11 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image) invalidate_icache_all(); #ifdef CONFIG_SPL_SMP + /* Initialize the IPI before we use it */ + ret = riscv_init_ipi(); + if (ret) + hang(); + /* * Start OpenSBI on all secondary harts and wait for acknowledgment. * -- cgit v1.3.1