From 7ceefcbaca0a5ee5bbf92e97423584d186e052fa Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Mon, 18 Feb 2019 10:30:54 +1300 Subject: arm: mvebu: x530: Enable watchdog in SPL and U-Boot Enable the hardware watchdog to guard against system lock ups when running in the SPL or U-Boot. Stop the watchdog just before booting so that the OS can re-enable it if needed. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/x530_defconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'configs') diff --git a/configs/x530_defconfig b/configs/x530_defconfig index cd18e9eb454..c893c44452b 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -19,6 +19,8 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -72,3 +74,6 @@ CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y +CONFIG_WATCHDOG=y +CONFIG_WDT=y +CONFIG_WDT_ORION=y -- cgit v1.3.1 From de9c775f0dc468a18d5311100b87fea7b0d05b04 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 11 Mar 2019 13:29:21 +0100 Subject: arm: mvebu: theadorable_debug_defconfig: Enable CONFIG_BLK This patch enables CONFIG_BLK as this is now possible with the recent DM conversion of the Armada XP SATA driver. Signed-off-by: Stefan Roese Cc: Simon Glass Cc: Tom Rini --- configs/theadorable_debug_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'configs') diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index fb9307aaf58..3736aec537d 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -51,6 +51,7 @@ CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y +CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_FPGA_ALTERA=y -- cgit v1.3.1 From ef13016573d1efb8e92401371d7e8af1af14b5bc Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 11 Mar 2019 13:29:22 +0100 Subject: arm: mvebu: db-mv784mp-gp_defconfig: Enable CONFIG_BLK This patch enables CONFIG_BLK as this is now possible with the recent DM conversion of the Armada XP SATA driver. Signed-off-by: Stefan Roese Cc: Simon Glass Cc: Tom Rini --- configs/db-mv784mp-gp_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'configs') diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 98e47ee9563..078bd230504 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -46,6 +46,7 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_PXA3XX=y -- cgit v1.3.1 From 2bd1da284574eb446178b0285659f1310feb0182 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 13 Mar 2019 20:47:06 +1300 Subject: ARM: kirkwood: enable CONFIG_DM_USB for {dream, guru, sheeva}plug Enable CONFIG_DM_USB and where possible CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Tested-by: Leigh Brown Signed-off-by: Stefan Roese --- configs/dreamplug_defconfig | 2 ++ configs/guruplug_defconfig | 2 ++ configs/sheevaplug_defconfig | 1 + 3 files changed, 5 insertions(+) (limited to 'configs') diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 8202848ebf7..eae36f9c0eb 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -40,5 +41,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 9998e48ab9c..8ae7e20bafd 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -31,6 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_MVGBE=y CONFIG_MII=y @@ -38,6 +39,7 @@ CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 04b00cdea9d..ec527fceb6f 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -39,6 +39,7 @@ CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y -- cgit v1.3.1 From 1fc035367852155601635e7159605a3d608ee485 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 13 Mar 2019 20:47:07 +1300 Subject: ARM: kirkwood: enable CONFIG_DM_USB for dns325 Enable CONFIG_DM_USB and CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/dns325_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'configs') diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 5a766981603..ba8b053680b 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -30,6 +30,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_MVGBE=y CONFIG_MII=y @@ -37,5 +38,6 @@ CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -- cgit v1.3.1 From 1e9449fd25bdc266bb20f98165ac6d0dfea17da0 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 13 Mar 2019 20:47:08 +1300 Subject: ARM: kirkwood: enable CONFIG_DM_USB for ds109 Enable CONFIG_DM_USB and CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/ds109_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'configs') diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 29d5f98d76c..22996e893d6 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -22,6 +22,7 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y # CONFIG_MMC is not set @@ -37,5 +38,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_FS_EXT4=y -- cgit v1.3.1 From 8f2077ee2c92bdd88a275aad2fab1528749d75a4 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 13 Mar 2019 20:47:09 +1300 Subject: ARM: kirkwood: enable CONFIG_DM_USB for goflexhome Enable CONFIG_DM_USB and CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/goflexhome_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'configs') diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index c04bf0ea574..568b74fd830 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -31,6 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_MVGBE=y CONFIG_MII=y @@ -38,5 +39,6 @@ CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -- cgit v1.3.1 From 622230069b707f4dde19d70ca05f689ee210cd5d Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 13 Mar 2019 20:47:10 +1300 Subject: ARM: kirkwood: enable CONFIG_DM_USB for lschlv2 and lsxhl Enable CONFIG_DM_USB and CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Tested-by: Michael Walle Signed-off-by: Stefan Roese --- configs/lschlv2_defconfig | 2 ++ configs/lsxhl_defconfig | 2 ++ 2 files changed, 4 insertions(+) (limited to 'configs') diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 16d9c9226f0..e1ff3557312 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -27,6 +27,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -39,4 +40,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index b6eba4a4ba1..48678bdb8fe 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -27,6 +27,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -39,4 +40,5 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y -- cgit v1.3.1 From 53de8061fd0f8fa30372a42da4e75de334a21a00 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 13 Mar 2019 20:47:11 +1300 Subject: ARM: kirkwood: enable CONFIG_DM_USB for nas220 Enable CONFIG_DM_USB and CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/nas220_defconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'configs') diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 6bd308bb826..a244b8d6916 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -31,6 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_MVGBE=y CONFIG_MII=y @@ -38,5 +39,6 @@ CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -- cgit v1.3.1 From c1d81f6f012349cfe204932b82e771cbbd3d91ff Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Wed, 27 Mar 2019 09:27:08 +0200 Subject: arm: mvebu: turris_omnia: select Kconfig SPI_FLASH_SPANSION Signed-off-by: Baruch Siach Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/turris_omnia_defconfig | 1 + include/configs/turris_omnia.h | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'configs') diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index c406b257533..85f214148a8 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -43,6 +43,7 @@ CONFIG_ATSHA204A=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 021ebae21ff..c7805cf36bf 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -34,8 +34,6 @@ # define CONFIG_WATCHDOG #endif -#define CONFIG_SPI_FLASH_SPANSION - /* * SDIO/MMC Card Configuration */ -- cgit v1.3.1 From 699a5d3c9da26bca83e6cf1e4832ac2b65a68e9b Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 27 Mar 2019 14:31:36 +0100 Subject: arm: mvebu: ds412: Enable CONFIG_BLK This patch enables CONFIG_BLK for the ds414 Armada XP based platform. This removes this build warning: ===================== WARNING ====================== This board does not use CONFIG_DM_USB. Please update the board to use CONFIG_DM_USB before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Please note that I don't have this board and can't test this change. Signed-off-by: Stefan Roese Cc: Phil Sutter --- configs/ds414_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'configs') diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 62cad538883..9e936494b2b 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -43,6 +43,7 @@ CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y +CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y -- cgit v1.3.1 From f94b5223fbe942ac9299972e1ece0ba4ba29edfd Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 3 Apr 2019 23:28:31 +0200 Subject: arm: kirkwood: lsxl: enable DM for SATA Switch from legacy IDE driver to sata_mv driver. Signed-off-by: Michael Walle Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/lschlv2_defconfig | 4 ++-- configs/lsxhl_defconfig | 4 ++-- include/configs/lsxl.h | 23 ++++++++++------------- 3 files changed, 14 insertions(+), 17 deletions(-) (limited to 'configs') diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index e1ff3557312..c550798bcd4 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -16,7 +16,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_FLASH is not set -CONFIG_CMD_IDE=y +CONFIG_CMD_SATA=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -26,7 +26,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 48678bdb8fe..efcce455a48 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -16,7 +16,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_FLASH is not set -CONFIG_CMD_IDE=y +CONFIG_CMD_SATA=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -26,7 +26,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -CONFIG_MVSATA_IDE=y +CONFIG_SATA_MV=y CONFIG_BLK=y # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 72e62658d0c..55c4e633254 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -76,9 +76,9 @@ "kernel_addr=0x00800000\0" \ "ramdisk_addr=0x01000000\0" \ "fdt_addr=0x00ff0000\0" \ - "bootcmd_legacy=ide reset " \ - "&& load ide ${hdpart} ${kernel_addr} /uImage.buffalo " \ - "&& load ide ${hdpart} ${ramdisk_addr} /initrd.buffalo "\ + "bootcmd_legacy=sata init " \ + "&& load sata ${hdpart} ${kernel_addr} /uImage.buffalo "\ + "&& load sata ${hdpart} ${ramdisk_addr} /initrd.buffalo "\ "&& bootm ${kernel_addr} ${ramdisk_addr}\0" \ "bootcmd_net=bootp ${kernel_addr} vmlinuz " \ "&& tftpboot ${ramdisk_addr} initrd.img " \ @@ -86,11 +86,11 @@ "&& tftpboot ${fdt_addr} " CONFIG_FDTFILE " " \ "&& bootz ${kernel_addr} " \ "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \ - "bootcmd_hdd=ide reset " \ - "&& load ide ${hdpart} ${kernel_addr} /vmlinuz " \ - "&& load ide ${hdpart} ${ramdisk_addr} /initrd.img " \ + "bootcmd_hdd=sata init " \ + "&& load sata ${hdpart} ${kernel_addr} /vmlinuz " \ + "&& load sata ${hdpart} ${ramdisk_addr} /initrd.img " \ "&& setenv ramdisk_len ${filesize} " \ - "&& load ide ${hdpart} ${fdt_addr} /dtb " \ + "&& load sata ${hdpart} ${fdt_addr} /dtb " \ "&& bootz ${kernel_addr} " \ "${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \ "bootcmd_usb=usb start " \ @@ -131,13 +131,10 @@ #undef CONFIG_RESET_PHY_R #endif /* CONFIG_CMD_NET */ -#ifdef CONFIG_IDE -#undef CONFIG_SYS_IDE_MAXBUS -#define CONFIG_SYS_IDE_MAXBUS 1 -#undef CONFIG_SYS_IDE_MAXDEVICE -#define CONFIG_SYS_IDE_MAXDEVICE 1 -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#ifdef CONFIG_SATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_SYS_64BIT_LBA +#define CONFIG_LBA48 #endif #endif /* _CONFIG_LSXL_H */ -- cgit v1.3.1 From 4db944ab44a7bc8b495eece6afb124c632b02ef5 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Thu, 11 Apr 2019 22:22:53 +1200 Subject: arm: mvebu: Add DB-XC3-24G4XG board The DB-XC3-24G4XG is a switch development board from Marvell. It can either use and external CPU card such as the db-88f6820-amc or the internal CPU that is integrated into the switch. Add support for running U-Boot on the internal CPU and enable the USB, SPI and NAND peripherals. For now this needs the bin_hdr from the Marvell U-Boot for this board. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/armada-xp-98dx3236.dtsi | 343 +++++++++++++++++++++++ arch/arm/dts/armada-xp-98dx3336.dtsi | 39 +++ arch/arm/dts/armada-xp-98dx4251.dtsi | 54 ++++ arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi | 24 ++ arch/arm/dts/armada-xp-db-xc3-24g4xg.dts | 110 ++++++++ arch/arm/mach-mvebu/Kconfig | 8 + board/Marvell/db-xc3-24g4xg/.gitignore | 1 + board/Marvell/db-xc3-24g4xg/MAINTAINERS | 7 + board/Marvell/db-xc3-24g4xg/Makefile | 14 + board/Marvell/db-xc3-24g4xg/README | 4 + board/Marvell/db-xc3-24g4xg/binary.0 | 11 + board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c | 68 +++++ board/Marvell/db-xc3-24g4xg/kwbimage.cfg.in | 12 + configs/db-xc3-24g4xg_defconfig | 55 ++++ include/configs/db-xc3-24g4xg.h | 41 +++ 16 files changed, 793 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/armada-xp-98dx3236.dtsi create mode 100644 arch/arm/dts/armada-xp-98dx3336.dtsi create mode 100644 arch/arm/dts/armada-xp-98dx4251.dtsi create mode 100644 arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi create mode 100644 arch/arm/dts/armada-xp-db-xc3-24g4xg.dts create mode 100644 board/Marvell/db-xc3-24g4xg/.gitignore create mode 100644 board/Marvell/db-xc3-24g4xg/MAINTAINERS create mode 100644 board/Marvell/db-xc3-24g4xg/Makefile create mode 100644 board/Marvell/db-xc3-24g4xg/README create mode 100644 board/Marvell/db-xc3-24g4xg/binary.0 create mode 100644 board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c create mode 100644 board/Marvell/db-xc3-24g4xg/kwbimage.cfg.in create mode 100644 configs/db-xc3-24g4xg_defconfig create mode 100644 include/configs/db-xc3-24g4xg.h (limited to 'configs') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 86a01c2c702..524c1ee0dbd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -151,7 +151,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-xp-theadorable.dtb \ armada-38x-controlcenterdc.dtb \ armada-385-atl-x530.dtb \ - armada-385-atl-x530DP.dtb + armada-385-atl-x530DP.dtb \ + armada-xp-db-xc3-24g4xg.dtb dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \ uniphier-ld11-global.dtb \ diff --git a/arch/arm/dts/armada-xp-98dx3236.dtsi b/arch/arm/dts/armada-xp-98dx3236.dtsi new file mode 100644 index 00000000000..5df1d1848db --- /dev/null +++ b/arch/arm/dts/armada-xp-98dx3236.dtsi @@ -0,0 +1,343 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Marvell 98dx3236 family SoC + * + * Copyright (C) 2016 Allied Telesis Labs + * + * Contains definitions specific to the 98dx3236 SoC that are not + * common to all Armada XP SoCs. + */ + +#include "armada-370-xp.dtsi" + +/ { + #address-cells = <2>; + #size-cells = <2>; + + model = "Marvell 98DX3236 SoC"; + compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp"; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "marvell,98dx3236-smp"; + + cpu@0 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <0>; + clocks = <&cpuclk 0>; + clock-latency = <1000000>; + }; + }; + + soc { + compatible = "marvell,armadaxp-mbus", "simple-bus"; + + ranges = ; + + bootrom { + compatible = "marvell,bootrom"; + reg = ; + }; + + /* + * 98DX3236 has 1 x1 PCIe unit Gen2.0 + */ + pciec: pcie@82000000 { + compatible = "marvell,armada-xp-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + msi-parent = <&mpic>; + bus-range = <0x00 0xff>; + + ranges = + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; + + pcie1: pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 + 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &mpic 58>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gateclk 5>; + status = "disabled"; + }; + }; + + internal-regs { + sdramc: sdramc@1400 { + compatible = "marvell,armada-xp-sdram-controller"; + reg = <0x1400 0x500>; + }; + + L2: l2-cache@8000 { + compatible = "marvell,aurora-system-cache"; + reg = <0x08000 0x1000>; + cache-id-part = <0x100>; + cache-level = <2>; + cache-unified; + wt-override; + }; + + gpio0: gpio@18100 { + compatible = "marvell,orion-gpio"; + reg = <0x18100 0x40>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <82>, <83>, <84>, <85>; + }; + + /* does not exist */ + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>; + status = "disabled"; + }; + + gpio2: gpio@18180 { /* rework some properties */ + compatible = "marvell,orion-gpio"; + reg = <0x18180 0x40>; + ngpios = <1>; /* only gpio #32 */ + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>; + }; + + systemc: system-controller@18200 { + compatible = "marvell,armada-370-xp-system-controller"; + reg = <0x18200 0x500>; + }; + + gateclk: clock-gating-control@18220 { + compatible = "marvell,mv98dx3236-gating-clock"; + reg = <0x18220 0x4>; + clocks = <&coreclk 0>; + #clock-cells = <1>; + }; + + cpuclk: clock-complex@18700 { + #clock-cells = <1>; + compatible = "marvell,mv98dx3236-cpu-clock"; + reg = <0x18700 0x24>, <0x1c054 0x10>; + clocks = <&coreclk 1>; + }; + + corediv-clock@18740 { + status = "disabled"; + }; + + cpu-config@21000 { + compatible = "marvell,armada-xp-cpu-config"; + reg = <0x21000 0x8>; + }; + + ethernet@70000 { + compatible = "marvell,armada-xp-neta"; + }; + + ethernet@74000 { + compatible = "marvell,armada-xp-neta"; + }; + + xor1: xor@f0800 { + compatible = "marvell,orion-xor"; + reg = <0xf0800 0x100 + 0xf0a00 0x100>; + clocks = <&gateclk 22>; + status = "okay"; + + xor10 { + interrupts = <51>; + dmacap,memcpy; + dmacap,xor; + }; + xor11 { + interrupts = <52>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + + nand_controller: nand@d0000 { + clocks = <&dfx_coredivclk 0>; + }; + + xor0: xor@f0900 { + compatible = "marvell,orion-xor"; + reg = <0xF0900 0x100 + 0xF0B00 0x100>; + clocks = <&gateclk 28>; + status = "okay"; + + xor00 { + interrupts = <94>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <95>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + }; + + dfx: dfx-server@ac000000 { + compatible = "marvell,dfx-server", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; + reg = ; + + thermal: thermal@f8078 { + compatible = "marvell,armada380-thermal"; + reg = <0xf8078 0x4>, <0xf8074 0x4>; + status = "okay"; + }; + + coreclk: mvebu-sar@f8204 { + compatible = "marvell,mv98dx3236-core-clock"; + reg = <0xf8204 0x4>; + #clock-cells = <1>; + }; + + dfx_coredivclk: corediv-clock@f8268 { + compatible = "marvell,mv98dx3236-corediv-clock"; + reg = <0xf8268 0xc>; + #clock-cells = <1>; + clocks = <&mainpll>; + clock-output-names = "nand"; + }; + }; + + switch: switch@a8000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>; + + pp0: packet-processor@0 { + compatible = "marvell,prestera-98dx3236", "marvell,prestera"; + reg = <0 0x4000000>; + interrupts = <33>, <34>, <35>; + dfx = <&dfx>; + }; + }; + }; + + clocks { + /* 25 MHz reference crystal */ + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + }; +}; + +&i2c0 { + compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11000 0x100>; +}; + +&i2c1 { + compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11100 0x100>; +}; + +&mpic { + reg = <0x20a00 0x2d0>, <0x21070 0x58>; +}; + +&rtc { + status = "disabled"; +}; + +&timer { + compatible = "marvell,armada-xp-timer"; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; +}; + +&watchdog { + compatible = "marvell,armada-xp-wdt"; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; +}; + +&cpurst { + reg = <0x20800 0x20>; +}; + +&usb0 { + clocks = <&gateclk 18>; +}; + +&usb1 { + clocks = <&gateclk 19>; +}; + +&pinctrl { + compatible = "marvell,98dx3236-pinctrl"; + + nand_pins: nand-pins { + marvell,pins = "mpp20", "mpp21", "mpp22", + "mpp23", "mpp24", "mpp25", + "mpp26", "mpp27", "mpp28", + "mpp29", "mpp30"; + marvell,function = "dev"; + }; + + nand_rb: nand-rb { + marvell,pins = "mpp19"; + marvell,function = "nand"; + }; + + spi0_pins: spi0-pins { + marvell,pins = "mpp0", "mpp1", + "mpp2", "mpp3"; + marvell,function = "spi0"; + }; +}; + +&spi0 { + compatible = "marvell,armada-xp-spi", "marvell,orion-spi"; + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; +}; + +&sdio { + status = "disabled"; +}; diff --git a/arch/arm/dts/armada-xp-98dx3336.dtsi b/arch/arm/dts/armada-xp-98dx3336.dtsi new file mode 100644 index 00000000000..1d9d8a8ea60 --- /dev/null +++ b/arch/arm/dts/armada-xp-98dx3336.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Marvell 98dx3336 family SoC + * + * Copyright (C) 2016 Allied Telesis Labs + * + * Contains definitions specific to the 98dx3236 SoC that are not + * common to all Armada XP SoCs. + */ + +#include "armada-xp-98dx3236.dtsi" + +/ { + model = "Marvell 98DX3336 SoC"; + compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp"; + + cpus { + cpu@1 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; + clock-latency = <1000000>; + }; + }; + + soc { + internal-regs { + resume@20980 { + compatible = "marvell,98dx3336-resume-ctrl"; + reg = <0x20980 0x10>; + }; + }; + }; +}; + +&pp0 { + compatible = "marvell,prestera-98dx3336", "marvell,prestera"; +}; diff --git a/arch/arm/dts/armada-xp-98dx4251.dtsi b/arch/arm/dts/armada-xp-98dx4251.dtsi new file mode 100644 index 00000000000..48ffdc72bfc --- /dev/null +++ b/arch/arm/dts/armada-xp-98dx4251.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Marvell 98dx4521 family SoC + * + * Copyright (C) 2016 Allied Telesis Labs + * + * Contains definitions specific to the 98dx4521 SoC that are not + * common to all Armada XP SoCs. + */ + +#include "armada-xp-98dx3236.dtsi" + +/ { + model = "Marvell 98DX4251 SoC"; + compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp"; + + cpus { + cpu@1 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; + clock-latency = <1000000>; + }; + }; + + soc { + internal-regs { + resume@20980 { + compatible = "marvell,98dx3336-resume-ctrl"; + reg = <0x20980 0x10>; + }; + }; + }; +}; + +&sdio { + status = "okay"; +}; + +&pinctrl { + compatible = "marvell,98dx4251-pinctrl"; + + sdio_pins: sdio-pins { + marvell,pins = "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10"; + marvell,function = "sd0"; + }; +}; + +&pp0 { + compatible = "marvell,prestera-98dx4251", "marvell,prestera"; + interrupts = <33>, <34>, <35>, <36>; +}; diff --git a/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi b/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi new file mode 100644 index 00000000000..90cad85506d --- /dev/null +++ b/arch/arm/dts/armada-xp-db-xc3-24g4xg-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&nand_controller { + compatible="marvell,mvebu-pxa3xx-nand"; + status = "okay"; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; +}; + +&spi0 { + u-boot,dm-pre-reloc; + + spi-flash@0 { + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/armada-xp-db-xc3-24g4xg.dts b/arch/arm/dts/armada-xp-db-xc3-24g4xg.dts new file mode 100644 index 00000000000..d4b52881e6f --- /dev/null +++ b/arch/arm/dts/armada-xp-db-xc3-24g4xg.dts @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for DB-XC3-24G4XG board + * + * Copyright (C) 2016 Allied Telesis Labs + * + * Based on armada-xp-db.dts + * + * Note: this Device Tree assumes that the bootloader has remapped the + * internal registers to 0xf1000000 (instead of the default + * 0xd0000000). The 0xf1000000 is the default used by the recent, + * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier + * boards were delivered with an older version of the bootloader that + * left internal registers mapped at 0xd0000000. If you are in this + * situation, you should either update your bootloader (preferred + * solution) or the below Device Tree should be adjusted. + */ + +/dts-v1/; +#include "armada-xp-98dx3336.dtsi" +#include "armada-xp-db-xc3-24g4xg-u-boot.dtsi" + +/ { + model = "DB-XC3-24G4XG"; + compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "console=ttyS0,115200 earlyprintk"; + }; + + aliases { + spi0 = &spi0; + }; + + memory { + device_type = "memory"; + reg = <0 0x00000000 0 0x40000000>; /* 1 GB */ + }; +}; + +&L2 { + arm,parity-enable; + marvell,ecc-enable; +}; + +&devbus_bootcs { + status = "okay"; + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <16>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <100000>; + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + m25p,fast-read; + + partition@u-boot { + reg = <0x00000000 0x00100000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x00100000 0x00040000>; + label = "u-boot-env"; + }; + partition@unused { + reg = <0x00140000 0x00ec0000>; + label = "unused"; + }; + + }; +}; diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index bb4ca56a585..f5fd60d7845 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -152,6 +152,10 @@ config TARGET_X530 bool "Support Allied Telesis x530" select 88F6820 +config TARGET_DB_XC3_24G4XG + bool "Support DB-XC3-24G4XG" + select 98DX3336 + endchoice config SYS_BOARD @@ -170,6 +174,7 @@ config SYS_BOARD default "theadorable" if TARGET_THEADORABLE default "a38x" if TARGET_CONTROLCENTERDC default "x530" if TARGET_X530 + default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG config SYS_CONFIG_NAME default "clearfog" if TARGET_CLEARFOG @@ -187,6 +192,7 @@ config SYS_CONFIG_NAME default "turris_mox" if TARGET_TURRIS_MOX default "controlcenterdc" if TARGET_CONTROLCENTERDC default "x530" if TARGET_X530 + default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG config SYS_VENDOR default "Marvell" if TARGET_DB_MV784MP_GP @@ -195,6 +201,8 @@ config SYS_VENDOR default "Marvell" if TARGET_DB_88F6820_GP default "Marvell" if TARGET_DB_88F6820_AMC default "Marvell" if TARGET_MVEBU_ARMADA_8K + default "Marvell" if TARGET_DB_XC3_24G4XG + default "Marvell" if TARGET_MVEBU_DB_88F7040 default "solidrun" if TARGET_CLEARFOG default "kobol" if TARGET_HELIOS4 default "Synology" if TARGET_DS414 diff --git a/board/Marvell/db-xc3-24g4xg/.gitignore b/board/Marvell/db-xc3-24g4xg/.gitignore new file mode 100644 index 00000000000..775b9346b85 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/.gitignore @@ -0,0 +1 @@ +kwbimage.cfg diff --git a/board/Marvell/db-xc3-24g4xg/MAINTAINERS b/board/Marvell/db-xc3-24g4xg/MAINTAINERS new file mode 100644 index 00000000000..94d4a901783 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/MAINTAINERS @@ -0,0 +1,7 @@ +DB-XC3-24G4XG BOARD +M: Chris Packham +S: Maintained +F: board/Marvell/db-xc3-24g4xg/ +F: include/configs/db-xc3-24g4xg.h +F: configs/db-xc3-24g4xg-amc_defconfig +F: arch/arm/dts/armada-xp-db-xc3-24g4xg.dts diff --git a/board/Marvell/db-xc3-24g4xg/Makefile b/board/Marvell/db-xc3-24g4xg/Makefile new file mode 100644 index 00000000000..4dd57902d47 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2015 Stefan Roese + +obj-y := db-xc3-24g4xg.o +extra-y := kwbimage.cfg + +quiet_cmd_sed = SED $@ + cmd_sed = sed $(SEDFLAGS_$(@F)) $< >$(dir $<)$(@F) + +SEDFLAGS_kwbimage.cfg =-e "s|^BINARY.*|BINARY $(srctree)/$(@D)/binary.0 0000005b 00000068|" +$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ + include/config/auto.conf + $(call if_changed,sed) diff --git a/board/Marvell/db-xc3-24g4xg/README b/board/Marvell/db-xc3-24g4xg/README new file mode 100644 index 00000000000..5e479b433e4 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/README @@ -0,0 +1,4 @@ +To generate binary.0 from Marvell's bin_hdr.elf use the following command + + arm-softfloat-linux-gnueabi-objcopy -S -O binary bin_hdr.elf \ + board/Marvell/db-xc3-24g4xg/binary.0 diff --git a/board/Marvell/db-xc3-24g4xg/binary.0 b/board/Marvell/db-xc3-24g4xg/binary.0 new file mode 100644 index 00000000000..8dd687286a0 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/binary.0 @@ -0,0 +1,11 @@ +-------- +WARNING: +-------- +This file should contain the bin_hdr generated by the original Marvell +U-Boot implementation. As this is currently not included in this +U-Boot version, we have added this placeholder, so that the U-Boot +image can be generated without errors. + +If you have a known to be working bin_hdr for your board, then you +just need to replace this text file here with the binary header +and recompile U-Boot. diff --git a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c new file mode 100644 index 00000000000..cae428ffd06 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2015 Stefan Roese + */ + +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * These values and defines are taken from the Marvell U-Boot version + * "u-boot-2013.01-2016_T1.0.eng_drop_v6" + */ +#define DB_DX_AC3_GPP_OUT_ENA_LOW (~(BIT(0) | BIT(2) | BIT(3) | BIT(4) | BIT(6) | BIT(12) \ + | BIT(13) | BIT(16) | BIT(17) | BIT(20) | BIT(29) | BIT(30))) +#define DB_DX_AC3_GPP_OUT_ENA_MID (~(0)) +#define DB_DX_AC3_GPP_OUT_VAL_LOW (BIT(0) | BIT(2) | BIT(3) | BIT(4) | BIT(6) | BIT(12) \ + | BIT(13) | BIT(16) | BIT(17) | BIT(20) | BIT(29) | BIT(30)) +#define DB_DX_AC3_GPP_OUT_VAL_MID 0x0 +#define DB_DX_AC3_GPP_POL_LOW 0x0 +#define DB_DX_AC3_GPP_POL_MID 0x0 + +int board_early_init_f(void) +{ + /* Configure MPP */ + writel(0x00142222, MVEBU_MPP_BASE + 0x00); + writel(0x11122000, MVEBU_MPP_BASE + 0x04); + writel(0x44444004, MVEBU_MPP_BASE + 0x08); + writel(0x14444444, MVEBU_MPP_BASE + 0x0c); + writel(0x00000001, MVEBU_MPP_BASE + 0x10); + + /* Set GPP Out value */ + writel(DB_DX_AC3_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); + writel(DB_DX_AC3_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); + + /* Set GPP Polarity */ + writel(DB_DX_AC3_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); + writel(DB_DX_AC3_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); + + /* Set GPP Out Enable */ + writel(DB_DX_AC3_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); + writel(DB_DX_AC3_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ + puts("Board: " CONFIG_SYS_BOARD "\n"); + + return 0; +} +#endif diff --git a/board/Marvell/db-xc3-24g4xg/kwbimage.cfg.in b/board/Marvell/db-xc3-24g4xg/kwbimage.cfg.in new file mode 100644 index 00000000000..b8bb7a6eb75 --- /dev/null +++ b/board/Marvell/db-xc3-24g4xg/kwbimage.cfg.in @@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/Marvell/db-xc3-24g4xg/binary.0 0000005b 00000068 diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig new file mode 100644 index 00000000000..0285ccaa365 --- /dev/null +++ b/configs/db-xc3-24g4xg_defconfig @@ -0,0 +1,55 @@ +CONFIG_ARM=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_DB_XC3_24G4XG=y +CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_I2C=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_UBI=y +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-db-xc3-24g4xg" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_BLK=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MVTWSI=y +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_MTD_DEVICE=y +CONFIG_NAND=y +CONFIG_NAND_PXA3XX=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PCI=y +CONFIG_PCI_MVEBU=y +CONFIG_SYS_NS16550=y +CONFIG_KIRKWOOD_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h new file mode 100644 index 00000000000..0f75ad71859 --- /dev/null +++ b/include/configs/db-xc3-24g4xg.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014 Stefan Roese + */ + +#ifndef _CONFIG_DB_XC3_24G4G_H +#define _CONFIG_DB_XC3_24G4G_H + +/* + * High Level Configuration Options (easy to change) + */ + +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg +#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ + +/* USB/EHCI configuration */ +#define CONFIG_EHCI_IS_TDI + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ +#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ +#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ + +/* NAND */ +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x10000000\0" \ + "initrd_high=0x10000000\0" + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" +#undef CONFIG_SYS_MAXARGS +#define CONFIG_SYS_MAXARGS 96 + +#endif /* _CONFIG_DB_XC3_24G4G_H */ -- cgit v1.3.1 From 205c75e88ce44636bb1958cb50eda24797423909 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 12 Apr 2019 08:47:04 +1200 Subject: ARM: mvebu: rename armada-385-amc.dts to armada-385-db-88f6820-amc.dts This board was added to u-boot first but the Linux maintainers requested a more descriptive name. Rename the file to match the Linux usage and update the board defconfig. Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- arch/arm/dts/Makefile | 2 +- arch/arm/dts/armada-385-amc.dts | 166 ----------------------------- arch/arm/dts/armada-385-db-88f6820-amc.dts | 166 +++++++++++++++++++++++++++++ configs/db-88f6820-amc_defconfig | 2 +- 4 files changed, 168 insertions(+), 168 deletions(-) delete mode 100644 arch/arm/dts/armada-385-amc.dts create mode 100644 arch/arm/dts/armada-385-db-88f6820-amc.dts (limited to 'configs') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 524c1ee0dbd..0bed99b2e2e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -138,7 +138,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-388-clearfog.dtb \ armada-388-gp.dtb \ armada-388-helios4.dtb \ - armada-385-amc.dtb \ + armada-385-db-88f6820-amc.dtb \ armada-385-turris-omnia.dtb \ armada-7040-db.dtb \ armada-7040-db-nand.dtb \ diff --git a/arch/arm/dts/armada-385-amc.dts b/arch/arm/dts/armada-385-amc.dts deleted file mode 100644 index c9ccbb57fff..00000000000 --- a/arch/arm/dts/armada-385-amc.dts +++ /dev/null @@ -1,166 +0,0 @@ -/* - * Device Tree file for Marvell Armada 385 development board - * (DB-88F6820-AMC) - * - * Copyright (C) 2014 Marvell - * - * Gregory CLEMENT - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "armada-385.dtsi" -#include - -/ { - model = "Marvell Armada 385 AMC"; - compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - aliases { - ethernet0 = ð0; - ethernet1 = ð2; - i2c0 = &i2c0; - spi1 = &spi1; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x80000000>; /* 2 GB */ - }; - - soc { - ranges = ; - - internal-regs { - i2c@11000 { - clock-frequency = <100000>; - u-boot,i2c-slave-addr = <0x0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - }; - - serial@12000 { - /* - * Exported on the micro USB connector CON16 - * through an FTDI - */ - - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; - u-boot,dm-pre-reloc; - }; - - ethernet@34000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "sgmii"; - }; - - usb@58000 { - status = "okay"; - }; - - ethernet@70000 { - pinctrl-names = "default"; - /* - * The Reference Clock 0 is used to provide a - * clock to the PHY - */ - pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - - - mdio@72004 { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - - phy0: ethernet-phy@1 { - reg = <1>; - }; - - phy1: ethernet-phy@0 { - reg = <0>; - }; - }; - - flash@d0000 { - status = "okay"; - num-cs = <1>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - }; - }; - - pcie { - status = "okay"; - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - - }; - }; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins>; - status = "okay"; - u-boot,dm-pre-reloc; - - spi-flash@0 { - u-boot,dm-pre-reloc; - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p128", "jedec,spi-nor", "spi-flash"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <50000000>; - m25p,fast-read; - }; -}; - -&refclk { - clock-frequency = <20000000>; -}; diff --git a/arch/arm/dts/armada-385-db-88f6820-amc.dts b/arch/arm/dts/armada-385-db-88f6820-amc.dts new file mode 100644 index 00000000000..c9ccbb57fff --- /dev/null +++ b/arch/arm/dts/armada-385-db-88f6820-amc.dts @@ -0,0 +1,166 @@ +/* + * Device Tree file for Marvell Armada 385 development board + * (DB-88F6820-AMC) + * + * Copyright (C) 2014 Marvell + * + * Gregory CLEMENT + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "armada-385.dtsi" +#include + +/ { + model = "Marvell Armada 385 AMC"; + compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + ethernet0 = ð0; + ethernet1 = ð2; + i2c0 = &i2c0; + spi1 = &spi1; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2 GB */ + }; + + soc { + ranges = ; + + internal-regs { + i2c@11000 { + clock-frequency = <100000>; + u-boot,i2c-slave-addr = <0x0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + }; + + serial@12000 { + /* + * Exported on the micro USB connector CON16 + * through an FTDI + */ + + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + ethernet@34000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; + }; + + usb@58000 { + status = "okay"; + }; + + ethernet@70000 { + pinctrl-names = "default"; + /* + * The Reference Clock 0 is used to provide a + * clock to the PHY + */ + pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + + mdio@72004 { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + phy0: ethernet-phy@1 { + reg = <1>; + }; + + phy1: ethernet-phy@0 { + reg = <0>; + }; + }; + + flash@d0000 { + status = "okay"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + }; + }; + + pcie { + status = "okay"; + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + }; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + u-boot,dm-pre-reloc; + + spi-flash@0 { + u-boot,dm-pre-reloc; + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "jedec,spi-nor", "spi-flash"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + m25p,fast-read; + }; +}; + +&refclk { + clock-frequency = <20000000>; +}; diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index dcf2a25395e..e8ba5184c4d 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set # CONFIG_SPL_PARTITION_UUIDS is not set -CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc" +CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_MAX_HZ=y CONFIG_ENV_SPI_MAX_HZ=50000000 -- cgit v1.3.1