From 76316a318de91f6184e7c22a10e02d275ade2441 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 11 Mar 2007 13:42:58 +0100 Subject: [Microblaze][PATCH] timer support interrupt controller support flash support ethernet support cache support board information support env support booting image support adding support for Xilinx ML401 --- cpu/microblaze/cache.c | 48 +++++++++++++ cpu/microblaze/dcache.S | 68 ++++++++++++++++++ cpu/microblaze/disable_int.S | 46 ++++++++++++ cpu/microblaze/enable_int.S | 38 ++++++++++ cpu/microblaze/exception.c | 68 ++++++++++++++++++ cpu/microblaze/icache.S | 69 ++++++++++++++++++ cpu/microblaze/irq.S | 165 +++++++++++++++++++++++++++++++++++++++++++ cpu/microblaze/timer.c | 68 ++++++++++++++++++ 8 files changed, 570 insertions(+) create mode 100644 cpu/microblaze/cache.c create mode 100644 cpu/microblaze/dcache.S create mode 100644 cpu/microblaze/disable_int.S create mode 100644 cpu/microblaze/enable_int.S create mode 100644 cpu/microblaze/exception.c create mode 100644 cpu/microblaze/icache.S create mode 100644 cpu/microblaze/irq.S create mode 100644 cpu/microblaze/timer.c (limited to 'cpu') diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c new file mode 100644 index 00000000000..fc388ebb562 --- /dev/null +++ b/cpu/microblaze/cache.c @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#if (CONFIG_COMMANDS & CFG_CMD_CACHE) + +int dcache_status (void) +{ + int i = 0; + int mask = 0x80; + __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory"); + /* i&=0x80 */ + __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); + return i; +} + +int icache_status (void) +{ + int i = 0; + int mask = 0x20; + __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory"); + /* i&=0x20 */ + __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); + return i; +} +#endif diff --git a/cpu/microblaze/dcache.S b/cpu/microblaze/dcache.S new file mode 100644 index 00000000000..eaf96717ebb --- /dev/null +++ b/cpu/microblaze/dcache.S @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + .text + .globl dcache_enable + .ent dcache_enable + .align 2 +dcache_enable: + /* Make space on stack for a temporary */ + addi r1, r1, -4 + /* Save register r12 */ + swi r12, r1, 0 + /* Read the MSR register */ + mfs r12, rmsr + /* Set the instruction enable bit */ + ori r12, r12, 0x80 + /* Save the MSR register */ + mts rmsr, r12 + /* Load register r12 */ + lwi r12, r1, 0 + /* Return */ + rtsd r15, 8 + /* Update stack in the delay slot */ + addi r1, r1, 4 + .end dcache_enable + + .text + .globl dcache_disable + .ent dcache_disable + .align 2 +dcache_disable: + /* Make space on stack for a temporary */ + addi r1, r1, -4 + /* Save register r12 */ + swi r12, r1, 0 + /* Read the MSR register */ + mfs r12, rmsr + /* Clear the data cache enable bit */ + andi r12, r12, ~0x80 + /* Save the MSR register */ + mts rmsr, r12 + /* Load register r12 */ + lwi r12, r1, 0 + /* Return */ + rtsd r15, 8 + /* Update stack in the delay slot */ + addi r1, r1, 4 + .end dcache_disable diff --git a/cpu/microblaze/disable_int.S b/cpu/microblaze/disable_int.S new file mode 100644 index 00000000000..aecd79513ca --- /dev/null +++ b/cpu/microblaze/disable_int.S @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + .text + .globl microblaze_disable_interrupts + .ent microblaze_disable_interrupts + .align 2 +microblaze_disable_interrupts: + #Make space on stack for a temporary + addi r1, r1, -4 + #Save register r12 + swi r12, r1, 0 + #Read the MSR register + mfs r12, rmsr + #Clear the interrupt enable bit + andi r12, r12, ~2 + #Save the MSR register + mts rmsr, r12 + #Load register r12 + lwi r12, r1, 0 + #Return + rtsd r15, 8 + #Update stack in the delay slot + addi r1, r1, 4 + .end microblaze_disable_interrupts diff --git a/cpu/microblaze/enable_int.S b/cpu/microblaze/enable_int.S new file mode 100644 index 00000000000..c096c6c3c05 --- /dev/null +++ b/cpu/microblaze/enable_int.S @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + .text + .globl microblaze_enable_interrupts + .ent microblaze_enable_interrupts + .align 2 +microblaze_enable_interrupts: + addi r1, r1, -4 + swi r12, r1, 0 + mfs r12, rmsr + ori r12, r12, 2 + mts rmsr, r12 + lwi r12, r1, 0 + rtsd r15, 8 + addi r1, r1, 4 + .end microblaze_enable_interrupts diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c new file mode 100644 index 00000000000..b135acbad9d --- /dev/null +++ b/cpu/microblaze/exception.c @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +void _hw_exception_handler (void) +{ + int address = 0; + int state = 0; + /* loading address of exception EAR */ + __asm__ __volatile ("mfs %0,rear"::"r" (address):"memory"); + /* loading excetpion state register ESR */ + __asm__ __volatile ("mfs %0,resr"::"r" (state):"memory"); + printf ("Hardware exception at 0x%x address\n", address); + switch (state & 0x1f) { /* mask on exception cause */ + case 0x1: + puts ("Unaligned data access exception\n"); + break; + case 0x2: + puts ("Illegal op-code exception\n"); + break; + case 0x3: + puts ("Instruction bus error exception\n"); + break; + case 0x4: + puts ("Data bus error exception\n"); + break; + case 0x5: + puts ("Divide by zero exception\n"); + break; + default: + puts ("Undefined cause\n"); + break; + } + printf ("Unaligned %sword access\n", ((state & 0x800) ? "" : "half")); + printf ("Unaligned %s access\n", ((state & 0x400) ? "store" : "load")); + printf ("Register R%x\n", (state & 0x3E) >> 5); + hang (); +} + +#ifdef CFG_USR_EXCEP +void _exception_handler (void) +{ + puts ("User vector_exception\n"); + hang (); +} +#endif diff --git a/cpu/microblaze/icache.S b/cpu/microblaze/icache.S new file mode 100644 index 00000000000..25940d106e3 --- /dev/null +++ b/cpu/microblaze/icache.S @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + .text + .globl icache_enable + .ent icache_enable + .align 2 +icache_enable: + /* Make space on stack for a temporary */ + addi r1, r1, -4 + /* Save register r12 */ + swi r12, r1, 0 + /* Read the MSR register */ + mfs r12, rmsr + /* Set the instruction enable bit */ + ori r12, r12, 0x20 + /* Save the MSR register */ + mts rmsr, r12 + /* Load register r12 */ + lwi r12, r1, 0 + /* Return */ + rtsd r15, 8 + /* Update stack in the delay slot */ + addi r1, r1, 4 + .end icache_enable + + .text + .globl icache_disable + .ent icache_disable + .align 2 +icache_disable: + /* Make space on stack for a temporary */ + addi r1, r1, -4 + /* Save register r12 */ + swi r12, r1, 0 + /* Read the MSR register */ + mfs r12, rmsr + /* Clear the instruction enable bit */ + andi r12, r12, ~0x20 + /* Save the MSR register */ + mts rmsr, r12 + /* Load register r12 */ + lwi r12, r1, 0 + /* Return */ + rtsd r15, 8 + /* Update stack in the delay slot */ + addi r1, r1, 4 + .end icache_disable diff --git a/cpu/microblaze/irq.S b/cpu/microblaze/irq.S new file mode 100644 index 00000000000..a4e3fbfad67 --- /dev/null +++ b/cpu/microblaze/irq.S @@ -0,0 +1,165 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + .text + .global _interrupt_handler +_interrupt_handler: + addi r1, r1, -4 + swi r2, r1, 0 + addi r1, r1, -4 + swi r3, r1, 0 + addi r1, r1, -4 + swi r4, r1, 0 + addi r1, r1, -4 + swi r5, r1, 0 + addi r1, r1, -4 + swi r6, r1, 0 + addi r1, r1, -4 + swi r7, r1, 0 + addi r1, r1, -4 + swi r8, r1, 0 + addi r1, r1, -4 + swi r9, r1, 0 + addi r1, r1, -4 + swi r10, r1, 0 + addi r1, r1, -4 + swi r11, r1, 0 + addi r1, r1, -4 + swi r12, r1, 0 + addi r1, r1, -4 + swi r13, r1, 0 + addi r1, r1, -4 + swi r14, r1, 0 + addi r1, r1, -4 + swi r15, r1, 0 + addi r1, r1, -4 + swi r16, r1, 0 + addi r1, r1, -4 + swi r17, r1, 0 + addi r1, r1, -4 + swi r18, r1, 0 + addi r1, r1, -4 + swi r19, r1, 0 + addi r1, r1, -4 + swi r20, r1, 0 + addi r1, r1, -4 + swi r21, r1, 0 + addi r1, r1, -4 + swi r22, r1, 0 + addi r1, r1, -4 + swi r23, r1, 0 + addi r1, r1, -4 + swi r24, r1, 0 + addi r1, r1, -4 + swi r25, r1, 0 + addi r1, r1, -4 + swi r26, r1, 0 + addi r1, r1, -4 + swi r27, r1, 0 + addi r1, r1, -4 + swi r28, r1, 0 + addi r1, r1, -4 + swi r29, r1, 0 + addi r1, r1, -4 + swi r30, r1, 0 + addi r1, r1, -4 + swi r31, r1, 0 + brlid r15, interrupt_handler + nop + nop + lwi r31, r1, 0 + addi r1, r1, 4 + lwi r30, r1, 0 + addi r1, r1, 4 + lwi r29, r1, 0 + addi r1, r1, 4 + lwi r28, r1, 0 + addi r1, r1, 4 + lwi r27, r1, 0 + addi r1, r1, 4 + lwi r26, r1, 0 + addi r1, r1, 4 + lwi r25, r1, 0 + addi r1, r1, 4 + lwi r24, r1, 0 + addi r1, r1, 4 + lwi r23, r1, 0 + addi r1, r1, 4 + lwi r22, r1, 0 + addi r1, r1, 4 + lwi r21, r1, 0 + addi r1, r1, 4 + lwi r20, r1, 0 + addi r1, r1, 4 + lwi r19, r1, 0 + addi r1, r1, 4 + lwi r18, r1, 0 + addi r1, r1, 4 + lwi r17, r1, 0 + addi r1, r1, 4 + lwi r16, r1, 0 + addi r1, r1, 4 + lwi r15, r1, 0 + addi r1, r1, 4 + lwi r14, r1, 0 + addi r1, r1, 4 + lwi r13, r1, 0 + addi r1, r1, 4 + lwi r12, r1, 0 + addi r1, r1, 4 + lwi r11, r1, 0 + addi r1, r1, 4 + lwi r10, r1, 0 + addi r1, r1, 4 + lwi r9, r1, 0 + addi r1, r1, 4 + lwi r8, r1, 0 + addi r1, r1, 4 + lwi r7, r1, 0 + addi r1, r1, 4 + lwi r6, r1, 0 + addi r1, r1, 4 + lwi r5, r1, 0 + addi r1, r1, 4 + lwi r4, r1, 0 + addi r1, r1, 4 + lwi r3, r1, 0 + addi r1, r1, 4 + lwi r2, r1, 0 + addi r1, r1, 4 + + /* enable_interrupt */ + addi r1, r1, -4 + swi r12, r1, 0 + mfs r12, rmsr + ori r12, r12, 2 + mts rmsr, r12 + lwi r12, r1, 0 + addi r1, r1, 4 + nop + bra r14 + nop + nop + .size _interrupt_handler,.-_interrupt_handler diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c new file mode 100644 index 00000000000..be4fd57cc49 --- /dev/null +++ b/cpu/microblaze/timer.c @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +volatile int timestamp = 0; + +void reset_timer (void) +{ + timestamp = 0; +} + +ulong get_timer (ulong base) +{ + return (timestamp - base); +} + +void set_timer (ulong t) +{ + timestamp = t; +} + +#ifdef CFG_INTC_0 +#ifdef CFG_TIMER_0 +extern void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, + void *arg); + +microblaze_timer_t *tmr = (microblaze_timer_t *) (CFG_TIMER_0_ADDR); + +void timer_isr (void *arg) +{ + timestamp++; + tmr->control = tmr->control | TIMER_INTERRUPT; +} + +void timer_init (void) +{ + tmr->loadreg = CFG_TIMER_0_PRELOAD; + tmr->control = TIMER_INTERRUPT | TIMER_RESET; + tmr->control = + TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT; + reset_timer (); + install_interrupt_handler (CFG_TIMER_0_IRQ, timer_isr, (void *)tmr); +} +#endif +#endif -- cgit v1.3.1 From cfc67116a706fd18b8f6a9c11a16753c5626d689 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 11 Mar 2007 13:48:24 +0100 Subject: [Microblaze][PATCH] part 2 timer support interrupt controller support flash support ethernet support cache support board information support env support booting image support adding support for Xilinx ML401 --- MAKEALL | 2 +- Makefile | 6 ++ board/AtmarkTechno/suzaku/u-boot.lds | 2 +- board/xilinx/xilinx_enet/emac_adapter.c | 4 + common/cmd_bdinfo.c | 26 +++++ common/env_common.c | 8 ++ cpu/microblaze/Makefile | 3 +- cpu/microblaze/interrupts.c | 182 +++++++++++++++++++++++++++++++- cpu/microblaze/start.S | 62 ++++++++++- lib_microblaze/board.c | 95 ++++++++++++++--- lib_microblaze/microblaze_linux.c | 146 ++++++++++++++++++++++++- lib_microblaze/time.c | 9 +- microblaze_config.mk | 2 +- 13 files changed, 518 insertions(+), 29 deletions(-) (limited to 'cpu') diff --git a/MAKEALL b/MAKEALL index 8431b3ea533..172f3e50a3a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -292,7 +292,7 @@ LIST_nios2=" \ ######################################################################### LIST_microblaze=" \ - suzaku + suzaku ml401 " ######################################################################### diff --git a/Makefile b/Makefile index 358d1817c94..f67eb26f80b 100644 --- a/Makefile +++ b/Makefile @@ -2304,6 +2304,11 @@ suzaku_config: unconfig @echo "#define CONFIG_SUZAKU 1" >> $(obj)include/config.h @$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno +ml401_config: unconfig + @ >include/config.h + @echo "#define CONFIG_ML401 1" >> include/config.h + @./mkconfig -a $(@:_config=) microblaze microblaze ml401 xilinx + ######################################################################### ## Blackfin ######################################################################### @@ -2381,3 +2386,4 @@ backup: gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F ######################################################################### + diff --git a/board/AtmarkTechno/suzaku/u-boot.lds b/board/AtmarkTechno/suzaku/u-boot.lds index 00a8ef7ad9e..93147fc6e96 100644 --- a/board/AtmarkTechno/suzaku/u-boot.lds +++ b/board/AtmarkTechno/suzaku/u-boot.lds @@ -61,6 +61,6 @@ SECTIONS { __bss_start = .; *(.bss) - __bss_start = .; + __bss_end = .; } } diff --git a/board/xilinx/xilinx_enet/emac_adapter.c b/board/xilinx/xilinx_enet/emac_adapter.c index f159cb6e392..de62695e5ec 100644 --- a/board/xilinx/xilinx_enet/emac_adapter.c +++ b/board/xilinx/xilinx_enet/emac_adapter.c @@ -147,7 +147,11 @@ eth_rx(void) RecvFrameLength = PKTSIZE; Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength); if (Result == XST_SUCCESS) { +#ifndef CONFIG_MICROBLAZE NetReceive((uchar *)etherrxbuff, RecvFrameLength); +#else + NetReceive(etherrxbuff, RecvFrameLength); +#endif return (1); } else { return (0); diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 70de795deed..d97c09e88ee 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -180,6 +180,32 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 0; } +#elif defined(CONFIG_MICROBLAZE) /* ! PPC, which leaves Microblaze */ + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i; + bd_t *bd = gd->bd; + print_num ("mem start ", (ulong)bd->bi_memstart); + print_num ("mem size ", (ulong)bd->bi_memsize); + print_num ("flash start ", (ulong)bd->bi_flashstart); + print_num ("flash size ", (ulong)bd->bi_flashsize); + print_num ("flash offset ", (ulong)bd->bi_flashoffset); +#if defined(CFG_SRAM_BASE) + print_num ("sram start ", (ulong)bd->bi_sramstart); + print_num ("sram size ", (ulong)bd->bi_sramsize); +#endif +#if defined(CFG_CMD_NET) + puts ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + puts ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); +#endif + printf ("\nbaudrate = %d bps\n", (ulong)bd->bi_baudrate); + return 0; +} #else /* ! PPC, which leaves MIPS */ diff --git a/common/env_common.c b/common/env_common.c index eb33422af4b..6e193cf0515 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -222,6 +222,14 @@ void env_relocate (void) DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr); #endif +#ifdef CONFIG_MICROBLAZE + /* + * FIXME MALLOC error for Microblaze - error malloc return + * bad value. Correct value is CFG_MONITOR_BASE - CFG_MALLOC_LEN. + */ + env_ptr = (env_t *)CFG_MONITOR_BASE; + DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr); +#endif /* * After relocation to RAM, we can always use the "memory" functions */ diff --git a/cpu/microblaze/Makefile b/cpu/microblaze/Makefile index fd544254f04..db1afa553dd 100644 --- a/cpu/microblaze/Makefile +++ b/cpu/microblaze/Makefile @@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a START = start.o -COBJS = cpu.o interrupts.o +SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o +COBJS = cpu.o interrupts.o cache.o exception.o timer.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c index ccf67e17211..37ed16dfe15 100644 --- a/cpu/microblaze/interrupts.c +++ b/cpu/microblaze/interrupts.c @@ -1,6 +1,8 @@ /* + * (C) Copyright 2007 Michal Simek * (C) Copyright 2004 Atmark Techno, Inc. * + * Michal SIMEK * Yasushi SHOJI * * See file CREDITS for list of people who contributed to this @@ -13,7 +15,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -22,11 +24,185 @@ * MA 02111-1307 USA */ -void enable_interrupts(void) +#include +#include +#include + +#undef DEBUG_INT + +extern void microblaze_disable_interrupts (void); +extern void microblaze_enable_interrupts (void); + +void enable_interrupts (void) { + microblaze_enable_interrupts (); } -int disable_interrupts(void) +int disable_interrupts (void) { + microblaze_disable_interrupts (); return 0; } + +#ifdef CFG_INTC_0 +#ifdef CFG_TIMER_0 +extern void timer_init (void); +#endif + +static struct irq_action vecs[CFG_INTC_0_NUM]; + +/* mapping structure to interrupt controller */ +microblaze_intc_t *intc = (microblaze_intc_t *) (CFG_INTC_0_ADDR); + +/* default handler */ +void def_hdlr (void) +{ + puts ("def_hdlr\n"); +} + +void enable_one_interrupt (int irq) +{ + int mask; + int offset = 1; + offset <<= irq; + mask = intc->ier; + intc->ier = (mask | offset); +#ifdef DEBUG_INT + printf ("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, + intc->ier); + printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); +#endif +} + +void disable_one_interrupt (int irq) +{ + int mask; + int offset = 1; + offset <<= irq; + mask = intc->ier; + intc->ier = (mask & ~offset); +#ifdef DEBUG_INT + printf ("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, + intc->ier); + printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); +#endif +} + +/* adding new handler for interrupt */ +void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg) +{ + struct irq_action *act; + /* irq out of range */ + if ((irq < 0) || (irq > CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS)) { + puts ("IRQ out of range\n"); + return; + } + act = &vecs[irq]; + if (hdlr) { /* enable */ + act->handler = hdlr; + act->arg = arg; + act->count = 0; + enable_one_interrupt (irq); + } else { /* disable */ + + act->handler = (interrupt_handler_t *) def_hdlr; + act->arg = (void *)irq; + disable_one_interrupt (irq); + } +} + +/* initialization interrupt controller - hardware */ +void intc_init (void) +{ + intc->mer = 0; + intc->ier = 0; + intc->iar = 0xFFFFFFFF; + /* XIntc_Start - hw_interrupt enable and all interrupt enable */ + intc->mer = 0x3; +#ifdef DEBUG_INT + printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); +#endif +} + +int interrupts_init (void) +{ + int i; + /* initialize irq list */ + for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) { + vecs[i].handler = (interrupt_handler_t *) def_hdlr; + vecs[i].arg = (void *)i; + vecs[i].count = 0; + } + /* initialize intc controller */ + intc_init (); +#ifdef CFG_TIMER_0 + timer_init (); +#endif + enable_interrupts (); + return 0; +} + +void interrupt_handler (void) +{ + int irqs; + irqs = (intc->isr & intc->ier); /* find active interrupt */ + +#ifdef DEBUG_INT + printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, + intc->iar, intc->mer); + printf ("Interrupt handler on %x line, r14 %x\n", irqs, value); +#endif + struct irq_action *act = vecs; + while (irqs) { + if (irqs & 1) { +#ifdef DEBUG_INT + printf + ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", + act->handler, act->count, act->arg); +#endif + act->handler (act->arg); + act->count++; + } + irqs >>= 1; + act++; + } + intc->iar = 0xFFFFFFFF; /* erase all events */ +#ifdef DEBUG + printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, + intc->ier, intc->iar, intc->mer); + printf ("Interrupt handler on %x line, r14\n", irqs); +#endif +} +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_IRQ) +#ifdef CFG_INTC_0 +int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + int i; + struct irq_action *act = vecs; + + puts ("\nInterrupt-Information:\n\n" + "Nr Routine Arg Count\n" + "-----------------------------\n"); + + for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) { + if (act->handler != (interrupt_handler_t*) def_hdlr) { + printf ("%02d %08lx %08lx %d\n", i, + (int)act->handler, (int)act->arg, act->count); + } + act++; + } + puts ("\n"); + return (0); +} +#else +int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + puts ("Undefined interrupt controller\n"); +} +#endif +#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */ diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 7efdbb0970c..bce32978fdd 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -1,6 +1,8 @@ /* + * (C) Copyright 2007 Michal Simek * (C) Copyright 2004 Atmark Techno, Inc. * + * Michal SIMEK * Yasushi SHOJI * * See file CREDITS for list of people who contributed to this @@ -13,7 +15,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -27,10 +29,62 @@ .text .global _start _start: + mts rmsr, r0 /* disable cache */ + addi r1, r0, CFG_INIT_SP_OFFSET + /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ + addi r6, r0, 0xb000 /* hex b000 opcode imm */ + bslli r6, r6, 16 /* shift */ + swi r6, r0, 0x0 /* reset address */ + swi r6, r0, 0x8 /* user vector exception */ + swi r6, r0, 0x10 /* interrupt */ + swi r6, r0, 0x20 /* hardware exception */ - addi r1, r0, CFG_SDRAM_BASE /* init stack pointer */ - addi r1, r1, CFG_SDRAM_SIZE /* set sp to high up */ + addi r6, r0, 0xb808 /* hew b808 opcode brai*/ + bslli r6, r6, 16 + swi r6, r0, 0x4 /* reset address */ + swi r6, r0, 0xC /* user vector exception */ + swi r6, r0, 0x14 /* interrupt */ + swi r6, r0, 0x24 /* hardware exception */ - brai board_init +#ifdef CFG_RESET_ADDRESS + /* reset address */ + addik r6, r0, CFG_RESET_ADDRESS + sw r6, r1, r0 + lhu r7, r1, r0 + shi r7, r0, 0x2 + shi r6, r0, 0x6 +#endif + +#ifdef CFG_USR_EXCEP + /* user_vector_exception */ + addik r6, r0, _exception_handler + sw r6, r1, r0 + lhu r7, r1, r0 + shi r7, r0, 0xa + shi r6, r0, 0xe +#endif + +#ifdef CFG_INTC_0 + /* interrupt_handler */ + addik r6, r0, _interrupt_handler + sw r6, r1, r0 + lhu r7, r1, r0 + shi r7, r0, 0x12 + shi r6, r0, 0x16 +#endif + /* hardware exception */ + addik r6, r0, _hw_exception_handler + sw r6, r1, r0 + lhu r7, r1, r0 + shi r7, r0, 0x22 + shi r6, r0, 0x26 + + /* enable instruction and data cache */ + mfs r12, rmsr + ori r12, r12, 0xa0 + mts rmsr, r12 + + /* jumping to board_init */ + brai board_init 1: bri 1b diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c index 026d247e54a..273d9c441f7 100644 --- a/lib_microblaze/board.c +++ b/lib_microblaze/board.c @@ -1,6 +1,8 @@ /* + * (C) Copyright 2007 Michal Simek * (C) Copyright 2004 Atmark Techno, Inc. * + * Michal SIMEK * Yasushi SHOJI * * See file CREDITS for list of people who contributed to this @@ -13,7 +15,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -30,8 +32,18 @@ DECLARE_GLOBAL_DATA_PTR; -const char version_string[] = - U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"; +const char version_string[] = U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ")"; + +#ifdef CFG_GPIO_0 +extern int gpio_init (void); +#endif +#ifdef CFG_INTC_0 +extern int interrupts_init (void); +#endif +#if (CONFIG_COMMANDS & CFG_CMD_NET) +extern int eth_init (bd_t * bis); +extern int getenv_IPaddr (char *); +#endif /* * Begin and End of memory area for malloc(), and current "brk" @@ -40,6 +52,18 @@ static ulong mem_malloc_start; static ulong mem_malloc_end; static ulong mem_malloc_brk; +/* + * The Malloc area is immediately below the monitor copy in DRAM + * aka CFG_MONITOR_BASE - Note there is no need for reloc_off + * as our monitory code is run from SDRAM + */ +static void mem_malloc_init (void) +{ + mem_malloc_end = CFG_MONITOR_BASE + CFG_MONITOR_LEN; + mem_malloc_start = CFG_MONITOR_BASE; + mem_malloc_brk = mem_malloc_start; + memset ((void *)mem_malloc_start, 0, mem_malloc_end - mem_malloc_start); +} void *sbrk (ptrdiff_t increment) { @@ -50,7 +74,7 @@ void *sbrk (ptrdiff_t increment) return (NULL); } mem_malloc_brk = new; - return ((void *) old); + return ((void *)old); } /* @@ -68,24 +92,36 @@ void *sbrk (ptrdiff_t increment) typedef int (init_fnc_t) (void); init_fnc_t *init_sequence[] = { - serial_init, /* serial communications setup */ + env_init, + serial_init, +#ifdef CFG_GPIO_0 + gpio_init, +#endif +#ifdef CFG_INTC_0 + interrupts_init, +#endif NULL, }; -void board_init(void) +void board_init (void) { bd_t *bd; init_fnc_t **init_fnc_ptr; - - /* Pointer is writable since we allocated a register for it. */ - gd = (gd_t *)CFG_GBL_DATA_OFFSET; - memset((void *)gd, 0, CFG_GBL_DATA_SIZE); - - gd->bd = (bd_t *)(gd+1); /* At end of global data */ + gd = (gd_t *) CFG_GBL_DATA_OFFSET; +#if (CONFIG_COMMANDS & CFG_CMD_FLASH) + ulong flash_size = 0; +#endif + asm ("nop"); /* FIXME gd is not initialize - wait */ + memset ((void *)gd, 0, CFG_GBL_DATA_SIZE); + gd->bd = (bd_t *) (gd + 1); /* At end of global data */ gd->baudrate = CONFIG_BAUDRATE; - bd = gd->bd; bd->bi_baudrate = CONFIG_BAUDRATE; + bd->bi_memstart = CFG_SDRAM_BASE; + bd->bi_memsize = CFG_SDRAM_SIZE; + + /* Initialise malloc() area */ + mem_malloc_init (); for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { WATCHDOG_RESET (); @@ -94,6 +130,37 @@ void board_init(void) } } +#if (CONFIG_COMMANDS & CFG_CMD_FLASH) + bd->bi_flashstart = CFG_FLASH_BASE; + if (0 < (flash_size = flash_init ())) { + bd->bi_flashsize = flash_size; + bd->bi_flashoffset = CFG_FLASH_BASE + flash_size; + } else { + puts ("Flash init FAILED"); + bd->bi_flashstart = 0; + bd->bi_flashsize = 0; + bd->bi_flashoffset = 0; + } +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_NET) + char *s, *e; + int i; + /* board MAC address */ + s = getenv ("ethaddr"); + for (i = 0; i < 6; ++i) { + bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; + if (s) + s = (*e) ? e + 1 : e; + } + /* IP Address */ + bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); + eth_init (bd); +#endif + + /* relocate environment function pointers etc. */ + env_relocate (); + /* main_loop */ for (;;) { WATCHDOG_RESET (); @@ -104,5 +171,5 @@ void board_init(void) void hang (void) { puts ("### ERROR ### Please RESET the board ###\n"); - for (;;); + for (;;) ; } diff --git a/lib_microblaze/microblaze_linux.c b/lib_microblaze/microblaze_linux.c index b3a08155106..2c7885c1f11 100644 --- a/lib_microblaze/microblaze_linux.c +++ b/lib_microblaze/microblaze_linux.c @@ -1,6 +1,8 @@ /* + * (C) Copyright 2007 Michal Simek * (C) Copyright 2004 Atmark Techno, Inc. * + * Michal SIMEK * Yasushi SHOJI * * See file CREDITS for list of people who contributed to this @@ -13,7 +15,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -24,8 +26,146 @@ #include #include +#include +#include +#include -void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[], - ulong addr, ulong *len_ptr, int verify) +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SHOW_BOOT_PROGRESS +# include +# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) +#else +# define SHOW_BOOT_PROGRESS(arg) +#endif + +extern image_header_t header; /* from cmd_bootm.c */ +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]); + +void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[], + ulong addr, ulong * len_ptr, int verify) { + ulong len = 0, checksum; + ulong initrd_start, initrd_end; + ulong data; + /* First parameter is mapped to $r5 for kernel boot args */ + void (*theKernel) (char *); + image_header_t *hdr = &header; + char *commandline = getenv ("bootargs"); + int i; + + theKernel = (void (*)(char *))ntohl (hdr->ih_ep); + + /* Check if there is an initrd image */ + if (argc >= 3) { + SHOW_BOOT_PROGRESS (9); + + addr = simple_strtoul (argv[2], NULL, 16); + + printf ("## Loading Ramdisk Image at %08lx ...\n", addr); + + /* Copy header so we can blank CRC field for re-calculation */ + memcpy (&header, (char *)addr, sizeof (image_header_t)); + + if (ntohl (hdr->ih_magic) != IH_MAGIC) { + printf ("Bad Magic Number\n"); + SHOW_BOOT_PROGRESS (-10); + do_reset (cmdtp, flag, argc, argv); + } + + data = (ulong) & header; + len = sizeof (image_header_t); + + checksum = ntohl (hdr->ih_hcrc); + hdr->ih_hcrc = 0; + + if (crc32 (0, (char *)data, len) != checksum) { + printf ("Bad Header Checksum\n"); + SHOW_BOOT_PROGRESS (-11); + do_reset (cmdtp, flag, argc, argv); + } + + SHOW_BOOT_PROGRESS (10); + + print_image_hdr (hdr); + + data = addr + sizeof (image_header_t); + len = ntohl (hdr->ih_size); + + if (verify) { + ulong csum = 0; + + printf (" Verifying Checksum ... "); + csum = crc32 (0, (char *)data, len); + if (csum != ntohl (hdr->ih_dcrc)) { + printf ("Bad Data CRC\n"); + SHOW_BOOT_PROGRESS (-12); + do_reset (cmdtp, flag, argc, argv); + } + printf ("OK\n"); + } + + SHOW_BOOT_PROGRESS (11); + + if ((hdr->ih_os != IH_OS_LINUX) || + (hdr->ih_arch != IH_CPU_MICROBLAZE) || + (hdr->ih_type != IH_TYPE_RAMDISK)) { + printf ("No Linux Microblaze Ramdisk Image\n"); + SHOW_BOOT_PROGRESS (-13); + do_reset (cmdtp, flag, argc, argv); + } + + /* + * Now check if we have a multifile image + */ + } else if ((hdr->ih_type == IH_TYPE_MULTI) && (len_ptr[1])) { + ulong tail = ntohl (len_ptr[0]) % 4; + + SHOW_BOOT_PROGRESS (13); + + /* skip kernel length and terminator */ + data = (ulong) (&len_ptr[2]); + /* skip any additional image length fields */ + for (i = 1; len_ptr[i]; ++i) + data += 4; + /* add kernel length, and align */ + data += ntohl (len_ptr[0]); + if (tail) { + data += 4 - tail; + } + + len = ntohl (len_ptr[1]); + + } else { + /* + * no initrd image + */ + SHOW_BOOT_PROGRESS (14); + + data = 0; + } + +#ifdef DEBUG + if (!data) { + printf ("No initrd\n"); + } +#endif + + if (data) { + initrd_start = data; + initrd_end = initrd_start + len; + } else { + initrd_start = 0; + initrd_end = 0; + } + + SHOW_BOOT_PROGRESS (15); + +#ifdef DEBUG + printf ("## Transferring control to Linux (at address %08lx) ...\n", + (ulong) theKernel); +#endif + + theKernel (commandline); } diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c index 12e84888bd5..3fa1b112627 100644 --- a/lib_microblaze/time.c +++ b/lib_microblaze/time.c @@ -1,6 +1,8 @@ /* + * (C) Copyright 2007 Michal Simek * (C) Copyright 2004 Atmark Techno, Inc. * + * Michal SIMEK * Yasushi SHOJI * * See file CREDITS for list of people who contributed to this @@ -22,6 +24,11 @@ * MA 02111-1307 USA */ -void udelay(unsigned long usec) +#include + +void udelay (unsigned long usec) { + int i; + i = get_timer (0); + while ((get_timer (0) - i) < (usec / 1000)) ; } diff --git a/microblaze_config.mk b/microblaze_config.mk index b3ac8e08cfc..06ddefa4cee 100644 --- a/microblaze_config.mk +++ b/microblaze_config.mk @@ -22,7 +22,7 @@ # MA 02111-1307 USA # -PLATFORM_CPPFLAGS += -ffixed-r31 +PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__ ifdef CONFIG_MICROBLAZE_HARD_MULT PLATFORM_CPPFLAGS += -mno-xl-soft-mul -- cgit v1.3.1 From 1798049522f594013aea29457d46794298c6ae15 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 26 Mar 2007 01:39:07 +0200 Subject: Support for XUPV2P board Reset support BSP autoconfig support --- CREDITS | 5 + MAINTAINERS | 5 + MAKEALL | 2 +- Makefile | 5 + board/AtmarkTechno/suzaku/u-boot.lds | 1 + board/xilinx/ml401/config.mk | 27 ++--- board/xilinx/ml401/u-boot.lds | 1 + board/xilinx/ml401/xparameters.h | 104 +++++++++---------- board/xilinx/xilinx_enet/emac_adapter.c | 2 +- board/xilinx/xupv2p/Makefile | 65 ++++++++++++ board/xilinx/xupv2p/config.mk | 14 +++ board/xilinx/xupv2p/u-boot.lds | 67 ++++++++++++ board/xilinx/xupv2p/xparameters.h | 46 +++++++++ board/xilinx/xupv2p/xupv2p.c | 49 +++++++++ common/env_common.c | 8 -- cpu/microblaze/interrupts.c | 6 +- cpu/microblaze/start.S | 31 +++++- include/configs/ml401.h | 41 +++++--- include/configs/suzaku.h | 3 +- include/configs/xupv2p.h | 174 ++++++++++++++++++++++++++++++++ lib_microblaze/board.c | 4 +- 21 files changed, 550 insertions(+), 110 deletions(-) create mode 100644 board/xilinx/xupv2p/Makefile create mode 100644 board/xilinx/xupv2p/config.mk create mode 100644 board/xilinx/xupv2p/u-boot.lds create mode 100644 board/xilinx/xupv2p/xparameters.h create mode 100644 board/xilinx/xupv2p/xupv2p.c create mode 100644 include/configs/xupv2p.h (limited to 'cpu') diff --git a/CREDITS b/CREDITS index 802158879f2..f896e7c7dc4 100644 --- a/CREDITS +++ b/CREDITS @@ -470,3 +470,8 @@ N: Timur Tabi E: timur@freescale.com D: Support for MPC8349E-mITX W: www.freescale.com + +N: Michal Simek +E: monstr@monstr.eu +D: Support for Microblaze, ML401, XUPV2P board +W: www.monstr.eu diff --git a/MAINTAINERS b/MAINTAINERS index 1d0a8dfdb31..965f64626ff 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -562,6 +562,11 @@ Yasushi Shoji SUZAKU MicroBlaze +Michal Simek + + ML401 MicroBlaze + XUPV2P MicroBlaze + ######################################################################### # Coldfire Systems: # # # diff --git a/MAKEALL b/MAKEALL index 172f3e50a3a..36efa40f92a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -292,7 +292,7 @@ LIST_nios2=" \ ######################################################################### LIST_microblaze=" \ - suzaku ml401 + suzaku ml401 xupv2p " ######################################################################### diff --git a/Makefile b/Makefile index f67eb26f80b..db7b04070e4 100644 --- a/Makefile +++ b/Makefile @@ -2309,6 +2309,11 @@ ml401_config: unconfig @echo "#define CONFIG_ML401 1" >> include/config.h @./mkconfig -a $(@:_config=) microblaze microblaze ml401 xilinx +xupv2p_config: unconfig + @ >include/config.h + @echo "#define CONFIG_XUPV2P 1" >> include/config.h + @./mkconfig -a $(@:_config=) microblaze microblaze xupv2p xilinx + ######################################################################### ## Blackfin ######################################################################### diff --git a/board/AtmarkTechno/suzaku/u-boot.lds b/board/AtmarkTechno/suzaku/u-boot.lds index 93147fc6e96..cb90854a392 100644 --- a/board/AtmarkTechno/suzaku/u-boot.lds +++ b/board/AtmarkTechno/suzaku/u-boot.lds @@ -63,4 +63,5 @@ SECTIONS *(.bss) __bss_end = .; } + __end = . ; } diff --git a/board/xilinx/ml401/config.mk b/board/xilinx/ml401/config.mk index 48f792a14f9..07c9c4fc623 100644 --- a/board/xilinx/ml401/config.mk +++ b/board/xilinx/ml401/config.mk @@ -1,26 +1,11 @@ +#********************************************************************* # -# (C) Copyright 2004 Atmark Techno, Inc. -# -# Yasushi SHOJI -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA +# CAUTION: This file is automatically generated by libgen. +# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 +# Description: U-BOOT Configuration File +# Michal Simek - monstr@monstr.eu # +#********************************************************************** TEXT_BASE = 0x12000000 diff --git a/board/xilinx/ml401/u-boot.lds b/board/xilinx/ml401/u-boot.lds index 93147fc6e96..cb90854a392 100644 --- a/board/xilinx/ml401/u-boot.lds +++ b/board/xilinx/ml401/u-boot.lds @@ -63,4 +63,5 @@ SECTIONS *(.bss) __bss_end = .; } + __end = . ; } diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h index 8ec2864cb35..10ffd98ab01 100644 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/ml401/xparameters.h @@ -1,56 +1,48 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* DDR SDRAM */ -#define CONFIG_XILINX_ERAM_START 0x10000000 -#define CONFIG_XILINX_ERAM_SIZE 0x04000000 - -/* FLASH_MEMORY Settings */ -#define CONFIG_XILINX_FLASH_START 0x28000000 -#define CONFIG_XILINX_FLASH_SIZE 0x00800000 - -/* serial line */ -#define CONFIG_XILINX_UARTLITE_0_BASEADDR 0xA0000000 -#define CONFIG_XILINX_UARTLITE_0_BAUDRATE 115200 - -/* GPIO */ -#define CONFIG_XILINX_GPIO_0_BASEADDR 0x90000000 - -/* INTC */ -#define CONFIG_XILINX_INTC_0_BASEADDR 0xD1000FC0 -#define CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS 12 - -/* TIMER */ -#define CONFIG_XILINX_TIMER_0_BASEADDR 0xA2000000 -#define CONFIG_XILINX_TIMER_0_IRQ 0 - -/* ethernet */ -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_EMAC_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 +/********************************************************************* +# +# CAUTION: This file is automatically generated by libgen. +# Version: Xilinx EDK 6.3 EDK_Gmm.12.3 +# Description: U-BOOT Configuration File +# Michal Simek - monstr@monstr.eu +# +**********************************************************************/ + +/* System Clock Frequency */ +#define XILINX_CLOCK_FREQ 66666667 + +/* Interrupt controller is intc_0 */ +#define XILINX_INTC_BASEADDR 0xd1000fc0 +#define XILINX_INTC_NUM_INTR_INPUTS 12 + +/* Timer pheriphery is opb_timer_0 */ +#define XILINX_TIMER_BASEADDR 0xa2000000 +#define XILINX_TIMER_IRQ 0 + +/* Uart pheriphery is console_uart */ +#define XILINX_UART_BASEADDR 0xa0000000 +#define XILINX_UART_BAUDRATE 115200 + +/* GPIO is opb_gpio_0*/ +#define XILINX_GPIO_BASEADDR 0x90000000 + +/* Flash Memory is opb_emc_0 */ +#define XILINX_FLASH_START 0x28000000 +#define XILINX_FLASH_SIZE 0x00800000 + +/* Main Memory is plb_ddr_0 */ +#define XILINX_RAM_START 0x10000000 +#define XILINX_RAM_SIZE 0x10000000 + +/* Sysace Controller is opb_sysace_0 */ +#define XILINX_SYSACE_BASEADDR 0xCF000000 +#define XILINX_SYSACE_HIGHADDR 0xCF0001FF +#define XILINX_SYSACE_MEM_WIDTH 16 + +/* Ethernet controller is opb_ethernet_0 */ +#define XPAR_XEMAC_NUM_INSTANCES 1 +#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 +#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF +#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 +#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 +#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 diff --git a/board/xilinx/xilinx_enet/emac_adapter.c b/board/xilinx/xilinx_enet/emac_adapter.c index de62695e5ec..5a7e59e6340 100644 --- a/board/xilinx/xilinx_enet/emac_adapter.c +++ b/board/xilinx/xilinx_enet/emac_adapter.c @@ -147,7 +147,7 @@ eth_rx(void) RecvFrameLength = PKTSIZE; Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength); if (Result == XST_SUCCESS) { -#ifndef CONFIG_MICROBLAZE +#ifndef CONFIG_EMACLITE NetReceive((uchar *)etherrxbuff, RecvFrameLength); #else NetReceive(etherrxbuff, RecvFrameLength); diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile new file mode 100644 index 00000000000..9ab5633626e --- /dev/null +++ b/board/xilinx/xupv2p/Makefile @@ -0,0 +1,65 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +$(shell mkdir -p $(obj)../xilinx_enet) +endif + +INCS := -I../common -I../xilinx_enet +CFLAGS += $(INCS) +HOST_CFLAGS += $(INCS) + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o \ + ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ + ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ + ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ + ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ + ../common/xbasic_types.o ../common/xdma_channel.o \ + ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ + ../common/xversion.o \ + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk new file mode 100644 index 00000000000..94c13c8904c --- /dev/null +++ b/board/xilinx/xupv2p/config.mk @@ -0,0 +1,14 @@ +#********************************************************************* +# +# CAUTION: This file is automatically generated by libgen. +# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 +# Description: U-BOOT Configuration File +# Michal Simek - monstr@monstr.eu +# +#********************************************************************** + +TEXT_BASE = 0x38000000 + +PLATFORM_CPPFLAGS += -mno-xl-soft-mul +PLATFORM_CPPFLAGS += -mno-xl-soft-div +PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/xupv2p/u-boot.lds b/board/xilinx/xupv2p/u-boot.lds new file mode 100644 index 00000000000..cb90854a392 --- /dev/null +++ b/board/xilinx/xupv2p/u-boot.lds @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2004 Atmark Techno, Inc. + * + * Yasushi SHOJI + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(microblaze) +ENTRY(_start) + +SECTIONS +{ + .text ALIGN(0x4): + { + __text_start = .; + cpu/microblaze/start.o (.text) + *(.text) + __text_end = .; + } + + .rodata ALIGN(0x4): + { + __rodata_start = .; + *(.rodata) + __rodata_end = .; + } + + .data ALIGN(0x4): + { + __data_start = .; + *(.data) + __data_end = .; + } + + .u_boot_cmd ALIGN(0x4): + { + . = .; + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + .bss ALIGN(0x4): + { + __bss_start = .; + *(.bss) + __bss_end = .; + } + __end = . ; +} diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h new file mode 100644 index 00000000000..fc7d6e7e856 --- /dev/null +++ b/board/xilinx/xupv2p/xparameters.h @@ -0,0 +1,46 @@ +/********************************************************************* +# +# CAUTION: This file is automatically generated by libgen. +# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 +# Description: U-BOOT Configuration File +# Michal Simek - monstr@monstr.eu +# +**********************************************************************/ + +/* System Clock Frequency */ +#define XILINX_CLOCK_FREQ 100000000 + +/* Interrupt controller is opb_intc_0 */ +#define XILINX_INTC_BASEADDR 0x41200000 +#define XILINX_INTC_NUM_INTR_INPUTS 11 + +/* Timer pheriphery is opb_timer_1 */ +#define XILINX_TIMER_BASEADDR 0x41c00000 +#define XILINX_TIMER_IRQ 1 + +/* Uart pheriphery is RS232_Uart_1 */ +#define XILINX_UART_BASEADDR 0x40600000 +#define XILINX_UART_BAUDRATE 115200 + +/* GPIO is LEDs_4Bit*/ +#define XILINX_GPIO_BASEADDR 0x40000000 + +/* FLASH doesn't exist none */ + +/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */ +#define XILINX_RAM_START 0x30000000 +#define XILINX_RAM_SIZE 0x10000000 + +/* Sysace Controller is SysACE_CompactFlash */ +#define XILINX_SYSACE_BASEADDR 0x41800000 +#define XILINX_SYSACE_HIGHADDR 0x4180ffff +#define XILINX_SYSACE_MEM_WIDTH 16 + +/* Ethernet controller is Ethernet_MAC */ +#define XPAR_XEMAC_NUM_INSTANCES 1 +#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 +#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff +#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 +#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 +#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 diff --git a/board/xilinx/xupv2p/xupv2p.c b/board/xilinx/xupv2p/xupv2p.c new file mode 100644 index 00000000000..a341ac25844 --- /dev/null +++ b/board/xilinx/xupv2p/xupv2p.c @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* This is a board specific file. It's OK to include board specific + * header files */ + +#include +#include + +void do_reset (void) +{ +#ifdef CFG_GPIO_0 + *((unsigned long *)(CFG_GPIO_0_ADDR)) = + ++(*((unsigned long *)(CFG_GPIO_0_ADDR))); +#endif +#ifdef CFG_RESET_ADDRESS + puts ("Reseting board\n"); + asm ("bra r0"); +#endif +} + +int gpio_init (void) +{ +#ifdef CFG_GPIO_0 + *((unsigned long *)(CFG_GPIO_0_ADDR)) = 0x0; +#endif + return 0; +} diff --git a/common/env_common.c b/common/env_common.c index 6e193cf0515..eb33422af4b 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -222,14 +222,6 @@ void env_relocate (void) DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr); #endif -#ifdef CONFIG_MICROBLAZE - /* - * FIXME MALLOC error for Microblaze - error malloc return - * bad value. Correct value is CFG_MONITOR_BASE - CFG_MALLOC_LEN. - */ - env_ptr = (env_t *)CFG_MONITOR_BASE; - DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr); -#endif /* * After relocation to RAM, we can always use the "memory" functions */ diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c index 37ed16dfe15..2db847cd02c 100644 --- a/cpu/microblaze/interrupts.c +++ b/cpu/microblaze/interrupts.c @@ -95,7 +95,7 @@ void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg) { struct irq_action *act; /* irq out of range */ - if ((irq < 0) || (irq > CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS)) { + if ((irq < 0) || (irq > CFG_INTC_0_NUM)) { puts ("IRQ out of range\n"); return; } @@ -131,7 +131,7 @@ int interrupts_init (void) { int i; /* initialize irq list */ - for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) { + for (i = 0; i < CFG_INTC_0_NUM; i++) { vecs[i].handler = (interrupt_handler_t *) def_hdlr; vecs[i].arg = (void *)i; vecs[i].count = 0; @@ -189,7 +189,7 @@ int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) "Nr Routine Arg Count\n" "-----------------------------\n"); - for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) { + for (i = 0; i < CFG_INTC_0_NUM; i++) { if (act->handler != (interrupt_handler_t*) def_hdlr) { printf ("%02d %08lx %08lx %d\n", i, (int)act->handler, (int)act->arg, act->count); diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index bce32978fdd..29481af9ae9 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -31,6 +31,7 @@ _start: mts rmsr, r0 /* disable cache */ addi r1, r0, CFG_INIT_SP_OFFSET + addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ addi r6, r0, 0xb000 /* hex b000 opcode imm */ bslli r6, r6, 16 /* shift */ @@ -53,6 +54,23 @@ _start: lhu r7, r1, r0 shi r7, r0, 0x2 shi r6, r0, 0x6 +/* + * Copy U-Boot code to TEXT_BASE + * solve problem with sbrk_base + */ +#if (CFG_RESET_ADDRESS != TEXT_BASE) + addi r4, r0, __end + addi r5, r0, __text_start + rsub r4, r5, r4 /* size = __end - __text_start */ + addi r6, r0, CFG_RESET_ADDRESS /* source address */ + addi r7, r0, 0 /* counter */ +4: + lw r8, r6, r7 + sw r8, r5, r7 + addi r7, r7, 0x4 + cmp r8, r4, r7 + blti r8, 4b +#endif #endif #ifdef CFG_USR_EXCEP @@ -85,6 +103,17 @@ _start: ori r12, r12, 0xa0 mts rmsr, r12 - /* jumping to board_init */ +clear_bss: + /* clear BSS segments */ + addi r5, r0, __bss_start + addi r4, r0, __bss_end + cmp r6, r5, r4 + beqi r6, 3f +2: + swi r0, r5, 0 /* write zero to loc */ + addi r5, r5, 4 /* increment to next loc */ + cmp r6, r5, r4 /* check if we have reach the end */ + bnei r6, 2b +3: /* jumping to board_init */ brai board_init 1: bri 1b diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 4dc2afc63dd..f4a8a1f2285 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -31,27 +31,31 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define CONFIG_SERIAL_BASE CONFIG_XILINX_UARTLITE_0_BASEADDR -#define CONFIG_BAUDRATE CONFIG_XILINX_UARTLITE_0_BAUDRATE +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } /* setting reset address */ #define CFG_RESET_ADDRESS TEXT_BASE +/* ethernet */ +#define CONFIG_EMACLITE 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES + /* gpio */ #define CFG_GPIO_0 1 -#define CFG_GPIO_0_ADDR CONFIG_XILINX_GPIO_0_BASEADDR +#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR /* interrupt controller */ #define CFG_INTC_0 1 -#define CFG_INTC_0_ADDR CONFIG_XILINX_INTC_0_BASEADDR -#define CFG_INTC_0_NUM CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS +#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR +#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS /* timer */ #define CFG_TIMER_0 1 -#define CFG_TIMER_0_ADDR CONFIG_XILINX_TIMER_0_BASEADDR -#define CFG_TIMER_0_IRQ CONFIG_XILINX_TIMER_0_IRQ -#define FREQUENCE 66666666 +#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR +#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ +#define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) /* @@ -62,6 +66,7 @@ * * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 + * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 * * 0x1000_0000 CFG_SDRAM_BASE * FREE @@ -71,16 +76,18 @@ * FREE * * STACK + * 0x13F7_F000 CFG_MALLOC_BASE + * MALLOC_AREA 256kB Alloc * 0x11FB_F000 CFG_MONITOR_BASE - * MONITOR_CODE + * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ /* ddr sdram - main memory */ -#define CFG_SDRAM_BASE CONFIG_XILINX_ERAM_START -#define CFG_SDRAM_SIZE CONFIG_XILINX_ERAM_SIZE +#define CFG_SDRAM_BASE XILINX_RAM_START +#define CFG_SDRAM_SIZE XILINX_RAM_SIZE #define CFG_MEMTEST_START CFG_SDRAM_BASE #define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) @@ -92,7 +99,9 @@ #define SIZE 0x40000 #define CFG_MONITOR_LEN SIZE #define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) +#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_MALLOC_LEN SIZE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) /* stack */ #define CFG_INIT_SP_OFFSET CFG_MONITOR_BASE @@ -101,8 +110,8 @@ #define FLASH #ifdef FLASH - #define CFG_FLASH_BASE CONFIG_XILINX_FLASH_START - #define CFG_FLASH_SIZE CONFIG_XILINX_FLASH_SIZE + #define CFG_FLASH_BASE XILINX_FLASH_START + #define CFG_FLASH_SIZE XILINX_FLASH_SIZE #define CFG_FLASH_CFI 1 #define CFG_FLASH_CFI_DRIVER 1 #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */ @@ -214,8 +223,8 @@ /* system ace */ /*#define CONFIG_SYSTEMACE #define DEBUG_SYSTEMACE -#define CFG_SYSTEMACE_BASE 0xCF000000 -#define CFG_SYSTEMACE_WIDTH 8 +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION */ #endif /* __CONFIG_H */ diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 1ee6be174fe..be19269180b 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -44,8 +44,9 @@ #define CFG_FLASH_SIZE 0x00400000 #define CFG_RESET_ADDRESS 0xfff00100 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CFG_MONITOR_BASE (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024)) +#define CFG_MONITOR_BASE (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (1024 * 1024)) #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h new file mode 100644 index 00000000000..224db5c8be1 --- /dev/null +++ b/include/configs/xupv2p.h @@ -0,0 +1,174 @@ +/* + * (C) Copyright 2007 Czech Technical University. + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "../board/xilinx/xupv2p/xparameters.h" + +#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ +#define CONFIG_XUPV2P 1 + +/* uart */ +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE +#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } + +/* ethernet */ +#define CONFIG_EMAC 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES + +/* + * setting reset address + * + * TEXT_BASE is set to place, where the U-BOOT run in RAM, but + * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS + * to FLASH memory and after loading bitstream jump to FLASH. + * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze + * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. + */ +#define CFG_RESET_ADDRESS 0x36000000 + +/* gpio */ +#define CFG_GPIO_0 1 +#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR + +/* interrupt controller */ +#define CFG_INTC_0 1 +#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR +#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS + +/* timer */ +#define CFG_TIMER_0 1 +#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR +#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ +#define FREQUENCE XILINX_CLOCK_FREQ +#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) + +/* + * memory layout - Example + * TEXT_BASE = 0x3600_0000; + * CFG_SRAM_BASE = 0x3000_0000; + * CFG_SRAM_SIZE = 0x1000_0000; + * + * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 + * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 + * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 + * + * 0x3000_0000 CFG_SDRAM_BASE + * FREE + * 0x3600_0000 TEXT_BASE + * U-BOOT code + * 0x3602_0000 + * FREE + * + * STACK + * 0x3FF7_F000 CFG_MALLOC_BASE + * MALLOC_AREA 256kB Alloc + * 0x3FFB_F000 CFG_MONITOR_BASE + * MONITOR_CODE 256kB Env + * 0x3FFF_F000 CFG_GBL_DATA_OFFSET + * GLOBAL_DATA 4kB bd, gd + * 0x4000_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE + */ + +/* ddr sdram - main memory */ +#define CFG_SDRAM_BASE XILINX_RAM_START +#define CFG_SDRAM_SIZE XILINX_RAM_SIZE +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) + +/* global pointer */ +#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */ + +/* monitor code */ +#define SIZE 0x40000 +#define CFG_MONITOR_LEN SIZE +#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) +#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CFG_MALLOC_LEN SIZE +#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) + +/* stack */ +#define CFG_INIT_SP_OFFSET CFG_MALLOC_BASE + +#define CFG_NO_FLASH 1 +#define CFG_ENV_IS_NOWHERE 1 +#define CFG_ENV_SIZE 0x1000 +#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) +#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ + CFG_CMD_MEMORY |\ + CFG_CMD_IRQ |\ + CFG_CMD_BDI |\ + CFG_CMD_NET |\ + CFG_CMD_IMI |\ + CFG_CMD_ECHO |\ + CFG_CMD_CACHE |\ + CFG_CMD_RUN |\ + CFG_CMD_AUTOSCRIPT |\ + CFG_CMD_ASKENV |\ + CFG_CMD_LOADS |\ + CFG_CMD_LOADB |\ + CFG_CMD_MISC |\ + CFG_CMD_PING \ + ) + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include + +/* Miscellaneous configurable options */ +#define CFG_PROMPT "U-Boot-mONStR> " +#define CFG_CBSIZE 512 /* size of console buffer */ +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */ +#define CFG_MAXARGS 15 /* max number of command args */ +#define CFG_LONGHELP +#define CFG_LOAD_ADDR 0x12000000 /* default load address */ + +#define CONFIG_BOOTDELAY 30 +#define CONFIG_BOOTARGS "root=romfs" +#define CONFIG_HOSTNAME "ml401" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_IPADDR 192.168.0.3 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_ETHADDR 00:E0:0C:00:00:FD + +/* architecture dependent code */ +#define CFG_USR_EXCEP /* user exception */ +#define CFG_HZ 1000 + +#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ + "base 0;" \ + "echo" + + +/* system ace */ +/*#define CONFIG_SYSTEMACE +#define DEBUG_SYSTEMACE +#define CFG_SYSTEMACE_BASE 0xCF000000 +#define CFG_SYSTEMACE_WIDTH 16 +#define CONFIG_DOS_PARTITION*/ + +#endif /* __CONFIG_H */ diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c index 273d9c441f7..c95125ad33d 100644 --- a/lib_microblaze/board.c +++ b/lib_microblaze/board.c @@ -59,8 +59,8 @@ static ulong mem_malloc_brk; */ static void mem_malloc_init (void) { - mem_malloc_end = CFG_MONITOR_BASE + CFG_MONITOR_LEN; - mem_malloc_start = CFG_MONITOR_BASE; + mem_malloc_end = (CFG_MALLOC_BASE + CFG_MALLOC_LEN); + mem_malloc_start = CFG_MALLOC_BASE; mem_malloc_brk = mem_malloc_start; memset ((void *)mem_malloc_start, 0, mem_malloc_end - mem_malloc_start); } -- cgit v1.3.1 From 213bf8c822de8eecaf69860684469cdaba2e9e6a Mon Sep 17 00:00:00 2001 From: Gerald Van Baren Date: Sat, 31 Mar 2007 12:23:51 -0400 Subject: Add a flattened device tree (fdt) command (2 of 2) Modifications to the existing code to support the new fdt command. --- README | 33 +++++++++---- board/mpc8360emds/config.mk | 6 +++ board/mpc8360emds/mpc8360emds.c | 30 +++++++++--- board/mpc8360emds/pci.c | 20 ++++++++ common/Makefile | 2 +- common/cmd_bootm.c | 65 +++++++++++++++++++++---- cpu/mpc83xx/cpu.c | 102 +++++++++++++++++++++++++++++++++++++++- include/configs/MPC8360EMDS.h | 6 ++- 8 files changed, 237 insertions(+), 27 deletions(-) (limited to 'cpu') diff --git a/README b/README index 15428643ede..87d6d10717a 100644 --- a/README +++ b/README @@ -164,6 +164,7 @@ Directory Hierarchy: - lib_mips Files generic to MIPS architecture - lib_nios Files generic to NIOS architecture - lib_ppc Files generic to PowerPC architecture +- libfdt Library files to support flattened device trees - net Networking code - post Power On Self Test - rtc Real Time Clock drivers @@ -430,12 +431,23 @@ The following options need to be configured: expect it to be in bytes, others in MB. Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. - CONFIG_OF_FLAT_TREE + CONFIG_OF_LIBFDT / CONFIG_OF_FLAT_TREE New kernel versions are expecting firmware settings to be - passed using flat open firmware trees. - The environment variable "disable_of", when set, disables this - functionality. + passed using flattened device trees (based on open firmware + concepts). + + CONFIG_OF_LIBFDT + * New libfdt-based support + * Adds the "fdt" command + * The bootm command does _not_ modify the fdt + + CONFIG_OF_FLAT_TREE + * Deprecated, see CONFIG_OF_LIBFDT + * Original ft_build.c-based support + * Automatically modifies the dft as part of the bootm command + * The environment variable "disable_of", when set, + disables this functionality. CONFIG_OF_FLAT_TREE_MAX_SIZE @@ -448,13 +460,16 @@ The following options need to be configured: CONFIG_OF_HAS_BD_T - The resulting flat device tree will have a copy of the bd_t. - Space should be pre-allocated in the dts for the bd_t. + * CONFIG_OF_LIBFDT - enables the "fdt bd_t" command + * CONFIG_OF_FLAT_TREE - The resulting flat device tree + will have a copy of the bd_t. Space should be + pre-allocated in the dts for the bd_t. CONFIG_OF_HAS_UBOOT_ENV - The resulting flat device tree will have a copy of u-boot's - environment variables + * CONFIG_OF_LIBFDT - enables the "fdt bd_t" command + * CONFIG_OF_FLAT_TREE - The resulting flat device tree + will have a copy of u-boot's environment variables CONFIG_OF_BOARD_SETUP @@ -721,6 +736,8 @@ The following options need to be configured: #define CONFIG_COMMANDS (CFG_CMD_ALL & ~CFG_CMD_NET) + Other Commands: + fdt (flattened device tree) command: CONFIG_OF_LIBFDT Note: Don't enable the "icache" and "dcache" commands (configuration option CFG_CMD_CACHE) unless you know diff --git a/board/mpc8360emds/config.mk b/board/mpc8360emds/config.mk index 9ace8860cfd..d2a94358287 100644 --- a/board/mpc8360emds/config.mk +++ b/board/mpc8360emds/config.mk @@ -26,3 +26,9 @@ # TEXT_BASE = 0xFE000000 + +# +# Additional board-specific libraries +# +BOARDLIBS = libfdt/libfdt.a + diff --git a/board/mpc8360emds/mpc8360emds.c b/board/mpc8360emds/mpc8360emds.c index 535884cb509..deadb5ffbe2 100644 --- a/board/mpc8360emds/mpc8360emds.c +++ b/board/mpc8360emds/mpc8360emds.c @@ -31,6 +31,10 @@ #if defined(CONFIG_OF_FLAT_TREE) #include #endif +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#endif const qe_iop_conf_t qe_iop_conf_tab[] = { /* GETH1 */ @@ -658,22 +662,36 @@ U_BOOT_CMD(ecc, 4, 0, do_ecc, " - disables injects\n" " - re-inits memory"); #endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */ -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if (defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)) \ + && defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { +#if defined(CONFIG_OF_LIBFDT) + int nodeoffset; + int err; + int tmp[2]; + + nodeoffset = fdt_path_offset (fdt, "/memory"); + if (nodeoffset >= 0) { + tmp[0] = cpu_to_be32(bd->bi_memstart); + tmp[1] = cpu_to_be32(bd->bi_memsize); + err = fdt_setprop(fdt, nodeoffset, "reg", tmp, sizeof(tmp)); + } +#else u32 *p; int len; -#ifdef CONFIG_PCI - ft_pci_setup(blob, bd); -#endif - ft_cpu_setup(blob, bd); - p = ft_get_prop(blob, "/memory/reg", &len); if (p != NULL) { *p++ = cpu_to_be32(bd->bi_memstart); *p = cpu_to_be32(bd->bi_memsize); } +#endif + +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif + ft_cpu_setup(blob, bd); } #endif diff --git a/board/mpc8360emds/pci.c b/board/mpc8360emds/pci.c index 67cd70981ca..158effe0a9f 100644 --- a/board/mpc8360emds/pci.c +++ b/board/mpc8360emds/pci.c @@ -21,6 +21,10 @@ #if defined(CONFIG_OF_FLAT_TREE) #include #endif +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#endif #include @@ -299,6 +303,22 @@ void pci_init_board(void) } #endif /* CONFIG_PCISLAVE */ +#if defined(CONFIG_OF_LIBFDT) +void +ft_pci_setup(void *blob, bd_t *bd) +{ + int nodeoffset; + int err; + int tmp[2]; + + nodeoffset = fdt_path_offset (fdt, "/" OF_SOC "/pci@8500"); + if (nodeoffset >= 0) { + tmp[0] = cpu_to_be32(hose[0].first_busno); + tmp[1] = cpu_to_be32(hose[0].last_busno); + err = fdt_setprop(fdt, nodeoffset, "bus-range", tmp, sizeof(tmp)); + } +} +#endif /* CONFIG_OF_LIBFDT */ #ifdef CONFIG_OF_FLAT_TREE void ft_pci_setup(void *blob, bd_t *bd) diff --git a/common/Makefile b/common/Makefile index 6f81c4abcf3..74a6af204e5 100644 --- a/common/Makefile +++ b/common/Makefile @@ -32,7 +32,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o cmd_autoscript.o \ cmd_cache.o cmd_console.o \ cmd_date.o cmd_dcr.o cmd_diag.o cmd_display.o cmd_doc.o cmd_dtt.o \ cmd_eeprom.o cmd_elf.o cmd_ext2.o \ - cmd_fat.o cmd_fdc.o cmd_fdos.o cmd_flash.o cmd_fpga.o \ + cmd_fat.o cmd_fdc.o cmd_fdt.o cmd_fdos.o cmd_flash.o cmd_fpga.o \ cmd_i2c.o cmd_ide.o cmd_immap.o cmd_itest.o cmd_jffs2.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index c0ed076bb90..ab8648fffcf 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -34,7 +34,11 @@ #include #include -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#endif +#if defined(CONFIG_OF_FLAT_TREE) #include #endif @@ -467,7 +471,7 @@ U_BOOT_CMD( "[addr [arg ...]]\n - boot application image stored in memory\n" "\tpassing arguments 'arg ...'; when booting a Linux kernel,\n" "\t'arg' can be the address of an initrd image\n" -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) "\tWhen booting a Linux kernel which requires a flat device-tree\n" "\ta third argument is required which is the address of the of the\n" "\tdevice-tree blob. To boot that kernel without an initrd image,\n" @@ -529,7 +533,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, bd_t *kbd; void (*kernel)(bd_t *, ulong, ulong, ulong, ulong); image_header_t *hdr = &header; -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) char *of_flat_tree = NULL; ulong of_data = 0; #endif @@ -622,7 +626,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, * Check if there is an initrd image */ -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) /* Look for a '-' which indicates to ignore the ramdisk argument */ if (argc >= 3 && strcmp(argv[2], "-") == 0) { debug ("Skipping initrd\n"); @@ -739,12 +743,15 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, len = data = 0; } -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) if(argc > 3) { of_flat_tree = (char *) simple_strtoul(argv[3], NULL, 16); hdr = (image_header_t *)of_flat_tree; - - if (*(ulong *)of_flat_tree == OF_DT_HEADER) { +#if defined(CONFIG_OF_LIBFDT) + if (be32_to_cpu(fdt_magic(of_flat_tree)) == FDT_MAGIC) { +#else + if (*(ulong *)of_flat_tree == OF_DT_HEADER) { +#endif #ifndef CFG_NO_FLASH if (addr2info((ulong)of_flat_tree) != NULL) of_data = (ulong)of_flat_tree; @@ -787,7 +794,11 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, printf("ERROR: uImage is not uncompressed\n"); return; } +#if defined(CONFIG_OF_LIBFDT) + if (be32_to_cpu(fdt_magic(of_flat_tree + sizeof(image_header_t))) != FDT_MAGIC) { +#else if (*((ulong *)(of_flat_tree + sizeof(image_header_t))) != OF_DT_HEADER) { +#endif printf ("ERROR: uImage data is not a flat device tree\n"); return; } @@ -824,12 +835,20 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, of_data += 4 - tail; } +#if defined(CONFIG_OF_LIBFDT) + if (be32_to_cpu(fdt_magic(of_data)) != FDT_MAGIC) { +#else if (((struct boot_param_header *)of_data)->magic != OF_DT_HEADER) { +#endif printf ("ERROR: image is not a flat device tree\n"); return; } +#if defined(CONFIG_OF_LIBFDT) + if (be32_to_cpu(fdt_totalsize(of_data)) != ntohl(len_ptr[2])) { +#else if (((struct boot_param_header *)of_data)->totalsize != ntohl(len_ptr[2])) { +#endif printf ("ERROR: flat device tree size does not agree with image\n"); return; } @@ -913,7 +932,31 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, unlock_ram_in_cache(); #endif -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_LIBFDT) + /* move of_flat_tree if needed */ + if (of_data) { + int err; + ulong of_start, of_len; + of_len = be32_to_cpu(fdt_totalsize(of_data)); + /* provide extra 8k pad */ + if (initrd_start) + of_start = initrd_start - of_len - 8192; + else + of_start = (ulong)kbd - of_len - 8192; + of_start &= ~(4096 - 1); /* align on page */ + debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n", + of_data, of_data + of_len - 1, of_len, of_len); + + + printf (" Loading Device Tree to %08lx, end %08lx ... ", + of_start, of_start + of_len - 1); + err = fdt_open_into(of_start, of_data, of_len); + if (err != 0) { + printf ("libfdt: %s\n", fdt_strerror(err)); + } + } +#endif +#if defined(CONFIG_OF_FLAT_TREE) /* move of_flat_tree if needed */ if (of_data) { ulong of_start, of_len; @@ -942,13 +985,13 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, * r6: Start of command line string * r7: End of command line string */ -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) if (!of_flat_tree) /* no device tree; boot old style */ #endif (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); /* does not return */ -#ifdef CONFIG_OF_FLAT_TREE +#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT) /* * Linux Kernel Parameters (passing device tree): * r3: ptr to OF flat tree, followed by the board info data @@ -957,8 +1000,10 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, * r6: NULL * r7: NULL */ +#if defined(CONFIG_OF_FLAT_TREE) ft_setup(of_flat_tree, kbd, initrd_start, initrd_end); /* ft_dump_blob(of_flat_tree); */ +#endif (*kernel) ((bd_t *)of_flat_tree, (ulong)kernel, 0, 0, 0); #endif diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index e4bc4052db5..851241adfb4 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -30,8 +30,14 @@ #include #include #include -#include #include +#if defined(CONFIG_OF_FLAT_TREE) +#include +#endif +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -291,6 +297,100 @@ void watchdog_reset (void) } #endif +#if defined(CONFIG_OF_LIBFDT) + +/* + * Fixups to the fdt. If "create" is TRUE, the node is created + * unconditionally. If "create" is FALSE, the node is updated + * only if it already exists. + */ +#define FT_UPDATE 0x00000000 /* update existing property only */ +#define FT_CREATE 0x00000001 /* create property if it doesn't exist */ +#define FT_BUSFREQ 0x00000002 /* source is bd->bi_busfreq */ +#define FT_ENETADDR 0x00000004 /* source is bd->bi_enetaddr */ +static const struct { + int createflags; + char *node; + char *prop; +} fixup_props[] = { + { FT_CREATE | FT_BUSFREQ, + "/cpus/" OF_CPU, + "bus-frequency", + }, + { FT_CREATE | FT_BUSFREQ, + "/cpus/" OF_SOC, + "bus-frequency" + }, + { FT_CREATE | FT_BUSFREQ, + "/" OF_SOC "/serial@4500/", + "clock-frequency" + }, + { FT_CREATE | FT_BUSFREQ, + "/" OF_SOC "/serial@4600/", + "clock-frequency" + }, +#ifdef CONFIG_MPC83XX_TSEC1 + { FT_UPDATE | FT_ENETADDR, + "/" OF_SOC "/ethernet@24000, + "mac-address", + }, + { FT_UPDATE | FT_ENETADDR, + "/" OF_SOC "/ethernet@24000, + "local-mac-address", + }, +#endif +#ifdef CONFIG_MPC83XX_TSEC2 + { FT_UPDATE | FT_ENETADDR, + "/" OF_SOC "/ethernet@25000, + "mac-address", + }, + { FT_UPDATE | FT_ENETADDR, + "/" OF_SOC "/ethernet@25000, + "local-mac-address", + }, +#endif +}; + +void +ft_cpu_setup(void *blob, bd_t *bd) +{ + int nodeoffset; + int err; + int j; + + for (j = 0; j < (sizeof(fixup_props) / sizeof(fixup_props[0])); j++) { + nodeoffset = fdt_path_offset (fdt, fixup_props[j].node); + if (nodeoffset >= 0) { + /* + * If unconditional create or the property already exists... + */ + if ((fixup_props[j].createflags & FT_CREATE) || + (fdt_get_property(fdt, nodeoffset, fixup_props[j].prop, 0))) { + if (fixup_props[j].createflags & FT_BUSFREQ) { + u32 tmp; + + tmp = cpu_to_be32(bd->bi_busfreq); + err = fdt_setprop(fdt, nodeoffset, + fixup_props[j].prop, &tmp, sizeof(tmp)); + } else if (fixup_props[j].createflags & FT_ENETADDR) { + err = fdt_setprop(fdt, nodeoffset, + fixup_props[j].prop, bd->bi_enetaddr, 6); + } else { + printf("ft_cpu_setup: %s %s has no flag for the value to set\n", + fixup_props[j].node, + fixup_props[j].prop); + } + if (err < 0) + printf("libfdt: %s %s returned %s\n", + fixup_props[j].node, + fixup_props[j].prop, + fdt_strerror(err)); + } + } + } +} +#endif + #if defined(CONFIG_OF_FLAT_TREE) void ft_cpu_setup(void *blob, bd_t *bd) diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index d2af0e1dfc4..79937dcd8f9 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -342,8 +342,12 @@ #endif /* pass open firmware flat tree */ -#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_LIBFDT 1 +#undef CONFIG_OF_FLAT_TREE #define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_HAS_BD_T 1 +#define CONFIG_OF_HAS_UBOOT_ENV 1 + /* maximum size of the flat tree (8K) */ #define OF_FLAT_TREE_MAX_SIZE 8192 -- cgit v1.3.1 From aea03c4e8c3a21ce43d3faf48a6e6d474c8bdf73 Mon Sep 17 00:00:00 2001 From: Gerald Van Baren Date: Sat, 31 Mar 2007 14:30:53 -0400 Subject: Fix some minor whitespace violations. --- common/cmd_bootm.c | 2 +- cpu/mpc83xx/cpu.c | 4 ++-- libfdt/fdt_ro.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'cpu') diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index ab8648fffcf..2721216bf35 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -38,7 +38,7 @@ #include #include #endif -#if defined(CONFIG_OF_FLAT_TREE) +#if defined(CONFIG_OF_FLAT_TREE) #include #endif diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 851241adfb4..21b16463cd7 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -377,12 +377,12 @@ ft_cpu_setup(void *blob, bd_t *bd) fixup_props[j].prop, bd->bi_enetaddr, 6); } else { printf("ft_cpu_setup: %s %s has no flag for the value to set\n", - fixup_props[j].node, + fixup_props[j].node, fixup_props[j].prop); } if (err < 0) printf("libfdt: %s %s returned %s\n", - fixup_props[j].node, + fixup_props[j].node, fixup_props[j].prop, fdt_strerror(err)); } diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c index f8840839502..4b20553da0a 100644 --- a/libfdt/fdt_ro.c +++ b/libfdt/fdt_ro.c @@ -171,7 +171,7 @@ int fdt_path_offset(const void *fdt, const char *path) p = q; } - return offset; + return offset; } /* @@ -240,7 +240,7 @@ struct fdt_property *fdt_get_property(const void *fdt, if (lenp) *lenp = len; - + return prop; } break; -- cgit v1.3.1 From 31c98a88228021b314c89ebb8104fb6473da4471 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 4 Apr 2007 02:09:30 +0200 Subject: Minor coding style cleanup. --- CHANGELOG | 64 +++++++++++++++++++++++++++++++ Makefile | 1 - board/xilinx/xilinx_enet/emac_adapter.c | 2 +- cpu/microblaze/start.S | 2 +- include/asm-microblaze/microblaze_intc.h | 1 - include/asm-microblaze/microblaze_timer.h | 1 - include/configs/ml401.h | 2 +- include/configs/xupv2p.h | 2 +- 8 files changed, 68 insertions(+), 7 deletions(-) (limited to 'cpu') diff --git a/CHANGELOG b/CHANGELOG index 0bff39eecc6..7425ceb2a89 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,9 @@ +commit 94abd7c0583ebe01e799b25f451201deeaab550d +Author: Wolfgang Denk +Date: Wed Apr 4 01:49:15 2007 +0200 + + Minor cleanup. + commit aea03c4e8c3a21ce43d3faf48a6e6d474c8bdf73 Author: Gerald Van Baren Date: Sat Mar 31 14:30:53 2007 -0400 @@ -60,6 +66,32 @@ Date: Sat Mar 31 11:59:59 2007 -0400 This adds the applicable libfdt source files (unmodified) and a README to explain where the source came from. +commit 342cd097be1e7affe82f42ab3da220959a699e64 +Author: Michal Simek +Date: Fri Mar 30 22:52:09 2007 +0200 + + [PATCH] Clean include dependence + +commit 6f934210fb293fde2cfb4251c6d96fdc58b6a906 +Author: Michal Simek +Date: Fri Mar 30 22:42:45 2007 +0200 + + [CLEAN] Remove inefficient Suzaku code + +commit 5da048adf44bea5e3b94080d02903c2e3fe7aa4a +Author: Michal Simek +Date: Tue Mar 27 00:32:16 2007 +0200 + + PATCH: Resolve GPL license problem + +commit 1798049522f594013aea29457d46794298c6ae15 +Author: Michal Simek +Date: Mon Mar 26 01:39:07 2007 +0200 + + Support for XUPV2P board + Reset support + BSP autoconfig support + commit 6eb1df835191d8ce4b81d5af40fa8e0fbe78e997 Author: Jon Loeliger Date: Tue Dec 12 11:02:20 2006 -0600 @@ -266,6 +298,38 @@ Date: Mon Mar 12 00:25:14 2007 +0800 [Blackfin][PATCH] code cleanup +commit cfc67116a706fd18b8f6a9c11a16753c5626d689 +Author: Michal Simek +Date: Sun Mar 11 13:48:24 2007 +0100 + + [Microblaze][PATCH] part 2 + timer support + interrupt controller support + flash support + ethernet support + cache support + board information support + env support + booting image support + + adding support for Xilinx ML401 + +commit 76316a318de91f6184e7c22a10e02d275ade2441 +Author: Michal Simek +Date: Sun Mar 11 13:42:58 2007 +0100 + + [Microblaze][PATCH] + timer support + interrupt controller support + flash support + ethernet support + cache support + board information support + env support + booting image support + + adding support for Xilinx ML401 + commit 8db13d63157811c839d15a313d9f2d2f5fd10af3 Author: Aubrey Li Date: Sat Mar 10 23:49:29 2007 +0800 diff --git a/Makefile b/Makefile index 92350500f47..29b6210ff78 100644 --- a/Makefile +++ b/Makefile @@ -2450,4 +2450,3 @@ backup: gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F ######################################################################### - diff --git a/board/xilinx/xilinx_enet/emac_adapter.c b/board/xilinx/xilinx_enet/emac_adapter.c index 5a7e59e6340..d3403038e65 100644 --- a/board/xilinx/xilinx_enet/emac_adapter.c +++ b/board/xilinx/xilinx_enet/emac_adapter.c @@ -147,7 +147,7 @@ eth_rx(void) RecvFrameLength = PKTSIZE; Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength); if (Result == XST_SUCCESS) { -#ifndef CONFIG_EMACLITE +#ifndef CONFIG_EMACLITE NetReceive((uchar *)etherrxbuff, RecvFrameLength); #else NetReceive(etherrxbuff, RecvFrameLength); diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 29481af9ae9..ca3befc24e8 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -54,7 +54,7 @@ _start: lhu r7, r1, r0 shi r7, r0, 0x2 shi r6, r0, 0x6 -/* +/* * Copy U-Boot code to TEXT_BASE * solve problem with sbrk_base */ diff --git a/include/asm-microblaze/microblaze_intc.h b/include/asm-microblaze/microblaze_intc.h index 73f732c5667..6635aeacba1 100644 --- a/include/asm-microblaze/microblaze_intc.h +++ b/include/asm-microblaze/microblaze_intc.h @@ -38,4 +38,3 @@ struct irq_action { void *arg; int count; /* number of interrupt */ }; - diff --git a/include/asm-microblaze/microblaze_timer.h b/include/asm-microblaze/microblaze_timer.h index b3d194bd476..844c8db1151 100644 --- a/include/asm-microblaze/microblaze_timer.h +++ b/include/asm-microblaze/microblaze_timer.h @@ -39,4 +39,3 @@ typedef volatile struct microblaze_timer_t { int loadreg; /* load register TLR */ int counter; /* timer/counter register */ } microblaze_timer_t; - diff --git a/include/configs/ml401.h b/include/configs/ml401.h index f4a8a1f2285..cb159e79dc6 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -66,7 +66,7 @@ * * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 - * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 + * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 * * 0x1000_0000 CFG_SDRAM_BASE * FREE diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 224db5c8be1..a2f48102f0c 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -41,7 +41,7 @@ /* * setting reset address - * + * * TEXT_BASE is set to place, where the U-BOOT run in RAM, but * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS * to FLASH memory and after loading bitstream jump to FLASH. -- cgit v1.3.1