From 6cc64f9b5f69239c8b1969572b5a3a4aab7de5b9 Mon Sep 17 00:00:00 2001 From: Sergei Poselenov Date: Fri, 15 Aug 2008 15:42:11 +0200 Subject: Removed hardcoded MxMR loop value from upmconfig() for MPC85xx. Signed-off-by: Sergei Poselenov --- cpu/mpc85xx/cpu.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) (limited to 'cpu') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 7976caca67e..67e81c0574d 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -298,15 +298,14 @@ int dma_xfer(void *dest, uint count, void *src) { #endif /* - * Configures a UPM. Currently, the loop fields in MxMR (RLF, WLF and TLF) - * are hardcoded as "1"."size" is the number or entries, not a sizeof. + * Configures a UPM. The function requires the respective MxMR to be set + * before calling this function. "size" is the number or entries, not a sizeof. */ void upmconfig (uint upm, uint * table, uint size) { int i, mdr, mad, old_mad = 0; volatile u32 *mxmr; volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); - int loopval = 0x00004440; volatile u32 *brp,*orp; volatile u8* dummy = NULL; int upmmask; @@ -334,8 +333,8 @@ void upmconfig (uint upm, uint * table, uint size) i++, brp += 2, orp += 2) { /* Look for a valid BR with selected UPM */ - if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) { - dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT); + if ((in_be32(brp) & (BR_V | BR_MSEL)) == (BR_V | upmmask)) { + dummy = (volatile u8*)(in_be32(brp) & BR_BA); break; } } @@ -347,7 +346,7 @@ void upmconfig (uint upm, uint * table, uint size) for (i = 0; i < size; i++) { /* 1 */ - out_be32(mxmr, loopval | 0x10000000 | i); /* OP_WRITE */ + out_be32(mxmr, (in_be32(mxmr) & 0x4fffffc0) | MxMR_OP_WARR | i); /* 2 */ out_be32(&lbc->mdr, table[i]); /* 3 */ @@ -356,11 +355,11 @@ void upmconfig (uint upm, uint * table, uint size) *(volatile u8 *)dummy = 0; /* 5 */ do { - mad = in_be32(mxmr) & 0x3f; + mad = in_be32(mxmr) & MxMR_MAD_MSK; } while (mad <= old_mad && !(!mad && i == (size-1))); old_mad = mad; } - out_be32(mxmr, loopval); /* OP_NORMAL */ + out_be32(mxmr, (in_be32(mxmr) & 0x4fffffc0) | MxMR_OP_NORM); } -- cgit v1.3.1 From e0ff3d350d6b7960deb5a881dfc5acf3a63ef676 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 8 Sep 2008 08:51:29 -0500 Subject: 85xx: Ensure timebase is zero on secondary cores The e500um says the timebase is volatile out of reset. To ensure TB sync works we need to make sure its zero. Signed-off-by: Kumar Gala --- cpu/mpc85xx/release.S | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'cpu') diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index 75676b5b9e8..ec5e4daf88f 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -37,6 +37,11 @@ __secondary_start_page: li r3,0x201 mtspr SPRN_BUCSR,r3 + /* Ensure TB is 0 */ + li r3,0 + mttbl r3 + mttbu r3 + /* Enable/invalidate the I-Cache */ mfspr r0,SPRN_L1CSR1 ori r0,r0,(L1CSR1_ICFI|L1CSR1_ICE) -- cgit v1.3.1 From 5251469943895de4bb9a04d5053352cc22acb7d5 Mon Sep 17 00:00:00 2001 From: Andrew Klossner Date: Thu, 21 Aug 2008 07:12:26 -0700 Subject: Fix printf errors under -DDEBUG Fix printf format-string/arg mismatches under -DDEBUG. These warnings occur with DEBUG defined for a platform using cpu/mpc85xx. Users of other architectures can unearth similar problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right after "CFLAGS += $(call cc-option,-fno-stack-protector)". Signed-off-by: Andrew Klossner Signed-off-by: Andy Fleming --- common/image.c | 2 +- cpu/mpc85xx/interrupts.c | 14 +++++++------- drivers/mtd/cfi_flash.c | 2 +- 3 files changed, 9 insertions(+), 9 deletions(-) (limited to 'cpu') diff --git a/common/image.c b/common/image.c index f7e8606ccad..d7fcd1db21b 100644 --- a/common/image.c +++ b/common/image.c @@ -1563,7 +1563,7 @@ int boot_get_fdt (int flag, int argc, char *argv[], bootm_headers_t *images, *of_flat_tree = fdt_blob; *of_size = be32_to_cpu (fdt_totalsize (fdt_blob)); debug (" of_flat_tree at 0x%08lx size 0x%08lx\n", - *of_flat_tree, *of_size); + (ulong)*of_flat_tree, *of_size); return 0; diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c index 06d4d8b7342..d702ca6e4c2 100644 --- a/cpu/mpc85xx/interrupts.c +++ b/cpu/mpc85xx/interrupts.c @@ -48,29 +48,29 @@ int interrupt_init_cpu(unsigned long *decrementer_count) #ifdef CONFIG_INTERRUPTS pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */ - debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1); + debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1); pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ - debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2); + debug("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2); pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ - debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3); + debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3); #ifdef CONFIG_PCI1 pic->iivpr8 = 0x810008; /* enable pci1 interrupts */ - debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8); + debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8); #endif #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) pic->iivpr9 = 0x810009; /* enable pci1 interrupts */ - debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9); + debug("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9); #endif #ifdef CONFIG_PCIE1 pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */ - debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10); + debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10); #endif #ifdef CONFIG_PCIE3 pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */ - debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11); + debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11); #endif pic->ctpr=0; /* 40080 clear current task priority register */ diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 03ea2d040d7..a74321d5c0e 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -516,7 +516,7 @@ static int flash_isequal (flash_info_t * info, flash_sect_t sect, retval = (flash_read16(addr) == cword.w); break; case FLASH_CFI_32BIT: - debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l); + debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); retval = (flash_read32(addr) == cword.l); break; case FLASH_CFI_64BIT: -- cgit v1.3.1