From f1d66ed728c6eef6a91522ba989348b4a69939c1 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Tue, 5 Dec 2023 13:46:52 +0000 Subject: gpio: qcom_pmic: drop gpio-count property This property is not part of the dt bindings and all boards use the new gpio-ranges property instead. Drop support for this. Reviewed-by: Neil Armstrong Reviewed-by: Sumit Garg Tested-by: Sumit Garg Signed-off-by: Caleb Connolly --- doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 --------------------------- 1 file changed, 48 deletions(-) delete mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt (limited to 'doc') diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt b/doc/device-tree-bindings/gpio/pm8916_gpio.txt deleted file mode 100644 index 58185b83352..00000000000 --- a/doc/device-tree-bindings/gpio/pm8916_gpio.txt +++ /dev/null @@ -1,48 +0,0 @@ -Driver for part of pm8916 PMIC - gpio and power/reset keys - -This device should be child of SPMI pmic. - -1) GPIO driver - -Required properties: -- compatible: "qcom,pm8916-gpio" -- reg: peripheral ID, size of register block -- gpio-controller -- gpio-count: number of GPIOs -- #gpio-cells: 2 - -Optional properties: -- gpio-bank-name: name of bank (as default "pm8916" is used) - -Example: - -pmic_gpios: gpios@c000 { - compatible = "qcom,pm8916-gpio"; - reg = <0xc000 0x400>; - gpio-controller; - gpio-count = <4>; - #gpio-cells = <2>; - gpio-bank-name="pmic"; -}; - - -2) Power/Reset key driver - -Required properties: -- compatible: "qcom,pm8916-pwrkey" -- reg: peripheral ID, size of register block -- gpio-controller -- #gpio-cells: 2 - -Optional properties: -- gpio-bank-name: name of bank (as default "pm8916_key" is used) - - -Example: - -pmic_pon: pon@800 { - compatible = "qcom,pm8916-pwrkey"; - reg = <0x800 0x96>; - #gpio-cells = <2>; - gpio-controller; -}; -- cgit v1.3.1 From 92fe08921c769994817004b4b7e621d32f0431dd Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Tue, 5 Dec 2023 13:46:53 +0000 Subject: spmi: msm: fix register range names The core and chnl register ranges were swapped on SDM845. Fix it, and fetch the register ranges by name instead of by index. Drop the cosmetic "version" variable and clean up the debug logging. Reviewed-by: Neil Armstrong Reviewed-by: Sumit Garg Tested-by: Sumit Garg Signed-off-by: Caleb Connolly --- arch/arm/dts/qcs404-evb.dts | 7 +++-- arch/arm/dts/sdm845.dtsi | 2 +- doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ----------------- drivers/spmi/spmi-msm.c | 46 ++++++++++++------------------ 4 files changed, 23 insertions(+), 58 deletions(-) delete mode 100644 doc/device-tree-bindings/spmi/spmi-msm.txt (limited to 'doc') diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index bd2e303e10f..07bf7dd0b32 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -362,9 +362,10 @@ spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f000 0x1000 - 0x2400000 0x400000 - 0x2c00000 0x400000>; + reg = <0x200f000 0x001000>, + <0x2400000 0x800000>, + <0x2c00000 0x800000>; + reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>; diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index a26e9f411ee..96c9749a52c 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -63,7 +63,7 @@ reg = <0xc440000 0x1100>, <0xc600000 0x2000000>, <0xe600000 0x100000>; - reg-names = "cnfg", "core", "obsrvr"; + reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>; diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt b/doc/device-tree-bindings/spmi/spmi-msm.txt deleted file mode 100644 index ae47673b768..00000000000 --- a/doc/device-tree-bindings/spmi/spmi-msm.txt +++ /dev/null @@ -1,26 +0,0 @@ -Qualcomm SPMI arbiter/bus driver - -This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs. - -Required properties: -- compatible: "qcom,spmi-pmic-arb" -- reg: Register block adresses and sizes for various parts of device: - 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn) - 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS) - 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS) - -Optional properties (if not set by parent): -- #address-cells: 0x1 - childs slave ID address -- #size-cells: 0x1 - -All PMICs should be placed as a child nodes of bus arbiter. -Automatic detection of childs is currently not supported. - -Example: - -spmi@200f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; - #address-cells = <0x1>; - #size-cells = <0x1>; -}; diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 27a035c0a59..5fe8a70abca 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -70,7 +70,7 @@ enum pmic_arb_channel { struct msm_spmi_priv { phys_addr_t arb_chnl; /* ARB channel mapping base */ - phys_addr_t spmi_core; /* SPMI core */ + phys_addr_t spmi_chnls; /* SPMI channels */ phys_addr_t spmi_obs; /* SPMI observer */ /* SPMI channel map */ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH]; @@ -95,10 +95,10 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, /* Disable IRQ mode for the current channel*/ writel(0x0, - priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); + priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); /* Write single byte */ - writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); + writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); /* Prepare write command */ reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT; @@ -113,12 +113,12 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, ch_offset = SPMI_CH_OFFSET(channel); /* Send write command */ - writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); + writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); /* Wait till CMD DONE status */ reg = 0; while (!reg) { - reg = readl(priv->spmi_core + SPMI_CH_OFFSET(channel) + + reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_STATUS); } @@ -186,47 +186,37 @@ static struct dm_spmi_ops msm_spmi_ops = { static int msm_spmi_probe(struct udevice *dev) { struct msm_spmi_priv *priv = dev_get_priv(dev); - phys_addr_t config_addr; + phys_addr_t core_addr; u32 hw_ver; - u32 version; int i; - int err; - config_addr = dev_read_addr_index(dev, 0); - priv->spmi_core = dev_read_addr_index(dev, 1); - priv->spmi_obs = dev_read_addr_index(dev, 2); + core_addr = dev_read_addr_name(dev, "core"); + priv->spmi_chnls = dev_read_addr_name(dev, "chnls"); + priv->spmi_obs = dev_read_addr_name(dev, "obsrvr"); - hw_ver = readl(config_addr + PMIC_ARB_VERSION); + hw_ver = readl(core_addr + PMIC_ARB_VERSION); if (hw_ver < PMIC_ARB_VERSION_V3_MIN) { priv->arb_ver = V2; - version = 2; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; } else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) { priv->arb_ver = V3; - version = 3; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; } else { priv->arb_ver = V5; - version = 5; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V5; - - if (err) { - dev_err(dev, "could not read APID->PPID mapping table, rc= %d\n", err); - return -1; - } + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5; } - dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", version, hw_ver); + dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver); if (priv->arb_chnl == FDT_ADDR_T_NONE || - priv->spmi_core == FDT_ADDR_T_NONE || + priv->spmi_chnls == FDT_ADDR_T_NONE || priv->spmi_obs == FDT_ADDR_T_NONE) return -EINVAL; - dev_dbg(dev, "priv->arb_chnl address (%llu)\n", priv->arb_chnl); - dev_dbg(dev, "priv->spmi_core address (%llu)\n", priv->spmi_core); - dev_dbg(dev, "priv->spmi_obs address (%llu)\n", priv->spmi_obs); + dev_dbg(dev, "priv->arb_chnl address (%#08llx)\n", priv->arb_chnl); + dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls); + dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs); /* Scan peripherals connected to each SPMI channel */ for (i = 0; i < SPMI_MAX_PERIPH; i++) { uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i)); -- cgit v1.3.1 From 64550c7f4d34def290d4952ed5c53357802626ec Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Tue, 5 Dec 2023 13:46:54 +0000 Subject: pmic: qcom: dont use dev_read_addr to get USID Linux DTs stuff a value indicating if the USID is a USID or a GSID in the reg property, the Linux SPMI driver then reads the two address cells separately. U-boot's dev_read_addr() doesn't know how to handle this, so use ofnode_read_u32_index() to get just the USID. The Qcom pmic driver doesn't have support for GSID handling, so just ignore the second value for now. Reviewed-by: Neil Armstrong Reviewed-by: Sumit Garg Tested-by: Sumit Garg Signed-off-by: Caleb Connolly --- doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt | 94 ------------------------ drivers/power/pmic/pmic_qcom.c | 15 +++- 2 files changed, 11 insertions(+), 98 deletions(-) delete mode 100644 doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt (limited to 'doc') diff --git a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt b/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt deleted file mode 100644 index eb78e3ae770..00000000000 --- a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt +++ /dev/null @@ -1,94 +0,0 @@ - Qualcomm SPMI PMICs multi-function device bindings - -The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084 -PMICs. These PMICs use a QPNP scheme through SPMI interface. -QPNP is effectively a partitioning scheme for dividing the SPMI extended -register space up into logical pieces, and set of fixed register -locations/definitions within these regions, with some of these regions -specifically used for interrupt handling. - -The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are -interfaced to the chip via the SPMI (System Power Management Interface) bus. -Support for multiple independent functions are implemented by splitting the -16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes -each. A function can consume one or more of these fixed-size register regions. - -Required properties: -- compatible: Should contain one of: - "qcom,pm660", - "qcom,pm660l", - "qcom,pm7325", - "qcom,pm8004", - "qcom,pm8005", - "qcom,pm8019", - "qcom,pm8028", - "qcom,pm8110", - "qcom,pm8150", - "qcom,pm8150b", - "qcom,pm8150c", - "qcom,pm8150l", - "qcom,pm8226", - "qcom,pm8350c", - "qcom,pm8841", - "qcom,pm8901", - "qcom,pm8909", - "qcom,pm8916", - "qcom,pm8941", - "qcom,pm8950", - "qcom,pm8953", - "qcom,pm8994", - "qcom,pm8998", - "qcom,pma8084", - "qcom,pmd9635", - "qcom,pmi8950", - "qcom,pmi8962", - "qcom,pmi8994", - "qcom,pmi8998", - "qcom,pmk8002", - "qcom,pmk8350", - "qcom,pmr735a", - "qcom,smb2351", - or generalized "qcom,spmi-pmic". -- reg: Specifies the SPMI USID slave address for this device. - For more information see: - Documentation/devicetree/bindings/spmi/spmi.yaml - -Required properties for peripheral child nodes: -- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name. - -Optional properties for peripheral child nodes: -- interrupts: Interrupts are specified as a 4-tuple. For more information - see: - Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml -- interrupt-names: Corresponding interrupt name to the interrupts property - -Each child node of SPMI slave id represents a function of the PMIC. In the -example below the rtc device node represents a peripheral of pm8941 -SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1. - -Example: - - spmi { - compatible = "qcom,spmi-pmic-arb"; - - pm8941@0 { - compatible = "qcom,pm8941", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - - rtc { - compatible = "qcom,rtc"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "alarm"; - }; - }; - - pm8941@1 { - compatible = "qcom,pm8941", "qcom,spmi-pmic"; - reg = <0x1 SPMI_USID>; - - regulator { - compatible = "qcom,regulator"; - regulator-name = "8941_boost"; - }; - }; - }; diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c index ad8daf43f06..f2ac6494811 100644 --- a/drivers/power/pmic/pmic_qcom.c +++ b/drivers/power/pmic/pmic_qcom.c @@ -66,12 +66,19 @@ static const struct udevice_id pmic_qcom_ids[] = { static int pmic_qcom_probe(struct udevice *dev) { struct pmic_qcom_priv *priv = dev_get_priv(dev); - - priv->usid = dev_read_addr(dev); - - if (priv->usid == FDT_ADDR_T_NONE) + int ret; + + /* + * dev_read_addr() can't be used here because the reg property actually + * contains two discrete values, not a single 64-bit address. + * The address is the first value. + */ + ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, &priv->usid); + if (ret < 0) return -EINVAL; + debug("usid: %d\n", priv->usid); + return 0; } -- cgit v1.3.1